From 294ca351c7ab3367a42b80a54a0b23f1aa75f773 Mon Sep 17 00:00:00 2001 From: Angelo Salese Date: Sat, 1 May 2010 18:07:25 +0000 Subject: [PATCH] Naomi: improved mirroring --- src/mame/drivers/naomi.c | 61 +++++++++++++++++----------------------- 1 file changed, 26 insertions(+), 35 deletions(-) diff --git a/src/mame/drivers/naomi.c b/src/mame/drivers/naomi.c index ec2c57929a4..03816310631 100644 --- a/src/mame/drivers/naomi.c +++ b/src/mame/drivers/naomi.c @@ -1325,6 +1325,8 @@ static WRITE64_DEVICE_HANDLER( eeprom_93c46a_w ) 7 0x1C000000 - 0x1FFFFFFF(SH4 Internal area) + + */ /* @@ -1368,51 +1370,41 @@ static WRITE64_DEVICE_HANDLER( eeprom_93c46a_w ) static ADDRESS_MAP_START( naomi_map, ADDRESS_SPACE_PROGRAM, 64 ) /* Area 0 */ - AM_RANGE(0x00000000, 0x001fffff) AM_ROM AM_SHARE("share3") AM_REGION("maincpu", 0) // BIOS - AM_RANGE(0xa0000000, 0xa01fffff) AM_ROM AM_SHARE("share3") // non cachable access to 0x00000000 - 0x001fffff + AM_RANGE(0x00000000, 0x001fffff) AM_MIRROR(0xa2000000) AM_ROM AM_REGION("maincpu", 0) // BIOS - AM_RANGE(0x00200000, 0x00207fff) AM_RAM // bios uses it (battery backed ram ?) - AM_RANGE(0x005f6800, 0x005f69ff) AM_READWRITE( dc_sysctrl_r, dc_sysctrl_w ) - AM_RANGE(0x005f6c00, 0x005f6cff) AM_READWRITE( naomi_maple_r, naomi_maple_w ) - AM_RANGE(0x005f7000, 0x005f70ff) AM_DEVREADWRITE("rom_board", naomibd_r, naomibd_w) - AM_RANGE(0x005f7400, 0x005f74ff) AM_READWRITE( dc_g1_ctrl_r, dc_g1_ctrl_w ) - AM_RANGE(0x005f7800, 0x005f78ff) AM_READWRITE( dc_g2_ctrl_r, dc_g2_ctrl_w ) - AM_RANGE(0x005f7c00, 0x005f7cff) AM_READWRITE( pvr_ctrl_r, pvr_ctrl_w ) - AM_RANGE(0x005f8000, 0x005f9fff) AM_READWRITE( pvr_ta_r, pvr_ta_w ) - AM_RANGE(0x00600000, 0x006007ff) AM_READWRITE( dc_modem_r, dc_modem_w ) - AM_RANGE(0x00700000, 0x00707fff) AM_DEVREADWRITE( "aica", dc_aica_reg_r, dc_aica_reg_w ) - AM_RANGE(0x00710000, 0x0071000f) AM_READWRITE( dc_rtc_r, dc_rtc_w ) - AM_RANGE(0x00800000, 0x00ffffff) AM_READWRITE( naomi_arm_r, naomi_arm_w ) // sound RAM (8 MB) + AM_RANGE(0x00200000, 0x00207fff) AM_MIRROR(0x02000000) AM_RAM // bios uses it (battery backed ram ?) + AM_RANGE(0x005f6800, 0x005f69ff) AM_MIRROR(0x02000000) AM_READWRITE( dc_sysctrl_r, dc_sysctrl_w ) + AM_RANGE(0x005f6c00, 0x005f6cff) AM_MIRROR(0x02000000) AM_READWRITE( naomi_maple_r, naomi_maple_w ) + AM_RANGE(0x005f7000, 0x005f70ff) AM_MIRROR(0x02000000) AM_DEVREADWRITE("rom_board", naomibd_r, naomibd_w) + AM_RANGE(0x005f7400, 0x005f74ff) AM_MIRROR(0x02000000) AM_READWRITE( dc_g1_ctrl_r, dc_g1_ctrl_w ) + AM_RANGE(0x005f7800, 0x005f78ff) AM_MIRROR(0x02000000) AM_READWRITE( dc_g2_ctrl_r, dc_g2_ctrl_w ) + AM_RANGE(0x005f7c00, 0x005f7cff) AM_MIRROR(0x02000000) AM_READWRITE( pvr_ctrl_r, pvr_ctrl_w ) + AM_RANGE(0x005f8000, 0x005f9fff) AM_MIRROR(0x02000000) AM_READWRITE( pvr_ta_r, pvr_ta_w ) + AM_RANGE(0x00600000, 0x006007ff) AM_MIRROR(0x02000000) AM_READWRITE( dc_modem_r, dc_modem_w ) + AM_RANGE(0x00700000, 0x00707fff) AM_MIRROR(0x02000000) AM_DEVREADWRITE( "aica", dc_aica_reg_r, dc_aica_reg_w ) + AM_RANGE(0x00710000, 0x0071000f) AM_MIRROR(0x02000000) AM_READWRITE( dc_rtc_r, dc_rtc_w ) + AM_RANGE(0x00800000, 0x00ffffff) AM_MIRROR(0x02000000) AM_READWRITE( naomi_arm_r, naomi_arm_w ) // sound RAM (8 MB) - - AM_RANGE(0x0103ff00, 0x0103ffff) AM_READWRITE( naomi_unknown1_r, naomi_unknown1_w ) // bios uses it, actual start and end addresses not known - - AM_RANGE(0x03010098, 0x0301009f) AM_RAM // Naomi 2 BIOS tests this, needs to read back as written + /* External Device */ + AM_RANGE(0x01010098, 0x0101009f) AM_MIRROR(0x02000000) AM_RAM // Naomi 2 BIOS tests this, needs to read back as written + AM_RANGE(0x0103ff00, 0x0103ffff) AM_MIRROR(0x02000000) AM_READWRITE( naomi_unknown1_r, naomi_unknown1_w ) // bios uses it, actual start and end addresses not known /* Area 1 */ - AM_RANGE(0x04000000, 0x04ffffff) AM_RAM AM_BASE( &dc_texture_ram ) // texture memory 64 bit access - AM_RANGE(0x05000000, 0x05ffffff) AM_RAM AM_BASE( &dc_framebuffer_ram ) // apparently this actually accesses the same memory as the 64-bit texture memory access, but in a different format, keep it apart for now + AM_RANGE(0x04000000, 0x04ffffff) AM_MIRROR(0x02000000) AM_RAM AM_BASE( &dc_texture_ram ) // texture memory 64 bit access + AM_RANGE(0x05000000, 0x05ffffff) AM_MIRROR(0x02000000) AM_RAM AM_BASE( &dc_framebuffer_ram ) // apparently this actually accesses the same memory as the 64-bit texture memory access, but in a different format, keep it apart for now /* Area 2*/ - AM_RANGE(0x08000000, 0x0bffffff) AM_NOP // 'Unassigned' + AM_RANGE(0x08000000, 0x09ffffff) AM_MIRROR(0x02000000) AM_NOP // 'Unassigned' /* Area 3 */ - AM_RANGE(0x0c000000, 0x0dffffff) AM_RAM AM_BASE(&naomi_ram64) AM_SHARE("share4") - - AM_RANGE(0x0e000000, 0x0fffffff) AM_RAM AM_SHARE("share4")// mirror - - AM_RANGE(0x8c000000, 0x8dffffff) AM_RAM AM_SHARE("share4") // RAM access through cache - - AM_RANGE(0xac000000, 0xadffffff) AM_RAM AM_SHARE("share4") // written here by totd + AM_RANGE(0x0c000000, 0x0dffffff) AM_MIRROR(0xa2000000) AM_RAM AM_BASE(&naomi_ram64) /* Area 4 */ - AM_RANGE(0x10000000, 0x107fffff) AM_WRITE( ta_fifo_poly_w ) - AM_RANGE(0x10800000, 0x10ffffff) AM_WRITE( ta_fifo_yuv_w ) - AM_RANGE(0x11000000, 0x11ffffff) AM_WRITE( ta_texture_directpath0_w ) // access to texture / fraembfufer memory (either 32-bit or 64-bit area depending on SB_LMMODE0 register - cannot be written directly, only through dma / store queue + AM_RANGE(0x10000000, 0x107fffff) AM_MIRROR(0x02000000) AM_WRITE( ta_fifo_poly_w ) + AM_RANGE(0x10800000, 0x10ffffff) AM_MIRROR(0x02000000) AM_WRITE( ta_fifo_yuv_w ) + AM_RANGE(0x11000000, 0x11ffffff) AM_WRITE( ta_texture_directpath0_w ) // access to texture / framebuffer memory (either 32-bit or 64-bit area depending on SB_LMMODE0 register - cannot be written directly, only through dma / store queue) /* 0x12000000 -0x13ffffff Mirror area of 0x10000000 -0x11ffffff */ - AM_RANGE(0x12000000, 0x127fffff) AM_WRITE( ta_fifo_poly_w ) - AM_RANGE(0x12800000, 0x12ffffff) AM_WRITE( ta_fifo_yuv_w ) - AM_RANGE(0x13000000, 0x13ffffff) AM_WRITE( ta_texture_directpath1_w ) // access to texture / fraembfufer memory (either 32-bit or 64-bit area depending on SB_LMMODE1 register - cannot be written directly, only through dma / store queue + AM_RANGE(0x13000000, 0x13ffffff) AM_WRITE( ta_texture_directpath1_w ) // access to texture / framebuffer memory (either 32-bit or 64-bit area depending on SB_LMMODE1 register - cannot be written directly, only through dma / store queue) /* Area 5 */ //AM_RANGE(0x14000000, 0x17ffffff) AM_NOP // MPX Ext. @@ -1592,7 +1584,6 @@ static const aica_interface aica_config = }; - static ADDRESS_MAP_START( dc_audio_map, ADDRESS_SPACE_PROGRAM, 32 ) ADDRESS_MAP_UNMAP_HIGH AM_RANGE(0x00000000, 0x007fffff) AM_RAM AM_BASE( &dc_sound_ram ) /* shared with SH-4 */