diff --git a/src/mame/drivers/cmmb.cpp b/src/mame/drivers/cmmb.cpp
index 34af041f19a..1f4b2e525c6 100644
--- a/src/mame/drivers/cmmb.cpp
+++ b/src/mame/drivers/cmmb.cpp
@@ -13,12 +13,12 @@ Earlier revisions of this cabinet did not include the bowling game.
  a port or prototype of an old Atari game.
 
 TODO:
-- program banking;
+- flash ROM hookup (by the looks of it, at29x needs an address map?);
 - finish video emulation;
-- inputs;
+- trackball inputs
 - sound;
 - NVRAM (EEPROM) at U8 or U11 on PCB
-- driver probably needs rewriting, at least the i/o part;
+- untangle switch-cases for inputs;
 - Is the W65C02S the same as the 65SC02 core or are there any
   extra Op-codes & addressing modes?
 
@@ -48,6 +48,7 @@ OSC @ 72.576MHz
 
 #include "emu.h"
 #include "cpu/m6502/m65sc02.h"
+#include "machine/at29x.h"
 
 #define MAIN_CLOCK XTAL_72_576MHz
 
@@ -57,12 +58,14 @@ public:
 	cmmb_state(const machine_config &mconfig, device_type type, const char *tag)
 		: driver_device(mconfig, type, tag),
 		m_maincpu(*this, "maincpu"),
+		m_flash(*this, "at29c020" ),
 		m_videoram(*this, "videoram"),
 		m_gfxdecode(*this, "gfxdecode"),
 		m_palette(*this, "palette")
 	{ }
 
 	required_device<cpu_device> m_maincpu;
+	required_device<at29c020_device> m_flash;
 	required_shared_ptr<UINT8> m_videoram;
 	required_device<gfxdecode_device> m_gfxdecode;
 	required_device<palette_device> m_palette;
@@ -73,7 +76,10 @@ public:
 	DECLARE_WRITE8_MEMBER(cmmb_charram_w);
 	DECLARE_READ8_MEMBER(cmmb_input_r);
 	DECLARE_WRITE8_MEMBER(cmmb_output_w);
-	DECLARE_READ8_MEMBER(kludge_r);
+	DECLARE_WRITE8_MEMBER(flash_dbg_0_w);
+	DECLARE_WRITE8_MEMBER(flash_dbg_1_w);
+
+	//DECLARE_READ8_MEMBER(kludge_r);
 	virtual void machine_reset() override;
 	virtual void video_start() override;
 	UINT32 screen_update_cmmb(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
@@ -134,7 +140,7 @@ READ8_MEMBER(cmmb_state::cmmb_input_r)
 	switch(offset)
 	{
 		case 0x00: return ioport("IN2")->read();
-		case 0x03: return 4; //eeprom?
+		case 0x03: return 4; // incorrect image U9 otherwise (???)
 		case 0x0e: return ioport("IN0")->read();
 		case 0x0f: return ioport("IN1")->read();
 	}
@@ -142,42 +148,41 @@ READ8_MEMBER(cmmb_state::cmmb_input_r)
 	return 0xff;
 }
 
-
-/*
-    {
-        UINT8 *ROM = space.memregion("maincpu")->base();
-        UINT32 bankaddress;
-
-        bankaddress = 0x10000 + (0x10000 * (data & 0x03));
-        space.membank("bank1")->set_base(&ROM[bankaddress]);
-    }
-*/
-
 WRITE8_MEMBER(cmmb_state::cmmb_output_w)
 {
 	//printf("%02x -> [%02x] W\n",data,offset);
 	switch(offset)
 	{
 		case 0x01:
+//			m_irq_mask = data & 0x80;
+			break;
+		case 0x02:
+			// bit 7 toggled - watchdog/eeprom?
+			break;
+
+		case 0x03:
 			{
 				UINT8 *ROM = memregion("maincpu")->base();
 				UINT32 bankaddress;
 
-				bankaddress = 0x1c000 + (0x10000 * (data & 0x03));
+				bankaddress = 0x10000 + (0x4000 * (data & 0x0f));
 				membank("bank1")->set_base(&ROM[bankaddress]);
 			}
 			break;
-		case 0x03:
-			m_irq_mask = data & 0x80;
-			break;
+
 		case 0x07:
 			break;
 	}
 }
 
-READ8_MEMBER(cmmb_state::kludge_r)
+WRITE8_MEMBER(cmmb_state::flash_dbg_0_w)
 {
-	return machine().rand();
+	m_flash->write(space,0x2aaa,data);
+}
+
+WRITE8_MEMBER(cmmb_state::flash_dbg_1_w)
+{
+	m_flash->write(space,0x5555,data);
 }
 
 /* overlap empty addresses */
@@ -186,20 +191,26 @@ static ADDRESS_MAP_START( cmmb_map, AS_PROGRAM, 8, cmmb_state )
 	AM_RANGE(0x0000, 0x0fff) AM_RAM /* zero page address */
 //  AM_RANGE(0x13c0, 0x13ff) AM_RAM //spriteram
 	AM_RANGE(0x1000, 0x13ff) AM_RAM AM_SHARE("videoram")
+	AM_RANGE(0x2000, 0x2000) AM_READ_PORT("IN3")
+	AM_RANGE(0x2001, 0x2001) AM_READ_PORT("IN4")
+	AM_RANGE(0x2011, 0x2011) AM_READ_PORT("IN5")
 	AM_RANGE(0x2480, 0x249f) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
-	AM_RANGE(0x4000, 0x400f) AM_READWRITE(cmmb_input_r,cmmb_output_w) 
-	AM_RANGE(0x4900, 0x4900) AM_READ(kludge_r)
+	//AM_RANGE(0x4000, 0x400f) AM_READWRITE(cmmb_input_r,cmmb_output_w) 
+	//AM_RANGE(0x4900, 0x4900) AM_READ(kludge_r)
 	AM_RANGE(0x4000, 0x7fff) AM_ROMBANK("bank1")
 	AM_RANGE(0xa000, 0xafff) AM_RAM
 	AM_RANGE(0xb000, 0xbfff) AM_READWRITE(cmmb_charram_r,cmmb_charram_w)
-	AM_RANGE(0xc000, 0xc00f) AM_READWRITE(cmmb_input_r,cmmb_output_w) //i/o
+	AM_RANGE(0xc000, 0xc00f) AM_READWRITE(cmmb_input_r,cmmb_output_w)
 	AM_RANGE(0x8000, 0xffff) AM_ROM
+	// debugging, to be removed
+	AM_RANGE(0x2aaa, 0x2aaa) AM_WRITE(flash_dbg_0_w)
+	AM_RANGE(0x5555, 0x5555) AM_WRITE(flash_dbg_1_w)
 ADDRESS_MAP_END
 
 
 static INPUT_PORTS_START( cmmb )
-	PORT_START("IN0")
-	PORT_DIPNAME( 0x01, 0x01, "SYSTEM0" )
+	PORT_START("IN3")
+	PORT_DIPNAME( 0x01, 0x01, "IN3" )
 	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
@@ -223,8 +234,9 @@ static INPUT_PORTS_START( cmmb )
 	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
 	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
-	PORT_START("IN1")
-	PORT_DIPNAME( 0x01, 0x01, "SYSTEM1" )
+
+	PORT_START("IN4")
+	PORT_DIPNAME( 0x01, 0x01, "IN4" )
 	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
@@ -245,11 +257,65 @@ static INPUT_PORTS_START( cmmb )
 	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
 	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+
+	// TODO: pin-point writes for trackball
+	// TODO: trackball might be muxed for 1p & 2p sides
+	PORT_START("IN5")
+	PORT_DIPNAME( 0x01, 0x01, "IN5" ) // trackball V clk
+	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) // trackball V dir
+	PORT_DIPSETTING(    0x02, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) // trackball H clk
+	PORT_DIPSETTING(    0x04, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) // trackball H dir
+	PORT_DIPSETTING(    0x08, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 ) 
+	PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x20, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) 
+	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	
+	PORT_START("IN0")
+	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
+	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
+	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
+	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
+	PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
+	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
+	PORT_DIPNAME( 0x40, 0x40, "IN0" )
+	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+
+	PORT_START("IN1")
+	PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_VOLUME_DOWN )
+	PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_VOLUME_UP )
+	PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_START2 )
+	PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_START1 )
+	PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x10, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
+	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_SERVICE1 )
+	PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) )
+	PORT_DIPSETTING(    0x40, DEF_STR( Off ) )
+	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 	PORT_DIPNAME( 0x80, 0x80, DEF_STR( Service_Mode ) )
 	PORT_DIPSETTING(    0x80, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 	PORT_START("IN2")
-	PORT_DIPNAME( 0x01, 0x01, "SYSTEM2" )
+	PORT_DIPNAME( 0x01, 0x01, "IN2" )
 	PORT_DIPSETTING(    0x01, DEF_STR( Off ) )
 	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
 	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
@@ -321,6 +387,8 @@ static MACHINE_CONFIG_START( cmmb, cmmb_state )
 	MCFG_CPU_PROGRAM_MAP(cmmb_map)
 	MCFG_CPU_VBLANK_INT_DRIVER("screen", cmmb_state, vblank_irq)
 
+	MCFG_AT29C020_ADD("at29c020")
+	
 	/* video hardware */
 	MCFG_SCREEN_ADD("screen", RASTER)
 	MCFG_SCREEN_RAW_PARAMS(MAIN_CLOCK/12, 384, 0, 256, 264, 0, 240) // TBD, not real measurements
@@ -349,6 +417,7 @@ ROM_START( cmmb162 )
 	ROM_REGION( 0x50000, "maincpu", 0 )
 	ROM_LOAD( "cmmb162.u2",   0x10000, 0x40000, CRC(71a5a75d) SHA1(0ad7b97580082cda98cb1e8aab8efcf491d0ed25) )
 	ROM_COPY( "maincpu",      0x18000, 0x08000, 0x08000 )
+	ROM_FILL( 0x0c124, 2, 0xea ) // temporary patch, how irqs works for this?
 
 	ROM_REGION( 0x1000, "gfx", ROMREGION_ERASE00 )
 ROM_END