From 299fc7ec1a04b16931648da247d6515cb74244da Mon Sep 17 00:00:00 2001
From: Couriersud <couriersud@users.noreply.github.com>
Date: Fri, 29 Aug 2008 22:52:26 +0000
Subject: [PATCH] mcs48.c: Write p1 and p2 on reset

These ports are actually ports which sink current on logical 0. With a logical 1, they are in high impedance mode and may be read. The high impedance is treated as logical 1 by TTL gates connected to them.
---
 src/emu/cpu/mcs48/mcs48.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/emu/cpu/mcs48/mcs48.c b/src/emu/cpu/mcs48/mcs48.c
index 76a775cb153..680e6f7ead7 100644
--- a/src/emu/cpu/mcs48/mcs48.c
+++ b/src/emu/cpu/mcs48/mcs48.c
@@ -772,6 +772,8 @@ static void mcs48_reset(void)
 	bus_w(0xff);
 	mcs48.p1 = 0xff;
 	mcs48.p2 = 0xff;
+	port_w(1, mcs48.p1);
+	port_w(2, mcs48.p2);
 	mcs48.tirq_enabled = FALSE;
 	mcs48.xirq_enabled = FALSE;
 	mcs48.timecount_enabled = 0;