Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-04-19 15:11:37 +03:00
Code Issues Actions 3 Packages Projects Releases Wiki Activity

ns32000dasm: rewrite

Browse Source 
* simplified/consolidated logic
* corrected scaled mode decoding
This commit is contained in:
Patrick Mackinlay 2021-07-16 15:31:35 +07:00
parent 37e4c7d146
commit 29e2393076
2 changed files with 581 additions and 1017 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1464
src/devices/cpu/ns32000/ns32000dasm.cpp
View File

File diff suppressed because it is too large Load Diff

134
src/devices/cpu/ns32000/ns32000dasm.h
View File

@ -1,12 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Nigel Barnes
/*****************************************************************************
*
* ns32000dasm.cpp
*
* NS32000 CPU Disassembly
*
*****************************************************************************/
// copyright-holders:Patrick Mackinlay
#ifndef MAME_CPU_NS32000_NS32000DASM_H
#define MAME_CPU_NS32000_NS32000DASM_H
@ -16,113 +9,42 @@
class ns32000_disassembler : public util::disasm_interface
{
public:
ns32000_disassembler() = default;
virtual ~ns32000_disassembler() = default;
virtual u32 opcode_alignment() const override { return 1; }
virtual offs_t disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer &params) override;
virtual offs_t disassemble(std::ostream &stream, offs_t pc, data_buffer const &opcodes, data_buffer const &params) override;
private:
/* implied operand attributes */
enum
protected:
enum size_code : unsigned
{
REG = 16,
QUICK,
SHORT,
IMM,
DISP,
GEN,
OPTIONS,
SIZE_B = 0,
SIZE_W = 1,
SIZE_D = 3,
SIZE_Q = 7,
};
/* access classes */
enum
struct addr_mode
{
READ = 8,
WRITE,
RMW,
ADDR,
REGADDR
};
/* length attributes */
enum
{
B = 0,
W = 1,
D = 3,
I,
I2,
F,
L
};
struct NS32000_OPCODE {
const char *mnemonic;
u32 operand1;
u32 operand;
u32 operand3;
u32 operand4;
offs_t dasm_flags;
addr_mode(unsigned gen)
: gen(gen)
, fpu(false)
, mode()
{};
void size_i(size_code code) { size = code; }
void size_f(size_code code) { size = code; fpu = true; }
unsigned gen;
size_code size;
bool fpu;
std::string mode;
};
enum class operand_class
{
SOURCE,
BITPOS,
DESTINATION,
ADDRESS,
SCALED_INDEX
};
static const NS32000_OPCODE format0_op[1];
static const NS32000_OPCODE format1_op[16];
static const NS32000_OPCODE format2_op[8];
static const NS32000_OPCODE format3_op[16];
static const NS32000_OPCODE format4_op[16];
static const NS32000_OPCODE format5_op[16];
static const NS32000_OPCODE format6_op[16];
static const NS32000_OPCODE format7_op[16];
static const NS32000_OPCODE format8_op[16];
static const NS32000_OPCODE format9_op[16];
static const NS32000_OPCODE format11_op[16];
static const NS32000_OPCODE format14_op[16];
static char const *const Format0[];
static char const *const Format1[];
static char const *const Format2[];
static char const *const Format3[];
static char const *const Format4[];
static char const *const Format5[];
static char const *const Format6[];
static char const *const Format7[];
static char const *const Format8[];
static char const *const Format9[];
static char const *const Format11[];
static char const *const Format14[];
static char const *const iType[];
static char const *const fType[];
static char const *const cType[];
static char const *const indexSize[];
static char const *const cond[];
static char const *const areg[];
static char const *const mreg[];
static char const *const R[];
static char const *const M[];
static char const *const PR[];
static char const *const FP[];
std::string mnemonic_index(std::string form, const std::string &itype, const std::string &ftype);
uint8_t opcode_format(uint8_t byte);
int8_t short2int(uint8_t val);
static inline int32_t get_disp(offs_t &pc, const data_buffer &opcodes);
static inline std::string format_disp(int32_t disp);
static inline std::string get_option_list(uint8_t cfg);
static inline std::string get_options(uint8_t opts);
static inline std::string get_reg_list(offs_t &pc, const data_buffer &opcodes, bool reverse);
void stream_gen(std::ostream &stream, u8 gen_addr, u8 op_len, operand_class op_class, offs_t &pc, const data_buffer &opcodes, bool fpreg = false);
u32 m_base_pc;
s32 displacement(offs_t pc, data_buffer const &opcodes, unsigned &bytes);
void decode(addr_mode *mode, offs_t pc, data_buffer const &opcodes, unsigned &bytes);
std::string reglist(u8 imm);
};
#endif
#endif // MAME_CPU_NS32000_NS32000DASM_H