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i8085: remove cputype enum, remove possible time travel issue

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hap 2022-11-11 12:10:17 +01:00
parent 5145cb5790
commit 29ece85124
4 changed files with 87 additions and 101 deletions
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143
src/devices/cpu/i8085/i8085.cpp
View File

@ -11,6 +11,7 @@
* TODO:
* - 8085 DAA fails on 8080/8085 CPU Exerciser
* - not sure if 8085 DSUB H flag is correct
* - most of those is_8085 can probably be done better, like function overrides
*
* ---------------------------------------------------------------------------
*
@ -165,6 +166,7 @@ const u8 i8085a_cpu_device::lut_cycles_8080[256]={
/* D */ 5, 10,10,10,11,11,7, 11,5, 10,10,10,11,11,7, 11,
/* E */ 5, 10,10,18,11,11,7, 11,5, 5, 10,5, 11,11,7, 11,
/* F */ 5, 10,10,4, 11,11,7, 11,5, 5, 10,4, 11,11,7, 11 };
const u8 i8085a_cpu_device::lut_cycles_8085[256]={
/* 0 1 2 3 4 5 6 7 8 9 A B C D E F */
/* 0 */ 4, 10,7, 6, 4, 4, 7, 4, 10,10,7, 6, 4, 4, 7, 4,
@ -179,19 +181,19 @@ const u8 i8085a_cpu_device::lut_cycles_8085[256]={
/* 9 */ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
/* A */ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
/* B */ 4, 4, 4, 4, 4, 4, 7, 4, 4, 4, 4, 4, 4, 4, 7, 4,
/* C */ 6, 10,10,10,11,12,7, 12,6, 10,10,12,11,11,7, 12,
/* D */ 6, 10,10,10,11,12,7, 12,6, 10,10,10,11,10,7, 12,
/* E */ 6, 10,10,16,11,12,7, 12,6, 6, 10,5, 11,10,7, 12,
/* F */ 6, 10,10,4, 11,12,7, 12,6, 6, 10,4, 11,10,7, 12 };
/* C */ 6, 10,7, 7, 9, 12,7, 12,6, 10,7, 6, 9, 9, 7, 12,
/* D */ 6, 10,7, 10,9, 12,7, 12,6, 10,7, 10,9, 7, 7, 12,
/* E */ 6, 10,7, 16,9, 12,7, 12,6, 6, 7, 5, 9, 10,7, 12,
/* F */ 6, 10,7, 4, 9, 12,7, 12,6, 6, 7, 4, 9, 7, 7, 12 };
/* special cases (partially taken care of elsewhere):
base c taken? not taken?
op_ret 8080 5 +6(11) -0 (conditional)
op_ret 8085 6 +6(12) -0 (conditional)
op_jmp 8080 10 +0 -0
op_jmp 8085 10 +0 -3(7)
op_call 8080 11 +6(17) -0
op_call 8085 11 +7(18) -2(9)
base c taken?
op_ret 8080 5 +6(11) (conditional)
op_ret 8085 6 +6(12) (conditional)
op_jmp 8080 10 +0
op_jmp 8085 7 +3(10)
op_call 8080 11 +6(17)
op_call 8085 9 +9(18)
*/
@ -201,12 +203,7 @@ DEFINE_DEVICE_TYPE(I8080A, i8080a_cpu_device, "i8080a", "Intel 8080A")
DEFINE_DEVICE_TYPE(I8085A, i8085a_cpu_device, "i8085a", "Intel 8085A")
i8085a_cpu_device::i8085a_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: i8085a_cpu_device(mconfig, I8085A, tag, owner, clock, CPUTYPE_8085A)
{
}
i8085a_cpu_device::i8085a_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int cputype)
i8085a_cpu_device::i8085a_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock)
: cpu_device(mconfig, type, tag, owner, clock)
, m_program_config("program", ENDIANNESS_LITTLE, 8, 16, 0)
, m_io_config("io", ENDIANNESS_LITTLE, 8, 8, 0)
@ -217,27 +214,34 @@ i8085a_cpu_device::i8085a_cpu_device(const machine_config &mconfig, device_type
, m_in_sid_func(*this)
, m_out_sod_func(*this)
, m_clk_out_func(*this)
, m_cputype(cputype)
{
}
{ }
i8085a_cpu_device::i8085a_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: i8085a_cpu_device(mconfig, I8085A, tag, owner, clock)
{ }
i8080_cpu_device::i8080_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock)
: i8085a_cpu_device(mconfig, type, tag, owner, clock)
{ }
i8080_cpu_device::i8080_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: i8085a_cpu_device(mconfig, I8080, tag, owner, clock, CPUTYPE_8080)
{
}
: i8080_cpu_device(mconfig, I8080, tag, owner, clock)
{ }
i8080a_cpu_device::i8080a_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
: i8085a_cpu_device(mconfig, I8080A, tag, owner, clock, CPUTYPE_8080A)
{
}
: i8080_cpu_device(mconfig, I8080A, tag, owner, clock)
{ }
device_memory_interface::space_config_vector i8085a_cpu_device::memory_space_config() const
{
return has_configured_map(AS_OPCODES) ? space_config_vector {
return has_configured_map(AS_OPCODES) ? space_config_vector
{
std::make_pair(AS_PROGRAM, &m_program_config),
std::make_pair(AS_IO, &m_io_config),
std::make_pair(AS_OPCODES, &m_opcode_config)
} : space_config_vector {
} : space_config_vector
{
std::make_pair(AS_PROGRAM, &m_program_config),
std::make_pair(AS_IO, &m_io_config)
};
@ -265,18 +269,17 @@ void i8085a_cpu_device::device_clock_changed()
void i8085a_cpu_device::init_tables()
{
u8 zs;
int i, p;
for (i = 0; i < 256; i++)
for (int i = 0; i < 256; i++)
{
/* cycles */
lut_cycles[i] = is_8085() ? lut_cycles_8085[i] : lut_cycles_8080[i];
/* flags */
zs = 0;
u8 zs = 0;
if (i==0) zs |= ZF;
if (i&128) zs |= SF;
p = 0;
u8 p = 0;
if (i&1) ++p;
if (i&2) ++p;
if (i&4) ++p;
@ -285,6 +288,7 @@ void i8085a_cpu_device::init_tables()
if (i&32) ++p;
if (i&64) ++p;
if (i&128) ++p;
lut_zs[i] = zs;
lut_zsp[i] = zs | ((p&1) ? 0 : PF);
}
@ -314,35 +318,33 @@ void i8085a_cpu_device::device_start()
init_tables();
/* set up the state table */
state_add(I8085_PC, "PC", m_PC.w.l);
state_add(STATE_GENPC, "GENPC", m_PC.w.l).noshow();
state_add(STATE_GENPCBASE, "CURPC", m_PC.w.l).noshow();
state_add(I8085_SP, "SP", m_SP.w.l);
state_add(STATE_GENFLAGS, "GENFLAGS", m_AF.b.l).noshow().formatstr("%8s");
state_add(I8085_A, "A", m_AF.b.h).noshow();
state_add(I8085_B, "B", m_BC.b.h).noshow();
state_add(I8085_C, "C", m_BC.b.l).noshow();
state_add(I8085_D, "D", m_DE.b.h).noshow();
state_add(I8085_E, "E", m_DE.b.l).noshow();
state_add(I8085_F, "F", m_AF.b.l).noshow();
state_add(I8085_H, "H", m_HL.b.h).noshow();
state_add(I8085_L, "L", m_HL.b.l).noshow();
state_add(I8085_AF, "AF", m_AF.w.l);
state_add(I8085_BC, "BC", m_BC.w.l);
state_add(I8085_DE, "DE", m_DE.w.l);
state_add(I8085_HL, "HL", m_HL.w.l);
if (is_8085())
{
state_add(I8085_PC, "PC", m_PC.w.l);
state_add(STATE_GENPC, "GENPC", m_PC.w.l).noshow();
state_add(STATE_GENPCBASE, "CURPC", m_PC.w.l).noshow();
state_add(I8085_SP, "SP", m_SP.w.l);
state_add(STATE_GENFLAGS, "GENFLAGS", m_AF.b.l).noshow().formatstr("%8s");
state_add(I8085_A, "A", m_AF.b.h).noshow();
state_add(I8085_B, "B", m_BC.b.h).noshow();
state_add(I8085_C, "C", m_BC.b.l).noshow();
state_add(I8085_D, "D", m_DE.b.h).noshow();
state_add(I8085_E, "E", m_DE.b.l).noshow();
state_add(I8085_F, "F", m_AF.b.l).noshow();
state_add(I8085_H, "H", m_HL.b.h).noshow();
state_add(I8085_L, "L", m_HL.b.l).noshow();
state_add(I8085_AF, "AF", m_AF.w.l);
state_add(I8085_BC, "BC", m_BC.w.l);
state_add(I8085_DE, "DE", m_DE.w.l);
state_add(I8085_HL, "HL", m_HL.w.l);
if (is_8080())
{
state_add(I8085_STATUS, "STATUS", m_status);
state_add(I8085_INTE, "INTE", m_ietemp).mask(0x1).callimport().callexport();
}
if (is_8085())
{
state_add(I8085_IM, "IM", m_im);
state_add(I8085_SOD, "SOD", m_sod_state).mask(0x1);
state_add(I8085_SID, "SID", m_ietemp).mask(0x1).callimport().callexport();
}
state_add(I8085_IM, "IM", m_im);
state_add(I8085_SOD, "SOD", m_sod_state).mask(0x1);
state_add(I8085_SID, "SID", m_ietemp).mask(0x1).callimport().callexport();
}
else
{
state_add(I8085_STATUS, "STATUS", m_status);
state_add(I8085_INTE, "INTE", m_ietemp).mask(0x1).callimport().callexport();
}
space(AS_PROGRAM).cache(m_cprogram);
@ -814,30 +816,29 @@ void i8085a_cpu_device::op_dad(u16 v)
// jumps
void i8085a_cpu_device::op_jmp(int cond)
{
// on 8085, jump if condition is not satisfied is shorter
if (cond)
{
m_PC = read_arg16();
m_icount -= extra_jmp();
}
else
{
m_PC.w.l += 2;
m_icount += (is_8085()) ? 3 : 0;
}
}
void i8085a_cpu_device::op_call(int cond)
{
// on 8085, call if condition is not satisfied is 9 ticks
if (cond)
{
PAIR p = read_arg16();
m_icount -= (is_8085()) ? 7 : 6 ;
m_icount -= extra_call();
op_push(m_PC);
m_PC = p;
}
else
{
m_PC.w.l += 2;
m_icount += (is_8085()) ? 2 : 0;
}
}
@ -846,7 +847,7 @@ void i8085a_cpu_device::op_ret(int cond)
// conditional RET only
if (cond)
{
m_icount -= 6;
m_icount -= extra_ret();
m_PC = op_pop();
}
}
@ -1434,9 +1435,11 @@ void i8085a_cpu_device::execute_one(int opcode)
if (is_8085())
{
if (m_AF.b.l & VF)
{
// RST taken = 6 more cycles
m_icount -= extra_ret();
op_rst(8);
else
m_icount += 6; // RST not taken
}
}
else
op_jmp(1);
@ -1603,7 +1606,7 @@ void i8085a_cpu_device::execute_one(int opcode)
break;
case 0xf5: // PUSH A
// on 8080, VF=1 and X3F=0 and X5F=0 always! (we don't have to check for it elsewhere)
if (is_8080())
if (!is_8085())
m_AF.b.l = (m_AF.b.l & ~(X3F | X5F)) | VF;
op_push(m_AF);
break;

35
src/devices/cpu/i8085/i8085.h
View File

@ -61,7 +61,7 @@ public:
auto out_sod_func() { return m_out_sod_func.bind(); }
protected:
i8085a_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock, int cputype);
i8085a_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
// device-level overrides
virtual void device_config_complete() override;
@ -91,13 +91,6 @@ protected:
// device_disasm_interface overrides
virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
enum
{
CPUTYPE_8080 = 0,
CPUTYPE_8080A,
CPUTYPE_8085A
};
private:
address_space_config m_program_config;
address_space_config m_io_config;
@ -110,10 +103,6 @@ private:
devcb_write_line m_out_sod_func;
clock_update_delegate m_clk_out_func;
inline bool is_8080() { return m_cputype == CPUTYPE_8080 || m_cputype == CPUTYPE_8080A; }
inline bool is_8085() { return m_cputype == CPUTYPE_8085A; }
int m_cputype;
PAIR m_PC,m_SP,m_AF,m_BC,m_DE,m_HL,m_WZ;
u8 m_halt;
u8 m_im; /* interrupt mask (8085A only) */
@ -142,6 +131,11 @@ private:
u8 lut_zs[256];
u8 lut_zsp[256];
virtual int extra_ret() { return 6; }
virtual int extra_jmp() { return 3; }
virtual int extra_call() { return 9; }
virtual bool is_8085() { return true; }
void set_sod(int state);
void set_inte(int state);
void set_status(u8 status);
@ -176,30 +170,27 @@ private:
void op_rst(u8 v);
};
class i8080_cpu_device : public i8085a_cpu_device
{
public:
// construction/destruction
i8080_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
i8080_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, u32 clock);
virtual u32 execute_input_lines() const noexcept override { return 1; }
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return clocks; }
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return cycles; }
virtual int extra_jmp() override { return 0; }
virtual int extra_call() override { return 6; }
virtual bool is_8085() override { return false; }
};
class i8080a_cpu_device : public i8085a_cpu_device
class i8080a_cpu_device : public i8080_cpu_device
{
public:
// construction/destruction
i8080a_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
protected:
virtual u32 execute_input_lines() const noexcept override { return 1; }
virtual u64 execute_clocks_to_cycles(u64 clocks) const noexcept override { return clocks; }
virtual u64 execute_cycles_to_clocks(u64 cycles) const noexcept override { return cycles; }
};

8
src/mame/namco/namcos22.cpp
View File

@ -3704,8 +3704,6 @@ void namcos22s_state::machine_start()
{
namcos22_state::machine_start();
m_mcu_iocontrol = 0;
save_item(NAME(m_spotram_enable));
save_item(NAME(m_spotram_address));
save_item(NAME(m_mcu_iocontrol));
@ -6094,16 +6092,12 @@ void alpine_state::init_alpiner()
{
m_gametype = NAMCOS22_ALPINE_RACER;
install_130_speedup();
m_motor_status = 2;
}
void alpine_state::init_alpiner2()
{
m_gametype = NAMCOS22_ALPINE_RACER_2;
install_130_speedup();
m_motor_status = 2;
}
void alpinesa_state::init_alpinesa()
@ -6112,8 +6106,6 @@ void alpinesa_state::init_alpinesa()
install_141_speedup();
m_rombank->configure_entries(0, 3, memregion("maincpu")->base() + 0x200000, 0x200000);
m_motor_status = 2;
}
void namcos22s_state::init_airco22()

2
src/mame/namco/namcos22.h
View File

@ -591,7 +591,7 @@ protected:
void alpine_mcu_port4_w(u8 data);
TIMER_DEVICE_CALLBACK_MEMBER(alpine_steplock_callback);
int m_motor_status = 0;
int m_motor_status = 2;
};
class alpinesa_state : public alpine_state