mirror of
https://github.com/holub/mame
synced 2025-04-23 08:49:55 +03:00
atlantis: Added dcs3 fifo reset to address map (nw)
dcs: Added internal ram memory bank for denver ADSP 2181 (nw) adsp2100: Added callback for dmovlay instruction (nw) zeus2: Update (nw)
This commit is contained in:
Ted Green
parent
aae1cbb6d3
commit
2a16de421d
@ -380,7 +380,11 @@ void adsp21xx_device::write_reg1(int regnum, INT32 val)
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break;
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case 3:
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logerror("ADSP %04x: Writing to an invalid register! RGP=01 RegCode=%1X Val=%04X\n", m_ppc, regnum, val);
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// Check for DMOVLAY instruction callback
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if (regnum == 0xf && !m_dmovlay_cb.isnull())
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m_dmovlay_cb(val & 0x3fff);
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else
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logerror("ADSP %04x: Writing to an invalid register! RGP=01 RegCode=%1X Val=%04X\n", m_ppc, regnum, val);
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break;
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}
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}
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@ -157,7 +157,8 @@ adsp21xx_device::adsp21xx_device(const machine_config &mconfig, device_type type
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(m_chip_type >= CHIP_TYPE_ADSP2101) ? 0x3f : 0x0f),
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m_sport_rx_cb(*this),
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m_sport_tx_cb(*this),
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m_timer_fired_cb(*this)
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m_timer_fired_cb(*this),
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m_dmovlay_cb(*this)
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{
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// initialize remaining state
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memset(&m_core, 0, sizeof(m_core));
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@ -405,6 +406,7 @@ void adsp21xx_device::device_start()
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m_sport_rx_cb.resolve();
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m_sport_tx_cb.resolve();
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m_timer_fired_cb.resolve();
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m_dmovlay_cb.resolve();
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// get our address spaces
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m_program = &space(AS_PROGRAM);
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@ -192,6 +192,9 @@ enum
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#define MCFG_ADSP21XX_TIMER_FIRED_CB(_devcb) \
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devcb = &adsp21xx_device::set_timer_fired_callback(*device, DEVCB_##_devcb);
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#define MCFG_ADSP21XX_DMOVLAY_CB(_devcb) \
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devcb = &adsp21xx_device::set_dmovlay_callback(*device, DEVCB_##_devcb);
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//**************************************************************************
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// TYPE DEFINITIONS
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//**************************************************************************
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@ -220,6 +223,7 @@ public:
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template<class _Object> static devcb_base &set_sport_rx_callback(device_t &device, _Object object) { return downcast<adsp21xx_device &>(device).m_sport_rx_cb.set_callback(object); }
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template<class _Object> static devcb_base &set_sport_tx_callback(device_t &device, _Object object) { return downcast<adsp21xx_device &>(device).m_sport_tx_cb.set_callback(object); }
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template<class _Object> static devcb_base &set_timer_fired_callback(device_t &device, _Object object) { return downcast<adsp21xx_device &>(device).m_timer_fired_cb.set_callback(object); }
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template<class _Object> static devcb_base &set_dmovlay_callback(device_t &device, _Object object) { return downcast<adsp21xx_device &>(device).m_dmovlay_cb.set_callback(object); }
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// public interfaces
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void load_boot_data(UINT8 *srcdata, UINT32 *dstdata);
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@ -459,6 +463,7 @@ protected:
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devcb_read32 m_sport_rx_cb; // callback for serial receive
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devcb_write32 m_sport_tx_cb; // callback for serial transmit
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devcb_write_line m_timer_fired_cb; // callback for timer fired
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devcb_write_line m_dmovlay_cb; // callback for DMOVLAY instruction
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// debugging
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#if ADSP_TRACK_HOTSPOTS
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@ -419,7 +419,7 @@ void zeus2_device::zeus2_register_update(offs_t offset, UINT32 oldval, int logit
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m_zeusbase[0x38] = oldval;
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m_screen->update_partial(m_screen->vpos());
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log_fifo = machine().input().code_pressed(KEYCODE_L);
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log_fifo = 1;
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//log_fifo = 1;
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m_zeusbase[0x38] = temp;
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}
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break;
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@ -495,11 +495,11 @@ void zeus2_device::zeus2_register_update(offs_t offset, UINT32 oldval, int logit
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case 0x50:
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if ((m_zeusbase[0x50] & 0xffff0000) == 0x00980000) {
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// Fast fill?
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// Fast fill
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// Unknow what the exact bit fields are, this is a just a guess
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UINT32 lastRow = (((m_zeusbase[0x50] >> 8) & 0xff) << 3) | 0x7;
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UINT32 lastCol = (((m_zeusbase[0x50] >> 0) & 0xff) << 2) | 0x3;
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UINT32 fillColor = 0x004a4a4a;
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UINT32 fillColor = m_zeusbase[0x5f]; // 0x004a4a4a;
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void *base = waveram1_ptr_from_expanded_addr(m_zeusbase[0x51]);
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for (int y = 0; y <= lastRow; y++)
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for (int x = 0; x <= lastCol; x++)
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@ -702,12 +702,18 @@ int zeus2_device::zeus2_fifo_process(const UINT32 *data, int numwords)
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/* handle logging */
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switch (data[0] >> 24)
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{
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// 0x00: write 32-bit value to low registers
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case 0x00:
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// Ignore the all zeros commmand
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if (((data[0] >> 16) & 0x7f) == 0x0)
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return TRUE;
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// Drop through to 0x05 command
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/* 0x05: write 32-bit value to low registers */
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case 0x05:
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if (numwords < 2)
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return FALSE;
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if (log_fifo)
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log_fifo_command(data, numwords, " -- reg32");
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log_fifo_command(data, numwords, " -- reg32\n");
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if (((data[0] >> 16) & 0x7f) != 0x08)
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zeus2_register32_w((data[0] >> 16) & 0x7f, data[1], log_fifo);
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break;
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@ -741,7 +747,7 @@ int zeus2_device::zeus2_fifo_process(const UINT32 *data, int numwords)
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if (log_fifo)
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{
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log_fifo_command(data, numwords, "");
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log_fifo_command(data, numwords, "\n");
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logerror("\n\t\tmatrix ( %8.2f %8.2f %8.2f ) ( %8.2f %8.2f %8.2f ) ( %8.2f %8.2f %8.2f )\n\t\tvector %8.2f %8.2f %8.5f\n",
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(double) zeus_matrix[0][0], (double) zeus_matrix[0][1], (double) zeus_matrix[0][2],
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(double) zeus_matrix[1][0], (double) zeus_matrix[1][1], (double) zeus_matrix[1][2],
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@ -766,7 +772,7 @@ int zeus2_device::zeus2_fifo_process(const UINT32 *data, int numwords)
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if (log_fifo)
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{
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log_fifo_command(data, numwords, "");
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log_fifo_command(data, numwords, "\n");
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logerror("\n\t\tvector %8.2f %8.2f %8.5f\n",
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(double) zeus_point[0],
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(double) zeus_point[1],
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@ -802,17 +808,30 @@ int zeus2_device::zeus2_fifo_process(const UINT32 *data, int numwords)
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/* 0x23: render model in waveram (thegrid) */
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/* 0x24: render model in waveram (crusnexo) */
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// 0x17: ??? (atlantis)
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case 0x17:
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case 0x23:
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case 0x24:
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if (numwords < 2)
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return FALSE;
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if (log_fifo)
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log_fifo_command(data, numwords, "");
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log_fifo_command(data, numwords, "\n");
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zeus2_draw_model(data[1], data[0] & 0xffff, log_fifo);
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break;
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// 0x2d; ??? (atlantis)
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case 0x2d:
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if (numwords < 2)
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return FALSE;
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if (log_fifo)
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log_fifo_command(data, numwords, "\n");
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//zeus2_draw_model(data[1], data[0] & 0xff, log_fifo);
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break;
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/* 0x31: sync pipeline? (thegrid) */
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/* 0x32: sync pipeline? (crusnexo) */
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// 0x25 ?? (atlantis)
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case 0x25:
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case 0x31:
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case 0x32:
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if (log_fifo)
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@ -821,11 +840,13 @@ int zeus2_device::zeus2_fifo_process(const UINT32 *data, int numwords)
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break;
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/* 0x38: direct render quad (crusnexo) */
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// 0x38: 3 words?? (atlantis)
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case 0x38:
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if (numwords < 12)
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//if (numwords < 12)
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if (numwords < 3)
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return FALSE;
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if (log_fifo)
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log_fifo_command(data, numwords, "");
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if (0 && log_fifo)
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log_fifo_command(data, numwords, "\n");
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break;
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/* 0x40: ???? */
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@ -837,7 +858,7 @@ int zeus2_device::zeus2_fifo_process(const UINT32 *data, int numwords)
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default:
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if (data[0] != 0x2c0)
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{
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printf("Unknown command %08X\n", data[0]);
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//printf("Unknown command %08X\n", data[0]);
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if (log_fifo)
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log_fifo_command(data, numwords, "\n");
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}
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@ -26,10 +26,8 @@
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#define WAVERAM0_WIDTH 1024
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#define WAVERAM0_HEIGHT 2048
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//#define WAVERAM1_WIDTH 512
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#define WAVERAM1_WIDTH 512
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#define WAVERAM1_HEIGHT 1024
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//#define WAVERAM1_HEIGHT 1024
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/*************************************
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* Type definitions
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@ -148,6 +146,47 @@ public:
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int texel_width;
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float zbase;
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protected:
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// device-level overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual void device_stop() override;
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private:
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TIMER_CALLBACK_MEMBER(int_timer_callback);
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void zeus2_register32_w(offs_t offset, UINT32 data, int logit);
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void zeus2_register_update(offs_t offset, UINT32 oldval, int logit);
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int zeus2_fifo_process(const UINT32 *data, int numwords);
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void zeus2_pointer_write(UINT8 which, UINT32 value);
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void zeus2_draw_model(UINT32 baseaddr, UINT16 count, int logit);
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void log_fifo_command(const UINT32 *data, int numwords, const char *suffix);
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/*************************************
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* Member variables
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*************************************/
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UINT8 log_fifo;
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UINT32 zeus_fifo[20];
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UINT8 zeus_fifo_words;
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#if TRACK_REG_USAGE
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struct reg_info
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{
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struct reg_info *next;
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UINT32 value;
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};
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reg_info *regdata[0x80];
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int regdata_count[0x80];
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int regread_count[0x80];
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int regwrite_count[0x80];
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reg_info *subregdata[0x100];
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int subregdata_count[0x80];
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int subregwrite_count[0x100];
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#endif
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public:
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/*************************************
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* Inlines for block addressing
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*************************************/
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@ -236,48 +275,6 @@ public:
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}
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#endif
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protected:
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// device-level overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual void device_stop() override;
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private:
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TIMER_CALLBACK_MEMBER(int_timer_callback);
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void zeus2_register32_w(offs_t offset, UINT32 data, int logit);
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void zeus2_register_update(offs_t offset, UINT32 oldval, int logit);
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int zeus2_fifo_process(const UINT32 *data, int numwords);
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void zeus2_pointer_write(UINT8 which, UINT32 value);
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void zeus2_draw_model(UINT32 baseaddr, UINT16 count, int logit);
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void log_fifo_command(const UINT32 *data, int numwords, const char *suffix);
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/*************************************
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* Member variables
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*************************************/
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UINT8 log_fifo;
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UINT32 zeus_fifo[20];
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UINT8 zeus_fifo_words;
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#if TRACK_REG_USAGE
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struct reg_info
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{
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struct reg_info *next;
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UINT32 value;
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};
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reg_info *regdata[0x80];
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int regdata_count[0x80];
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int regread_count[0x80];
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int regwrite_count[0x80];
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reg_info *subregdata[0x100];
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int subregdata_count[0x80];
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int subregwrite_count[0x100];
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#endif
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};
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// device type definition
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@ -557,6 +557,7 @@ MACHINE_CONFIG_FRAGMENT( dcs2_audio_denver )
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MCFG_CPU_ADD("denver", ADSP2181, XTAL_33_333MHz)
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MCFG_ADSP21XX_SPORT_TX_CB(WRITE32(dcs_audio_device, sound_tx_callback)) /* callback for serial transmit */
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MCFG_ADSP21XX_TIMER_FIRED_CB(WRITELINE(dcs_audio_device,timer_enable_callback)) /* callback for timer fired */
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MCFG_ADSP21XX_DMOVLAY_CB(WRITE32(dcs_audio_device, dmovlay_callback)) // callback for adsp 2181 dmovlay instruction
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MCFG_CPU_PROGRAM_MAP(denver_program_map)
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MCFG_CPU_DATA_MAP(denver_data_map)
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MCFG_CPU_IO_MAP(denver_io_map)
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@ -688,6 +689,8 @@ TIMER_CALLBACK_MEMBER( dcs_audio_device::dcs_reset )
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/* rev 4: reset the Denver ASIC */
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case 4:
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m_dmovlay_val = 0;
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dmovlay_remap_memory();
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denver_reset();
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break;
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}
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@ -752,6 +755,7 @@ void dcs_audio_device::dcs_register_state()
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save_item(NAME(m_control_regs));
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save_item(NAME(m_sounddata_bank));
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save_item(NAME(m_dmovlay_val));
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save_item(NAME(m_auto_ack));
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save_item(NAME(m_latch_control));
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@ -786,6 +790,9 @@ void dcs_audio_device::dcs_register_state()
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if (m_rev == 2)
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machine().save().register_postload(save_prepost_delegate(FUNC(dcs_audio_device::sdrc_remap_memory), this));
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if (m_rev == 4)
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machine().save().register_postload(save_prepost_delegate(FUNC(dcs_audio_device::dmovlay_remap_memory), this));
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}
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@ -958,8 +965,12 @@ void dcs2_audio_device::device_start()
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/* supports both RAM and ROM variants */
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if (m_dram_in_mb != 0)
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{
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m_sounddata = auto_alloc_array(machine(), UINT16, m_dram_in_mb << (20-1));
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save_pointer(NAME(m_sounddata), m_dram_in_mb << (20-1));
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UINT32 ramSize = m_dram_in_mb << (20 - 1);
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// Add one extra bank for internal ram in ADSP 2181
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if (m_rev == 4)
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ramSize += soundbank_words;
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m_sounddata = auto_alloc_array(machine(), UINT16, ramSize);
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save_pointer(NAME(m_sounddata), ramSize);
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m_sounddata_words = (m_dram_in_mb << 20) / 2;
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}
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else
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@ -973,6 +984,7 @@ void dcs2_audio_device::device_start()
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m_data_bank->configure_entries(0, m_sounddata_banks, m_sounddata, soundbank_words*2);
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}
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/* allocate memory for the SRAM */
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m_sram = auto_alloc_array(machine(), UINT16, 0x8000*4/2);
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@ -1330,7 +1342,7 @@ WRITE16_MEMBER( dcs_audio_device::dsio_w )
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/* offset 2 controls RAM pages */
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case 2:
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dsio.reg[2] = data;
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m_data_bank->set_entry(DSIO_DM_PG % m_sounddata_banks);
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dmovlay_remap_memory();
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break;
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}
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}
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@ -1399,7 +1411,6 @@ WRITE16_MEMBER( dcs_audio_device::denver_w )
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dsio.reg[2] = data;
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m_data_bank->set_entry(DENV_DM_PG % m_sounddata_banks);
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break;
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/* offset 3 controls FIFO reset */
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case 3:
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if (!m_fifo_reset_w.isnull())
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@ -1460,6 +1471,32 @@ READ32_MEMBER( dcs_audio_device::dsio_idma_data_r )
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return result;
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}
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void dcs_audio_device::dmovlay_remap_memory()
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{
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// Switch banks
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// Internal ram is bank 0
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int bankSel;
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if (m_dmovlay_val == 0) {
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bankSel = 0;
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m_data_bank->set_entry(bankSel);
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} else {
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bankSel = 1 + (DSIO_DM_PG % m_sounddata_banks);
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m_data_bank->set_entry(bankSel);
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}
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if (LOG_DCS_IO)
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logerror("%s dmovlay_remap_memory: Switching data ram location bankSel = %i\n", machine().describe_context(), bankSel);
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}
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WRITE32_MEMBER(dcs_audio_device::dmovlay_callback)
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{
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// Do some checking first
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if (data < 0 || data > 1) {
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logerror("dmovlay_callback: Error! dmovlay called with value = %X\n", data);
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} else {
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m_dmovlay_val = data;
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dmovlay_remap_memory();
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}
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}
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/***************************************************************************
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@ -47,6 +47,8 @@ public:
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DECLARE_WRITE32_MEMBER( dsio_idma_addr_w );
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DECLARE_WRITE32_MEMBER( dsio_idma_data_w );
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DECLARE_READ32_MEMBER( dsio_idma_data_r );
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void dmovlay_remap_memory();
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WRITE32_MEMBER(dmovlay_callback);
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// non public
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void dcs_boot();
|
||||
@ -202,6 +204,8 @@ protected:
|
||||
UINT32 *m_internal_program_ram;
|
||||
UINT32 *m_external_program_ram;
|
||||
|
||||
int m_dmovlay_val;
|
||||
|
||||
sdrc_state m_sdrc;
|
||||
dsio_state m_dsio;
|
||||
hle_transfer_state m_transfer;
|
||||
|
||||
@ -123,6 +123,7 @@ public:
|
||||
UINT8 m_status_leds;
|
||||
|
||||
DECLARE_WRITE32_MEMBER(asic_fifo_w);
|
||||
DECLARE_WRITE32_MEMBER(dcs3_fifo_full_w);
|
||||
|
||||
READ32_MEMBER (green_r);
|
||||
WRITE32_MEMBER(green_w);
|
||||
@ -388,6 +389,11 @@ WRITE32_MEMBER(atlantis_state::asic_fifo_w)
|
||||
m_ioasic->fifo_w(data);
|
||||
}
|
||||
|
||||
WRITE32_MEMBER(atlantis_state::dcs3_fifo_full_w)
|
||||
{
|
||||
m_ioasic->fifo_full_w(data);
|
||||
}
|
||||
|
||||
/*************************************
|
||||
* PCI9050 User I/O handlers
|
||||
*************************************/
|
||||
@ -649,7 +655,8 @@ ADDRESS_MAP_END
|
||||
static ADDRESS_MAP_START( map1, AS_PROGRAM, 32, atlantis_state )
|
||||
AM_RANGE(0x00000000, 0x0000003f) AM_DEVREADWRITE("ioasic", midway_ioasic_device, read, write)
|
||||
// asic_fifo_w
|
||||
AM_RANGE(0x00200000, 0x00200003) AM_WRITE(asic_fifo_w)
|
||||
// dcs3_fifo_full_w
|
||||
AM_RANGE(0x00200000, 0x00200003) AM_WRITE(dcs3_fifo_full_w)
|
||||
AM_RANGE(0x00400000, 0x00400003) AM_DEVWRITE("dcs", dcs_audio_device, dsio_idma_addr_w)
|
||||
AM_RANGE(0x00600000, 0x00600003) AM_DEVREADWRITE("dcs", dcs_audio_device, dsio_idma_data_r, dsio_idma_data_w)
|
||||
AM_RANGE(0x00800000, 0x00900003) AM_READWRITE(port_ctrl_r, port_ctrl_w)
|
||||
@ -823,7 +830,7 @@ static MACHINE_CONFIG_START( mwskins, atlantis_state )
|
||||
/* sound hardware */
|
||||
//MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DSIO, 0)
|
||||
MCFG_DEVICE_ADD("dcs", DCS2_AUDIO_DENVER, 0)
|
||||
MCFG_DCS2_AUDIO_DRAM_IN_MB(8)
|
||||
MCFG_DCS2_AUDIO_DRAM_IN_MB(4)
|
||||
MCFG_DCS2_AUDIO_POLLING_OFFSET(0) /* no place to hook :-( */
|
||||
|
||||
MCFG_DEVICE_ADD("ioasic", MIDWAY_IOASIC, 0)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user