mirror of
https://github.com/holub/mame
synced 2025-06-29 15:38:53 +03:00
Merge branch 'master' of https://github.com/mamedev/mame
This commit is contained in:
Robbbert
commit
2a1b422a4d
@ -29,6 +29,7 @@ mov sreg, doesnot disable until next operation is executed
|
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8086/8088
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||||
---------
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"mov cs, " causes unconditional jump!
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0xd6 is salc (sbb al,al) as all other intel x86-16 and -32 cpus
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||||
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||||
80C86/80C88
|
||||
-----------
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||||
@ -36,9 +37,10 @@ mov sreg, doesnot disable until next operation is executed
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||||
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80186/80188
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||||
-----------
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integrated pic8259, pit8253, dma8253 (but not at standard pc addresses)
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integrated pic, timer and dmac entirely incompatible with 8259, 825[3,4] and 82[3,5]7
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additional instructions
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"mov cs, " ?
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#BR/bound/int 5, #UD/illegal instruction/int 6, #NM/coprocessor unavailable/int 7 support
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"mov cs, " ignored (likely causes int 6)
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shift count anded with 0x1f
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80188
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@ -52,6 +54,7 @@ although it is based on 80186 instruction set, some behaviours follow 8086
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8080 emulation mode
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"mov cs, " ignored
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shift count not anded (acts like 8086)
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0xd6 is xlat alias
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NEC 70116 (V30)
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---------------
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@ -69,11 +72,11 @@ no 8080 emulation mode
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NEC V40
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-------
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pinout, integrated peripherals as 80186
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pinout, integrated peripherals 8259,54,37 clones at nonpc compatible addresses
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NEC V50
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-------
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pinout, integrated peripherals as 80188
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pinout, integrated peripherals as v40
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NEC V33?
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--------
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@ -92,9 +95,9 @@ v30? emulation mode (without 8080 emulation mode)
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80286
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-----
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80186 with additional instructions
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80186 with additional instructions but no peripherals
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24 bit address bus,
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protected mode
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protected mode selector/descriptor
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80386 and later
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---------------
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@ -598,7 +598,7 @@ PB.3 - violet wire
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PB.4 - white wire (and TSI BUSY line)
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PB.5 - selection jumper input (see below)
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PB.6 - TSI start line
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PB.7 - TSI ROM D0 line
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PB.7 - TSI ROM A12 line
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selection jumpers:
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@ -1070,7 +1070,7 @@ WRITE8_MEMBER(fidelz80_state::vsc_ppi_portc_w)
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{
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// d0-d3: select digits
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// d0-d7: select leds, input mux low bits
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m_inp_mux = (m_inp_mux & 0x300) | data;
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m_inp_mux = (m_inp_mux & ~0xff) | data;
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m_led_select = data;
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vsc_prepare_display();
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}
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@ -1081,7 +1081,8 @@ WRITE8_MEMBER(fidelz80_state::vsc_ppi_portc_w)
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READ8_MEMBER(fidelz80_state::vsc_pio_porta_r)
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{
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// d0-d7: multiplexed inputs
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return read_inputs(10);
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return read_inputs(11);
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}
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READ8_MEMBER(fidelz80_state::vsc_pio_portb_r)
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@ -1090,18 +1091,26 @@ READ8_MEMBER(fidelz80_state::vsc_pio_portb_r)
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// d4: TSI BUSY line
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ret |= (m_speech->busy_r()) ? 0 : 0x10;
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return ret;
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}
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WRITE8_MEMBER(fidelz80_state::vsc_pio_portb_w)
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{
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// d0,d1: input mux highest bits
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m_inp_mux = (m_inp_mux & 0xff) | (data << 8 & 0x300);
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// d5: enable language switch
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m_inp_mux = (m_inp_mux & ~0x700) | (data << 8 & 0x300) | (data << 5 & 0x400);
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//if (m_inp_mux & 0x400) debugger_break(machine());
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// d7: TSI ROM A12
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m_speech->force_update(); // update stream to now
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m_speech_bank = data >> 7 & 1;
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// d6: TSI START line
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m_speech->start_w(data >> 6 & 1);
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// d2: lower TSI volume
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m_speech->set_output_gain(0, (data & 4) ? 0.5 : 1.0);
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}
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@ -1298,26 +1307,26 @@ static INPUT_PORTS_START( cc10 )
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PORT_START("IN.4")
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PORT_BIT(0x0f, IP_ACTIVE_HIGH, IPT_UNUSED)
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PORT_START("LEVEL") // factory setting
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PORT_CONFNAME( 0x80, 0x00, "PPI.B.7: Maximum Levels" )
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PORT_CONFSETTING( 0x00, "10" )
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PORT_START("LEVEL") // hardwired (VCC/GND?)
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PORT_CONFNAME( 0x80, 0x00, "Maximum Levels" )
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PORT_CONFSETTING( 0x00, "10" ) // factory setting
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PORT_CONFSETTING( 0x80, "3" )
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INPUT_PORTS_END
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static INPUT_PORTS_START( vcc )
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PORT_INCLUDE( vcc_base )
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PORT_START("IN.4") // not consumer accessible
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PORT_CONFNAME( 0x01, 0x00, "PCB Jumper: French" )
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PORT_START("IN.4") // PCB jumpers, not consumer accessible
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PORT_CONFNAME( 0x01, 0x00, "Language: French" )
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PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x01, DEF_STR( On ) )
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PORT_CONFNAME( 0x02, 0x00, "PCB Jumper: Spanish" )
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PORT_CONFNAME( 0x02, 0x00, "Language: Spanish" )
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PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x02, DEF_STR( On ) )
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PORT_CONFNAME( 0x04, 0x00, "PCB Jumper: German" )
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PORT_CONFNAME( 0x04, 0x00, "Language: German" )
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PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x04, DEF_STR( On ) )
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PORT_CONFNAME( 0x08, 0x00, "PCB Jumper: Special" )
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PORT_CONFNAME( 0x08, 0x00, "Language: Special" )
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PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x08, DEF_STR( On ) )
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INPUT_PORTS_END
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@ -1326,7 +1335,7 @@ static INPUT_PORTS_START( vccfr )
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PORT_INCLUDE( vcc )
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PORT_MODIFY("IN.4")
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PORT_CONFNAME( 0x01, 0x01, "PCB Jumper: French" )
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PORT_CONFNAME( 0x01, 0x01, "Language: French" )
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PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x01, DEF_STR( On ) )
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INPUT_PORTS_END
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@ -1335,7 +1344,7 @@ static INPUT_PORTS_START( vccsp )
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PORT_INCLUDE( vcc )
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PORT_MODIFY("IN.4")
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PORT_CONFNAME( 0x02, 0x02, "PCB Jumper: Spanish" )
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PORT_CONFNAME( 0x02, 0x02, "Language: Spanish" )
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PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x02, DEF_STR( On ) )
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INPUT_PORTS_END
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@ -1344,7 +1353,7 @@ static INPUT_PORTS_START( vccg )
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PORT_INCLUDE( vcc )
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PORT_MODIFY("IN.4")
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PORT_CONFNAME( 0x04, 0x04, "PCB Jumper: German" )
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PORT_CONFNAME( 0x04, 0x04, "Language: German" )
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PORT_CONFSETTING( 0x00, DEF_STR( Off ) )
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PORT_CONFSETTING( 0x04, DEF_STR( On ) )
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INPUT_PORTS_END
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@ -1449,6 +1458,13 @@ static INPUT_PORTS_START( vsc )
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PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("DM") PORT_CODE(KEYCODE_M)
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PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_NAME("ST") PORT_CODE(KEYCODE_S)
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PORT_BIT(0xc0, IP_ACTIVE_HIGH, IPT_UNUSED)
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PORT_START("IN.10") // hardwired (2 diodes)
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PORT_CONFNAME( 0x03, 0x00, "Language" )
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PORT_CONFSETTING( 0x00, "English" )
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PORT_CONFSETTING( 0x01, "1" ) // todo: game dasm says it checks against 0/not0, 2, 3.. which language is which?
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PORT_CONFSETTING( 0x02, "2" )
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PORT_CONFSETTING( 0x03, "3" )
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INPUT_PORTS_END
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static INPUT_PORTS_START( vbrc )
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@ -1582,6 +1598,7 @@ static MACHINE_CONFIG_START( vsc, fidelz80_state )
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/* sound hardware */
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MCFG_SPEAKER_STANDARD_MONO("mono")
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MCFG_SOUND_ADD("speech", S14001A, 25000) // R/C circuit, around 25khz
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MCFG_S14001A_EXT_READ_HANDLER(READ8(fidelz80_state, vcc_speech_r))
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MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
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MACHINE_CONFIG_END
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@ -1705,8 +1722,39 @@ ROM_START( vsc )
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ROM_LOAD("101-64109.bin", 0x2000, 0x2000, CRC(08a3577c) SHA1(69fe379d21a9d4b57c84c3832d7b3e7431eec341) )
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ROM_LOAD("101-32024.bin", 0x4000, 0x1000, CRC(2a078676) SHA1(db2f0aba7e8ac0f84a17bae7155210cdf0813afb) )
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ROM_REGION( 0x1000, "speech", 0 )
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ROM_REGION( 0x2000, "speech", 0 )
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ROM_LOAD("101-32107.bin", 0x0000, 0x1000, CRC(f35784f9) SHA1(348e54a7fa1e8091f89ac656b4da22f28ca2e44d) )
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ROM_RELOAD( 0x1000, 0x1000)
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ROM_END
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ROM_START( vscsp )
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ROM_REGION( 0x10000, "maincpu", 0 )
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ROM_LOAD("101-64108.bin", 0x0000, 0x2000, CRC(c9c98490) SHA1(e6db883df088d60463e75db51433a4b01a3e7626) )
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ROM_LOAD("101-64109.bin", 0x2000, 0x2000, CRC(08a3577c) SHA1(69fe379d21a9d4b57c84c3832d7b3e7431eec341) )
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ROM_LOAD("101-32024.bin", 0x4000, 0x1000, CRC(2a078676) SHA1(db2f0aba7e8ac0f84a17bae7155210cdf0813afb) )
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ROM_REGION( 0x2000, "speech", 0 )
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ROM_LOAD("vcc-spanish.bin", 0x0000, 0x2000, BAD_DUMP CRC(8766e128) SHA1(78c7413bf240159720b131ab70bfbdf4e86eb1e9) ) // taken from vcc/fexcelv, assume correct
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ROM_END
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ROM_START( vscg )
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ROM_REGION( 0x10000, "maincpu", 0 )
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ROM_LOAD("101-64108.bin", 0x0000, 0x2000, CRC(c9c98490) SHA1(e6db883df088d60463e75db51433a4b01a3e7626) )
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ROM_LOAD("101-64109.bin", 0x2000, 0x2000, CRC(08a3577c) SHA1(69fe379d21a9d4b57c84c3832d7b3e7431eec341) )
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||||
ROM_LOAD("101-32024.bin", 0x4000, 0x1000, CRC(2a078676) SHA1(db2f0aba7e8ac0f84a17bae7155210cdf0813afb) )
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||||
|
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ROM_REGION( 0x2000, "speech", 0 )
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ROM_LOAD("vcc-german.bin", 0x0000, 0x2000, BAD_DUMP CRC(6c85e310) SHA1(20d1d6543c1e6a1f04184a2df2a468f33faec3ff) ) // taken from fexcelv, assume correct
|
||||
ROM_END
|
||||
|
||||
ROM_START( vscfr )
|
||||
ROM_REGION( 0x10000, "maincpu", 0 )
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||||
ROM_LOAD("101-64108.bin", 0x0000, 0x2000, CRC(c9c98490) SHA1(e6db883df088d60463e75db51433a4b01a3e7626) )
|
||||
ROM_LOAD("101-64109.bin", 0x2000, 0x2000, CRC(08a3577c) SHA1(69fe379d21a9d4b57c84c3832d7b3e7431eec341) )
|
||||
ROM_LOAD("101-32024.bin", 0x4000, 0x1000, CRC(2a078676) SHA1(db2f0aba7e8ac0f84a17bae7155210cdf0813afb) )
|
||||
|
||||
ROM_REGION( 0x2000, "speech", 0 )
|
||||
ROM_LOAD("vcc-french.bin", 0x0000, 0x2000, BAD_DUMP CRC(fe8c5c18) SHA1(2b64279ab3747ee81c86963c13e78321c6cfa3a3) ) // taken from fexcelv, assume correct
|
||||
ROM_END
|
||||
|
||||
|
||||
@ -1757,7 +1805,10 @@ COMP( 1980, uvcsp, vcc, 0, vcc, vccsp, driver_device, 0, "Fideli
|
||||
COMP( 1980, uvcg, vcc, 0, vcc, vccg, driver_device, 0, "Fidelity Electronics", "Advanced Voice Chess Challenger (German)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING )
|
||||
COMP( 1980, uvcfr, vcc, 0, vcc, vccfr, driver_device, 0, "Fidelity Electronics", "Advanced Voice Chess Challenger (French)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING )
|
||||
|
||||
COMP( 1980, vsc, 0, 0, vsc, vsc, driver_device, 0, "Fidelity Electronics", "Voice Sensory Chess Challenger", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
COMP( 1980, vsc, 0, 0, vsc, vsc, driver_device, 0, "Fidelity Electronics", "Voice Sensory Chess Challenger (English)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
COMP( 1980, vscsp, vsc, 0, vsc, vsc, driver_device, 0, "Fidelity Electronics", "Voice Sensory Chess Challenger (Spanish)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
COMP( 1980, vscg, vsc, 0, vsc, vsc, driver_device, 0, "Fidelity Electronics", "Voice Sensory Chess Challenger (German)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
COMP( 1980, vscfr, vsc, 0, vsc, vsc, driver_device, 0, "Fidelity Electronics", "Voice Sensory Chess Challenger (French)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
|
||||
COMP( 1979, vbrc, 0, 0, vbrc, vbrc, driver_device, 0, "Fidelity Electronics", "Voice Bridge Challenger", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING )
|
||||
COMP( 1980, bridgec3, vbrc, 0, vbrc, vbrc, driver_device, 0, "Fidelity Electronics", "Voice Bridge Challenger III", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING )
|
||||
|
||||
@ -179,7 +179,7 @@ MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( gtfore01, iteagle )
|
||||
MCFG_DEVICE_MODIFY(PCI_ID_FPGA)
|
||||
MCFG_ITEAGLE_FPGA_INIT(0x01000401, 0x0b0b0b)
|
||||
MCFG_ITEAGLE_FPGA_INIT(0x00000401, 0x0b0b0b)
|
||||
MCFG_DEVICE_MODIFY(PCI_ID_EEPROM)
|
||||
MCFG_ITEAGLE_EEPROM_INIT(0x0401, 0x7)
|
||||
MACHINE_CONFIG_END
|
||||
@ -187,7 +187,7 @@ MACHINE_CONFIG_END
|
||||
static MACHINE_CONFIG_DERIVED( gtfore02, iteagle )
|
||||
MCFG_DEVICE_MODIFY(PCI_ID_FPGA)
|
||||
MCFG_ITEAGLE_FPGA_INIT(0x01000402, 0x020201)
|
||||
MCFG_DEVICE_MODIFY(":pci:0a.0")
|
||||
MCFG_DEVICE_MODIFY(PCI_ID_EEPROM)
|
||||
MCFG_ITEAGLE_EEPROM_INIT(0x0402, 0x7)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
@ -215,28 +215,28 @@ MACHINE_CONFIG_END
|
||||
static MACHINE_CONFIG_DERIVED( gtfore06, iteagle )
|
||||
MCFG_DEVICE_MODIFY(PCI_ID_FPGA)
|
||||
MCFG_ITEAGLE_FPGA_INIT(0x01000406, 0x0c0b0d)
|
||||
MCFG_DEVICE_MODIFY(":pci:0a.0")
|
||||
MCFG_DEVICE_MODIFY(PCI_ID_EEPROM)
|
||||
MCFG_ITEAGLE_EEPROM_INIT(0x0406, 0x9);
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( carnking, iteagle )
|
||||
MCFG_DEVICE_MODIFY(PCI_ID_FPGA)
|
||||
MCFG_ITEAGLE_FPGA_INIT(0x01000603, 0x0c0b0d)
|
||||
MCFG_ITEAGLE_FPGA_INIT(0x01000a01, 0x0e0a0a)
|
||||
MCFG_DEVICE_MODIFY(PCI_ID_EEPROM)
|
||||
MCFG_ITEAGLE_EEPROM_INIT(0x0603, 0x9)
|
||||
MCFG_ITEAGLE_EEPROM_INIT(0x0a01, 0x9)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( bbhsc, iteagle )
|
||||
MCFG_DEVICE_MODIFY(PCI_ID_FPGA)
|
||||
MCFG_ITEAGLE_FPGA_INIT(0x01000600, 0x0c0a0a)
|
||||
MCFG_ITEAGLE_FPGA_INIT(0x02000600, 0x0c0a0a)
|
||||
MCFG_DEVICE_MODIFY(PCI_ID_EEPROM)
|
||||
MCFG_ITEAGLE_EEPROM_INIT(0x0600, 0x9)
|
||||
MCFG_ITEAGLE_EEPROM_INIT(0x0000, 0x7)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( bbhcotw, iteagle )
|
||||
MCFG_DEVICE_MODIFY(PCI_ID_FPGA)
|
||||
MCFG_ITEAGLE_FPGA_INIT(0x02000603, 0x080704)
|
||||
MCFG_DEVICE_MODIFY(":pci:0a.0")
|
||||
MCFG_DEVICE_MODIFY(PCI_ID_EEPROM)
|
||||
MCFG_ITEAGLE_EEPROM_INIT(0x0603, 0x9)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
@ -331,7 +331,7 @@ static INPUT_PORTS_START( virtpool )
|
||||
|
||||
INPUT_PORTS_END
|
||||
|
||||
static INPUT_PORTS_START( bbhcotw )
|
||||
static INPUT_PORTS_START( bbh )
|
||||
PORT_INCLUDE( iteagle )
|
||||
|
||||
PORT_MODIFY("IN1")
|
||||
@ -557,7 +557,7 @@ ROM_END
|
||||
|
||||
GAME( 2000, iteagle, 0, iteagle, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Eagle BIOS", MACHINE_IS_BIOS_ROOT )
|
||||
GAME( 1998, virtpool, iteagle, virtpool, virtpool, driver_device, 0, ROT0, "Incredible Technologies", "Virtual Pool", MACHINE_NOT_WORKING ) // random lockups on loading screens
|
||||
GAME( 2002, carnking, iteagle, carnking, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Carnival King (v1.00.11)", MACHINE_NOT_WORKING )
|
||||
GAME( 2002, carnking, iteagle, carnking, bbh, driver_device, 0, ROT0, "Incredible Technologies", "Carnival King (v1.00.11)", 0 )
|
||||
GAME( 2000, gtfore01, iteagle, gtfore01, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Golden Tee Fore! (v1.00.25)", 0 )
|
||||
GAME( 2001, gtfore02, iteagle, gtfore02, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Golden Tee Fore! 2002 (v2.01.06)", 0 )
|
||||
GAME( 2002, gtfore03, iteagle, gtfore03, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Golden Tee Fore! 2003 (v3.00.10)", 0 )
|
||||
@ -569,5 +569,5 @@ GAME( 2004, gtfore05a, gtfore05, gtfore05, iteagle, driver_device, 0, ROT0, "I
|
||||
GAME( 2004, gtfore05b, gtfore05, gtfore05, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Golden Tee Fore! 2005 Extra (v5.01.00)", 0 )
|
||||
GAME( 2004, gtfore05c, gtfore05, gtfore05, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Golden Tee Fore! 2005 Extra (v5.00.00)", 0 )
|
||||
GAME( 2005, gtfore06, iteagle, gtfore06, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Golden Tee Fore! 2006 Complete (v6.00.01)", 0 )
|
||||
GAME( 2002, bbhsc, iteagle, bbhsc, iteagle, driver_device, 0, ROT0, "Incredible Technologies", "Big Buck Hunter - Shooter's Challenge (v1.50.07)", MACHINE_NOT_WORKING ) // doesn't boot
|
||||
GAME( 2006, bbhcotw, iteagle, bbhcotw, bbhcotw, driver_device, 0, ROT0, "Incredible Technologies", "Big Buck Hunter Call of the Wild (v3.02.5)", MACHINE_NOT_WORKING ) // random lockups
|
||||
GAME( 2002, bbhsc, iteagle, bbhsc, bbh, driver_device, 0, ROT0, "Incredible Technologies", "Big Buck Hunter - Shooter's Challenge (v1.50.07)", MACHINE_NOT_WORKING ) // doesn't boot
|
||||
GAME( 2006, bbhcotw, iteagle, bbhcotw, bbh, driver_device, 0, ROT0, "Incredible Technologies", "Big Buck Hunter Call of the Wild (v3.02.5)", MACHINE_NOT_WORKING ) // random lockups
|
||||
|
||||
@ -459,8 +459,16 @@ ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START( ppj_audio_io, AS_IO, 8, kurukuru_state )
|
||||
ADDRESS_MAP_GLOBAL_MASK(0x7f)
|
||||
AM_RANGE(0x20, 0x20) AM_MIRROR(0x0f) AM_WRITE(kurukuru_adpcm_data_w)
|
||||
AM_RANGE(0x30, 0x30) AM_MIRROR(0x0f) AM_WRITE(kurukuru_adpcm_reset_w)
|
||||
AM_RANGE(0x40, 0x40) AM_MIRROR(0x0f) AM_READ(kurukuru_soundlatch_r)
|
||||
AM_RANGE(0x50, 0x50) AM_MIRROR(0x0f) AM_READ(kurukuru_adpcm_timer_irqack_r)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
/*
|
||||
30h -W --> 0x0b
|
||||
40h R- --> soundlatch...
|
||||
50h R- --> adpcm irq ack
|
||||
*/
|
||||
|
||||
/* YM2149 ports */
|
||||
WRITE8_MEMBER(kurukuru_state::ym2149_aout_w)
|
||||
@ -488,8 +496,8 @@ static INPUT_PORTS_START( kurukuru )
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(KEYCODE_C) PORT_NAME("3rd (Pyoko)")
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_CODE(KEYCODE_V) PORT_NAME("4th (Kunio)")
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_B) PORT_NAME("5th (Pyon Pyon)")
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_CODE(KEYCODE_N) PORT_NAME("Unknown A0h - bit5")
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_CODE(KEYCODE_M) PORT_NAME("Unknown A0h - bit6")
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_N) PORT_NAME("Unknown A0h - bit5")
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_M) PORT_NAME("Unknown A0h - bit6")
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
|
||||
|
||||
PORT_START("IN1")
|
||||
@ -558,6 +566,81 @@ static INPUT_PORTS_START( kurukuru )
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
static INPUT_PORTS_START( ppj )
|
||||
PORT_START("IN0")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CODE(KEYCODE_Z) PORT_NAME("1st (Boketa)")
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CODE(KEYCODE_X) PORT_NAME("2nd (Kunio)")
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CODE(KEYCODE_C) PORT_NAME("3rd (Pyon-Pyon)")
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_CODE(KEYCODE_V) PORT_NAME("4th (Pyokorin)")
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_CODE(KEYCODE_B) PORT_NAME("5th (Botechin)")
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_S) PORT_NAME("Unknown 70h - bit5")
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_D) PORT_NAME("Unknown 70h - bit6")
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_START1 )
|
||||
|
||||
PORT_START("IN1")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_9) PORT_NAME("Bookkeeping")
|
||||
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_NAME("Medal In")
|
||||
PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_CODE(KEYCODE_0) PORT_NAME("Reset Button")
|
||||
PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 )
|
||||
PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_CODE(KEYCODE_A) PORT_NAME("Unknown 60h - bit4")
|
||||
PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE (2)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) PORT_READ_LINE_DEVICE_MEMBER("hopper", ticket_dispenser_device, line_r) // hopper feedback
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT )
|
||||
|
||||
PORT_START("DSW1") // found in the PCB: 00000000 (arranged for sale since they are uncommon settings)
|
||||
PORT_DIPNAME( 0x07, 0x03, "Coinage A (100 Y)" ) PORT_DIPLOCATION("DSW1:1,2,3")
|
||||
PORT_DIPSETTING( 0x00, "1 Coin / 1 Medal" )
|
||||
PORT_DIPSETTING( 0x04, "1 Coin / 2 Medal" )
|
||||
PORT_DIPSETTING( 0x02, "1 Coin / 3 Medal" )
|
||||
PORT_DIPSETTING( 0x06, "1 Coin / 4 Medal" )
|
||||
PORT_DIPSETTING( 0x01, "1 Coin / 5 Medal" )
|
||||
PORT_DIPSETTING( 0x05, "1 Coin / 6 Medal" )
|
||||
PORT_DIPSETTING( 0x03, "1 Coin / 10 Medal" )
|
||||
PORT_DIPSETTING( 0x07, "1 Coin / 11 Medal" )
|
||||
PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW1:4")
|
||||
PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x10, 0x00, "Unknown (related to coin1/payout)") PORT_DIPLOCATION("DSW1:5")
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x20, 0x00, "Coinage Config" ) PORT_DIPLOCATION("DSW1:6")
|
||||
PORT_DIPSETTING( 0x00, "Coin 1 = Normal" )
|
||||
PORT_DIPSETTING( 0x20, "Coin 1 = Payout" )
|
||||
PORT_DIPNAME( 0x40, 0x00, "Payout Mode" ) PORT_DIPLOCATION("DSW1:7")
|
||||
PORT_DIPSETTING( 0x40, "Manual" )
|
||||
PORT_DIPSETTING( 0x00, "Automatic" )
|
||||
PORT_DIPNAME( 0x80, 0x00, "Repeat Last Bet") PORT_DIPLOCATION("DSW1:8")
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( No ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( Yes ) )
|
||||
|
||||
PORT_START("DSW2") // found in the PCB: 00000000 (arranged for sale since they are uncommon settings)
|
||||
PORT_DIPNAME( 0x07, 0x01, "Percentage" ) PORT_DIPLOCATION("DSW2:1,2,3")
|
||||
PORT_DIPSETTING( 0x07, "50%" )
|
||||
PORT_DIPSETTING( 0x03, "60%" )
|
||||
PORT_DIPSETTING( 0x05, "70%" )
|
||||
PORT_DIPSETTING( 0x01, "75%" )
|
||||
PORT_DIPSETTING( 0x06, "80%" )
|
||||
PORT_DIPSETTING( 0x02, "85%" )
|
||||
PORT_DIPSETTING( 0x04, "90%" )
|
||||
PORT_DIPSETTING( 0x00, "95%" )
|
||||
PORT_DIPNAME( 0x08, 0x00, "Winwave" ) PORT_DIPLOCATION("DSW2:4")
|
||||
PORT_DIPSETTING( 0x08, "Small" )
|
||||
PORT_DIPSETTING( 0x00, "Big" )
|
||||
PORT_DIPNAME( 0x10, 0x00, "M.Medal" ) PORT_DIPLOCATION("DSW2:5")
|
||||
PORT_DIPSETTING( 0x10, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
PORT_DIPNAME( 0x60, 0x60, "HG" ) PORT_DIPLOCATION("DSW2:6,7")
|
||||
PORT_DIPSETTING( 0x60, "20-1" )
|
||||
PORT_DIPSETTING( 0x20, "50-1" )
|
||||
PORT_DIPSETTING( 0x40, "100-1" )
|
||||
PORT_DIPSETTING( 0x00, "200-1" )
|
||||
PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("DSW2:8")
|
||||
PORT_DIPSETTING( 0x80, DEF_STR( Off ) )
|
||||
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
|
||||
|
||||
INPUT_PORTS_END
|
||||
|
||||
|
||||
/*************************************************
|
||||
* Machine Start & Reset Routines *
|
||||
*************************************************/
|
||||
@ -652,6 +735,8 @@ MACHINE_CONFIG_END
|
||||
|
||||
***************************************************************************/
|
||||
|
||||
/* Kuru Kuru Pyon Pyon.
|
||||
*/
|
||||
ROM_START( kurukuru )
|
||||
ROM_REGION( 0x08000, "maincpu", 0 )
|
||||
ROM_LOAD( "kp_17l.ic17", 0x00000, 0x08000, CRC(9b552ebc) SHA1(07d0e62b7fdad381963a345376b72ad31eb7b96d) ) // program code
|
||||
@ -672,6 +757,9 @@ ROM_START( kurukuru )
|
||||
ROM_LOAD( "7908b-4.ic32", 0x0600, 0x0034, CRC(bddf925e) SHA1(861cf5966444d0c0392241e5cfa08db475fb439a) )
|
||||
ROM_END
|
||||
|
||||
/* Pyon Pyon Jump.
|
||||
Ver 1.40.
|
||||
*/
|
||||
ROM_START( ppj )
|
||||
ROM_REGION( 0x08000, "maincpu", 0 )
|
||||
ROM_LOAD( "ppj17.ic17", 0x00000, 0x08000, CRC(5d9c9ceb) SHA1(0f52c8a0aaaf978afeb07e56493399133b4ce781) ) // program code
|
||||
@ -693,6 +781,6 @@ ROM_START( ppj )
|
||||
ROM_END
|
||||
|
||||
|
||||
/* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS */
|
||||
GAME( 199?, kurukuru, 0, kurukuru, kurukuru, driver_device, 0, ROT0, "Success / Taiyo Jidoki", "Kuru Kuru Pyon Pyon (Japan)", 0 )
|
||||
GAME( 199?, ppj, 0, ppj, kurukuru, driver_device, 0, ROT0, "Success / Taiyo Jidoki", "Pyon Pyon Jump (Japan)", MACHINE_NOT_WORKING )
|
||||
/* YEAR NAME PARENT MACHINE INPUT STATE INIT ROT COMPANY FULLNAME FLAGS */
|
||||
GAME( 199?, kurukuru, 0, kurukuru, kurukuru, driver_device, 0, ROT0, "Success / Taiyo Jidoki", "Kuru Kuru Pyon Pyon (Japan)", 0 )
|
||||
GAME( 199?, ppj, 0, ppj, ppj, driver_device, 0, ROT0, "Success / Taiyo Jidoki", "Pyon Pyon Jump (V1.40, Japan)", 0 )
|
||||
|
||||
@ -15,7 +15,6 @@
|
||||
Vancouver 68020 12Mhz
|
||||
Genius 68030 V4.00 33.333 Mhz
|
||||
Genius 68030 V4.01 33.333 Mhz
|
||||
Genius 68030 V4.01 33.333x2 Mhz (custom MESS overclocked version for higher ELO)
|
||||
Berlin Pro 68020 24.576 Mhz (not modular board, but otherwise close to milano)
|
||||
Berlin Pro (London) 68020 24.576 Mhz (not modular board, but otherwise close to milano)
|
||||
London 68030 V5.00k 33.333 Mhz (probably the Genius 3/4 update ROM)
|
||||
@ -998,16 +997,12 @@ TIMER_DEVICE_CALLBACK_MEMBER(polgar_state::timer_update_irq_academy)
|
||||
MACHINE_START_MEMBER(polgar_state,van32)
|
||||
{
|
||||
// patch LCD delay loop on the 68030 machines until waitstates and/or opcode timings are fixed in MAME core
|
||||
// patches gen32 gen32_41 gen32_oc lond030
|
||||
// patches gen32 gen32_41 lond030
|
||||
|
||||
UINT8 *rom = memregion("maincpu")->base();
|
||||
|
||||
if(rom[0x870] == 0x0c && rom[0x871] == 0x78) {
|
||||
if (!strcmp(machine().system().name,"gen32_oc")) {
|
||||
rom[0x870] = 0x6c;
|
||||
} else {
|
||||
rom[0x870] = 0x38;
|
||||
}
|
||||
rom[0x870] = 0x38;
|
||||
}
|
||||
}
|
||||
|
||||
@ -1692,15 +1687,6 @@ static MACHINE_CONFIG_START( gen32, polgar_state )
|
||||
MCFG_NVRAM_ADD_0FILL("nvram")
|
||||
|
||||
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_DERIVED( gen32_oc, gen32 )
|
||||
MCFG_CPU_MODIFY("maincpu")
|
||||
MCFG_CPU_CLOCK( XTAL_33_333MHz * 2 )
|
||||
MCFG_DEVICE_REMOVE("int_timer")
|
||||
MCFG_TIMER_DRIVER_ADD_PERIODIC("int_timer", polgar_state, timer_update_irq6, attotime::from_hz(500))
|
||||
|
||||
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
static MACHINE_CONFIG_START( bpl32, polgar_state )
|
||||
@ -1851,11 +1837,6 @@ ROM_START( gen32_41 )
|
||||
ROM_LOAD("gen32_41.bin", 0x00000, 0x40000,CRC(ea9938c0) SHA1(645cf0b5b831b48104ad6cec8d78c63dbb6a588c))
|
||||
ROM_END
|
||||
|
||||
ROM_START( gen32_oc )
|
||||
ROM_REGION32_BE( 0x40000, "maincpu", 0 )
|
||||
ROM_LOAD("gen32_41.bin", 0x00000, 0x40000,CRC(ea9938c0) SHA1(645cf0b5b831b48104ad6cec8d78c63dbb6a588c))
|
||||
ROM_END
|
||||
|
||||
ROM_START( berlinp )
|
||||
ROM_REGION32_BE( 0x40000, "maincpu", 0 )
|
||||
ROM_LOAD("berlinp.bin", 0x00000, 0x40000,CRC(82FBAF6E) SHA1(729B7CEF3DFAECC4594A6178FC4BA6015AFA6202))
|
||||
@ -1904,7 +1885,6 @@ DRIVER_INIT_MEMBER(polgar_state,polgar)
|
||||
CONS( 1992, risc, 0, 0, risc, van16, driver_device, 0, "Saitek", "RISC2500", MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK|MACHINE_NOT_WORKING | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1993, gen32, van16, 0, gen32, gen32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Genius030 V4.00", MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1993, gen32_41, van16, 0, gen32, gen32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Genius030 V4.01", MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1993, gen32_oc, van16, 0, gen32_oc, gen32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Genius030 V4.01OC", MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK|MACHINE_UNOFFICIAL | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1994, berlinp, van16, 0, bpl32, bpl32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Berlin Pro 68020", MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1996, bpl32, van16, 0, bpl32, bpl32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto Berlin Pro London Upgrade V5.00", MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
CONS( 1996, lond020, van16, 0, van32, van32, driver_device, 0, "Hegener & Glaser Muenchen", "Mephisto London 68020 32 Bit", MACHINE_SUPPORTS_SAVE|MACHINE_REQUIRES_ARTWORK | MACHINE_CLICKABLE_ARTWORK )
|
||||
|
||||
@ -25,7 +25,7 @@ public:
|
||||
|
||||
// devices/pointers
|
||||
required_device<cpu_device> m_maincpu;
|
||||
optional_ioport_array<10> m_inp_matrix; // max 10
|
||||
optional_ioport_array<11> m_inp_matrix; // max 11
|
||||
optional_device<s14001a_device> m_speech;
|
||||
optional_region_ptr<UINT8> m_speech_rom;
|
||||
|
||||
|
||||
@ -4,6 +4,7 @@
|
||||
#include "coreutil.h"
|
||||
|
||||
#define LOG_FPGA (0)
|
||||
#define LOG_SERIAL (0)
|
||||
#define LOG_RTC (0)
|
||||
#define LOG_RAM (0)
|
||||
#define LOG_EEPROM (0)
|
||||
@ -80,14 +81,14 @@ void iteagle_fpga_device::device_reset()
|
||||
m_serial_str.clear();
|
||||
m_serial_idx = 0;
|
||||
m_serial_data = false;
|
||||
memset(m_serial_com0, 0, sizeof(m_serial_com0));
|
||||
memset(m_serial_com1, 0, sizeof(m_serial_com1));
|
||||
memset(m_serial_com2, 0, sizeof(m_serial_com2));
|
||||
memset(m_serial_com3, 0, sizeof(m_serial_com3));
|
||||
memset(m_serial_com4, 0, sizeof(m_serial_com4));
|
||||
m_serial_com0[0] = 0x2c;
|
||||
m_serial_com1[0] = 0x2c;
|
||||
m_serial_com2[0] = 0x2c;
|
||||
m_serial_com3[0] = 0x2c;
|
||||
m_serial_com4[0] = 0x2c;
|
||||
}
|
||||
|
||||
void iteagle_fpga_device::update_sequence(UINT32 data)
|
||||
@ -130,12 +131,10 @@ void iteagle_fpga_device::update_sequence_eg1(UINT32 data)
|
||||
val1 = ((m_seq & 0x2)<<6) | ((m_seq & 0x4)<<4) | ((m_seq & 0x8)<<2) | ((m_seq & 0x10)<<0)
|
||||
| ((m_seq & 0x20)>>2) | ((m_seq & 0x40)>>4) | ((m_seq & 0x80)>>6) | ((m_seq & 0x100)>>8);
|
||||
m_seq = (m_seq>>8) | ((feed&0xff)<<16);
|
||||
//m_fpga_regs[offset] = (m_fpga_regs[offset]&0xFFFFFF00) | ((val1 + m_seq_rem1)&0xFF);
|
||||
m_fpga_regs[offset] = (m_fpga_regs[offset]&0xFFFFFF00) | ((val1 + m_seq_rem1 + m_seq_rem2)&0xFF);
|
||||
} else if (data & 0x2) {
|
||||
val1 = ((m_seq & 0x2)<<1) | ((m_seq & 0x4)>>1) | ((m_seq & 0x8)>>3);
|
||||
m_seq_rem1 = ((m_seq & 0x10)) | ((m_seq & 0x20)>>2) | ((m_seq & 0x40)>>4);
|
||||
//m_seq_rem2 = ((m_seq & 0x80)>>1) | ((m_seq & 0x100)>>3) | ((m_seq & 0x200)>>5);
|
||||
m_seq = (m_seq>>6) | ((feed&0x3f)<<18);
|
||||
m_fpga_regs[offset] = (m_fpga_regs[offset]&0xFFFFFF00) | ((val1 + m_seq_rem1 + m_seq_rem2)&0xFF);
|
||||
} else {
|
||||
@ -197,16 +196,16 @@ READ32_MEMBER( iteagle_fpga_device::fpga_r )
|
||||
logerror("%s:fpga_r offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
|
||||
break;
|
||||
case 0x0c/4: // 1d = modem byte
|
||||
result = (result & 0xFFFF0000) | ((m_serial_com2[m_serial_idx]&0xff)<<8) | (m_serial_com1[m_serial_idx]&0xff);
|
||||
result = (result & 0xFFFF0000) | ((m_serial_com1[m_serial_idx]&0xff)<<8) | (m_serial_com0[m_serial_idx]&0xff);
|
||||
if (ACCESSING_BITS_0_15) {
|
||||
m_serial_data = false;
|
||||
m_serial_idx = 0;
|
||||
}
|
||||
if (LOG_FPGA)
|
||||
if (0 && LOG_FPGA)
|
||||
logerror("%s:fpga_r offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, result, mem_mask);
|
||||
break;
|
||||
case 0x1c/4: // 1d = modem byte
|
||||
result = (result & 0xFFFF0000) | ((m_serial_com4[m_serial_idx]&0xff)<<8) | (m_serial_com3[m_serial_idx]&0xff);
|
||||
result = (result & 0xFFFF0000) | ((m_serial_com3[m_serial_idx]&0xff)<<8) | (m_serial_com2[m_serial_idx]&0xff);
|
||||
if (ACCESSING_BITS_0_15) {
|
||||
m_serial_data = false;
|
||||
m_serial_idx = 0;
|
||||
@ -233,8 +232,8 @@ WRITE32_MEMBER( iteagle_fpga_device::fpga_w )
|
||||
if ((m_version & 0xff00) == 0x0200)
|
||||
update_sequence_eg1(data & 0xff);
|
||||
else
|
||||
// ATMEL Chip access. Returns version id's when bit 7 is set.
|
||||
update_sequence(data & 0xff);
|
||||
// ATMEL Chip access. Returns version id's when bit 7 is set.
|
||||
update_sequence(data & 0xff);
|
||||
if (0 && LOG_FPGA)
|
||||
logerror("%s:fpga_w offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
|
||||
}
|
||||
@ -242,7 +241,7 @@ WRITE32_MEMBER( iteagle_fpga_device::fpga_w )
|
||||
if (ACCESSING_BITS_24_31 && (data & 0x01000000)) {
|
||||
m_cpu->set_input_line(m_irq_num, CLEAR_LINE);
|
||||
// Not sure what value to use here, needed for lightgun
|
||||
m_timer->adjust(attotime::from_hz(25));
|
||||
m_timer->adjust(attotime::from_hz(59));
|
||||
if (LOG_FPGA)
|
||||
logerror("%s:fpga_w offset %04X = %08X & %08X Clearing interrupt(%i)\n", machine().describe_context(), offset*4, data, mem_mask, m_irq_num);
|
||||
} else {
|
||||
@ -269,7 +268,7 @@ WRITE32_MEMBER( iteagle_fpga_device::fpga_w )
|
||||
if (!m_serial_data) {
|
||||
m_serial_idx = data&0xf;
|
||||
} else {
|
||||
m_serial_com1[m_serial_idx] = data&0xff;
|
||||
m_serial_com0[m_serial_idx] = data&0xff;
|
||||
m_serial_idx = 0;
|
||||
}
|
||||
m_serial_data = !m_serial_data;
|
||||
@ -278,29 +277,31 @@ WRITE32_MEMBER( iteagle_fpga_device::fpga_w )
|
||||
if (!m_serial_data) {
|
||||
m_serial_idx = (data&0x0f00)>>8;
|
||||
} else {
|
||||
m_serial_com2[m_serial_idx] = (data&0xff00)>>8;
|
||||
m_serial_com1[m_serial_idx] = (data&0xff00)>>8;
|
||||
}
|
||||
m_serial_data = !m_serial_data;
|
||||
}
|
||||
if (ACCESSING_BITS_16_23) {
|
||||
if (m_serial_str.size()==0)
|
||||
m_serial_str = "com1: ";
|
||||
m_serial_str = "com0: ";
|
||||
m_serial_str += (data>>16)&0xff;
|
||||
if (((data>>16)&0xff)==0xd) {
|
||||
if (LOG_SERIAL) logerror("%s\n", m_serial_str.c_str());
|
||||
osd_printf_debug("%s\n", m_serial_str.c_str());
|
||||
m_serial_str.clear();
|
||||
}
|
||||
}
|
||||
if (ACCESSING_BITS_24_31) {
|
||||
if (m_serial_str.size()==0)
|
||||
m_serial_str = "com2: ";
|
||||
m_serial_str = "com1: ";
|
||||
m_serial_str += (data>>24)&0xff;
|
||||
if (1 || ((data>>24)&0xff)==0xd) {
|
||||
if (LOG_SERIAL) logerror("%s\n", m_serial_str.c_str());
|
||||
osd_printf_debug("%s\n", m_serial_str.c_str());
|
||||
m_serial_str.clear();
|
||||
}
|
||||
}
|
||||
if (LOG_FPGA)
|
||||
if (0 && LOG_FPGA)
|
||||
logerror("%s:fpga_w offset %04X = %08X & %08X\n", machine().describe_context(), offset*4, data, mem_mask);
|
||||
break;
|
||||
case 0x1c/4:
|
||||
@ -308,7 +309,7 @@ WRITE32_MEMBER( iteagle_fpga_device::fpga_w )
|
||||
if (!m_serial_data) {
|
||||
m_serial_idx = data&0xf;
|
||||
} else {
|
||||
m_serial_com3[m_serial_idx] = data&0xff;
|
||||
m_serial_com2[m_serial_idx] = data&0xff;
|
||||
m_serial_idx = 0;
|
||||
}
|
||||
m_serial_data = !m_serial_data;
|
||||
@ -317,24 +318,26 @@ WRITE32_MEMBER( iteagle_fpga_device::fpga_w )
|
||||
if (!m_serial_data) {
|
||||
m_serial_idx = (data&0x0f00)>>8;
|
||||
} else {
|
||||
m_serial_com4[m_serial_idx] = (data&0xff00)>>8;
|
||||
m_serial_com3[m_serial_idx] = (data&0xff00)>>8;
|
||||
}
|
||||
m_serial_data = !m_serial_data;
|
||||
}
|
||||
if (ACCESSING_BITS_16_23) {
|
||||
if (m_serial_str.size()==0)
|
||||
m_serial_str = "com3: ";
|
||||
m_serial_str = "com2: ";
|
||||
m_serial_str += (data>>16)&0xff;
|
||||
if (1 || ((data>>16)&0xff)==0xd) {
|
||||
if (LOG_SERIAL) logerror("%s\n", m_serial_str.c_str());
|
||||
osd_printf_debug("%s\n", m_serial_str.c_str());
|
||||
m_serial_str.clear();
|
||||
}
|
||||
}
|
||||
if (ACCESSING_BITS_24_31) {
|
||||
if (m_serial_str.size()==0)
|
||||
m_serial_str = "com4: ";
|
||||
m_serial_str = "com3: ";
|
||||
m_serial_str += (data>>24)&0xff;
|
||||
if (((data>>24)&0xff)==0xd) {
|
||||
if (LOG_SERIAL) logerror("%s\n", m_serial_str.c_str());
|
||||
osd_printf_debug("%s\n", m_serial_str.c_str());
|
||||
m_serial_str.clear();
|
||||
}
|
||||
@ -649,7 +652,7 @@ void iteagle_ide_device::device_reset()
|
||||
{
|
||||
pci_device::device_reset();
|
||||
memset(m_ctrl_regs, 0, sizeof(m_ctrl_regs));
|
||||
m_ctrl_regs[0x10/4] = 0x00000000; // 0x6=No SIMM, 0x2, 0x1, 0x0 = SIMM . Top 16 bits are compared to 0x3.
|
||||
m_ctrl_regs[0x10/4] = 0x00070000; // 0x6=No SIMM, 0x2, 0x1, 0x0 = SIMM . Top 16 bits are compared to 0x3. Bit 0 might be lan chip present.
|
||||
memset(m_rtc_regs, 0, sizeof(m_rtc_regs));
|
||||
m_rtc_regs[0xa] = 0x20; // 32.768 MHz
|
||||
m_rtc_regs[0xb] = 0x02; // 24-hour format
|
||||
|
||||
@ -63,10 +63,10 @@ private:
|
||||
std::string m_serial_str;
|
||||
UINT8 m_serial_idx;
|
||||
bool m_serial_data;
|
||||
UINT8 m_serial_com0[0x10];
|
||||
UINT8 m_serial_com1[0x10];
|
||||
UINT8 m_serial_com2[0x10];
|
||||
UINT8 m_serial_com3[0x10];
|
||||
UINT8 m_serial_com4[0x10];
|
||||
|
||||
UINT32 m_version;
|
||||
UINT32 m_seq_init;
|
||||
|
||||
@ -2153,6 +2153,9 @@ uvcsp
|
||||
bridgec3
|
||||
vbrc
|
||||
vsc
|
||||
vscg
|
||||
vscfr
|
||||
vscsp
|
||||
csc
|
||||
fscc12
|
||||
fexcelv
|
||||
@ -2187,7 +2190,6 @@ van16 // 1991 Mephisto Vancouver 68000
|
||||
van32 // 1991 Mephisto Vancouver 68020
|
||||
gen32 // 1993 Mephisto Genius030 V4.00
|
||||
gen32_41 // 1993 Mephisto Genius030 V4.01
|
||||
gen32_oc // 1993 Mephisto Genius030 V4.01OC
|
||||
berlinp // 1994 Mephisto Berlin Pro 68020
|
||||
bpl32 // 1996 Mephisto Berlin Pro London Upgrade V5.00
|
||||
lond020 // 1996 Mephisto London 68020 32 Bit
|
||||
|
||||
Loading…
Reference in New Issue
Block a user