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dpcplus: minor non-code related changes

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-add missing copyright holders
-improve notes
-confirm ARM7 type
This commit is contained in:
kazblox 2015-10-28 19:13:50 -04:00
parent bfba6e75e9
commit 2a640b1eb1
1 changed files with 17 additions and 9 deletions
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26
src/devices/bus/vcs/dpcplus.c
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@ -1,26 +1,34 @@
// license:BSD-3-Clause
// copyright-holders:
// copyright-holders:David Haywood
/***************************************************************************
Atari 2600 cart with DPC+
the DPC+ adds an ARM CPU amongst other things (display improvements, etc.)
the DPC+ adds an ARM CPU, including video improvements plus an extra synthesizer.
map (according to a blogpost on atariage):
NOTE: All banks are accessible via $F000
Some info on the DPC+ hardware can be found on Darrell Spice Jr's guides:
http://atariage.com/forums/blog/148/entry-11811-dpcarm-part-6-dpc-cartridge-layout/
http://atariage.com/forums/blog/148/entry-11883-dpcarm-part-7-6507arm-exchange-of-information/
http://atariage.com/forums/blog/148/entry-11903-dpcarm-part-8-multiple-functions/
http://atariage.com/forums/blog/148/entry-11935-dpcarm-part-9-functional-menu/
http://atariage.com/forums/blog/148/entry-11964-dpcarm-part-10-score-timer-display/
http://atariage.com/forums/blog/148/entry-11988-dpcarm-part-12-gamepad-support/
map:
Bankswitching uses addresses $FFF6-$FFFB
* ARM RAM mapped at $40000000 in this area
$0000-$0BFF: DPC+ driver (not accessible by 2600 itself)
$0C00-$1BFF: Bank 0
$0C00-$1BFF: Bank 0 - ARM code starts here, but 6507 code can also be placed here aswell
$1C00-$2BFF: Bank 1
$2C00-$3BFF: Bank 2
$3C00-$4BFF: Bank 3
$4C00-$5BFF: Bank 4
$5C00-$6BFF: Bank 5
$5C00-$6BFF: Bank 5 - 6507 code
* ARM RAM mapped at $40000C00 in this area
$6C00-$7BFF: Display Data (indirect access)
* ARM RAM mapped at $40001C00 in this area
$7C00-$7FFF: Frequency Data (not accessible by 2600 itself)
$7C00-$7FFF: Synth Frequency Data (not accessible by 2600 itself)
***************************************************************************/
@ -72,12 +80,12 @@ WRITE32_MEMBER(a26_rom_dpcplus_device::armrom_w)
static ADDRESS_MAP_START( dpcplus_arm7_map, AS_PROGRAM, 32, a26_rom_dpcplus_device )
// todo: implement all this correctly
AM_RANGE(0x00000000, 0x00007fff) AM_READWRITE(armrom_r,armrom_w)// flash, 32k
AM_RANGE(0x00000000, 0x00007fff) AM_READWRITE(armrom_r,armrom_w) // flash, 32k
AM_RANGE(0x40000000, 0x40001fff) AM_RAM // sram, 8k
ADDRESS_MAP_END
static MACHINE_CONFIG_FRAGMENT( a26_dpcplus )
MCFG_CPU_ADD("arm", ARM7, 70000000) // correct type?
MCFG_CPU_ADD("arm", ARM7, 70000000)
MCFG_CPU_PROGRAM_MAP(dpcplus_arm7_map)
MACHINE_CONFIG_END