mirror of
https://github.com/holub/mame
synced 2025-04-23 17:00:53 +03:00
Log output changed
This commit is contained in:
parent
9363101a9f
commit
2a71be55e9
@ -240,7 +240,7 @@ void tms99xx_device::device_start()
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void tms99xx_device::device_stop()
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{
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int k = 0;
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if (TRACE_SETUP) logerror("tms99xx: Deleting lookup tables\n");
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if (TRACE_SETUP) logerror("Deleting lookup tables\n");
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while (m_lotables[k]!=nullptr) delete[] m_lotables[k++];
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}
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@ -266,7 +266,7 @@ void tms99xx_device::resolve_lines()
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*/
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void tms99xx_device::device_reset()
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{
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if (TRACE_EMU) logerror("tms99xx: Device reset by emulator\n");
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if (TRACE_EMU) logerror("Device reset by emulator\n");
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m_reset = true;
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m_check_ready = false;
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m_wait_state = false;
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@ -1061,7 +1061,7 @@ void tms99xx_device::build_command_lookup_table()
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{
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inst = &s_command[i];
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table = m_command_lookup_table;
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if (TRACE_SETUP) logerror("tms99xx: === opcode=%04x, len=%d\n", inst->opcode, format_mask_len[inst->format]);
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if (TRACE_SETUP) logerror("=== opcode=%04x, len=%d\n", inst->opcode, format_mask_len[inst->format]);
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bitcount = 4;
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opcode = inst->opcode;
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cmdindex = (opcode>>12) & 0x000f;
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@ -1071,7 +1071,7 @@ void tms99xx_device::build_command_lookup_table()
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// Descend
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if (table[cmdindex].next_digit == nullptr)
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{
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if (TRACE_SETUP) logerror("tms99xx: create new table at bitcount=%d for index=%d\n", bitcount, cmdindex);
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if (TRACE_SETUP) logerror("create new table at bitcount=%d for index=%d\n", bitcount, cmdindex);
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table[cmdindex].next_digit = new lookup_entry[16];
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m_lotables[k++] = table[cmdindex].next_digit;
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for (int j=0; j < 16; j++)
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@ -1082,7 +1082,7 @@ void tms99xx_device::build_command_lookup_table()
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}
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else
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{
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if (TRACE_SETUP) logerror("tms99xx: found a table at bitcount=%d\n", bitcount);
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if (TRACE_SETUP) logerror("found a table at bitcount=%d\n", bitcount);
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}
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table = table[cmdindex].next_digit;
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@ -1090,17 +1090,17 @@ void tms99xx_device::build_command_lookup_table()
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bitcount = bitcount+4;
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opcode <<= 4;
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cmdindex = (opcode>>12) & 0x000f;
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if (TRACE_SETUP) logerror("tms99xx: next index=%x\n", cmdindex);
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if (TRACE_SETUP) logerror("next index=%x\n", cmdindex);
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}
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if (TRACE_SETUP) logerror("tms99xx: bitcount=%d\n", bitcount);
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if (TRACE_SETUP) logerror("bitcount=%d\n", bitcount);
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// We are at the target level
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// Need to fill in the same entry for all values in the bitcount
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// (if a command needs 10 bits we have to copy it four
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// times for all combinations with 12 bits)
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for (int j=0; j < (1<<(bitcount-format_mask_len[inst->format])); j++)
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{
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if (TRACE_SETUP) logerror("tms99xx: opcode=%04x at position %d\n", inst->opcode, cmdindex+j);
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if (TRACE_SETUP) logerror("opcode=%04x at position %d\n", inst->opcode, cmdindex+j);
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table[cmdindex+j].entry = inst;
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}
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@ -1108,7 +1108,7 @@ void tms99xx_device::build_command_lookup_table()
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} while (inst->opcode != 0xf000);
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m_lotables[k++] = nullptr;
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if (TRACE_SETUP) logerror("tms99xx: Allocated %d tables\n", k);
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if (TRACE_SETUP) logerror("Allocated %d tables\n", k);
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}
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/*
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@ -1151,7 +1151,7 @@ void tms99xx_device::execute_run()
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{
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if (m_reset) service_interrupt();
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if (TRACE_EMU) logerror("tms99xx: calling execute_run for %d cycles\n", m_icount);
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if (TRACE_EMU) logerror("calling execute_run for %d cycles\n", m_icount);
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do
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{
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// Only when last instruction has completed
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@ -1159,7 +1159,7 @@ void tms99xx_device::execute_run()
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{
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if (m_load_state)
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{
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logerror("tms99xx: LOAD interrupt\n");
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logerror("LOAD interrupt\n");
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m_irq_level = LOAD_INT;
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m_irq_state = false;
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service_interrupt();
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@ -1177,7 +1177,7 @@ void tms99xx_device::execute_run()
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if (m_program == nullptr && m_idle_state)
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{
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if (TRACE_WAIT) logerror("tms99xx: idle state\n");
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if (TRACE_WAIT) logerror("idle state\n");
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pulse_clock(1);
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if (!m_external_operation.isnull())
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{
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@ -1196,7 +1196,7 @@ void tms99xx_device::execute_run()
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m_program[MPC] != MEMORY_READ && m_program[MPC] != MEMORY_WRITE &&
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m_program[MPC] != REG_READ && m_program[MPC] != REG_WRITE)))
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{
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if (TRACE_WAIT) logerror("tms99xx: hold\n");
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if (TRACE_WAIT) logerror("hold\n");
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if (!m_hold_acknowledged) acknowledge_hold();
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pulse_clock(1);
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}
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@ -1207,7 +1207,7 @@ void tms99xx_device::execute_run()
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{
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// We are in a wait state
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set_wait_state(true);
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if (TRACE_WAIT) logerror("tms99xx: wait\n");
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if (TRACE_WAIT) logerror("wait\n");
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// The clock output should be used to change the state of an outer
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// device which operates the READY line
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pulse_clock(1);
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@ -1222,7 +1222,7 @@ void tms99xx_device::execute_run()
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{
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m_op = m_program[MPC];
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}
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if (TRACE_MICRO) logerror("tms99xx: MPC = %d, m_op = %d\n", MPC, m_op);
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if (TRACE_MICRO) logerror("MPC = %d, m_op = %d\n", MPC, m_op);
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// Call the operation of the microprogram
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(this->*s_microoperation[m_op])();
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// If we have multiple passes (as in the TMS9980)
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@ -1238,7 +1238,7 @@ void tms99xx_device::execute_run()
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}
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}
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} while (m_icount>0 && !m_reset);
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if (TRACE_EMU) logerror("tms99xx: cycles expired; will return soon.\n");
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if (TRACE_EMU) logerror("cycles expired; will return soon.\n");
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}
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/**************************************************************************/
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@ -1266,11 +1266,11 @@ void tms99xx_device::execute_set_input(int irqline, int state)
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if (state==ASSERT_LINE)
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{
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m_irq_level = get_intlevel(state);
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if (TRACE_INT) logerror("tms99xx: /INT asserted, level=%d, ST=%04x\n", m_irq_level, ST);
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if (TRACE_INT) logerror("/INT asserted, level=%d, ST=%04x\n", m_irq_level, ST);
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}
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else
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{
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if (TRACE_INT) logerror("tms99xx: /INT cleared\n");
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if (TRACE_INT) logerror("/INT cleared\n");
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}
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}
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}
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@ -1321,9 +1321,9 @@ void tms99xx_device::service_interrupt()
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{
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switch (m_irq_level)
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{
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case RESET_INT: logerror("tms99xx: **** triggered a RESET interrupt\n"); break;
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case LOAD_INT: logerror("tms99xx: **** triggered a LOAD (NMI) interrupt\n"); break;
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default: logerror("tms99xx: ** triggered an interrupt on level %d\n", m_irq_level); break;
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case RESET_INT: logerror("**** triggered a RESET interrupt\n"); break;
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case LOAD_INT: logerror("**** triggered a LOAD (NMI) interrupt\n"); break;
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default: logerror("** triggered an interrupt on level %d\n", m_irq_level); break;
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}
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}
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@ -1344,8 +1344,8 @@ void tms99xx_device::pulse_clock(int count)
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m_icount--; // This is the only location where we count down the cycles.
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if (TRACE_CLOCK)
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{
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if (m_check_ready) logerror("tms99xx: pulse_clock, READY=%d\n", m_ready? 1:0);
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else logerror("tms99xx: pulse_clock\n");
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if (m_check_ready) logerror("pulse_clock, READY=%d\n", m_ready? 1:0);
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else logerror("pulse_clock\n");
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}
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}
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}
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@ -1416,7 +1416,7 @@ void tms99xx_device::decode(UINT16 inst)
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while (!complete)
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{
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index = (opcode >> 12) & 0x000f;
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if (TRACE_MICRO) logerror("tms99xx: Check next hex digit of instruction %x\n", index);
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if (TRACE_MICRO) logerror("Check next hex digit of instruction %x\n", index);
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if (table[index].next_digit != nullptr)
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{
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table = table[index].next_digit;
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@ -1428,7 +1428,7 @@ void tms99xx_device::decode(UINT16 inst)
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if (decoded == nullptr)
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{
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// not found
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logerror("tms99xx: Illegal opcode %04x\n", inst);
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logerror("Address %04x: Illegal opcode %04x\n", PC, inst);
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IR = 0;
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// This will cause another instruction acquisition in the next machine cycle
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// with an asserted IAQ line (can be used to indicate this illegal opcode detection).
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@ -1439,7 +1439,7 @@ void tms99xx_device::decode(UINT16 inst)
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m_program = decoded->prog;
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MPC = -1;
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m_command = decoded->id;
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if (TRACE_MICRO) logerror("tms99xx: Command decoded as id %d, %s, base opcode %04x\n", m_command, opname[m_command], decoded->opcode);
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if (TRACE_MICRO) logerror("Command decoded as id %d, %s, base opcode %04x\n", m_command, opname[m_command], decoded->opcode);
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// Byte operations are either format 1 with the byte flag set
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// or format 4 (CRU multi bit operations) with 1-8 bits to transfer.
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m_byteop = ((decoded->format==1 && ((IR & 0x1000)!=0))
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@ -1467,7 +1467,7 @@ void tms99xx_device::acquire_instruction()
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if (m_mem_phase == 1)
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{
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decode(m_current_value);
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if (TRACE_EXEC) logerror("tms99xx: %04x: %04x (%s)\n", PC, IR, opname[m_command]);
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if (TRACE_EXEC) logerror("%04x: %04x (%s)\n", PC, IR, opname[m_command]);
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debugger_instruction_hook(this, PC);
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PC = (PC + 2) & 0xfffe & m_prgaddr_mask;
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// IAQ will be cleared in the main loop
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@ -1491,7 +1491,7 @@ void tms99xx_device::mem_read()
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m_check_ready = true;
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m_mem_phase = 2;
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m_pass = 2;
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if (TRACE_ADDRESSBUS) logerror("tms99xx: set address (r) %04x\n", m_address);
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if (TRACE_ADDRESSBUS) logerror("set address (r) %04x\n", m_address);
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pulse_clock(1); // Concludes the first cycle
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// If READY has been found to be low, the CPU will now stay in the wait state loop
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@ -1503,7 +1503,7 @@ void tms99xx_device::mem_read()
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pulse_clock(1);
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if (!m_dbin_line.isnull()) m_dbin_line(CLEAR_LINE);
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m_mem_phase = 1; // reset to phase 1
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if (TRACE_MEM) logerror("tms99xx: mem r %04x -> %04x\n", m_address, m_current_value);
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if (TRACE_MEM) logerror("mem r %04x -> %04x\n", m_address, m_current_value);
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}
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}
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@ -1513,9 +1513,9 @@ void tms99xx_device::mem_write()
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{
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if (!m_dbin_line.isnull()) m_dbin_line(CLEAR_LINE);
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// When writing, the data bus is asserted immediately after the address bus
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if (TRACE_ADDRESSBUS) logerror("tms99xx: set address (w) %04x\n", m_address);
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if (TRACE_ADDRESSBUS) logerror("set address (w) %04x\n", m_address);
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m_prgspace->set_address(m_address & m_prgaddr_mask & 0xfffe);
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if (TRACE_MEM) logerror("tms99xx: mem w %04x <- %04x\n", m_address, m_current_value);
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if (TRACE_MEM) logerror("mem w %04x <- %04x\n", m_address, m_current_value);
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m_prgspace->write_word(m_address & m_prgaddr_mask & 0xfffe, m_current_value);
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m_check_ready = true;
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m_mem_phase = 2;
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@ -1633,7 +1633,7 @@ void tms99xx_device::cru_output_operation()
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// Write m_count bits from cru_address
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for (int i=0; i < m_count; i++)
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{
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if (TRACE_CRU) logerror("tms99xx: CRU output operation, address %04x, value %d\n", location<<1, value & 0x01);
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if (TRACE_CRU) logerror("CRU output operation, address %04x, value %d\n", location<<1, value & 0x01);
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m_cru->write_byte(location, (value & 0x01));
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value >>= 1;
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location = (location + 1) & m_cruaddr_mask;
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@ -1655,7 +1655,7 @@ void tms99xx_device::command_completed()
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// Pseudo state at the end of the current instruction cycle sequence
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if (TRACE_CYCLES)
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{
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logerror("tms99xx: ------");
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logerror("------");
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int cycles = m_first_cycle - m_icount;
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// Avoid nonsense values due to expired and resumed main loop
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if (cycles > 0 && cycles < 10000) logerror(" %d cycles", cycles);
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@ -1721,7 +1721,7 @@ inline void tms99xx_device::compare_and_set_lae(UINT16 value1, UINT16 value2)
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set_status_bit(ST_EQ, value1 == value2);
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set_status_bit(ST_LH, value1 > value2);
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set_status_bit(ST_AGT, (INT16)value1 > (INT16)value2);
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if (TRACE_STATUS) logerror("tms99xx: ST = %04x (val1=%04x, val2=%04x)\n", ST, value1, value2);
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if (TRACE_STATUS) logerror("ST = %04x (val1=%04x, val2=%04x)\n", ST, value1, value2);
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}
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/**************************************************************************
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@ -1958,7 +1958,7 @@ void tms99xx_device::alu_f3()
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compare_and_set_lae(m_current_value, 0);
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}
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}
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if (TRACE_STATUS) logerror("tms99xx: ST = %04x\n", ST);
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if (TRACE_STATUS) logerror("ST = %04x\n", ST);
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break;
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}
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@ -1977,7 +1977,7 @@ void tms99xx_device::alu_multiply()
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m_address = ((IR >> 5) & 0x001e) + WP;
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break;
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case 1: // After reading the register (multiplier)
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if (TRACE_ALU) logerror("tms99xx: Multiply %04x by %04x\n", m_current_value, m_source_value);
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if (TRACE_ALU) logerror("Multiply %04x by %04x\n", m_current_value, m_source_value);
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result = (m_source_value & 0x0000ffff) * (m_current_value & 0x0000ffff);
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m_current_value = (result >> 16) & 0xffff;
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m_value_copy = result & 0xffff;
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@ -2026,11 +2026,11 @@ void tms99xx_device::alu_divide()
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// Create full word and perform division
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uval32 = (m_value_copy << 16) | m_current_value;
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if (TRACE_ALU) logerror("tms99xx: Dividing %08x by %04x\n", uval32, m_source_value);
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if (TRACE_ALU) logerror("Dividing %08x by %04x\n", uval32, m_source_value);
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m_current_value = uval32 / m_source_value;
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m_value_copy = uval32 % m_source_value;
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if (TRACE_ALU) logerror("tms99xx: Quotient %04x, remainder %04x\n", m_current_value, m_value_copy);
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if (TRACE_ALU) logerror("Quotient %04x, remainder %04x\n", m_current_value, m_value_copy);
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m_address = m_address_copy;
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@ -2056,7 +2056,7 @@ void tms99xx_device::alu_divide()
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// Prepare to write the remainder
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m_current_value = m_value_copy;
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m_address = m_address + 2;
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if (TRACE_STATUS) logerror("tms99xx: ST = %04x (div)\n", ST);
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if (TRACE_STATUS) logerror("ST = %04x (div)\n", ST);
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break;
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}
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pulse_clock(2);
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@ -2206,7 +2206,7 @@ void tms99xx_device::alu_abs()
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void tms99xx_device::alu_x()
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{
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if (TRACE_ALU) logerror("tms99xx: Substituting current command by %04x\n", m_current_value);
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if (TRACE_ALU) logerror("Substituting current command by %04x\n", m_current_value);
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decode(m_current_value);
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pulse_clock(2);
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}
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@ -2226,7 +2226,7 @@ void tms99xx_device::alu_b()
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m_current_value = PC;
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PC = m_address & m_prgaddr_mask & 0xfffe;
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m_address = WP + 22;
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if (TRACE_ALU) logerror("tms99xx: Set new PC = %04x\n", PC);
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if (TRACE_ALU) logerror("Set new PC = %04x\n", PC);
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pulse_clock(2);
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}
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@ -2296,7 +2296,7 @@ void tms99xx_device::alu_ldcr()
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}
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m_cru_address = m_current_value;
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m_value = value;
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if (TRACE_CRU) logerror("tms99xx: Load CRU address %04x (%d bits), value = %04x\n", m_cru_address, m_count, m_value);
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if (TRACE_CRU) logerror("Load CRU address %04x (%d bits), value = %04x\n", m_cru_address, m_count, m_value);
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}
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m_state++;
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pulse_clock(2);
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@ -2328,7 +2328,7 @@ void tms99xx_device::alu_stcr()
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value = m_value & 0xffff;
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if (m_count < 9)
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{
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if (TRACE_CRU) logerror("tms99xx: Store CRU at %04x (%d bits) in %04x, result = %02x\n", m_cru_address, m_count, m_source_address, value);
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if (TRACE_CRU) logerror("Store CRU at %04x (%d bits) in %04x, result = %02x\n", m_cru_address, m_count, m_source_address, value);
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set_status_parity((UINT8)(value & 0xff));
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compare_and_set_lae(value<<8, 0);
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if (m_source_even)
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@ -2340,7 +2340,7 @@ void tms99xx_device::alu_stcr()
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}
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else
|
||||
{
|
||||
if (TRACE_CRU) logerror("tms99xx: Store CRU at %04x (%d bits) in %04x, result = %04x\n", m_cru_address, m_count, m_source_address, value);
|
||||
if (TRACE_CRU) logerror("Store CRU at %04x (%d bits) in %04x, result = %04x\n", m_cru_address, m_count, m_source_address, value);
|
||||
m_current_value = value;
|
||||
compare_and_set_lae(value, 0);
|
||||
pulse_clock(2*(5 + (16-m_count)));
|
||||
@ -2386,7 +2386,7 @@ void tms99xx_device::alu_tb()
|
||||
break;
|
||||
case 2:
|
||||
set_status_bit(ST_EQ, m_value!=0);
|
||||
if (TRACE_STATUS) logerror("tms99xx: ST = %04x\n", ST);
|
||||
if (TRACE_STATUS) logerror("ST = %04x\n", ST);
|
||||
break;
|
||||
}
|
||||
m_state++;
|
||||
@ -2444,11 +2444,11 @@ void tms99xx_device::alu_jmp()
|
||||
}
|
||||
if (!cond)
|
||||
{
|
||||
if (TRACE_ALU) logerror("tms99xx: Jump condition false\n");
|
||||
if (TRACE_ALU) logerror("Jump condition false\n");
|
||||
MPC+=1; // skip next ALU call
|
||||
}
|
||||
else
|
||||
if (TRACE_ALU) logerror("tms99xx: Jump condition true\n");
|
||||
if (TRACE_ALU) logerror("Jump condition true\n");
|
||||
}
|
||||
else
|
||||
{
|
||||
@ -2489,7 +2489,7 @@ void tms99xx_device::alu_shift()
|
||||
}
|
||||
else
|
||||
{
|
||||
if (TRACE_ALU) logerror("tms99xx: Shift operation gets count from R0\n");
|
||||
if (TRACE_ALU) logerror("Shift operation gets count from R0\n");
|
||||
pulse_clock(2);
|
||||
}
|
||||
pulse_clock(2);
|
||||
@ -2538,7 +2538,7 @@ void tms99xx_device::alu_shift()
|
||||
set_status_bit(ST_OV, overflow);
|
||||
compare_and_set_lae(m_current_value, 0);
|
||||
m_address = m_address_saved; // Register address
|
||||
if (TRACE_STATUS) logerror("tms99xx: ST = %04x (val=%04x)\n", ST, m_current_value);
|
||||
if (TRACE_STATUS) logerror("ST = %04x (val=%04x)\n", ST, m_current_value);
|
||||
break;
|
||||
}
|
||||
m_state++;
|
||||
@ -2589,7 +2589,7 @@ void tms99xx_device::alu_lwpi()
|
||||
void tms99xx_device::alu_limi()
|
||||
{
|
||||
ST = (ST & 0xfff0) | (m_current_value & 0x000f);
|
||||
if (TRACE_STATUS) logerror("tms99xx: ST = %04x\n", ST);
|
||||
if (TRACE_STATUS) logerror("ST = %04x\n", ST);
|
||||
pulse_clock(2);
|
||||
}
|
||||
|
||||
@ -2645,7 +2645,7 @@ void tms99xx_device::alu_rtwp()
|
||||
|
||||
void tms99xx_device::alu_int()
|
||||
{
|
||||
if (TRACE_EMU) logerror("tms99xx: INT state %d; irq_level %d\n", m_state, m_irq_level);
|
||||
if (TRACE_EMU) logerror("INT state %d; irq_level %d\n", m_state, m_irq_level);
|
||||
switch (m_state)
|
||||
{
|
||||
case 0:
|
||||
@ -2680,7 +2680,7 @@ void tms99xx_device::alu_int()
|
||||
break;
|
||||
case 4:
|
||||
m_address = (m_address_copy + 2) & 0xfffe & m_prgaddr_mask;
|
||||
if (TRACE_ALU) logerror("tms99xx: read from %04x\n", m_address);
|
||||
if (TRACE_ALU) logerror("read from %04x\n", m_address);
|
||||
break;
|
||||
case 5:
|
||||
PC = m_current_value & m_prgaddr_mask & 0xfffe;
|
||||
|
Loading…
Reference in New Issue
Block a user