Sprinter/mame
2
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Removed cpu_read_byte/cpu_write_byte. Fixed a few lingering compiler

Browse Source 
issues. Fixed Z8000 crash.
This commit is contained in:
Aaron Giles 2008-11-23 02:06:51 +00:00
parent 3601d8880c
commit 2b5f8f5f0e
24 changed files with 341 additions and 349 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/emu/cpu/pdp1/pdp1dasm.c
View File

@ -8,13 +8,13 @@ static int y;
INLINE void ea (void)
{
while (1)
/* while (1)
{
if (ib == 0)
return;
ib = (READ_PDP_18BIT (y) >> 12) & 1;
y = READ_PDP_18BIT (y) & 07777;
}
}*/
}
#define IN if (ib) sprintf(buffer+strlen(buffer)," i")

119
src/emu/cpu/tms34010/34010ops.h
View File

@ -46,125 +46,6 @@ INLINE void TMS34010_WRMEM_DWORD(tms34010_state *tms, offs_t A,UINT32 V)
/***************************************************************************
INTERNAL I/O CONSTANTS
***************************************************************************/
enum
{
REG_HESYNC = 0,
REG_HEBLNK,
REG_HSBLNK,
REG_HTOTAL,
REG_VESYNC,
REG_VEBLNK,
REG_VSBLNK,
REG_VTOTAL,
REG_DPYCTL,
REG_DPYSTRT,
REG_DPYINT,
REG_CONTROL,
REG_HSTDATA,
REG_HSTADRL,
REG_HSTADRH,
REG_HSTCTLL,
REG_HSTCTLH,
REG_INTENB,
REG_INTPEND,
REG_CONVSP,
REG_CONVDP,
REG_PSIZE,
REG_PMASK,
REG_UNK23,
REG_UNK24,
REG_UNK25,
REG_UNK26,
REG_DPYTAP,
REG_HCOUNT,
REG_VCOUNT,
REG_DPYADR,
REG_REFCNT
};
enum
{
REG020_VESYNC,
REG020_HESYNC,
REG020_VEBLNK,
REG020_HEBLNK,
REG020_VSBLNK,
REG020_HSBLNK,
REG020_VTOTAL,
REG020_HTOTAL,
REG020_DPYCTL, /* matches 010 */
REG020_DPYSTRT, /* matches 010 */
REG020_DPYINT, /* matches 010 */
REG020_CONTROL, /* matches 010 */
REG020_HSTDATA, /* matches 010 */
REG020_HSTADRL, /* matches 010 */
REG020_HSTADRH, /* matches 010 */
REG020_HSTCTLL, /* matches 010 */
REG020_HSTCTLH, /* matches 010 */
REG020_INTENB, /* matches 010 */
REG020_INTPEND, /* matches 010 */
REG020_CONVSP, /* matches 010 */
REG020_CONVDP, /* matches 010 */
REG020_PSIZE, /* matches 010 */
REG020_PMASKL,
REG020_PMASKH,
REG020_CONVMP,
REG020_CONTROL2,
REG020_CONFIG,
REG020_DPYTAP, /* matches 010 */
REG020_VCOUNT,
REG020_HCOUNT,
REG020_DPYADR, /* matches 010 */
REG020_REFADR,
REG020_DPYSTL,
REG020_DPYSTH,
REG020_DPYNXL,
REG020_DPYNXH,
REG020_DINCL,
REG020_DINCH,
REG020_RES0,
REG020_HESERR,
REG020_RES1,
REG020_RES2,
REG020_RES3,
REG020_RES4,
REG020_SCOUNT,
REG020_BSFLTST,
REG020_DPYMSK,
REG020_RES5,
REG020_SETVCNT,
REG020_SETHCNT,
REG020_BSFLTDL,
REG020_BSFLTDH,
REG020_RES6,
REG020_RES7,
REG020_RES8,
REG020_RES9,
REG020_IHOST1L,
REG020_IHOST1H,
REG020_IHOST2L,
REG020_IHOST2H,
REG020_IHOST3L,
REG020_IHOST3H,
REG020_IHOST4L,
REG020_IHOST4H
};
/* Interrupts that are generated by the processor internally */
#define TMS34010_INT1 0x0002 /* External Interrupt 1 */
#define TMS34010_INT2 0x0004 /* External Interrupt 2 */
#define TMS34010_HI 0x0200 /* Host Interrupt */
#define TMS34010_DI 0x0400 /* Display Interrupt */
#define TMS34010_WV 0x0800 /* Window Violation Interrupt */
/* IO registers accessor */
#define IOREG(T,reg) ((T)->IOregs[reg])
#define SMART_IOREG(T,reg) ((T)->IOregs[(T)->is_34020 ? REG020_##reg : REG_##reg])

120
src/emu/cpu/tms34010/tms34010.h
View File

@ -55,6 +55,126 @@ enum
};
/***************************************************************************
INTERNAL I/O CONSTANTS
***************************************************************************/
enum
{
REG_HESYNC = 0,
REG_HEBLNK,
REG_HSBLNK,
REG_HTOTAL,
REG_VESYNC,
REG_VEBLNK,
REG_VSBLNK,
REG_VTOTAL,
REG_DPYCTL,
REG_DPYSTRT,
REG_DPYINT,
REG_CONTROL,
REG_HSTDATA,
REG_HSTADRL,
REG_HSTADRH,
REG_HSTCTLL,
REG_HSTCTLH,
REG_INTENB,
REG_INTPEND,
REG_CONVSP,
REG_CONVDP,
REG_PSIZE,
REG_PMASK,
REG_UNK23,
REG_UNK24,
REG_UNK25,
REG_UNK26,
REG_DPYTAP,
REG_HCOUNT,
REG_VCOUNT,
REG_DPYADR,
REG_REFCNT
};
enum
{
REG020_VESYNC,
REG020_HESYNC,
REG020_VEBLNK,
REG020_HEBLNK,
REG020_VSBLNK,
REG020_HSBLNK,
REG020_VTOTAL,
REG020_HTOTAL,
REG020_DPYCTL, /* matches 010 */
REG020_DPYSTRT, /* matches 010 */
REG020_DPYINT, /* matches 010 */
REG020_CONTROL, /* matches 010 */
REG020_HSTDATA, /* matches 010 */
REG020_HSTADRL, /* matches 010 */
REG020_HSTADRH, /* matches 010 */
REG020_HSTCTLL, /* matches 010 */
REG020_HSTCTLH, /* matches 010 */
REG020_INTENB, /* matches 010 */
REG020_INTPEND, /* matches 010 */
REG020_CONVSP, /* matches 010 */
REG020_CONVDP, /* matches 010 */
REG020_PSIZE, /* matches 010 */
REG020_PMASKL,
REG020_PMASKH,
REG020_CONVMP,
REG020_CONTROL2,
REG020_CONFIG,
REG020_DPYTAP, /* matches 010 */
REG020_VCOUNT,
REG020_HCOUNT,
REG020_DPYADR, /* matches 010 */
REG020_REFADR,
REG020_DPYSTL,
REG020_DPYSTH,
REG020_DPYNXL,
REG020_DPYNXH,
REG020_DINCL,
REG020_DINCH,
REG020_RES0,
REG020_HESERR,
REG020_RES1,
REG020_RES2,
REG020_RES3,
REG020_RES4,
REG020_SCOUNT,
REG020_BSFLTST,
REG020_DPYMSK,
REG020_RES5,
REG020_SETVCNT,
REG020_SETHCNT,
REG020_BSFLTDL,
REG020_BSFLTDH,
REG020_RES6,
REG020_RES7,
REG020_RES8,
REG020_RES9,
REG020_IHOST1L,
REG020_IHOST1H,
REG020_IHOST2L,
REG020_IHOST2H,
REG020_IHOST3L,
REG020_IHOST3H,
REG020_IHOST4L,
REG020_IHOST4H
};
/* Interrupts that are generated by the processor internally */
#define TMS34010_INT1 0x0002 /* External Interrupt 1 */
#define TMS34010_INT2 0x0004 /* External Interrupt 2 */
#define TMS34010_HI 0x0200 /* Host Interrupt */
#define TMS34010_DI 0x0400 /* Display Interrupt */
#define TMS34010_WV 0x0800 /* Window Violation Interrupt */
/* Configuration structure */
typedef struct _tms34010_display_params tms34010_display_params;
struct _tms34010_display_params

4
src/emu/cpu/v810/v810dasm.c
View File

@ -34,8 +34,8 @@ CPU_DISASSEMBLE( v810 )
UINT32 flags = 0;
UINT32 opc,opc2;
unsigned size;
opc = R_OP(pc);
opc2 = R_OP(pc+2);
opc = oprom[0] | (oprom[1] << 8);
opc2 = oprom[2] | (oprom[3] << 8);
switch(opc>>10)
{

2
src/emu/cpu/z8000/z8000.c
View File

@ -468,6 +468,8 @@ static CPU_RESET( z8000 )
memset(&Z, 0, sizeof(z8000_Regs));
Z.irq_callback = save_irqcallback;
Z.device = device;
Z.program = memory_find_address_space(device, ADDRESS_SPACE_PROGRAM);
Z.io = memory_find_address_space(device, ADDRESS_SPACE_IO);
FCW = RDMEM_W( 2 ); /* get reset FCW */
PC = RDMEM_W( 4 ); /* get reset PC */
change_pc(PC);

53
src/emu/cpuintrf.c
View File

@ -124,14 +124,8 @@ CPU_GET_INFO( tms34010 );
CPU_GET_INFO( tms34020 );
CPU_GET_INFO( ti990_10 );
CPU_GET_INFO( tms9900 );
CPU_GET_INFO( tms9940 );
CPU_GET_INFO( tms9980a );
CPU_GET_INFO( tms9985 );
CPU_GET_INFO( tms9989 );
CPU_GET_INFO( tms9995 );
CPU_GET_INFO( tms99105a );
CPU_GET_INFO( tms99110a );
CPU_GET_INFO( tms99000 );
CPU_GET_INFO( z8000 );
CPU_GET_INFO( tms32010 );
CPU_GET_INFO( tms32025 );
@ -526,30 +520,12 @@ static const struct
#if (HAS_TMS9900)
{ CPU_TMS9900, CPU_GET_INFO_NAME(tms9900) },
#endif
#if (HAS_TMS9940)
{ CPU_TMS9940, CPU_GET_INFO_NAME(tms9940) },
#endif
#if (HAS_TMS9980)
{ CPU_TMS9980, CPU_GET_INFO_NAME(tms9980a) },
#endif
#if (HAS_TMS9985)
{ CPU_TMS9985, CPU_GET_INFO_NAME(tms9985) },
#endif
#if (HAS_TMS9989)
{ CPU_TMS9989, CPU_GET_INFO_NAME(tms9989) },
#endif
#if (HAS_TMS9995)
{ CPU_TMS9995, CPU_GET_INFO_NAME(tms9995) },
#endif
#if (HAS_TMS99105A)
{ CPU_TMS99105A, CPU_GET_INFO_NAME(tms99105a) },
#endif
#if (HAS_TMS99110A)
{ CPU_TMS99110A, CPU_GET_INFO_NAME(tms99110a) },
#endif
#if (HAS_TMS99000)
{ CPU_TMS99000, CPU_GET_INFO_NAME(tms99000) },
#endif
#if (HAS_Z8000)
{ CPU_Z8000, CPU_GET_INFO_NAME(z8000) },
#endif
@ -1327,35 +1303,6 @@ void cpu_reset(const device_config *device)
}
/*-------------------------------------------------
cpu_read_byte - read a byte from another CPU's
memory space
-------------------------------------------------*/
UINT8 cpu_read_byte(const device_config *device, offs_t address)
{
UINT8 result;
cpu_push_context(device);
result = program_read_byte(address);
cpu_pop_context();
return result;
}
/*-------------------------------------------------
cpu_write_byte - write a byte to another CPU's
memory space
-------------------------------------------------*/
void cpu_write_byte(const device_config *device, offs_t address, UINT8 data)
{
cpu_push_context(device);
program_write_byte(address, data);
cpu_pop_context();
}
/*-------------------------------------------------
cpu_get_physical_pc_byte - return the PC,
corrected to a byte offset and translated to

13
src/emu/cpuintrf.h
View File

@ -289,15 +289,8 @@ enum _cpu_type
CPU_TMS34020,
CPU_TI990_10,
CPU_TMS9900,
CPU_TMS9940,
CPU_TMS9980,
CPU_TMS9985,
CPU_TMS9989,
CPU_TMS9995,
CPU_TMS99100,
CPU_TMS99105A,
CPU_TMS99110A,
CPU_TMS99000,
CPU_Z8000,
CPU_TMS32010,
CPU_TMS32025,
@ -729,12 +722,6 @@ int cpu_execute(const device_config *cpu, int cycles);
/* signal a reset for a given CPU */
void cpu_reset(const device_config *cpu);
/* read a byte from another CPU's memory space */
UINT8 cpu_read_byte(const device_config *cpu, offs_t address);
/* write a byte from another CPU's memory space */
void cpu_write_byte(const device_config *cpu, offs_t address, UINT8 data);
/* return the PC, corrected to a byte offset and translated to physical space, on a given CPU */
offs_t cpu_get_physical_pc_byte(const device_config *cpu);

38
src/emu/machine/idectrl.c
View File

@ -655,6 +655,7 @@ static void continue_read(ide_state *ide)
static void write_buffer_to_dma(ide_state *ide)
{
const address_space *target = cpu_get_address_space(ide->device->machine->cpu[ide->dma_cpu], ADDRESS_SPACE_PROGRAM);
int bytesleft = IDE_DISK_SECTOR_SIZE;
UINT8 *data = ide->buffer;
@ -674,17 +675,17 @@ static void write_buffer_to_dma(ide_state *ide)
}
/* fetch the address */
ide->dma_address = cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor);
ide->dma_address |= cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
ide->dma_address |= cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
ide->dma_address |= cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
ide->dma_address = memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor);
ide->dma_address |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
ide->dma_address |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
ide->dma_address |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
ide->dma_address &= 0xfffffffe;
/* fetch the length */
ide->dma_bytes_left = cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor);
ide->dma_bytes_left |= cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
ide->dma_bytes_left |= cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
ide->dma_bytes_left |= cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
ide->dma_bytes_left = memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor);
ide->dma_bytes_left |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
ide->dma_bytes_left |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
ide->dma_bytes_left |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
ide->dma_last_buffer = (ide->dma_bytes_left >> 31) & 1;
ide->dma_bytes_left &= 0xfffe;
if (ide->dma_bytes_left == 0)
@ -694,7 +695,7 @@ static void write_buffer_to_dma(ide_state *ide)
}
/* write the next byte */
cpu_write_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_address++, *data++);
memory_write_byte(target, ide->dma_address++, *data++);
ide->dma_bytes_left--;
}
}
@ -853,6 +854,7 @@ static void continue_write(ide_state *ide)
static void read_buffer_from_dma(ide_state *ide)
{
const address_space *target = cpu_get_address_space(ide->device->machine->cpu[ide->dma_cpu], ADDRESS_SPACE_PROGRAM);
int bytesleft = IDE_DISK_SECTOR_SIZE;
UINT8 *data = ide->buffer;
@ -872,17 +874,17 @@ static void read_buffer_from_dma(ide_state *ide)
}
/* fetch the address */
ide->dma_address = cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor);
ide->dma_address |= cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
ide->dma_address |= cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
ide->dma_address |= cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
ide->dma_address = memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor);
ide->dma_address |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
ide->dma_address |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
ide->dma_address |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
ide->dma_address &= 0xfffffffe;
/* fetch the length */
ide->dma_bytes_left = cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor);
ide->dma_bytes_left |= cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
ide->dma_bytes_left |= cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
ide->dma_bytes_left |= cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
ide->dma_bytes_left = memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor);
ide->dma_bytes_left |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 8;
ide->dma_bytes_left |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 16;
ide->dma_bytes_left |= memory_read_byte(target, ide->dma_descriptor++ ^ ide->dma_address_xor) << 24;
ide->dma_last_buffer = (ide->dma_bytes_left >> 31) & 1;
ide->dma_bytes_left &= 0xfffe;
if (ide->dma_bytes_left == 0)
@ -892,7 +894,7 @@ static void read_buffer_from_dma(ide_state *ide)
}
/* read the next byte */
*data++ = cpu_read_byte(ide->device->machine->cpu[ide->dma_cpu], ide->dma_address++);
*data++ = memory_read_byte(target, ide->dma_address++);
ide->dma_bytes_left--;
}
}

10
src/mame/audio/harddriv.c
View File

@ -257,9 +257,10 @@ WRITE16_HANDLER( hdsnd68k_320ram_w )
READ16_HANDLER( hdsnd68k_320ports_r )
{
const address_space *iospace = cpu_get_address_space(space->machine->cpu[hdcpu_sounddsp], ADDRESS_SPACE_IO);
UINT16 result;
cpu_push_context(space->machine->cpu[hdcpu_sounddsp]);
result = TMS32010_In(offset & 7);
cpu_push_context(iospace->cpu);
result = memory_read_word(iospace, (offset & 7) << 1);
cpu_pop_context();
return result;
}
@ -267,8 +268,9 @@ READ16_HANDLER( hdsnd68k_320ports_r )
WRITE16_HANDLER( hdsnd68k_320ports_w )
{
cpu_push_context(space->machine->cpu[hdcpu_sounddsp]);
TMS32010_Out(offset & 7, data);
const address_space *iospace = cpu_get_address_space(space->machine->cpu[hdcpu_sounddsp], ADDRESS_SPACE_IO);
cpu_push_context(iospace->machine->cpu[hdcpu_sounddsp]);
memory_write_word(iospace, (offset & 7) << 1, data);
cpu_pop_context();
}

1
src/mame/drivers/coolpool.c
View File

@ -26,7 +26,6 @@
#include "driver.h"
#include "cpu/tms34010/tms34010.h"
#include "cpu/tms34010/34010ops.h"
#include "cpu/tms32025/tms32025.h"
#include "video/tlc34076.h"
#include "sound/dac.h"

51
src/mame/drivers/galpani2.c
View File

@ -82,16 +82,19 @@ static MACHINE_RESET( galpani2 )
static void galpani2_write_kaneko(running_machine *machine)
{
cpu_write_byte(machine->cpu[0],0x100000,0x4b);
cpu_write_byte(machine->cpu[0],0x100001,0x41);
cpu_write_byte(machine->cpu[0],0x100002,0x4e);
cpu_write_byte(machine->cpu[0],0x100003,0x45);
cpu_write_byte(machine->cpu[0],0x100004,0x4b);
cpu_write_byte(machine->cpu[0],0x100005,0x4f);
const address_space *dstspace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
memory_write_byte(dstspace,0x100000,0x4b);
memory_write_byte(dstspace,0x100001,0x41);
memory_write_byte(dstspace,0x100002,0x4e);
memory_write_byte(dstspace,0x100003,0x45);
memory_write_byte(dstspace,0x100004,0x4b);
memory_write_byte(dstspace,0x100005,0x4f);
}
void galpani2_mcu_run(running_machine *machine)
{
const address_space *srcspace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
const address_space *dstspace = cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM);
int i,x;
/* Write "KANEKO" to 100000-100005, but do not clash with ram test */
@ -99,18 +102,20 @@ void galpani2_mcu_run(running_machine *machine)
x = 0;
for (i = 0x100000; i < 0x100007; i++)
x |= cpu_read_byte(machine->cpu[0],i);
x |= memory_read_byte(srcspace,i);
if ( x == 0 )
{
galpani2_write_kaneko(machine);
cpu_write_byte(machine->cpu[1],0x100006,1);
memory_write_byte(dstspace,0x100006,1);
logerror("MCU executes CHECK0\n");
}
}
static void galpani2_mcu_nmi(running_machine *machine)
{
const address_space *srcspace = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
const address_space *dstspace = cpu_get_address_space(machine->cpu[1], ADDRESS_SPACE_PROGRAM);
UINT32 mcu_list, mcu_command, mcu_address, mcu_src, mcu_dst, mcu_size;
/* "Last Check" */
@ -118,11 +123,11 @@ static void galpani2_mcu_nmi(running_machine *machine)
for ( mcu_list = 0x100020; mcu_list < (0x100020 + 0x40); mcu_list += 4 )
{
mcu_command = cpu_read_byte(machine->cpu[0], mcu_list + 1 );
mcu_command = memory_read_byte(srcspace, mcu_list + 1 );
mcu_address = 0x100000 +
(cpu_read_byte(machine->cpu[0], mcu_list + 2)<<8) +
(cpu_read_byte(machine->cpu[0], mcu_list + 3)<<0) ;
(memory_read_byte(srcspace, mcu_list + 2)<<8) +
(memory_read_byte(srcspace, mcu_list + 3)<<0) ;
switch (mcu_command)
{
@ -130,40 +135,40 @@ static void galpani2_mcu_nmi(running_machine *machine)
break;
case 0x0a: // Copy N bytes from RAM1 to RAM2
mcu_src = (cpu_read_byte(machine->cpu[0], mcu_address + 2)<<8) +
(cpu_read_byte(machine->cpu[0], mcu_address + 3)<<0) ;
mcu_src = (memory_read_byte(srcspace, mcu_address + 2)<<8) +
(memory_read_byte(srcspace, mcu_address + 3)<<0) ;
mcu_dst = (cpu_read_byte(machine->cpu[0], mcu_address + 6)<<8) +
(cpu_read_byte(machine->cpu[0], mcu_address + 7)<<0) ;
mcu_dst = (memory_read_byte(srcspace, mcu_address + 6)<<8) +
(memory_read_byte(srcspace, mcu_address + 7)<<0) ;
mcu_size = (cpu_read_byte(machine->cpu[0], mcu_address + 8)<<8) +
(cpu_read_byte(machine->cpu[0], mcu_address + 9)<<0) ;
mcu_size = (memory_read_byte(srcspace, mcu_address + 8)<<8) +
(memory_read_byte(srcspace, mcu_address + 9)<<0) ;
logerror("CPU #0 PC %06X : MCU executes command $A, %04X %02X-> %04x\n",cpu_get_pc(machine->activecpu),mcu_src,mcu_size,mcu_dst);
for( ; mcu_size > 0 ; mcu_size-- )
{
mcu_src &= 0xffff; mcu_dst &= 0xffff;
cpu_write_byte(machine->cpu[1],0x100000 + mcu_dst,cpu_read_byte(machine->cpu[0],0x100000 + mcu_src));
memory_write_byte(dstspace,0x100000 + mcu_dst,memory_read_byte(srcspace,0x100000 + mcu_src));
mcu_src ++; mcu_dst ++;
}
/* Raise a "job done" flag */
cpu_write_byte(machine->cpu[0],mcu_address+0,0xff);
cpu_write_byte(machine->cpu[0],mcu_address+1,0xff);
memory_write_byte(srcspace,mcu_address+0,0xff);
memory_write_byte(srcspace,mcu_address+1,0xff);
break;
default:
/* Raise a "job done" flag */
cpu_write_byte(machine->cpu[0],mcu_address+0,0xff);
cpu_write_byte(machine->cpu[0],mcu_address+1,0xff);
memory_write_byte(srcspace,mcu_address+0,0xff);
memory_write_byte(srcspace,mcu_address+1,0xff);
logerror("CPU #0 PC %06X : MCU ERROR, unknown command %02X\n",cpu_get_pc(machine->activecpu),mcu_command);
}
/* Erase command? */
cpu_write_byte(machine->cpu[0],mcu_list + 1,0x00);
memory_write_byte(srcspace,mcu_list + 1,0x00);
}
}

1
src/mame/drivers/jpmimpct.c
View File

@ -80,7 +80,6 @@
#include "driver.h"
#include "deprecat.h"
#include "cpu/tms34010/tms34010.h"
#include "cpu/tms34010/34010ops.h"
#include "sound/upd7759.h"
#include "jpmimpct.h"
#include "machine/meters.h"

1
src/mame/drivers/micro3d.c
View File

@ -24,7 +24,6 @@
#include "driver.h"
#include "deprecat.h"
#include "cpu/tms34010/tms34010.h"
#include "cpu/tms34010/34010ops.h"
#include "cpu/mcs51/mcs51.h"
#include "sound/2151intf.h"
#include "sound/upd7759.h"

2
src/mame/drivers/namcos22.c
View File

@ -2391,7 +2391,7 @@ static WRITE32_HANDLER( alpinesa_prot_w )
for(i=0;i<4;i++)
{
mAlpineSurferProtData<<=8;
mAlpineSurferProtData |= cpu_read_byte(space->machine->cpu[0], sptr+4+i );
mAlpineSurferProtData |= memory_read_byte(space, sptr+4+i );
}
#endif
} /* alpinesa_prot_w */

74
src/mame/includes/atari.h
View File

@ -309,39 +309,39 @@ typedef struct {
UINT8 *uc_g3; /* used colors for gfx GTIA 3 */
} ANTIC;
#define RDANTIC(cpu) cpu_read_byte(cpu, antic.dpage+antic.doffs)
#define RDVIDEO(cpu,o) cpu_read_byte(cpu, antic.vpage+((antic.voffs+(o))&VOFFS))
#define RDCHGEN(cpu,o) cpu_read_byte(cpu, antic.chbase+(o))
#define RDPMGFXS(cpu,o) cpu_read_byte(cpu, antic.pmbase_s+(o)+(antic.scanline>>1))
#define RDPMGFXD(cpu,o) cpu_read_byte(cpu, antic.pmbase_d+(o)+antic.scanline)
#define RDANTIC(space) memory_read_byte(space, antic.dpage+antic.doffs)
#define RDVIDEO(space,o) memory_read_byte(space, antic.vpage+((antic.voffs+(o))&VOFFS))
#define RDCHGEN(space,o) memory_read_byte(space, antic.chbase+(o))
#define RDPMGFXS(space,o) memory_read_byte(space, antic.pmbase_s+(o)+(antic.scanline>>1))
#define RDPMGFXD(space,o) memory_read_byte(space, antic.pmbase_d+(o)+antic.scanline)
#define PREPARE() \
UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]
#define PREPARE_TXT2(cpu,width) \
#define PREPARE_TXT2(space,width) \
UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]; \
int i; \
for( i = 0; i < width; i++ ) \
{ \
UINT16 ch = RDVIDEO(cpu,i) << 3; \
UINT16 ch = RDVIDEO(space,i) << 3; \
if( ch & 0x400 ) \
{ \
ch = RDCHGEN(cpu,(ch & 0x3f8) + antic.w.chbasl); \
ch = RDCHGEN(space,(ch & 0x3f8) + antic.w.chbasl); \
ch = (ch ^ antic.chxor) & antic.chand; \
} \
else \
{ \
ch = RDCHGEN(cpu,ch + antic.w.chbasl); \
ch = RDCHGEN(space,ch + antic.w.chbasl); \
} \
video->data[i] = ch; \
}
#define PREPARE_TXT3(cpu,width) \
#define PREPARE_TXT3(space,width) \
UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]; \
int i; \
for( i = 0; i < width; i++ ) \
{ \
UINT16 ch = RDVIDEO(cpu,i) << 3; \
UINT16 ch = RDVIDEO(space,i) << 3; \
if( ch & 0x400 ) \
{ \
ch &= 0x3f8; \
@ -350,14 +350,14 @@ typedef struct {
if (antic.w.chbasl < 2) /* first two lines empty */ \
ch = 0x00; \
else /* lines 2..7 are standard, 8&9 are 0&1 */ \
ch = RDCHGEN(cpu,ch + (antic.w.chbasl & 7));\
ch = RDCHGEN(space,ch + (antic.w.chbasl & 7));\
} \
else \
{ \
if (antic.w.chbasl > 7) /* last two lines empty */ \
ch = 0x00; \
else /* lines 0..7 are standard */ \
ch = RDCHGEN(cpu,ch + antic.w.chbasl); \
ch = RDCHGEN(space,ch + antic.w.chbasl); \
} \
ch = (ch ^ antic.chxor) & antic.chand; \
} \
@ -368,87 +368,87 @@ typedef struct {
if (antic.w.chbasl < 2) /* first two lines empty */ \
ch = 0x00; \
else /* lines 2..7 are standard, 8&9 are 0&1 */ \
ch = RDCHGEN(cpu,ch + (antic.w.chbasl & 7));\
ch = RDCHGEN(space,ch + (antic.w.chbasl & 7));\
} \
else \
{ \
if (antic.w.chbasl > 7) /* last two lines empty */ \
ch = 0x00; \
else /* lines 0..7 are standard */ \
ch = RDCHGEN(cpu,ch + antic.w.chbasl); \
ch = RDCHGEN(space,ch + antic.w.chbasl); \
} \
} \
video->data[i] = ch; \
}
#define PREPARE_TXT45(cpu,width,shift) \
#define PREPARE_TXT45(space,width,shift) \
UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]; \
int i; \
for( i = 0; i < width; i++ ) \
{ \
UINT16 ch = RDVIDEO(cpu,i) << 3; \
ch = ((ch>>2)&0x100)|RDCHGEN(cpu,(ch&0x3f8)+(antic.w.chbasl>>shift)); \
UINT16 ch = RDVIDEO(space,i) << 3; \
ch = ((ch>>2)&0x100)|RDCHGEN(space,(ch&0x3f8)+(antic.w.chbasl>>shift)); \
video->data[i] = ch; \
}
#define PREPARE_TXT67(cpu,width,shift) \
#define PREPARE_TXT67(space,width,shift) \
UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]; \
int i; \
for( i = 0; i < width; i++ ) \
{ \
UINT16 ch = RDVIDEO(cpu,i) << 3; \
ch = (ch&0x600)|(RDCHGEN(cpu,(ch&0x1f8)+(antic.w.chbasl>>shift))<<1); \
UINT16 ch = RDVIDEO(space,i) << 3; \
ch = (ch&0x600)|(RDCHGEN(space,(ch&0x1f8)+(antic.w.chbasl>>shift))<<1); \
video->data[i] = ch; \
}
#define PREPARE_GFX8(cpu,width) \
#define PREPARE_GFX8(space,width) \
UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]; \
int i; \
for( i = 0; i < width; i++ ) \
video->data[i] = RDVIDEO(cpu,i) << 2
video->data[i] = RDVIDEO(space,i) << 2
#define PREPARE_GFX9BC(cpu,width) \
#define PREPARE_GFX9BC(space,width) \
UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]; \
int i; \
for( i = 0; i < width; i++ ) \
video->data[i] = RDVIDEO(cpu,i) << 1
video->data[i] = RDVIDEO(space,i) << 1
#define PREPARE_GFXA(cpu,width) \
#define PREPARE_GFXA(space,width) \
UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]; \
int i; \
for( i = 0; i < width; i++ ) \
video->data[i] = RDVIDEO(cpu,i) << 1
video->data[i] = RDVIDEO(space,i) << 1
#define PREPARE_GFXDE(cpu,width) \
#define PREPARE_GFXDE(space,width) \
UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]; \
int i; \
for( i = 0; i < width; i++ ) \
video->data[i] = RDVIDEO(cpu,i)
video->data[i] = RDVIDEO(space,i)
#define PREPARE_GFXF(cpu,width) \
#define PREPARE_GFXF(space,width) \
UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]; \
int i; \
for( i = 0; i < width; i++ ) \
video->data[i] = RDVIDEO(cpu,i)
video->data[i] = RDVIDEO(space,i)
#define PREPARE_GFXG1(cpu,width) \
#define PREPARE_GFXG1(space,width) \
UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]; \
int i; \
for( i = 0; i < width; i++ ) \
video->data[i] = RDVIDEO(cpu,i)
video->data[i] = RDVIDEO(space,i)
#define PREPARE_GFXG2(cpu,width) \
#define PREPARE_GFXG2(space,width) \
UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]; \
int i; \
for( i = 0; i < width; i++ ) \
video->data[i] = RDVIDEO(cpu,i)
video->data[i] = RDVIDEO(space,i)
#define PREPARE_GFXG3(cpu,width) \
#define PREPARE_GFXG3(space,width) \
UINT32 *dst = (UINT32 *)&antic.cclock[PMOFFSET]; \
int i; \
for( i = 0; i < width; i++ ) \
video->data[i] = RDVIDEO(cpu,i)
video->data[i] = RDVIDEO(space,i)
/******************************************************************
* common end of a single antic/gtia mode emulation function

1
src/mame/machine/harddriv.c
View File

@ -7,7 +7,6 @@
#include "driver.h"
#include "deprecat.h"
#include "cpu/tms34010/tms34010.h"
#include "cpu/tms34010/34010ops.h"
#include "cpu/adsp2100/adsp2100.h"
#include "cpu/m68000/m68000.h"
#include "cpu/dsp32/dsp32.h"

126
src/mame/video/antic.c
View File

@ -258,19 +258,22 @@ void antic_mode_0_xx(VIDEO *video)
void antic_mode_2_32(VIDEO *video)
{
PREPARE_TXT2(Machine->cpu[0], 32);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT2(space, 32);
REP32(MODE2);
POST_TXT(32);
}
void antic_mode_2_40(VIDEO *video)
{
PREPARE_TXT2(Machine->cpu[0], 40);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT2(space, 40);
REP40(MODE2);
POST_TXT(40);
}
void antic_mode_2_48(VIDEO *video)
{
PREPARE_TXT2(Machine->cpu[0], 48);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT2(space, 48);
REP48(MODE2);
POST_TXT(48);
}
@ -282,19 +285,22 @@ void antic_mode_2_48(VIDEO *video)
void antic_mode_3_32(VIDEO *video)
{
PREPARE_TXT3(Machine->cpu[0], 32);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT3(space, 32);
REP32(MODE3);
POST_TXT(32);
}
void antic_mode_3_40(VIDEO *video)
{
PREPARE_TXT3(Machine->cpu[0], 40);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT3(space, 40);
REP40(MODE3);
POST_TXT(40);
}
void antic_mode_3_48(VIDEO *video)
{
PREPARE_TXT3(Machine->cpu[0], 48);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT3(space, 48);
REP48(MODE3);
POST_TXT(48);
}
@ -306,19 +312,22 @@ void antic_mode_3_48(VIDEO *video)
void antic_mode_4_32(VIDEO *video)
{
PREPARE_TXT45(Machine->cpu[0], 32,0);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT45(space, 32,0);
REP32(MODE4);
POST_TXT(32);
}
void antic_mode_4_40(VIDEO *video)
{
PREPARE_TXT45(Machine->cpu[0], 40,0);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT45(space, 40,0);
REP40(MODE4);
POST_TXT(40);
}
void antic_mode_4_48(VIDEO *video)
{
PREPARE_TXT45(Machine->cpu[0], 48,0);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT45(space, 48,0);
REP48(MODE4);
POST_TXT(48);
}
@ -330,19 +339,22 @@ void antic_mode_4_48(VIDEO *video)
void antic_mode_5_32(VIDEO *video)
{
PREPARE_TXT45(Machine->cpu[0], 32,1);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT45(space, 32,1);
REP32(MODE5);
POST_TXT(32);
}
void antic_mode_5_40(VIDEO *video)
{
PREPARE_TXT45(Machine->cpu[0], 40,1);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT45(space, 40,1);
REP40(MODE5);
POST_TXT(40);
}
void antic_mode_5_48(VIDEO *video)
{
PREPARE_TXT45(Machine->cpu[0], 48,1);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT45(space, 48,1);
REP48(MODE5);
POST_TXT(48);
}
@ -354,19 +366,22 @@ void antic_mode_5_48(VIDEO *video)
void antic_mode_6_32(VIDEO *video)
{
PREPARE_TXT67(Machine->cpu[0], 16,0);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT67(space, 16,0);
REP16(MODE6);
POST_TXT(16);
}
void antic_mode_6_40(VIDEO *video)
{
PREPARE_TXT67(Machine->cpu[0], 20,0);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT67(space, 20,0);
REP20(MODE6);
POST_TXT(20);
}
void antic_mode_6_48(VIDEO *video)
{
PREPARE_TXT67(Machine->cpu[0], 24,0);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT67(space, 24,0);
REP24(MODE6);
POST_TXT(24);
}
@ -378,19 +393,22 @@ void antic_mode_6_48(VIDEO *video)
void antic_mode_7_32(VIDEO *video)
{
PREPARE_TXT67(Machine->cpu[0], 16,1);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT67(space, 16,1);
REP16(MODE7);
POST_TXT(16);
}
void antic_mode_7_40(VIDEO *video)
{
PREPARE_TXT67(Machine->cpu[0], 20,1);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT67(space, 20,1);
REP20(MODE7);
POST_TXT(20);
}
void antic_mode_7_48(VIDEO *video)
{
PREPARE_TXT67(Machine->cpu[0], 24,1);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_TXT67(space, 24,1);
REP24(MODE7);
POST_TXT(24);
}
@ -402,19 +420,22 @@ void antic_mode_7_48(VIDEO *video)
void antic_mode_8_32(VIDEO *video)
{
PREPARE_GFX8(Machine->cpu[0], 8);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFX8(space, 8);
REP08(MODE8);
POST_GFX(8);
}
void antic_mode_8_40(VIDEO *video)
{
PREPARE_GFX8(Machine->cpu[0], 10);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFX8(space, 10);
REP10(MODE8);
POST_GFX(10);
}
void antic_mode_8_48(VIDEO *video)
{
PREPARE_GFX8(Machine->cpu[0], 12);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFX8(space, 12);
REP12(MODE8);
POST_GFX(12);
}
@ -426,19 +447,22 @@ void antic_mode_8_48(VIDEO *video)
void antic_mode_9_32(VIDEO *video)
{
PREPARE_GFX9BC(Machine->cpu[0], 16);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFX9BC(space, 16);
REP16(MODE9);
POST_GFX(16);
}
void antic_mode_9_40(VIDEO *video)
{
PREPARE_GFX9BC(Machine->cpu[0], 20);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFX9BC(space, 20);
REP20(MODE9);
POST_GFX(20);
}
void antic_mode_9_48(VIDEO *video)
{
PREPARE_GFX9BC(Machine->cpu[0], 24);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFX9BC(space, 24);
REP24(MODE9);
POST_GFX(24);
}
@ -450,19 +474,22 @@ void antic_mode_9_48(VIDEO *video)
void antic_mode_a_32(VIDEO *video)
{
PREPARE_GFXA(Machine->cpu[0], 16);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXA(space, 16);
REP16(MODEA);
POST_GFX(16);
}
void antic_mode_a_40(VIDEO *video)
{
PREPARE_GFXA(Machine->cpu[0], 20);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXA(space, 20);
REP20(MODEA);
POST_GFX(20);
}
void antic_mode_a_48(VIDEO *video)
{
PREPARE_GFXA(Machine->cpu[0], 24);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXA(space, 24);
REP24(MODEA);
POST_GFX(24);
}
@ -474,19 +501,22 @@ void antic_mode_a_48(VIDEO *video)
void antic_mode_b_32(VIDEO *video)
{
PREPARE_GFX9BC(Machine->cpu[0], 16);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFX9BC(space, 16);
REP16(MODEB);
POST_GFX(16);
}
void antic_mode_b_40(VIDEO *video)
{
PREPARE_GFX9BC(Machine->cpu[0], 20);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFX9BC(space, 20);
REP20(MODEB);
POST_GFX(20);
}
void antic_mode_b_48(VIDEO *video)
{
PREPARE_GFX9BC(Machine->cpu[0], 24);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFX9BC(space, 24);
REP24(MODEB);
POST_GFX(24);
}
@ -498,19 +528,22 @@ void antic_mode_b_48(VIDEO *video)
void antic_mode_c_32(VIDEO *video)
{
PREPARE_GFX9BC(Machine->cpu[0], 16);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFX9BC(space, 16);
REP16(MODEC);
POST_GFX(16);
}
void antic_mode_c_40(VIDEO *video)
{
PREPARE_GFX9BC(Machine->cpu[0], 20);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFX9BC(space, 20);
REP20(MODEC);
POST_GFX(20);
}
void antic_mode_c_48(VIDEO *video)
{
PREPARE_GFX9BC(Machine->cpu[0], 24);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFX9BC(space, 24);
REP24(MODEC);
POST_GFX(24);
}
@ -522,19 +555,22 @@ void antic_mode_c_48(VIDEO *video)
void antic_mode_d_32(VIDEO *video)
{
PREPARE_GFXDE(Machine->cpu[0], 32);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXDE(space, 32);
REP32(MODED);
POST_GFX(32);
}
void antic_mode_d_40(VIDEO *video)
{
PREPARE_GFXDE(Machine->cpu[0], 40);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXDE(space, 40);
REP40(MODED);
POST_GFX(40);
}
void antic_mode_d_48(VIDEO *video)
{
PREPARE_GFXDE(Machine->cpu[0], 48);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXDE(space, 48);
REP48(MODED);
POST_GFX(48);
}
@ -546,19 +582,22 @@ void antic_mode_d_48(VIDEO *video)
void antic_mode_e_32(VIDEO *video)
{
PREPARE_GFXDE(Machine->cpu[0], 32);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXDE(space, 32);
REP32(MODEE);
POST_GFX(32);
}
void antic_mode_e_40(VIDEO *video)
{
PREPARE_GFXDE(Machine->cpu[0], 40);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXDE(space, 40);
REP40(MODEE);
POST_GFX(40);
}
void antic_mode_e_48(VIDEO *video)
{
PREPARE_GFXDE(Machine->cpu[0], 48);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXDE(space, 48);
REP48(MODEE);
POST_GFX(48);
}
@ -570,19 +609,22 @@ void antic_mode_e_48(VIDEO *video)
void antic_mode_f_32(VIDEO *video)
{
PREPARE_GFXF(Machine->cpu[0], 32);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXF(space, 32);
REP32(MODEF);
POST_GFX(32);
}
void antic_mode_f_40(VIDEO *video)
{
PREPARE_GFXF(Machine->cpu[0], 40);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXF(space, 40);
REP40(MODEF);
POST_GFX(40);
}
void antic_mode_f_48(VIDEO *video)
{
PREPARE_GFXF(Machine->cpu[0], 48);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXF(space, 48);
REP48(MODEF);
POST_GFX(48);
}

1
src/mame/video/artmagic.c
View File

@ -7,7 +7,6 @@
#include "driver.h"
#include "profiler.h"
#include "cpu/tms34010/tms34010.h"
#include "cpu/tms34010/34010ops.h"
#include "video/tlc34076.h"
#include "artmagic.h"

36
src/mame/video/atari.c
View File

@ -1200,16 +1200,16 @@ static TIMER_CALLBACK( antic_scanline_render )
if( antic.w.dmactl & DMA_MISSILE )
{
antic.steal_cycles += 1;
atari_gtia_w(space, 0x11, RDPMGFXD(machine->cpu[0], 3*256));
atari_gtia_w(space, 0x11, RDPMGFXD(space, 3*256));
}
/* transport player data to GTIA ? */
if( antic.w.dmactl & DMA_PLAYER )
{
antic.steal_cycles += 4;
atari_gtia_w(space, 0x0d, RDPMGFXD(machine->cpu[0], 4*256));
atari_gtia_w(space, 0x0e, RDPMGFXD(machine->cpu[0], 5*256));
atari_gtia_w(space, 0x0f, RDPMGFXD(machine->cpu[0], 6*256));
atari_gtia_w(space, 0x10, RDPMGFXD(machine->cpu[0], 7*256));
atari_gtia_w(space, 0x0d, RDPMGFXD(space, 4*256));
atari_gtia_w(space, 0x0e, RDPMGFXD(space, 5*256));
atari_gtia_w(space, 0x0f, RDPMGFXD(space, 6*256));
atari_gtia_w(space, 0x10, RDPMGFXD(space, 7*256));
}
}
else
@ -1219,17 +1219,17 @@ static TIMER_CALLBACK( antic_scanline_render )
{
if( (antic.scanline & 1) == 0 ) /* even line ? */
antic.steal_cycles += 1;
atari_gtia_w(space, 0x11, RDPMGFXS(machine->cpu[0], 3*128));
atari_gtia_w(space, 0x11, RDPMGFXS(space, 3*128));
}
/* transport player data to GTIA ? */
if( antic.w.dmactl & DMA_PLAYER )
{
if( (antic.scanline & 1) == 0 ) /* even line ? */
antic.steal_cycles += 4;
atari_gtia_w(space, 0x0d, RDPMGFXS(machine->cpu[0], 4*128));
atari_gtia_w(space, 0x0e, RDPMGFXS(machine->cpu[0], 5*128));
atari_gtia_w(space, 0x0f, RDPMGFXS(machine->cpu[0], 6*128));
atari_gtia_w(space, 0x10, RDPMGFXS(machine->cpu[0], 7*128));
atari_gtia_w(space, 0x0d, RDPMGFXS(space, 4*128));
atari_gtia_w(space, 0x0e, RDPMGFXS(space, 5*128));
atari_gtia_w(space, 0x0f, RDPMGFXS(space, 6*128));
atari_gtia_w(space, 0x10, RDPMGFXS(space, 7*128));
}
}
}
@ -1253,9 +1253,10 @@ INLINE void LMS(int new_cmd)
**************************************************************/
if( new_cmd & ANTIC_LMS )
{
int addr = RDANTIC(Machine->cpu[0]);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
int addr = RDANTIC(space);
antic.doffs = ++antic.doffs & DOFFS;
addr += 256 * RDANTIC(Machine->cpu[0]);
addr += 256 * RDANTIC(space);
antic.doffs = ++antic.doffs & DOFFS;
antic.vpage = addr & VPAGE;
antic.voffs = addr & VOFFS;
@ -1277,6 +1278,7 @@ INLINE void LMS(int new_cmd)
*****************************************************************************/
static void antic_scanline_dma(running_machine *machine, int param)
{
const address_space *space = cpu_get_address_space(machine->cpu[0], ADDRESS_SPACE_PROGRAM);
LOG((" @cycle #%3d DMA fetch\n", cycle(machine)));
if (antic.scanline == VBL_END)
antic.r.nmist &= ~VBL_NMI;
@ -1290,7 +1292,7 @@ static void antic_scanline_dma(running_machine *machine, int param)
UINT8 vscrol_subtract = 0;
UINT8 new_cmd;
new_cmd = RDANTIC(machine->cpu[0]);
new_cmd = RDANTIC(space);
antic.doffs = ++antic.doffs & DOFFS;
/* steal at one clock cycle from the CPU for fetching the command */
antic.steal_cycles += 1;
@ -1353,9 +1355,9 @@ static void antic_scanline_dma(running_machine *machine, int param)
/* load memory scan bit set ? */
if( new_cmd & ANTIC_LMS )
{
int addr = RDANTIC(machine->cpu[0]);
int addr = RDANTIC(space);
antic.doffs = ++antic.doffs & DOFFS;
addr += 256 * RDANTIC(machine->cpu[0]);
addr += 256 * RDANTIC(space);
antic.dpage = addr & DPAGE;
antic.doffs = addr & DOFFS;
/* produce empty scanlines until vblank start */
@ -1366,9 +1368,9 @@ static void antic_scanline_dma(running_machine *machine, int param)
}
else
{
int addr = RDANTIC(machine->cpu[0]);
int addr = RDANTIC(space);
antic.doffs = ++antic.doffs & DOFFS;
addr += 256 * RDANTIC(machine->cpu[0]);
addr += 256 * RDANTIC(space);
antic.dpage = addr & DPAGE;
antic.doffs = addr & DOFFS;
/* produce a single empty scanline */

27
src/mame/video/gtia.c
View File

@ -1071,19 +1071,22 @@ void gtia_render(VIDEO *video)
void gtia_mode_1_32(VIDEO *video)
{
PREPARE_GFXG1(Machine->cpu[0], 32);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXG1(space, 32);
REP32(GTIA1);
POST_GFX(32);
}
void gtia_mode_1_40(VIDEO *video)
{
PREPARE_GFXG1(Machine->cpu[0], 40);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXG1(space, 40);
REP40(GTIA1);
POST_GFX(40);
}
void gtia_mode_1_48(VIDEO *video)
{
PREPARE_GFXG1(Machine->cpu[0], 48);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXG1(space, 48);
REP48(GTIA1);
POST_GFX(48);
}
@ -1095,19 +1098,22 @@ void gtia_mode_1_48(VIDEO *video)
void gtia_mode_2_32(VIDEO *video)
{
PREPARE_GFXG2(Machine->cpu[0], 32);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXG2(space, 32);
REP32(GTIA2);
POST_GFX(32);
}
void gtia_mode_2_40(VIDEO *video)
{
PREPARE_GFXG2(Machine->cpu[0], 40);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXG2(space, 40);
REP40(GTIA2);
POST_GFX(40);
}
void gtia_mode_2_48(VIDEO *video)
{
PREPARE_GFXG2(Machine->cpu[0], 48);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXG2(space, 48);
REP48(GTIA2);
POST_GFX(48);
}
@ -1119,19 +1125,22 @@ void gtia_mode_2_48(VIDEO *video)
void gtia_mode_3_32(VIDEO *video)
{
PREPARE_GFXG3(Machine->cpu[0], 32);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXG3(space, 32);
REP32(GTIA3);
POST_GFX(32);
}
void gtia_mode_3_40(VIDEO *video)
{
PREPARE_GFXG3(Machine->cpu[0], 40);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXG3(space, 40);
REP40(GTIA3);
POST_GFX(40);
}
void gtia_mode_3_48(VIDEO *video)
{
PREPARE_GFXG3(Machine->cpu[0], 48);
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
PREPARE_GFXG3(space, 48);
REP48(GTIA3);
POST_GFX(48);
}

1
src/mame/video/harddriv.c
View File

@ -6,7 +6,6 @@
#include "driver.h"
#include "cpu/tms34010/tms34010.h"
#include "cpu/tms34010/34010ops.h"
#include "harddriv.h"

1
src/mame/video/midtunit.c
View File

@ -7,7 +7,6 @@
#include "driver.h"
#include "profiler.h"
#include "cpu/tms34010/tms34010.h"
#include "cpu/tms34010/34010ops.h"
#include "midtunit.h"

1
src/mame/video/midyunit.c
View File

@ -7,7 +7,6 @@
#include "driver.h"
#include "profiler.h"
#include "cpu/tms34010/tms34010.h"
#include "cpu/tms34010/34010ops.h"
#include "midyunit.h"

3
src/mame/video/namcos22.c
View File

@ -2411,6 +2411,7 @@ WRITE16_HANDLER( namcos22_dspram16_w )
static void
Dump( FILE *f, unsigned addr1, unsigned addr2, const char *name )
{
const address_space *space = cpu_get_address_space(Machine->cpu[0], ADDRESS_SPACE_PROGRAM);
unsigned addr;
fprintf( f, "%s:\n", name );
for( addr=addr1; addr<=addr2; addr+=16 )
@ -2420,7 +2421,7 @@ Dump( FILE *f, unsigned addr1, unsigned addr2, const char *name )
int i;
for( i=0; i<16; i++ )
{
data[i] = cpu_read_byte(Machine->cpu[0], addr+i );
data[i] = memory_read_byte(space, addr+i );
if( data[i] )
{
bHasNonZero = 1;