Preliminary netlist sound for the Zaccaria 1B11142 board

* Tromba (trumpet) sound is not working - requires Schmitt trigger device
* Connecting cassa (bass drum) swamps other instruments so it's disconnected for now
* Mixing melody sound with speech/SFX is not done in netlist (should be)
* Relative levels of melody/speech/SFX are probably still wrong

(nw) A good test case for this is the Money Money driver (monymony).
There's a bit of buzzing on this one as well.  The problem with the
cassa could be caused by running into non-ideal characteristics of opams
again (the LM3900 seems to ignore the V+ value supplied to it).  When
the netlist library gets Schmitt trigger support, the tromba can be
completed.  Unfortunately, the tromba is a key part of the
characteristic sound of these boards, so you really notice when it's
lacking.
This commit is contained in:
Vas Crabb 2017-05-27 03:57:50 +10:00
parent 08d9b99986
commit 2b7d87317b
7 changed files with 530 additions and 12 deletions

View File

@ -4220,6 +4220,8 @@ files {
createMAMEProjects(_target, _subtarget, "zaccaria")
files {
MAME_DIR .. "src/mame/audio/nl_zac1b11142.cpp",
MAME_DIR .. "src/mame/audio/nl_zacc1b11142.h",
MAME_DIR .. "src/mame/audio/zaccaria.cpp",
MAME_DIR .. "src/mame/audio/zaccaria.h",
MAME_DIR .. "src/mame/drivers/laserbat.cpp",

View File

@ -531,11 +531,86 @@ static NETLIST_START(TTL_7486_DIP)
s1.A, /* A1 |1 ++ 14| VCC */ VCC.I,
s1.B, /* B1 |2 13| B4 */ s4.B,
s1.Q, /* Y1 |3 12| A4 */ s4.A,
s2.A, /* A2 |4 7400 11| Y4 */ s4.Q,
s2.A, /* A2 |4 7486 11| Y4 */ s4.Q,
s2.B, /* B2 |5 10| B3 */ s3.B,
s2.Q, /* Y2 |6 9| A3 */ s3.A,
GND.I, /* GND |7 8| Y3 */ s3.Q
/* +--------------+ */
/* +--------------+ */
)
NETLIST_END()
/*
* DM74155/DM74156: Dual 2-Line to 4-Line Decoders/Demultiplexers
*
* +-----+-------++-----------------+
* | B A | G1 C1 || 1Y0 1Y1 1Y2 1Y3 |
* +=====+=======++=================+
* | X X | 1 X || 1 1 1 1 |
* | 0 0 | 0 1 || 0 1 1 1 |
* | 0 1 | 0 1 || 1 0 1 1 |
* | 1 0 | 0 1 || 1 1 0 1 |
* | 1 1 | 0 1 || 1 1 1 0 |
* | X X | X 0 || 1 1 1 1 |
* +-----+-------++-----------------+
*
* +-----+-------++-----------------+
* | B A | G2 C2 || 2Y0 2Y1 2Y2 2Y3 |
* +=====+=======++=================+
* | X X | 1 X || 1 1 1 1 |
* | 0 0 | 0 0 || 0 1 1 1 |
* | 0 1 | 0 0 || 1 0 1 1 |
* | 1 0 | 0 0 || 1 1 0 1 |
* | 1 1 | 0 0 || 1 1 1 0 |
* | X X | X 1 || 1 1 1 1 |
* +-----+-------++-----------------+
*
* Naming conventions follow National Semiconductor datasheet
*
*/
static NETLIST_START(TTL_74155_DIP)
NET_REGISTER_DEV(TTL_74155A_GATE, s1)
NET_REGISTER_DEV(TTL_74155B_GATE, s2)
NET_C(s1.A, s2.A)
NET_C(s1.B, s2.B)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
DIPPINS( /* +--------------+ */
s1.C, /* C1 |1 ++ 16| VCC */ VCC.I,
s1.G, /* G1 |2 15| B4 */ s2.C,
s1.B, /* B |3 14| B4 */ s2.G,
s1.3, /* 1Y3 |4 74155 13| A4 */ s2.A,
s2.2, /* 1Y2 |5 12| Y4 */ s2.3,
s2.1, /* 1Y1 |6 11| B3 */ s2.2,
s2.0, /* 1Y0 |7 10| A3 */ s2.1,
GND.I, /* GND |8 9| Y3 */ s2.0
/* +--------------+ */
)
NETLIST_END()
static NETLIST_START(TTL_74156_DIP)
NET_REGISTER_DEV(TTL_74156A_GATE, s1)
NET_REGISTER_DEV(TTL_74156B_GATE, s2)
NET_C(s1.A, s2.A)
NET_C(s1.B, s2.B)
DUMMY_INPUT(GND)
DUMMY_INPUT(VCC)
DIPPINS( /* +--------------+ */
s1.C, /* C1 |1 ++ 16| VCC */ VCC.I,
s1.G, /* G1 |2 15| B4 */ s2.C,
s1.B, /* B |3 14| B4 */ s2.G,
s1.3, /* 1Y3 |4 74156 13| A4 */ s2.A,
s2.2, /* 1Y2 |5 12| Y4 */ s2.3,
s2.1, /* 1Y1 |6 11| B3 */ s2.2,
s2.0, /* 1Y0 |7 10| A3 */ s2.1,
GND.I, /* GND |8 9| Y3 */ s2.0
/* +--------------+ */
)
NETLIST_END()
@ -930,6 +1005,50 @@ NETLIST_START(TTL74XX_lib)
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_74155A_GATE, 4, 4, "")
TT_HEAD("B,A,G,C|0,1,2,3")
TT_LINE("X,X,1,X|1,1,1,1|13,13,13,13")
TT_LINE("X,X,0,0|1,1,1,1|13,13,13,13")
TT_LINE("0,0,0,1|0,1,1,1|13,13,13,13")
TT_LINE("0,1,0,1|1,0,1,1|13,13,13,13")
TT_LINE("1,0,0,1|1,1,0,1|13,13,13,13")
TT_LINE("1,1,0,1|1,1,1,0|13,13,13,13")
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_74155B_GATE, 4, 4, "")
TT_HEAD("B,A,G,C|0,1,2,3")
TT_LINE("X,X,1,X|1,1,1,1|13,13,13,13")
TT_LINE("X,X,0,1|1,1,1,1|13,13,13,13")
TT_LINE("0,0,0,0|0,1,1,1|13,13,13,13")
TT_LINE("0,1,0,0|1,0,1,1|13,13,13,13")
TT_LINE("1,0,0,0|1,1,0,1|13,13,13,13")
TT_LINE("1,1,0,0|1,1,1,0|13,13,13,13")
TT_FAMILY("74XX")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_74156A_GATE, 4, 4, "")
TT_HEAD("B,A,G,C|0,1,2,3")
TT_LINE("X,X,1,X|1,1,1,1|13,13,13,13")
TT_LINE("X,X,0,0|1,1,1,1|13,13,13,13")
TT_LINE("0,0,0,1|0,1,1,1|13,13,13,13")
TT_LINE("0,1,0,1|1,0,1,1|13,13,13,13")
TT_LINE("1,0,0,1|1,1,0,1|13,13,13,13")
TT_LINE("1,1,0,1|1,1,1,0|13,13,13,13")
TT_FAMILY("74XXOC")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_74156B_GATE, 4, 4, "")
TT_HEAD("B,A,G,C|0,1,2,3")
TT_LINE("X,X,1,X|1,1,1,1|13,13,13,13")
TT_LINE("X,X,0,1|1,1,1,1|13,13,13,13")
TT_LINE("0,0,0,0|0,1,1,1|13,13,13,13")
TT_LINE("0,1,0,0|1,0,1,1|13,13,13,13")
TT_LINE("1,0,0,0|1,1,0,1|13,13,13,13")
TT_LINE("1,1,0,0|1,1,1,0|13,13,13,13")
TT_FAMILY("74XXOC")
TRUTHTABLE_END()
TRUTHTABLE_START(TTL_74260_GATE, 5, 1, "")
TT_HEAD("A,B,C,D,E|Q ")
TT_LINE("0,0,0,0,0|1|10")
@ -1008,6 +1127,8 @@ NETLIST_START(TTL74XX_lib)
LOCAL_LIB_ENTRY(TTL_7432_DIP)
LOCAL_LIB_ENTRY(TTL_7437_DIP)
LOCAL_LIB_ENTRY(TTL_7486_DIP)
LOCAL_LIB_ENTRY(TTL_74155_DIP)
LOCAL_LIB_ENTRY(TTL_74156_DIP)
LOCAL_LIB_ENTRY(TTL_74260_DIP)
LOCAL_LIB_ENTRY(TTL_74279_DIP)
LOCAL_LIB_ENTRY(DM9312_DIP)

View File

@ -186,6 +186,12 @@
#define TTL_7486_DIP(name) \
NET_REGISTER_DEV(TTL_7486_DIP, name)
#define TTL_74155_DIP(name) \
NET_REGISTER_DEV(TTL_74155_DIP, name)
#define TTL_74156_DIP(name) \
NET_REGISTER_DEV(TTL_74156_DIP, name)
#define TTL_74260_GATE(name) \
NET_REGISTER_DEV(TTL_74260_GATE, name)

View File

@ -0,0 +1,338 @@
// license:BSD-3-Clause
// copyright-holders:Vas Crabb
#include "audio/nl_zac1b11142.h"
#include "netlist/devices/net_lib.h"
#ifndef __PLIB_PREPROCESSOR__
#endif
NETLIST_START(zac1b11142_schematics)
// Shared chips
TTL_7474_DIP(U3A) // FIXME: need 74LS family model (higher input impedance, half the sink capability)
CD4016_DIP(U5D)
NET_C(VCC, /*U3A.14,*/ U5D.14) // 7474 model doesn't have Vcc pin
NET_C(GND, /*U3A.7,*/ U5D.7) // 7474 model doesn't have GND pin
NET_C(VCC, U3A.10, U3A.11, U3A.12, U3A.13) // only half of this chip is used in this audio section - tie up the other inputs
// ANAL1/IOA3/IOA4 -> RULLANTE/CASSA
CAP(C61, CAP_U(10))
CAP(C62, CAP_P(1000))
CAP(C63, CAP_U(0.01))
CAP(C68, CAP_U(0.1))
RES(R84, RES_K(1.5))
RES(R102, RES_K(10))
RES(R103, RES_K(10))
RES(R104, RES_K(120))
RES(R105, RES_K(56))
RES(R122, RES_K(33))
RES(R123, RES_K(1))
RES(R125, RES_K(560))
RES(R126, RES_K(470))
RES(R127, RES_K(100))
RES(R128A, RES_K(56)) // schematic has two resistors marked as R128, need PCB photo or parts list to resolve
RES(R128B, 680)
RES(R129, RES_K(1))
RES(R120, RES_K(47))
RES(R124, RES_K(39))
RES(R130, RES_K(33))
RES(R131, RES_K(150))
RES(R132, RES_K(1))
RES(R133, RES_K(1))
LM3900(U5C1)
LM3900(U5C2)
LM3900(U5C3)
NET_C(ANAL1, R133.1, C63.1, U5D.9, U5D.10)
NET_C(IOA3, U5D.6)
NET_C(IOA4, U5D.12)
NET_C(U5D.11, R132.1, R131.1)
NET_C(R131.2, R130.1, U5C1.MINUS)
NET_C(R130.2, R124.1, U5C1.OUT)
NET_C(R120.1, U5C1.PLUS)
NET_C(U5D.8, R129.1, R128A.1)
NET_C(R128A.2, R126.2, R127.1, R125.1, C62.1, U5C2.MINUS)
NET_C(R125.2, C62.2, U5C2.OUT, R123.1)
NET_C(R128B.1, U5C2.PLUS)
NET_C(R123.2, C61.1, C68.1)
NET_C(C68.2, R122.1)
NET_C(R122.2, R104.1, U5C3.MINUS)
NET_C(R104.2, U5C3.OUT, R105.1)
NET_C(R102.1, U5C3.PLUS)
NET_C(R103.2, R102.2, R84.1)
NET_C(VCC, R126.1, R103.1, U5C1.VP, U5C2.VP, U5C3.VP)
NET_C(GND, R133.2, C63.2, R132.2, R120.2, R129.2, R127.2, R128B.2, C61.2, R84.2, U5C1.VM, U5C2.VM, U5C3.VM)
ALIAS(RULLANTE, R124.2)
ALIAS(CASSA, R105.2)
// ANAL2 -> BASSO
CAP(C29, CAP_U(0.1))
CAP(C45, CAP_P(1000))
CAP(C52, CAP_U(0.022)) // schematic says "0,02µ" but that isn't a standard e-series value
CAP(C53, CAP_U(0.022)) // schematic says "0,02µ" but that isn't a standard e-series value
CAP(C54, CAP_U(2.2))
RES(R46, RES_K(1))
RES(R69, RES_K(2.2))
RES(R83, RES_K(2.2))
RES(R85, RES_K(120))
RES(R86, RES_K(100))
RES(R87, RES_K(33))
RES(R88, RES_K(15)) // schematic just says "15" but 15Ω would be way too low
RES(R98, RES_K(180))
RES(R99, RES_K(47))
RES(R100, RES_K(1))
RES(R101, RES_K(4.7))
RES(R106, RES_K(68))
RES(R118, RES_K(33))
LM3900(U5B4)
LM3900(U5C4)
NET_C(ANAL2, R46.1, C29.1)
NET_C(C29.2, R69.1)
NET_C(R69.2, R98.1, C52.1, U5B4.MINUS)
NET_C(R98.2, C52.2, U5B4.OUT, C53.1)
NET_C(R99.1, U5B4.PLUS)
NET_C(R101.2, R99.2, R100.1)
NET_C(C53.2, R118.1)
NET_C(R118.2, C54.1, R83.1)
NET_C(R83.2, C45.1, R85.1, U5C4.MINUS)
NET_C(C45.2, R85.2, U5C4.OUT, R106.1)
NET_C(R86.1, U5C4.PLUS)
NET_C(R87.2, R86.2, R88.1)
NET_C(VCC, R101.1, R87.1, U5B4.VP, U5C4.VP)
NET_C(GND, R46.2, R100.2, C54.2, R88.2, U5B4.VM, U5C4.VM)
ALIAS(BASSO, R106.2)
// ANAL3/SW1
CAP(C44, CAP_U(0.1))
CAP(C56, CAP_U(0.01))
RES(R70, RES_K(10))
RES(R71, RES_K(1))
RES(R72, RES_K(10))
RES(R82, RES_K(10))
NET_C(ANAL3, R71.1, R72.1)
NET_C(R72.2, U5D.4, R70.1)
NET_C(SW1, U5D.5) // this connection is not shown on the schematic
NET_C(U5D.3, C56.1)
NET_C(R70.2, C44.1)
NET_C(C44.2, R82.1)
NET_C(GND, R71.2, C56.2)
// ANAL6
// schematic shows an open jumper between R80 and the mix, so this channel may have been disconnected in practice
CAP(C42, CAP_U(0.1))
CAP(C43, CAP_U(0.01))
RES(R47, RES_K(1))
RES(R48, RES_K(10))
RES(R80, RES_K(10))
RES(R81, RES_K(10))
NET_C(ANAL6, R47.1, R48.1)
NET_C(R48.2, C42.1)
NET_C(C42.2, R81.1)
NET_C(R81.2, C43.1, R80.1)
NET_C(GND, R47.2, C43.2)
// ANAL4 -> PIANO
CAP(C41, CAP_U(0.1))
CAP(C49, CAP_U(0.01))
RES(R78, RES_K(1))
RES(R79, RES_K(47))
RES(R90, RES_K(68))
RES(R91, RES_K(12))
RES(R92, RES_K(33))
RES(R93, RES_K(100))
RES(R107, RES_K(100))
LM3900(U5B2)
NET_C(ANAL4, R78.1, C41.1)
NET_C(C41.2, R79.1)
NET_C(R79.2, C49.1, R107.1, U5B2.MINUS)
NET_C(C49.2, R107.2, U5B2.OUT, R90.1)
NET_C(R93.1, U5B2.PLUS)
NET_C(R92.2, R93.2, R91.1)
NET_C(VCC, R92.1, U5B2.VP)
NET_C(GND, R78.2, R91.2, U5B2.VM)
ALIAS(PIANO, R90.2)
// ANAL5 -> TROMBA
CAP(C28, CAP_P(1000))
CAP(C37, CAP_U(1))
CAP(C50, CAP_P(1000))
QBJT_EB(T6, "BC548C") // schematic says "BC548"
RES(R39, 220)
RES(R40, RES_K(100))
RES(R64, RES_K(4.7))
RES(R65, RES_K(4.7))
RES(R66, RES_K(1))
RES(R67, RES_K(1))
RES(R94, RES_K(10))
RES(R95, RES_K(100))
RES(R96, RES_K(4.7))
RES(R108, RES_K(10))
RES(R109, RES_K(10))
RES(R110, RES_K(10))
RES(R111, RES_K(8.2))
RES(R112, RES_K(100))
RES(R113, RES_M(1))
LM3900(U5B1)
NET_C(ANAL5, R66.1, R67.1)
NET_C(R67.2, C28.1, R40.1, T7.B)
NET_C(R64.2, T6.C, U3A.3)
NET_C(R65.2, U3A.2, U3A.4, U3A.1) // FIXME: pin 1 actually comes from a Schmitt trigger in U4A
NET_C(U3A.5, R39.1, U5D.13)
NET_C(R39.2, C37.1) // FIXME: this junction feeds a Schmitt trigger in U4A
NET_C(R109.1, R94.2, R108.1, R95.1)
NET_C(R109.2, LEVELT)
NET_C(R110.2, R112.1, R111.1)
NET_C(R112.2, U5D.1, C50.1, R113.1, U5B1.MINUS)
NET_C(R95.2, U5B1.PLUS)
NET_C(U5D.2, C50.2, R113.2, U5B1.OUT, R96.1)
NET_C(VCC, R64.1, R65.1, R94.1, R110.1, U5B1.VP)
NET_C(GND, R66.2, C28.2, R40.2, T6.E, C37.2, R108.2, R111.2, U5B1.VM)
ALIAS(TROMBA, R96.2)
// Mixdown
CAP(C40, CAP_U(0.1))
POT(P1, RES_K(10))
QBJT_EB(T7, "BC548C") // schematic says "BC548"
RES(R41, RES_K(8.2))
RES(R42, RES_K(5.6))
RES(R43, RES_K(3.3))
RES(R44, RES_K(1.5))
RES(R45, RES_K(10))
RES(R68, RES_K(10))
RES(R73, 820)
RES(R74, 390)
RES(R75, 150)
RES(R76, 47)
RES(R77, RES_K(10))
RES(R97, RES_K(150))
RES(R114, RES_K(4.7))
RES(R115, RES_K(82))
RES(R116, RES_K(47))
RES(R117, RES_K(1))
RES(R119, RES_K(4.7))
TTL_74156_DIP(U4B) // FIXME: should be a 74LS156 (lower sink capability)
LM3900(U5B3)
#if 0
NET_C(RULLANTE, CASSA, BASSO, R82.2, R80.2, PIANO, C40.1, R77.1)
#else
// cassa swamps the other instruments if it's connected - just ground it for now
NET_C(GND, CASSA)
NET_C(RULLANTE, BASSO, R82.2, R80.2, PIANO, C40.1, R77.1)
#endif
NET_C(C40.2, R97.1)
NET_C(TROMBA, R97.2, R41.2, R42.2, R43.2, R44.2, R73.2, R74.2, R75.2, R76.2)
NET_C(IOA2, U4B.13)
NET_C(IOA1, U4B.3)
NET_C(IOA0, U4B.1, U4B.15)
NET_C(U4B.9, R41.1)
NET_C(U4B.10, R42.1)
NET_C(U4B.11, R43.1)
NET_C(U4B.12, R44.1)
NET_C(U4B.7, R73.1)
NET_C(U4B.6, R74.1)
NET_C(U4B.5, R75.1)
NET_C(U4B.4, R76.1)
NET_C(R77.2, U5B3.PLUS)
NET_C(R119.2, R117.2, R116.1)
NET_C(R116.2, R115.1, U5B3.MINUS)
NET_C(R115.2, U5B3.OUT, R114.1)
NET_C(R114.2, R45.1, P1.1)
NET_C(R45.2, T7.C)
NET_C(T7.B, R68.1)
NET_C(R68.2, LEVEL)
NET_C(VCC, R119.1, U4B.16, U5B3.VP)
NET_C(GND, P1.3, T7.E, R117.1, U4B.2, U4B.8, U4B.14)
NET_C(GND, U5B3.VM)
NETLIST_END()
NETLIST_START(zac1b11142)
SOLVER(Solver, 18000)
PARAM(Solver.ACCURACY, 1e-8)
PARAM(Solver.NR_LOOPS, 300)
PARAM(Solver.GS_LOOPS, 1)
//PARAM(Solver.METHOD, "SOR")
PARAM(Solver.METHOD, "MAT_CR")
//PARAM(Solver.METHOD, "GMRES")
PARAM(Solver.PARALLEL, 0)
PARAM(Solver.SOR_FACTOR, 1.00)
PARAM(Solver.DYNAMIC_TS, 0)
PARAM(Solver.DYNAMIC_LTE, 5e-4)
PARAM(Solver.DYNAMIC_MIN_TIMESTEP, 20e-6)
LOCAL_SOURCE(zac1b11142_schematics)
ANALOG_INPUT(I_P12, 11.3) // +12V dropped with a 1N4004
ANALOG_INPUT(I_P5, 5)
//ANALOG_INPUT(I_V0, 0)
ANALOG_INPUT(I_M5, -5)
ALIAS(VCC, I_P5.Q)
ALIAS(I_V0.Q, GND)
NET_MODEL("AY8910PORT FAMILY(OVL=0.05 OVH=4.95 ORL=100.0 ORH=0.5k)")
// AY-3-8910 4G/4H digital outputs
LOGIC_INPUT(I_IOA0, 1, "AY8910PORT")
LOGIC_INPUT(I_IOA1, 1, "AY8910PORT")
LOGIC_INPUT(I_IOA2, 1, "AY8910PORT")
LOGIC_INPUT(I_IOA3, 1, "AY8910PORT")
LOGIC_INPUT(I_IOA4, 1, "AY8910PORT")
LOGIC_INPUT(I_LEVEL, 1, "AY8910PORT")
LOGIC_INPUT(I_LEVELT, 1, "AY8910PORT")
LOGIC_INPUT(I_SW1, 1, "AY8910PORT")
ALIAS(IOA0, I_IOA0.Q)
ALIAS(IOA1, I_IOA1.Q)
ALIAS(IOA2, I_IOA2.Q)
ALIAS(IOA3, I_IOA3.Q)
ALIAS(IOA4, I_IOA4.Q)
ALIAS(LEVEL, I_LEVEL.Q)
ALIAS(LEVELT, I_LEVELT.Q)
ALIAS(SW1, I_SW1.Q)
// AY-3-8910 4G/4H analog outputs
RES(R_AY4G_A, 1000)
RES(R_AY4G_B, 1000)
RES(R_AY4G_C, 1000)
RES(R_AY4H_A, 1000)
RES(R_AY4H_B, 1000)
RES(R_AY4H_C, 1000)
NET_C(I_P5, R_AY4G_A.1, R_AY4G_B.1, R_AY4G_C.1, R_AY4H_A.1, R_AY4H_B.1, R_AY4H_C.1)
ALIAS(ANAL1, R_AY4G_A.2)
ALIAS(ANAL2, R_AY4G_B.2)
ALIAS(ANAL3, R_AY4G_C.2)
ALIAS(ANAL4, R_AY4H_A.2)
ALIAS(ANAL5, R_AY4H_B.2)
ALIAS(ANAL6, R_AY4H_C.2)
INCLUDE(zac1b11142_schematics)
NETLIST_END()

View File

@ -0,0 +1,12 @@
// license:BSD-3-Clause
// copyright-holders:Vas Crabb
#ifndef MAME_AUDIO_NL_ZAC1B11142_H
#define MAME_AUDIO_NL_ZAC1B11142_H
#pragma once
#include "netlist/nl_setup.h"
NETLIST_EXTERNAL(zac1b11142)
#endif // MAME_AUDIO_NL_ZAC1B11142_H

View File

@ -2,6 +2,7 @@
// copyright-holders:Vas Crabb
#include "emu.h"
#include "audio/zaccaria.h"
#include "audio/nl_zac1b11142.h"
#include "cpu/m6800/m6800.h"
#include "machine/clock.h"
@ -323,6 +324,10 @@ zac1b11142_audio_device::zac1b11142_audio_device(machine_config const &mconfig,
, m_audiocpu(*this, "audiocpu")
, m_pia_1i(*this, "pia_1i")
, m_speech(*this, "speech")
, m_ioa(*this, "sound_nl:ioa%u", 0)
, m_level(*this, "sound_nl:level")
, m_levelt(*this, "sound_nl:levelt")
, m_sw1(*this, "sound_nl:sw1")
, m_inputs(*this, "1B11142")
, m_host_command(0)
{
@ -353,20 +358,22 @@ WRITE_LINE_MEMBER(zac1b11142_audio_device::ressound_w)
WRITE8_MEMBER(zac1b11142_audio_device::ay_4g_porta_w)
{
// TODO: (data & 0x07) controls tromba mix volume
// TODO: (data & 0x08) controls cassa gate
// TODO: (data & 0x10) controls rullante gate
m_ioa[0]->write_line(BIT(data, 0)); // tromba mix volume
m_ioa[1]->write_line(BIT(data, 1)); // " " "
m_ioa[2]->write_line(BIT(data, 2)); // " " "
m_ioa[3]->write_line(BIT(data, 3)); // cassa gate
m_ioa[4]->write_line(BIT(data, 4)); // rullante gate
}
WRITE8_MEMBER(zac1b11142_audio_device::ay_4h_porta_w)
{
// TODO: data & 0x01 controls LEVEL
// TODO: data & 0x02 controls LEVELT
m_level->write_line(BIT(data, 0)); // output level
m_levelt->write_line(BIT(data, 1)); // tromba level
}
WRITE8_MEMBER(zac1b11142_audio_device::ay_4h_portb_w)
{
// TODO: data & 0x01 controls ANAL3 filter
m_sw1->write_line(BIT(data, 0)); // ANAL3 filter
}
READ8_MEMBER(zac1b11142_audio_device::host_command_r)
@ -401,12 +408,16 @@ MACHINE_CONFIG_MEMBER(zac1b11142_audio_device::device_add_mconfig)
MCFG_DEVICE_MODIFY("melodypsg1")
MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(zac1b11142_audio_device, ay_4g_porta_w))
MCFG_MIXER_ROUTE(ALL_OUTPUTS, DEVICE_SELF_OWNER, 0.15, 0)
MCFG_SOUND_ROUTE_EX(0, "sound_nl", 1.0, 0)
MCFG_SOUND_ROUTE_EX(1, "sound_nl", 1.0, 1)
MCFG_SOUND_ROUTE_EX(2, "sound_nl", 1.0, 2)
MCFG_DEVICE_MODIFY("melodypsg2")
MCFG_AY8910_PORT_A_WRITE_CB(WRITE8(zac1b11142_audio_device, ay_4h_porta_w))
MCFG_AY8910_PORT_B_WRITE_CB(WRITE8(zac1b11142_audio_device, ay_4h_portb_w))
MCFG_MIXER_ROUTE(ALL_OUTPUTS, DEVICE_SELF_OWNER, 0.15, 0)
MCFG_SOUND_ROUTE_EX(0, "sound_nl", 1.0, 3)
MCFG_SOUND_ROUTE_EX(1, "sound_nl", 1.0, 4)
MCFG_SOUND_ROUTE_EX(2, "sound_nl", 1.0, 5)
MCFG_CPU_ADD("audiocpu", M6802, XTAL_3_579545MHz) // verified on pcb
MCFG_CPU_PROGRAM_MAP(zac1b11142_audio_map)
@ -426,7 +437,30 @@ MACHINE_CONFIG_MEMBER(zac1b11142_audio_device::device_add_mconfig)
MCFG_TMS52XX_IRQ_HANDLER(DEVWRITELINE("pia_1i", pia6821_device, cb1_w))
MCFG_TMS52XX_READYQ_HANDLER(DEVWRITELINE("pia_1i", pia6821_device, ca2_w))
MCFG_MIXER_ROUTE(ALL_OUTPUTS, DEVICE_SELF_OWNER, 0.80, 0)
}
MCFG_SOUND_ADD("sound_nl", NETLIST_SOUND, 48000)
MCFG_NETLIST_SETUP(zac1b11142)
MCFG_MIXER_ROUTE(ALL_OUTPUTS, DEVICE_SELF_OWNER, 1.0, 0)
MCFG_NETLIST_LOGIC_INPUT("sound_nl", "ioa0", "I_IOA0.IN", 0)
MCFG_NETLIST_LOGIC_INPUT("sound_nl", "ioa1", "I_IOA1.IN", 0)
MCFG_NETLIST_LOGIC_INPUT("sound_nl", "ioa2", "I_IOA2.IN", 0)
MCFG_NETLIST_LOGIC_INPUT("sound_nl", "ioa3", "I_IOA3.IN", 0)
MCFG_NETLIST_LOGIC_INPUT("sound_nl", "ioa4", "I_IOA4.IN", 0)
MCFG_NETLIST_LOGIC_INPUT("sound_nl", "level", "I_LEVEL.IN", 0)
MCFG_NETLIST_LOGIC_INPUT("sound_nl", "levelt", "I_LEVELT.IN", 0)
MCFG_NETLIST_LOGIC_INPUT("sound_nl", "sw1", "I_SW1.IN", 0)
MCFG_NETLIST_STREAM_INPUT("sound_nl", 0, "R_AY4G_A.R")
MCFG_NETLIST_STREAM_INPUT("sound_nl", 1, "R_AY4G_B.R")
MCFG_NETLIST_STREAM_INPUT("sound_nl", 2, "R_AY4G_C.R")
MCFG_NETLIST_STREAM_INPUT("sound_nl", 3, "R_AY4H_A.R")
MCFG_NETLIST_STREAM_INPUT("sound_nl", 4, "R_AY4H_B.R")
MCFG_NETLIST_STREAM_INPUT("sound_nl", 5, "R_AY4H_C.R")
MCFG_NETLIST_STREAM_OUTPUT("sound_nl", 0, "P1.2")
MCFG_NETLIST_ANALOG_MULT_OFFSET(3000.0 * 10.0, 0.0) // FIXME: no clue what numbers to use here
MACHINE_CONFIG_END
ioport_constructor zac1b11142_audio_device::device_input_ports() const
{

View File

@ -120,9 +120,14 @@ protected:
required_device<pia6821_device> m_pia_1i;
required_device<tms5220_device> m_speech;
required_device_array<netlist_mame_logic_input_device, 5> m_ioa;
required_device<netlist_mame_logic_input_device> m_level;
required_device<netlist_mame_logic_input_device> m_levelt;
required_device<netlist_mame_logic_input_device> m_sw1;
required_ioport m_inputs;
u8 m_host_command;
u8 m_host_command;
};
#endif // MAME_AUDIO_ZACCARIA_H