ncr5380n: Misc. updates (nw)

- Remove fake device clock from configuration
- Allow some read side effects to be disabled
- Separate device type for 53C80, which has a few functional differences and is used in various Apple products
- Add hsscsi to apple2e and apple2gs slot options
This commit is contained in:
AJR 2019-05-24 10:33:23 -04:00
parent 5bb2a226ce
commit 2b8ef360d1
10 changed files with 49 additions and 20 deletions

View File

@ -61,7 +61,7 @@ static void hsscsi_devices(device_slot_interface &device)
{
device.option_add("cdrom", NSCSI_CDROM);
device.option_add("harddisk", NSCSI_HARDDISK);
device.option_add_internal("ncr5380", NCR5380N);
device.option_add_internal("ncr5380", NCR53C80);
}
ROM_START( hsscsi )
@ -88,8 +88,7 @@ void a2bus_hsscsi_device::device_add_mconfig(machine_config &config)
NSCSI_CONNECTOR(config, "scsibus:5", hsscsi_devices, nullptr, false);
NSCSI_CONNECTOR(config, "scsibus:6", hsscsi_devices, "harddisk", false);
NSCSI_CONNECTOR(config, "scsibus:7", hsscsi_devices, "ncr5380", true).set_option_machine_config("ncr5380", [this](device_t *device) {
device->set_clock(10000000);
downcast<ncr5380n_device &>(*device).drq_handler().set(*this, FUNC(a2bus_hsscsi_device::drq_w));
downcast<ncr53c80_device &>(*device).drq_handler().set(*this, FUNC(a2bus_hsscsi_device::drq_w));
});
}

View File

@ -46,7 +46,7 @@ protected:
virtual uint8_t read_c800(uint16_t offset) override;
virtual void write_c800(uint16_t offset, uint8_t data) override;
required_device<ncr5380n_device> m_ncr5380;
required_device<ncr53c80_device> m_ncr5380;
required_device<nscsi_bus_device> m_scsibus;
private:

View File

@ -81,7 +81,6 @@ void a2bus_scsi_device::device_add_mconfig(machine_config &config)
NSCSI_CONNECTOR(config, "scsibus:5", scsi_devices, nullptr, false);
NSCSI_CONNECTOR(config, "scsibus:6", scsi_devices, "harddisk", false);
NSCSI_CONNECTOR(config, "scsibus:7", scsi_devices, "ncr5380", true).set_option_machine_config("ncr5380", [this](device_t *device) {
device->set_clock(10000000);
downcast<ncr5380n_device &>(*device).drq_handler().set(*this, FUNC(a2bus_scsi_device::drq_w));
});
}

View File

@ -9,6 +9,8 @@
IRQ and DMA channels are software-selectable. There is a 2K HM6116P-2
SRAM on board, but not all of it seems to be addressable.
The BIOS was designed to accommodate either a NMOS 5380 or a 53C80-40.
***************************************************************************/
#include "emu.h"
@ -156,7 +158,6 @@ static void asc88_scsi_devices(device_slot_interface &device)
void asc88_device::scsic_config(device_t *device)
{
device->set_clock(10'000'000); // FIXME: this clock is fake
downcast<ncr5380n_device &>(*device).irq_handler().set("^^", FUNC(asc88_device::irq_w));
downcast<ncr5380n_device &>(*device).drq_handler().set("^^", FUNC(asc88_device::drq_w));
}

View File

@ -4,11 +4,13 @@
ncr5380n.c
Implementation of the NCR 5380, aka the Zilog Z5380
Implementation of the NCR 5380, aka the Zilog Z5380 & AMD Am5380
TODO:
- IRQs
- Target mode
- NMOS/CMOS functional differences
- 5380 has no actual input clock
40801766 - IIx ROM waiting point for "next read fails"
@ -18,6 +20,7 @@
#include "ncr5380n.h"
DEFINE_DEVICE_TYPE(NCR5380N, ncr5380n_device, "ncr5380_new", "NCR 5380 SCSI (new)")
DEFINE_DEVICE_TYPE(NCR53C80, ncr53c80_device, "ncr53c80", "NCR 53C80 SCSI")
void ncr5380n_device::map(address_map &map)
{
@ -31,8 +34,9 @@ void ncr5380n_device::map(address_map &map)
map(0x7, 0x7).rw(FUNC(ncr5380n_device::resetparityirq_r), FUNC(ncr5380n_device::startdmainitrx_w));
}
ncr5380n_device::ncr5380n_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: nscsi_device(mconfig, NCR5380N, tag, owner, clock)
ncr5380n_device::ncr5380n_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
: nscsi_device(mconfig, type, tag, owner, clock)
, m_fake_clock(10000000)
, tm(nullptr), status(0), istatus(0), m_mode(0)
, m_outdata(0), m_busstatus(0), m_dmalatch(0), m_icommand(0), m_tcommand(0), clock_conv(0), sync_offset(0), sync_period(0), bus_id(0), select_timeout(0)
, seq(0), tcount(0), mode(0), state(0), irq(false), drq(false)
@ -41,6 +45,16 @@ ncr5380n_device::ncr5380n_device(const machine_config &mconfig, const char *tag,
{
}
ncr5380n_device::ncr5380n_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ncr5380n_device(mconfig, NCR5380N, tag, owner, clock)
{
}
ncr53c80_device::ncr53c80_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: ncr5380n_device(mconfig, NCR53C80, tag, owner, clock)
{
}
void ncr5380n_device::device_start()
{
save_item(NAME(m_tcommand));
@ -280,12 +294,12 @@ void ncr5380n_device::delay(int cycles)
if(!clock_conv)
return;
cycles *= clock_conv;
tm->adjust(clocks_to_attotime(cycles));
tm->adjust(attotime::from_ticks(cycles, m_fake_clock));
}
void ncr5380n_device::delay_cycles(int cycles)
{
tm->adjust(clocks_to_attotime(cycles));
tm->adjust(attotime::from_ticks(cycles, m_fake_clock));
}
uint8_t ncr5380n_device::scsidata_r()
@ -486,14 +500,17 @@ void ncr5380n_device::dma_w(uint8_t val)
uint8_t ncr5380n_device::dma_r()
{
// drop DRQ
drq_clear();
// set up to receive our next byte if still in DMA mode
scsi_bus->ctrl_w(scsi_refid, 0, S_ACK);
if (m_mode & MODE_DMA)
if (!machine().side_effects_disabled())
{
recv_byte();
// drop DRQ
drq_clear();
// set up to receive our next byte if still in DMA mode
scsi_bus->ctrl_w(scsi_refid, 0, S_ACK);
if (m_mode & MODE_DMA)
{
recv_byte();
}
}
return m_dmalatch;
}

View File

@ -32,6 +32,8 @@ public:
void dma_w(uint8_t val);
protected:
ncr5380n_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
virtual void device_start() override;
virtual void device_reset() override;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
@ -165,6 +167,8 @@ private:
enum { DMA_NONE, DMA_IN, DMA_OUT };
uint32_t m_fake_clock;
emu_timer *tm;
uint8_t status, istatus, m_mode, m_outdata, m_busstatus, m_dmalatch;
@ -219,6 +223,13 @@ private:
devcb_write_line m_drq_handler;
};
class ncr53c80_device : public ncr5380n_device
{
public:
ncr53c80_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
DECLARE_DEVICE_TYPE(NCR5380N, ncr5380n_device)
DECLARE_DEVICE_TYPE(NCR53C80, ncr53c80_device)
#endif // MAME_MACHINE_NCR5380N_H

View File

@ -123,6 +123,7 @@ Address bus A0-A11 is Y0-Y11
#include "bus/a2bus/a2cffa.h"
#include "bus/a2bus/a2memexp.h"
#include "bus/a2bus/a2scsi.h"
#include "bus/a2bus/a2hsscsi.h"
#include "bus/a2bus/a2thunderclock.h"
#include "bus/a2bus/a2softcard.h"
#include "bus/a2bus/a2videoterm.h"
@ -3959,6 +3960,7 @@ static void apple2_cards(device_slot_interface &device)
device.option_add("focusdrive", A2BUS_FOCUSDRIVE); /* Focus Drive IDE card */
device.option_add("echoiiplus", A2BUS_ECHOPLUS); /* Street Electronics Echo Plus (Echo II + Mockingboard clone) */
device.option_add("scsi", A2BUS_SCSI); /* Apple II SCSI Card */
device.option_add("hsscsi", A2BUS_HSSCSI); /* Apple II High-Speed SCSI Card */
device.option_add("applicard", A2BUS_APPLICARD); /* PCPI Applicard */
device.option_add("aesms", A2BUS_AESMS); /* Applied Engineering Super Music Synthesizer */
device.option_add("ultraterm", A2BUS_ULTRATERM); /* Videx UltraTerm (original) */

View File

@ -63,6 +63,7 @@
#include "bus/a2bus/a2cffa.h"
#include "bus/a2bus/a2memexp.h"
#include "bus/a2bus/a2scsi.h"
#include "bus/a2bus/a2hsscsi.h"
#include "bus/a2bus/a2thunderclock.h"
#include "bus/a2bus/a2softcard.h"
#include "bus/a2bus/a2videoterm.h"
@ -4526,6 +4527,7 @@ static void apple2_cards(device_slot_interface &device)
device.option_add("focusdrive", A2BUS_FOCUSDRIVE); /* Focus Drive IDE card */
device.option_add("echoiiplus", A2BUS_ECHOPLUS); /* Street Electronics Echo Plus (Echo II + Mockingboard clone) */
device.option_add("scsi", A2BUS_SCSI); /* Apple II SCSI Card */
device.option_add("hsscsi", A2BUS_HSSCSI); /* Apple II High-Speed SCSI Card */
device.option_add("applicard", A2BUS_APPLICARD); /* PCPI Applicard */
device.option_add("aesms", A2BUS_AESMS); /* Applied Engineering Super Music Synthesizer */
device.option_add("ultraterm", A2BUS_ULTRATERM); /* Videx UltraTerm (original) */

View File

@ -116,7 +116,6 @@ void lb186_state::ncr5380(device_t *device)
{
devcb_base *devcb;
(void)devcb;
downcast<ncr5380n_device &>(*device).set_clock(10000000);
downcast<ncr5380n_device &>(*device).irq_handler().set(":maincpu", FUNC(i80186_cpu_device::int1_w));
downcast<ncr5380n_device &>(*device).drq_handler().set(":maincpu", FUNC(i80186_cpu_device::drq0_w));
}

View File

@ -319,7 +319,6 @@ void sun3_state::ncr5380(device_t *device)
{
devcb_base *devcb;
(void)devcb;
downcast<ncr5380n_device &>(*device).set_clock(10000000);
// downcast<ncr5380n_device &>(*device).drq_handler().set(FUNC(sun3_state::drq_w));
}