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https://github.com/holub/mame
synced 2025-04-25 01:40:16 +03:00
ncr5380n: Misc. updates (nw)
- Remove fake device clock from configuration - Allow some read side effects to be disabled - Separate device type for 53C80, which has a few functional differences and is used in various Apple products - Add hsscsi to apple2e and apple2gs slot options
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5bb2a226ce
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2b8ef360d1
@ -61,7 +61,7 @@ static void hsscsi_devices(device_slot_interface &device)
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{
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device.option_add("cdrom", NSCSI_CDROM);
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device.option_add("harddisk", NSCSI_HARDDISK);
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device.option_add_internal("ncr5380", NCR5380N);
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device.option_add_internal("ncr5380", NCR53C80);
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}
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ROM_START( hsscsi )
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@ -88,8 +88,7 @@ void a2bus_hsscsi_device::device_add_mconfig(machine_config &config)
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NSCSI_CONNECTOR(config, "scsibus:5", hsscsi_devices, nullptr, false);
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NSCSI_CONNECTOR(config, "scsibus:6", hsscsi_devices, "harddisk", false);
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NSCSI_CONNECTOR(config, "scsibus:7", hsscsi_devices, "ncr5380", true).set_option_machine_config("ncr5380", [this](device_t *device) {
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device->set_clock(10000000);
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downcast<ncr5380n_device &>(*device).drq_handler().set(*this, FUNC(a2bus_hsscsi_device::drq_w));
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downcast<ncr53c80_device &>(*device).drq_handler().set(*this, FUNC(a2bus_hsscsi_device::drq_w));
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});
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}
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@ -46,7 +46,7 @@ protected:
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virtual uint8_t read_c800(uint16_t offset) override;
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virtual void write_c800(uint16_t offset, uint8_t data) override;
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required_device<ncr5380n_device> m_ncr5380;
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required_device<ncr53c80_device> m_ncr5380;
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required_device<nscsi_bus_device> m_scsibus;
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private:
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@ -81,7 +81,6 @@ void a2bus_scsi_device::device_add_mconfig(machine_config &config)
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NSCSI_CONNECTOR(config, "scsibus:5", scsi_devices, nullptr, false);
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NSCSI_CONNECTOR(config, "scsibus:6", scsi_devices, "harddisk", false);
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NSCSI_CONNECTOR(config, "scsibus:7", scsi_devices, "ncr5380", true).set_option_machine_config("ncr5380", [this](device_t *device) {
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device->set_clock(10000000);
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downcast<ncr5380n_device &>(*device).drq_handler().set(*this, FUNC(a2bus_scsi_device::drq_w));
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});
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}
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@ -9,6 +9,8 @@
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IRQ and DMA channels are software-selectable. There is a 2K HM6116P-2
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SRAM on board, but not all of it seems to be addressable.
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The BIOS was designed to accommodate either a NMOS 5380 or a 53C80-40.
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***************************************************************************/
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#include "emu.h"
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@ -156,7 +158,6 @@ static void asc88_scsi_devices(device_slot_interface &device)
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void asc88_device::scsic_config(device_t *device)
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{
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device->set_clock(10'000'000); // FIXME: this clock is fake
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downcast<ncr5380n_device &>(*device).irq_handler().set("^^", FUNC(asc88_device::irq_w));
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downcast<ncr5380n_device &>(*device).drq_handler().set("^^", FUNC(asc88_device::drq_w));
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}
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@ -4,11 +4,13 @@
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ncr5380n.c
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Implementation of the NCR 5380, aka the Zilog Z5380
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Implementation of the NCR 5380, aka the Zilog Z5380 & AMD Am5380
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TODO:
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- IRQs
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- Target mode
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- NMOS/CMOS functional differences
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- 5380 has no actual input clock
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40801766 - IIx ROM waiting point for "next read fails"
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@ -18,6 +20,7 @@
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#include "ncr5380n.h"
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DEFINE_DEVICE_TYPE(NCR5380N, ncr5380n_device, "ncr5380_new", "NCR 5380 SCSI (new)")
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DEFINE_DEVICE_TYPE(NCR53C80, ncr53c80_device, "ncr53c80", "NCR 53C80 SCSI")
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void ncr5380n_device::map(address_map &map)
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{
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@ -31,8 +34,9 @@ void ncr5380n_device::map(address_map &map)
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map(0x7, 0x7).rw(FUNC(ncr5380n_device::resetparityirq_r), FUNC(ncr5380n_device::startdmainitrx_w));
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}
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ncr5380n_device::ncr5380n_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: nscsi_device(mconfig, NCR5380N, tag, owner, clock)
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ncr5380n_device::ncr5380n_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock)
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: nscsi_device(mconfig, type, tag, owner, clock)
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, m_fake_clock(10000000)
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, tm(nullptr), status(0), istatus(0), m_mode(0)
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, m_outdata(0), m_busstatus(0), m_dmalatch(0), m_icommand(0), m_tcommand(0), clock_conv(0), sync_offset(0), sync_period(0), bus_id(0), select_timeout(0)
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, seq(0), tcount(0), mode(0), state(0), irq(false), drq(false)
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@ -41,6 +45,16 @@ ncr5380n_device::ncr5380n_device(const machine_config &mconfig, const char *tag,
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{
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}
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ncr5380n_device::ncr5380n_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: ncr5380n_device(mconfig, NCR5380N, tag, owner, clock)
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{
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}
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ncr53c80_device::ncr53c80_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: ncr5380n_device(mconfig, NCR53C80, tag, owner, clock)
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{
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}
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void ncr5380n_device::device_start()
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{
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save_item(NAME(m_tcommand));
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@ -280,12 +294,12 @@ void ncr5380n_device::delay(int cycles)
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if(!clock_conv)
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return;
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cycles *= clock_conv;
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tm->adjust(clocks_to_attotime(cycles));
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tm->adjust(attotime::from_ticks(cycles, m_fake_clock));
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}
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void ncr5380n_device::delay_cycles(int cycles)
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{
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tm->adjust(clocks_to_attotime(cycles));
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tm->adjust(attotime::from_ticks(cycles, m_fake_clock));
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}
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uint8_t ncr5380n_device::scsidata_r()
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@ -486,14 +500,17 @@ void ncr5380n_device::dma_w(uint8_t val)
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uint8_t ncr5380n_device::dma_r()
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{
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// drop DRQ
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drq_clear();
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// set up to receive our next byte if still in DMA mode
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scsi_bus->ctrl_w(scsi_refid, 0, S_ACK);
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if (m_mode & MODE_DMA)
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if (!machine().side_effects_disabled())
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{
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recv_byte();
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// drop DRQ
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drq_clear();
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// set up to receive our next byte if still in DMA mode
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scsi_bus->ctrl_w(scsi_refid, 0, S_ACK);
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if (m_mode & MODE_DMA)
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{
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recv_byte();
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}
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}
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return m_dmalatch;
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}
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@ -32,6 +32,8 @@ public:
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void dma_w(uint8_t val);
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protected:
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ncr5380n_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
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@ -165,6 +167,8 @@ private:
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enum { DMA_NONE, DMA_IN, DMA_OUT };
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uint32_t m_fake_clock;
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emu_timer *tm;
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uint8_t status, istatus, m_mode, m_outdata, m_busstatus, m_dmalatch;
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@ -219,6 +223,13 @@ private:
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devcb_write_line m_drq_handler;
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};
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class ncr53c80_device : public ncr5380n_device
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{
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public:
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ncr53c80_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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};
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DECLARE_DEVICE_TYPE(NCR5380N, ncr5380n_device)
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DECLARE_DEVICE_TYPE(NCR53C80, ncr53c80_device)
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#endif // MAME_MACHINE_NCR5380N_H
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@ -123,6 +123,7 @@ Address bus A0-A11 is Y0-Y11
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#include "bus/a2bus/a2cffa.h"
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#include "bus/a2bus/a2memexp.h"
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#include "bus/a2bus/a2scsi.h"
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#include "bus/a2bus/a2hsscsi.h"
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#include "bus/a2bus/a2thunderclock.h"
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#include "bus/a2bus/a2softcard.h"
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#include "bus/a2bus/a2videoterm.h"
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@ -3959,6 +3960,7 @@ static void apple2_cards(device_slot_interface &device)
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device.option_add("focusdrive", A2BUS_FOCUSDRIVE); /* Focus Drive IDE card */
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device.option_add("echoiiplus", A2BUS_ECHOPLUS); /* Street Electronics Echo Plus (Echo II + Mockingboard clone) */
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device.option_add("scsi", A2BUS_SCSI); /* Apple II SCSI Card */
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device.option_add("hsscsi", A2BUS_HSSCSI); /* Apple II High-Speed SCSI Card */
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device.option_add("applicard", A2BUS_APPLICARD); /* PCPI Applicard */
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device.option_add("aesms", A2BUS_AESMS); /* Applied Engineering Super Music Synthesizer */
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device.option_add("ultraterm", A2BUS_ULTRATERM); /* Videx UltraTerm (original) */
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@ -63,6 +63,7 @@
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#include "bus/a2bus/a2cffa.h"
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#include "bus/a2bus/a2memexp.h"
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#include "bus/a2bus/a2scsi.h"
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#include "bus/a2bus/a2hsscsi.h"
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#include "bus/a2bus/a2thunderclock.h"
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#include "bus/a2bus/a2softcard.h"
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#include "bus/a2bus/a2videoterm.h"
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@ -4526,6 +4527,7 @@ static void apple2_cards(device_slot_interface &device)
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device.option_add("focusdrive", A2BUS_FOCUSDRIVE); /* Focus Drive IDE card */
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device.option_add("echoiiplus", A2BUS_ECHOPLUS); /* Street Electronics Echo Plus (Echo II + Mockingboard clone) */
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device.option_add("scsi", A2BUS_SCSI); /* Apple II SCSI Card */
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device.option_add("hsscsi", A2BUS_HSSCSI); /* Apple II High-Speed SCSI Card */
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device.option_add("applicard", A2BUS_APPLICARD); /* PCPI Applicard */
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device.option_add("aesms", A2BUS_AESMS); /* Applied Engineering Super Music Synthesizer */
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device.option_add("ultraterm", A2BUS_ULTRATERM); /* Videx UltraTerm (original) */
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@ -116,7 +116,6 @@ void lb186_state::ncr5380(device_t *device)
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{
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devcb_base *devcb;
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(void)devcb;
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downcast<ncr5380n_device &>(*device).set_clock(10000000);
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downcast<ncr5380n_device &>(*device).irq_handler().set(":maincpu", FUNC(i80186_cpu_device::int1_w));
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downcast<ncr5380n_device &>(*device).drq_handler().set(":maincpu", FUNC(i80186_cpu_device::drq0_w));
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}
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@ -319,7 +319,6 @@ void sun3_state::ncr5380(device_t *device)
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{
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devcb_base *devcb;
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(void)devcb;
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downcast<ncr5380n_device &>(*device).set_clock(10000000);
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// downcast<ncr5380n_device &>(*device).drq_handler().set(FUNC(sun3_state::drq_w));
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}
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