mirror of
https://github.com/holub/mame
synced 2025-10-04 16:34:53 +03:00
rewrote most of tms7000, fixing a few issues and adding preliminary support for TMS70x1/2 family
This commit is contained in:
Michaël Banaan Ananas
parent
03b8149a04
commit
2bc1ef5ea7
1
.gitattributes
vendored
1
.gitattributes
vendored
@ -2251,7 +2251,6 @@ src/emu/cpu/tms7000/7000dasm.c svneol=native#text/plain
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src/emu/cpu/tms7000/tms7000.c svneol=native#text/plain
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src/emu/cpu/tms7000/tms7000.h svneol=native#text/plain
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src/emu/cpu/tms7000/tms70op.inc svneol=native#text/plain
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src/emu/cpu/tms7000/tms70tb.inc svneol=native#text/plain
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src/emu/cpu/tms9900/9900dasm.c svneol=native#text/plain
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src/emu/cpu/tms9900/99xxcore.h svneol=native#text/plain
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src/emu/cpu/tms9900/ti990_10.c svneol=native#text/plain
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@ -2011,8 +2011,7 @@ endif
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$(CPUOBJ)/tms7000/tms7000.o: $(CPUSRC)/tms7000/tms7000.h \
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$(CPUSRC)/tms7000/tms7000.c \
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$(CPUSRC)/tms7000/tms70op.inc \
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$(CPUSRC)/tms7000/tms70tb.inc
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$(CPUSRC)/tms7000/tms70op.inc
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$(CPUOBJ)/tms7000/7000dasm.o: $(CPUSRC)/tms7000/tms7000.h \
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$(CPUSRC)/tms7000/7000dasm.c
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@ -395,32 +395,27 @@ CPU_DISASSEMBLE( tms7000 )
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case UI8:
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a = (UINT8)opram[pos++];
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buffer += sprintf(buffer, of[j].opstr[k], (unsigned int)a);
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//size += 1;
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break;
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case I8:
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b = (INT8)opram[pos++];
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buffer += sprintf (buffer, of[j].opstr[k], (INT8)b);
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//size += 1;
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break;
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case UI16:
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c = (UINT16)opram[pos++];
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c <<= 8;
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c += opram[pos++];
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buffer += sprintf (buffer, of[j].opstr[k], (unsigned int)c);
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//size += 2;
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break;
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case I16:
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d = (INT16)opram[pos++];
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d <<= 8;
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d += opram[pos++];
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buffer += sprintf (buffer, of[j].opstr[k], (signed int)d);
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//size += 2;
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break;
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case PCREL:
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b = (INT8)opram[pos++];
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sprintf(tmpbuf, "$%04X", pc+2+k+b);
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buffer += sprintf (buffer, of[j].opstr[k], tmpbuf);
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//size += 1;
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break;
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case PCABS:
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c = (UINT16)opram[pos++];
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@ -428,11 +423,10 @@ CPU_DISASSEMBLE( tms7000 )
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c += opram[pos++];
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sprintf(tmpbuf, "$%04X", c);
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buffer += sprintf (buffer, of[j].opstr[k], tmpbuf);
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//size += 2;
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break;
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case TRAP:
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vector = 0xffff - ((0xff - opcode) * 2);
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c = vector;//(UINT16)((memory_decrypted_read_byte( vector-1 ) << 8) + memory_decrypted_read_byte( vector ));
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c = vector;
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break;
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}
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}
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File diff suppressed because it is too large
Load Diff
@ -25,38 +25,51 @@
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#include "emu.h"
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enum { TMS7000_PC=1, TMS7000_SP, TMS7000_ST, TMS7000_IDLE, TMS7000_T1_CL, TMS7000_T1_PS, TMS7000_T1_DEC };
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enum { TMS7000_PC=1, TMS7000_SP, TMS7000_ST };
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enum
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{
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TMS7000_IRQ1_LINE = 0, /* INT1 */
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TMS7000_IRQ2_LINE, /* INT2 */
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TMS7000_IRQ3_LINE, /* INT3 */
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TMS7000_IRQNONE = 255
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/* note: INT2,4,5 are generated internally */
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TMS7000_INT1_LINE = 0,
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TMS7000_INT3_LINE
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};
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enum
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{
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TMS7000_PORTA = 0, /* read-only */
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TMS7000_PORTB, /* write-only */
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TMS7000_PORTA = 0, /* read-only on 70x0 */
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TMS7000_PORTB, /* write-only */
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TMS7000_PORTC,
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TMS7000_PORTD
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};
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// chip info flags
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#define TMS7000_CHIP_IS_CMOS 0x01
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#define TMS7000_CHIP_FAMILY_70X0 0x00
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#define TMS7000_CHIP_FAMILY_70X2 0x02
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#define TMS7000_CHIP_FAMILY_70CX2 0x04
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#define TMS7000_CHIP_FAMILY_MASK 0x06
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class tms7000_device : public cpu_device
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{
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public:
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typedef void ( tms7000_device::*opcode_func ) ();
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static const opcode_func s_opfn[0x100];
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static const opcode_func s_opfn_exl[0x100];
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// construction/destruction
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tms7000_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
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tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal, const opcode_func *opcode, const char *shortname, const char *source);
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tms7000_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, address_map_constructor internal, UINT32 info_flags, const char *shortname, const char *source);
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DECLARE_WRITE8_MEMBER( tms70x0_pf_w );
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DECLARE_READ8_MEMBER( tms70x0_pf_r );
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DECLARE_READ8_MEMBER(tms7000_unmapped_rf_r) { logerror("%s: unmapped_rf_r @ $%04x\n", tag(), offset + 0x80); return 0; };
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DECLARE_WRITE8_MEMBER(tms7000_unmapped_rf_w) { logerror("%s: unmapped_rf_w @ $%04x = $%02x\n", tag(), offset + 0x80, data); };
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DECLARE_READ8_MEMBER(tms7000_pf_r);
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DECLARE_WRITE8_MEMBER(tms7000_pf_w);
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DECLARE_READ8_MEMBER(tms7002_pf_r) { return tms7000_pf_r(space, offset + 0x10); }
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DECLARE_WRITE8_MEMBER(tms7002_pf_w) { tms7000_pf_w(space, offset + 0x10, data); }
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bool chip_is_cmos() { return (m_info_flags & TMS7000_CHIP_IS_CMOS) ? true : false; }
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UINT32 chip_get_family() { return m_info_flags & TMS7000_CHIP_FAMILY_MASK; }
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bool chip_is_family_70x0() { return chip_get_family() == TMS7000_CHIP_FAMILY_70X0; }
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bool chip_is_family_70x2() { return chip_get_family() == TMS7000_CHIP_FAMILY_70X2; }
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bool chip_is_family_70cx2() { return chip_get_family() == TMS7000_CHIP_FAMILY_70CX2; }
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protected:
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// device-level overrides
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@ -64,9 +77,11 @@ protected:
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virtual void device_reset();
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// device_execute_interface overrides
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virtual UINT32 execute_min_cycles() const { return 1; }
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virtual UINT32 execute_max_cycles() const { return 48; }
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virtual UINT32 execute_input_lines() const { return 3; }
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virtual UINT64 execute_clocks_to_cycles(UINT64 clocks) const { return (clocks + 2 - 1) / 2; } // internal /2 divider
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virtual UINT64 execute_cycles_to_clocks(UINT64 cycles) const { return (cycles * 2); } // internal /2 divider
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virtual UINT32 execute_min_cycles() const { return 5; }
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virtual UINT32 execute_max_cycles() const { return 49; }
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virtual UINT32 execute_input_lines() const { return 2; }
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virtual void execute_run();
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virtual void execute_set_input(int inputnum, int state);
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@ -81,187 +96,94 @@ protected:
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virtual UINT32 disasm_max_opcode_bytes() const { return 4; }
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virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
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private:
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virtual void execute_one(UINT8 op);
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address_space_config m_program_config;
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address_space_config m_io_config;
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const opcode_func *m_opcode;
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inline UINT8 bcd_add( UINT8 a, UINT8 b, UINT8 c );
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inline UINT8 bcd_sub( UINT8 a, UINT8 b, UINT8 c );
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PAIR m_pc; /* Program counter */
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UINT8 m_sp; /* Stack Pointer */
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UINT8 m_sr; /* Status Register */
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UINT8 m_irq_state[3]; /* State of the three IRQs */
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UINT8 m_pf[0x100]; /* Perpherial file */
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int m_icount;
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int m_div_by_16_trigger;
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int m_cycles_per_INT2;
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UINT8 m_t1_capture_latch; /* Timer 1 capture latch */
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INT8 m_t1_prescaler; /* Timer 1 prescaler (5 bits) */
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INT16 m_t1_decrementer; /* Timer 1 decrementer (8 bits) */
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UINT8 m_idle_state; /* Set after the execution of an idle instruction */
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UINT32 m_info_flags;
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address_space *m_program;
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direct_read_data *m_direct;
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address_space *m_io;
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int m_icount;
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inline UINT16 RM16( UINT32 mAddr );
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inline UINT16 RRF16( UINT32 mAddr );
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inline void WRF16( UINT32 mAddr, PAIR p );
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bool m_irq_state[2];
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bool m_idle_state;
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bool m_idle_halt;
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UINT16 m_pc;
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UINT8 m_sp;
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UINT8 m_sr;
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UINT8 m_op;
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void tms7000_check_IRQ_lines();
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void tms7000_do_interrupt( UINT16 address, UINT8 line );
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void tms7000_service_timer1();
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UINT8 m_io_control[3];
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void illegal();
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void adc_b2a();
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void adc_r2a();
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void adc_r2b();
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void adc_r2r();
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void adc_i2a();
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void adc_i2b();
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void adc_i2r();
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void add_b2a();
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void add_r2a();
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void add_r2b();
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void add_r2r();
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void add_i2a();
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void add_i2b();
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void add_i2r();
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void and_b2a();
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void and_r2a();
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void and_r2b();
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void and_r2r();
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void and_i2a();
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void and_i2b();
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void and_i2r();
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void andp_a2p();
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void andp_b2p();
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void movp_i2p();
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void andp_i2p();
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emu_timer *m_timer_handle[2];
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UINT8 m_timer_data[2];
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UINT8 m_timer_control[2];
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int m_timer_decrementer[2];
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int m_timer_prescaler[2];
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UINT16 m_timer_capture_latch[2];
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UINT8 m_port_latch[4];
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UINT8 m_port_ddr[4];
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void flag_ext_interrupt(int irqline);
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void check_interrupts();
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void do_interrupt(int irqline);
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TIMER_CALLBACK_MEMBER(simple_timer_cb);
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void timer_run(int tmr);
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void timer_reload(int tmr);
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void timer_tick_pre(int tmr);
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void timer_tick_low(int tmr);
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// internal read/write
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inline UINT8 read_r8(UINT8 address) { return m_program->read_byte(address); }
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inline void write_r8(UINT8 address, UINT8 data) { m_program->write_byte(address, data); }
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inline UINT16 read_r16(UINT8 address) { return m_program->read_byte((address - 1) & 0xff) << 8 | m_program->read_byte(address); }
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inline void write_r16(UINT8 address, UINT16 data) { m_program->write_byte((address - 1) & 0xff, data >> 8 & 0xff); m_program->write_byte(address, data & 0xff); }
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inline UINT8 read_p(UINT8 address) { return m_program->read_byte(0x100 + address); }
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inline void write_p(UINT8 address, UINT8 data) { m_program->write_byte(0x100 + address, data); }
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inline UINT8 read_mem8(UINT16 address) { return m_program->read_byte(address); }
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inline void write_mem8(UINT16 address, UINT8 data) { m_program->write_byte(address, data); }
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inline UINT16 read_mem16(UINT16 address) { return m_program->read_byte(address) << 8 | m_program->read_byte((address + 1) & 0xffff); }
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inline void write_mem16(UINT16 address, UINT16 data) { m_program->write_byte(address, data >> 8 & 0xff); m_program->write_byte((address + 1) & 0xffff, data & 0xff); }
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inline UINT8 imm8() { return m_direct->read_raw_byte(m_pc++); }
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inline UINT16 imm16() { UINT16 ret = m_direct->read_raw_byte(m_pc++) << 8; return ret | m_direct->read_raw_byte(m_pc++); }
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inline UINT8 pull8() { return m_program->read_byte(m_sp--); }
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inline void push8(UINT8 data) { m_program->write_byte(++m_sp, data); }
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inline UINT16 pull16() { UINT16 ret = m_program->read_byte(m_sp--); return ret | m_program->read_byte(m_sp--) << 8; }
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inline void push16(UINT16 data) { m_program->write_byte(++m_sp, data >> 8 & 0xff); m_program->write_byte(++m_sp, data & 0xff); }
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// opcode handlers
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void br_dir();
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void br_ind();
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void br_inx();
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void btjo_b2a();
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void btjo_r2a();
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void btjo_r2b();
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void btjo_r2r();
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void btjo_i2a();
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void btjo_i2b();
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void btjo_i2r();
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void btjop_ap();
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void btjop_bp();
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void btjop_ip();
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void btjz_b2a();
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void btjz_r2a();
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void btjz_r2b();
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void btjz_r2r();
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void btjz_i2a();
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void btjz_i2b();
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void btjz_i2r();
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void btjzp_ap();
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void btjzp_bp();
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void btjzp_ip();
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void br_ind();
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void call_dir();
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void call_ind();
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void call_inx();
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void clr_a();
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void clr_b();
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void clr_r();
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void clrc();
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void cmp_ba();
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void cmp_ra();
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void cmp_rb();
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void cmp_rr();
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void cmp_ia();
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void cmp_ib();
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void cmp_ir();
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void call_ind();
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void cmpa_dir();
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void cmpa_ind();
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void cmpa_inx();
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void dac_b2a();
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void dac_r2a();
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void dac_r2b();
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void dac_r2r();
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void dac_i2a();
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void dac_i2b();
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void dac_i2r();
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void dec_a();
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void dec_b();
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void dec_r();
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void cmpa_ind();
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void decd_a();
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void decd_b();
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void decd_r();
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void dint();
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void djnz_a();
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void djnz_b();
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void djnz_r();
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void dsb_b2a();
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void dsb_r2a();
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void dsb_r2b();
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void dsb_r2r();
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void dsb_i2a();
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void dsb_i2b();
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void dsb_i2r();
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void eint();
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void idle();
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void inc_a();
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void inc_b();
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void inc_r();
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void inv_a();
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void inv_b();
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void inv_r();
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void jc();
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void jeq();
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void jl();
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void jmp();
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void j_jn();
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void jne();
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void jp();
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void jpz();
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void lda_dir();
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void lda_ind();
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void lda_inx();
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void lda_ind();
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void ldsp();
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void mov_a2b();
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void mov_b2a();
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void mov_a2r();
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void mov_b2r();
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void mov_r2a();
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void mov_r2b();
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void mov_r2r();
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void mov_i2a();
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void mov_i2b();
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void mov_i2r();
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void movd_imm();
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void movd_r();
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void movd_dir();
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void movd_inx();
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void movp_a2p();
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void movp_b2p();
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void movp_r2p();
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void movp_p2a();
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void movp_p2b();
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void mpy_ba();
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void mpy_ra();
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void mpy_rb();
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void mpy_rr();
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void mpy_ia();
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void mpy_ib();
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void mpy_ir();
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void movd_ind();
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void nop();
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void or_b2a();
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void or_r2a();
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void or_r2b();
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void or_r2r();
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void or_i2a();
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void or_i2b();
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void or_i2r();
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void orp_a2p();
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void orp_b2p();
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void orp_i2p();
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void pop_a();
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void pop_b();
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void pop_r();
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@ -272,79 +194,65 @@ private:
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void push_st();
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void reti();
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void rets();
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void rl_a();
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void rl_b();
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void rl_r();
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void rlc_a();
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void rlc_b();
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void rlc_r();
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void rr_a();
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void rr_b();
|
||||
void rr_r();
|
||||
void rrc_a();
|
||||
void rrc_b();
|
||||
void rrc_r();
|
||||
void sbb_ba();
|
||||
void sbb_ra();
|
||||
void sbb_rb();
|
||||
void sbb_rr();
|
||||
void sbb_ia();
|
||||
void sbb_ib();
|
||||
void sbb_ir();
|
||||
void setc();
|
||||
void sta_dir();
|
||||
void sta_ind();
|
||||
void sta_inx();
|
||||
void sta_ind();
|
||||
void stsp();
|
||||
void sub_ba();
|
||||
void sub_ra();
|
||||
void sub_rb();
|
||||
void sub_rr();
|
||||
void sub_ia();
|
||||
void sub_ib();
|
||||
void sub_ir();
|
||||
void trap_0();
|
||||
void trap_1();
|
||||
void trap_2();
|
||||
void trap_3();
|
||||
void trap_4();
|
||||
void trap_5();
|
||||
void trap_6();
|
||||
void trap_7();
|
||||
void trap_8();
|
||||
void trap_9();
|
||||
void trap_10();
|
||||
void trap_11();
|
||||
void trap_12();
|
||||
void trap_13();
|
||||
void trap_14();
|
||||
void trap_15();
|
||||
void trap_16();
|
||||
void trap_17();
|
||||
void trap_18();
|
||||
void trap_19();
|
||||
void trap_20();
|
||||
void trap_21();
|
||||
void trap_22();
|
||||
void trap_23();
|
||||
void swap_a();
|
||||
void swap_b();
|
||||
void swap_r();
|
||||
void swap_r_exl();
|
||||
void tstb();
|
||||
void xchb_a();
|
||||
void xchb_b();
|
||||
void xchb_r();
|
||||
void xor_b2a();
|
||||
void xor_r2a();
|
||||
void xor_r2b();
|
||||
void xor_r2r();
|
||||
void xor_i2a();
|
||||
void xor_i2b();
|
||||
void xor_i2r();
|
||||
void xorp_a2p();
|
||||
void xorp_b2p();
|
||||
void xorp_i2p();
|
||||
void trap(UINT8 address);
|
||||
void illegal(UINT8 op);
|
||||
|
||||
typedef int (tms7000_device::*op_func)(UINT8, UINT8);
|
||||
int op_clr(UINT8 param1, UINT8 param2);
|
||||
int op_dec(UINT8 param1, UINT8 param2);
|
||||
int op_inc(UINT8 param1, UINT8 param2);
|
||||
int op_inv(UINT8 param1, UINT8 param2);
|
||||
int op_rl(UINT8 param1, UINT8 param2);
|
||||
int op_rlc(UINT8 param1, UINT8 param2);
|
||||
int op_rr(UINT8 param1, UINT8 param2);
|
||||
int op_rrc(UINT8 param1, UINT8 param2);
|
||||
int op_swap(UINT8 param1, UINT8 param2);
|
||||
int op_xchb(UINT8 param1, UINT8 param2);
|
||||
|
||||
int op_adc(UINT8 param1, UINT8 param2);
|
||||
int op_add(UINT8 param1, UINT8 param2);
|
||||
int op_and(UINT8 param1, UINT8 param2);
|
||||
int op_cmp(UINT8 param1, UINT8 param2);
|
||||
int op_dac(UINT8 param1, UINT8 param2);
|
||||
int op_dsb(UINT8 param1, UINT8 param2);
|
||||
int op_mpy(UINT8 param1, UINT8 param2);
|
||||
int op_mov(UINT8 param1, UINT8 param2);
|
||||
int op_or(UINT8 param1, UINT8 param2);
|
||||
int op_sbb(UINT8 param1, UINT8 param2);
|
||||
int op_sub(UINT8 param1, UINT8 param2);
|
||||
int op_xor(UINT8 param1, UINT8 param2);
|
||||
|
||||
inline void shortbranch(bool check);
|
||||
inline void jmp(bool check);
|
||||
int op_djnz(UINT8 param1, UINT8 param2);
|
||||
int op_btjo(UINT8 param1, UINT8 param2);
|
||||
int op_btjz(UINT8 param1, UINT8 param2);
|
||||
|
||||
void am_a(op_func op);
|
||||
void am_b(op_func op);
|
||||
void am_r(op_func op);
|
||||
void am_a2a(op_func op);
|
||||
void am_a2b(op_func op);
|
||||
void am_a2r(op_func op);
|
||||
void am_a2p(op_func op);
|
||||
void am_b2a(op_func op);
|
||||
void am_b2b(op_func op);
|
||||
void am_b2r(op_func op);
|
||||
void am_b2p(op_func op);
|
||||
void am_r2a(op_func op);
|
||||
void am_r2b(op_func op);
|
||||
void am_r2r(op_func op);
|
||||
void am_i2a(op_func op);
|
||||
void am_i2b(op_func op);
|
||||
void am_i2r(op_func op);
|
||||
void am_i2p(op_func op);
|
||||
void am_p2a(op_func op);
|
||||
void am_p2b(op_func op);
|
||||
};
|
||||
|
||||
|
||||
@ -359,6 +267,11 @@ class tms7020_exl_device : public tms7000_device
|
||||
{
|
||||
public:
|
||||
tms7020_exl_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
protected:
|
||||
virtual void execute_one(UINT8 op);
|
||||
|
||||
private:
|
||||
void lvdp();
|
||||
};
|
||||
|
||||
|
||||
@ -390,6 +303,34 @@ public:
|
||||
};
|
||||
|
||||
|
||||
class tms7001_device : public tms7000_device
|
||||
{
|
||||
public:
|
||||
tms7001_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
};
|
||||
|
||||
|
||||
class tms7041_device : public tms7000_device
|
||||
{
|
||||
public:
|
||||
tms7041_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
};
|
||||
|
||||
|
||||
class tms7002_device : public tms7000_device
|
||||
{
|
||||
public:
|
||||
tms7002_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
};
|
||||
|
||||
|
||||
class tms7042_device : public tms7000_device
|
||||
{
|
||||
public:
|
||||
tms7042_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
|
||||
};
|
||||
|
||||
|
||||
extern const device_type TMS7000;
|
||||
extern const device_type TMS7020;
|
||||
extern const device_type TMS7020_EXL;
|
||||
@ -397,6 +338,9 @@ extern const device_type TMS7040;
|
||||
extern const device_type TMS70C00;
|
||||
extern const device_type TMS70C20;
|
||||
extern const device_type TMS70C40;
|
||||
|
||||
extern const device_type TMS7001;
|
||||
extern const device_type TMS7041;
|
||||
extern const device_type TMS7002;
|
||||
extern const device_type TMS7042;
|
||||
|
||||
#endif /* __TMS7000_H__ */
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,124 +0,0 @@
|
||||
/*****************************************************************************
|
||||
*
|
||||
* tms70tb.inc (function table)
|
||||
* Portable TMS7000 emulator (Texas Instruments 7000)
|
||||
*
|
||||
* Copyright tim lindner, all rights reserved.
|
||||
*
|
||||
* - This source code is released as freeware for non-commercial purposes.
|
||||
* - You are free to use and redistribute this code in modified or
|
||||
* unmodified form, provided you list me in the credits.
|
||||
* - If you modify this source code, you must add a notice to each modified
|
||||
* source file that it has been changed. If you're a nice person, you
|
||||
* will clearly mark each change too. :)
|
||||
* - If you wish to use this for commercial purposes, please contact me at
|
||||
* tlindner@macmess.org
|
||||
* - This entire notice must remain in the source code.
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
const tms7000_device::opcode_func tms7000_device::s_opfn[0x100] = {
|
||||
/* 0xX0, 0xX1, 0xX2, 0xX3, 0xX4, 0xX5, 0xX6, 0xX7,
|
||||
0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
|
||||
|
||||
/* 0x0X */ &tms7000_device::nop, &tms7000_device::idle, &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::eint, &tms7000_device::dint, &tms7000_device::setc,
|
||||
&tms7000_device::pop_st, &tms7000_device::stsp, &tms7000_device::rets, &tms7000_device::reti, &tms7000_device::illegal, &tms7000_device::ldsp, &tms7000_device::push_st, &tms7000_device::illegal,
|
||||
|
||||
/* 0x1X */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::mov_r2a, &tms7000_device::and_r2a, &tms7000_device::or_r2a, &tms7000_device::xor_r2a, &tms7000_device::btjo_r2a,&tms7000_device::btjz_r2a,
|
||||
&tms7000_device::add_r2a, &tms7000_device::adc_r2a, &tms7000_device::sub_ra, &tms7000_device::sbb_ra, &tms7000_device::mpy_ra, &tms7000_device::cmp_ra, &tms7000_device::dac_r2a, &tms7000_device::dsb_r2a,
|
||||
|
||||
/* 0x2X */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::mov_i2a, &tms7000_device::and_i2a, &tms7000_device::or_i2a, &tms7000_device::xor_i2a, &tms7000_device::btjo_i2a,&tms7000_device::btjz_i2a,
|
||||
&tms7000_device::add_i2a, &tms7000_device::adc_i2a, &tms7000_device::sub_ia, &tms7000_device::sbb_ia, &tms7000_device::mpy_ia, &tms7000_device::cmp_ia, &tms7000_device::dac_i2a, &tms7000_device::dsb_i2a,
|
||||
|
||||
/* 0x3X */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::mov_r2b, &tms7000_device::and_r2b, &tms7000_device::or_r2b, &tms7000_device::xor_r2b, &tms7000_device::btjo_r2b,&tms7000_device::btjz_r2b,
|
||||
&tms7000_device::add_r2b, &tms7000_device::adc_r2b, &tms7000_device::sub_rb, &tms7000_device::sbb_rb, &tms7000_device::mpy_rb, &tms7000_device::cmp_rb, &tms7000_device::dac_r2b, &tms7000_device::dsb_r2b,
|
||||
|
||||
/* 0x4X */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::mov_r2r, &tms7000_device::and_r2r, &tms7000_device::or_r2r, &tms7000_device::xor_r2r, &tms7000_device::btjo_r2r,&tms7000_device::btjz_r2r,
|
||||
&tms7000_device::add_r2r, &tms7000_device::adc_r2r, &tms7000_device::sub_rr, &tms7000_device::sbb_rr, &tms7000_device::mpy_rr, &tms7000_device::cmp_rr, &tms7000_device::dac_r2r, &tms7000_device::dsb_r2r,
|
||||
|
||||
/* 0x5X */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::mov_i2b, &tms7000_device::and_i2b, &tms7000_device::or_i2b, &tms7000_device::xor_i2b, &tms7000_device::btjo_i2b,&tms7000_device::btjz_i2b,
|
||||
&tms7000_device::add_i2b, &tms7000_device::adc_i2b, &tms7000_device::sub_ib, &tms7000_device::sbb_ib, &tms7000_device::mpy_ib, &tms7000_device::cmp_ib, &tms7000_device::dac_i2b, &tms7000_device::dsb_i2b,
|
||||
|
||||
/* 0x6X */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::mov_b2a, &tms7000_device::and_b2a, &tms7000_device::or_b2a, &tms7000_device::xor_b2a, &tms7000_device::btjo_b2a,&tms7000_device::btjz_b2a,
|
||||
&tms7000_device::add_b2a, &tms7000_device::adc_b2a, &tms7000_device::sub_ba, &tms7000_device::sbb_ba, &tms7000_device::mpy_ba, &tms7000_device::cmp_ba, &tms7000_device::dac_b2a, &tms7000_device::dsb_b2a,
|
||||
|
||||
/* 0x7X */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::mov_i2r, &tms7000_device::and_i2r, &tms7000_device::or_i2r, &tms7000_device::xor_i2r, &tms7000_device::btjo_i2r,&tms7000_device::btjz_i2r,
|
||||
&tms7000_device::add_i2r, &tms7000_device::adc_i2r, &tms7000_device::sub_ir, &tms7000_device::sbb_ir, &tms7000_device::mpy_ir, &tms7000_device::cmp_ir, &tms7000_device::dac_i2r, &tms7000_device::dsb_i2r,
|
||||
|
||||
/* 0x8X */ &tms7000_device::movp_p2a,&tms7000_device::illegal, &tms7000_device::movp_a2p,&tms7000_device::andp_a2p,&tms7000_device::orp_a2p, &tms7000_device::xorp_a2p,&tms7000_device::btjop_ap,&tms7000_device::btjzp_ap,
|
||||
&tms7000_device::movd_imm,&tms7000_device::illegal, &tms7000_device::lda_dir, &tms7000_device::sta_dir, &tms7000_device::br_dir, &tms7000_device::cmpa_dir,&tms7000_device::call_dir,&tms7000_device::illegal,
|
||||
|
||||
/* 0x9X */ &tms7000_device::illegal, &tms7000_device::movp_p2b,&tms7000_device::movp_b2p,&tms7000_device::andp_b2p,&tms7000_device::orp_b2p, &tms7000_device::xorp_b2p,&tms7000_device::btjop_bp,&tms7000_device::btjzp_bp,
|
||||
&tms7000_device::movd_r, &tms7000_device::illegal, &tms7000_device::lda_ind, &tms7000_device::sta_ind, &tms7000_device::br_ind, &tms7000_device::cmpa_ind,&tms7000_device::call_ind,&tms7000_device::illegal,
|
||||
|
||||
/* 0xAX */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::movp_i2p,&tms7000_device::andp_i2p,&tms7000_device::orp_i2p, &tms7000_device::xorp_i2p,&tms7000_device::btjop_ip,&tms7000_device::btjzp_ip,
|
||||
&tms7000_device::movd_inx,&tms7000_device::illegal, &tms7000_device::lda_inx, &tms7000_device::sta_inx, &tms7000_device::br_inx, &tms7000_device::cmpa_inx,&tms7000_device::call_inx,&tms7000_device::illegal,
|
||||
|
||||
/* 0xBX */ &tms7000_device::clrc, &tms7000_device::illegal, &tms7000_device::dec_a, &tms7000_device::inc_a, &tms7000_device::inv_a, &tms7000_device::clr_a, &tms7000_device::xchb_a, &tms7000_device::swap_a,
|
||||
&tms7000_device::push_a, &tms7000_device::pop_a, &tms7000_device::djnz_a, &tms7000_device::decd_a, &tms7000_device::rr_a, &tms7000_device::rrc_a, &tms7000_device::rl_a, &tms7000_device::rlc_a,
|
||||
|
||||
/* 0xCX */ &tms7000_device::mov_a2b, &tms7000_device::tstb, &tms7000_device::dec_b, &tms7000_device::inc_b, &tms7000_device::inv_b, &tms7000_device::clr_b, &tms7000_device::xchb_b, &tms7000_device::swap_b,
|
||||
&tms7000_device::push_b, &tms7000_device::pop_b, &tms7000_device::djnz_b, &tms7000_device::decd_b, &tms7000_device::rr_b, &tms7000_device::rrc_b, &tms7000_device::rl_b, &tms7000_device::rlc_b,
|
||||
|
||||
/* 0xDX */ &tms7000_device::mov_a2r, &tms7000_device::mov_b2r, &tms7000_device::dec_r, &tms7000_device::inc_r, &tms7000_device::inv_r, &tms7000_device::clr_r, &tms7000_device::xchb_r, &tms7000_device::swap_r,
|
||||
&tms7000_device::push_r, &tms7000_device::pop_r, &tms7000_device::djnz_r, &tms7000_device::decd_r, &tms7000_device::rr_r, &tms7000_device::rrc_r, &tms7000_device::rl_r, &tms7000_device::rlc_r,
|
||||
|
||||
/* 0xEX */ &tms7000_device::jmp, &tms7000_device::j_jn, &tms7000_device::jeq, &tms7000_device::jc, &tms7000_device::jp, &tms7000_device::jpz, &tms7000_device::jne, &tms7000_device::jl,
|
||||
&tms7000_device::trap_23, &tms7000_device::trap_22, &tms7000_device::trap_21, &tms7000_device::trap_20, &tms7000_device::trap_19, &tms7000_device::trap_18, &tms7000_device::trap_17, &tms7000_device::trap_16,
|
||||
|
||||
/* 0xFX */ &tms7000_device::trap_15, &tms7000_device::trap_14, &tms7000_device::trap_13, &tms7000_device::trap_12, &tms7000_device::trap_11, &tms7000_device::trap_10, &tms7000_device::trap_9, &tms7000_device::trap_8,
|
||||
&tms7000_device::trap_7, &tms7000_device::trap_6, &tms7000_device::trap_5, &tms7000_device::trap_4, &tms7000_device::trap_3, &tms7000_device::trap_2, &tms7000_device::trap_1, &tms7000_device::trap_0
|
||||
};
|
||||
|
||||
const tms7000_device::opcode_func tms7000_device::s_opfn_exl[0x100] = {
|
||||
/* 0xX0, 0xX1, 0xX2, 0xX3, 0xX4, 0xX5, 0xX6, 0xX7,
|
||||
0xX8, 0xX9, 0xXA, 0xXB, 0xXC, 0xXD, 0xXE, 0xXF */
|
||||
|
||||
/* 0x0X */ &tms7000_device::nop, &tms7000_device::idle, &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::eint, &tms7000_device::dint, &tms7000_device::setc,
|
||||
&tms7000_device::pop_st, &tms7000_device::stsp, &tms7000_device::rets, &tms7000_device::reti, &tms7000_device::illegal, &tms7000_device::ldsp, &tms7000_device::push_st, &tms7000_device::illegal,
|
||||
|
||||
/* 0x1X */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::mov_r2a, &tms7000_device::and_r2a, &tms7000_device::or_r2a, &tms7000_device::xor_r2a, &tms7000_device::btjo_r2a,&tms7000_device::btjz_r2a,
|
||||
&tms7000_device::add_r2a, &tms7000_device::adc_r2a, &tms7000_device::sub_ra, &tms7000_device::sbb_ra, &tms7000_device::mpy_ra, &tms7000_device::cmp_ra, &tms7000_device::dac_r2a, &tms7000_device::dsb_r2a,
|
||||
|
||||
/* 0x2X */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::mov_i2a, &tms7000_device::and_i2a, &tms7000_device::or_i2a, &tms7000_device::xor_i2a, &tms7000_device::btjo_i2a,&tms7000_device::btjz_i2a,
|
||||
&tms7000_device::add_i2a, &tms7000_device::adc_i2a, &tms7000_device::sub_ia, &tms7000_device::sbb_ia, &tms7000_device::mpy_ia, &tms7000_device::cmp_ia, &tms7000_device::dac_i2a, &tms7000_device::dsb_i2a,
|
||||
|
||||
/* 0x3X */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::mov_r2b, &tms7000_device::and_r2b, &tms7000_device::or_r2b, &tms7000_device::xor_r2b, &tms7000_device::btjo_r2b,&tms7000_device::btjz_r2b,
|
||||
&tms7000_device::add_r2b, &tms7000_device::adc_r2b, &tms7000_device::sub_rb, &tms7000_device::sbb_rb, &tms7000_device::mpy_rb, &tms7000_device::cmp_rb, &tms7000_device::dac_r2b, &tms7000_device::dsb_r2b,
|
||||
|
||||
/* 0x4X */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::mov_r2r, &tms7000_device::and_r2r, &tms7000_device::or_r2r, &tms7000_device::xor_r2r, &tms7000_device::btjo_r2r,&tms7000_device::btjz_r2r,
|
||||
&tms7000_device::add_r2r, &tms7000_device::adc_r2r, &tms7000_device::sub_rr, &tms7000_device::sbb_rr, &tms7000_device::mpy_rr, &tms7000_device::cmp_rr, &tms7000_device::dac_r2r, &tms7000_device::dsb_r2r,
|
||||
|
||||
/* 0x5X */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::mov_i2b, &tms7000_device::and_i2b, &tms7000_device::or_i2b, &tms7000_device::xor_i2b, &tms7000_device::btjo_i2b,&tms7000_device::btjz_i2b,
|
||||
&tms7000_device::add_i2b, &tms7000_device::adc_i2b, &tms7000_device::sub_ib, &tms7000_device::sbb_ib, &tms7000_device::mpy_ib, &tms7000_device::cmp_ib, &tms7000_device::dac_i2b, &tms7000_device::dsb_i2b,
|
||||
|
||||
/* 0x6X */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::mov_b2a, &tms7000_device::and_b2a, &tms7000_device::or_b2a, &tms7000_device::xor_b2a, &tms7000_device::btjo_b2a,&tms7000_device::btjz_b2a,
|
||||
&tms7000_device::add_b2a, &tms7000_device::adc_b2a, &tms7000_device::sub_ba, &tms7000_device::sbb_ba, &tms7000_device::mpy_ba, &tms7000_device::cmp_ba, &tms7000_device::dac_b2a, &tms7000_device::dsb_b2a,
|
||||
|
||||
/* 0x7X */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::mov_i2r, &tms7000_device::and_i2r, &tms7000_device::or_i2r, &tms7000_device::xor_i2r, &tms7000_device::btjo_i2r,&tms7000_device::btjz_i2r,
|
||||
&tms7000_device::add_i2r, &tms7000_device::adc_i2r, &tms7000_device::sub_ir, &tms7000_device::sbb_ir, &tms7000_device::mpy_ir, &tms7000_device::cmp_ir, &tms7000_device::dac_i2r, &tms7000_device::dsb_i2r,
|
||||
|
||||
/* 0x8X */ &tms7000_device::movp_p2a,&tms7000_device::illegal, &tms7000_device::movp_a2p,&tms7000_device::andp_a2p,&tms7000_device::orp_a2p, &tms7000_device::xorp_a2p,&tms7000_device::btjop_ap,&tms7000_device::btjzp_ap,
|
||||
&tms7000_device::movd_imm,&tms7000_device::illegal, &tms7000_device::lda_dir, &tms7000_device::sta_dir, &tms7000_device::br_dir, &tms7000_device::cmpa_dir,&tms7000_device::call_dir,&tms7000_device::illegal,
|
||||
|
||||
/* 0x9X */ &tms7000_device::illegal, &tms7000_device::movp_p2b,&tms7000_device::movp_b2p,&tms7000_device::andp_b2p,&tms7000_device::orp_b2p, &tms7000_device::xorp_b2p,&tms7000_device::btjop_bp,&tms7000_device::btjzp_bp,
|
||||
&tms7000_device::movd_r, &tms7000_device::illegal, &tms7000_device::lda_ind, &tms7000_device::sta_ind, &tms7000_device::br_ind, &tms7000_device::cmpa_ind,&tms7000_device::call_ind,&tms7000_device::illegal,
|
||||
|
||||
/* 0xAX */ &tms7000_device::illegal, &tms7000_device::illegal, &tms7000_device::movp_i2p,&tms7000_device::andp_i2p,&tms7000_device::orp_i2p, &tms7000_device::xorp_i2p,&tms7000_device::btjop_ip,&tms7000_device::btjzp_ip,
|
||||
&tms7000_device::movd_inx,&tms7000_device::illegal, &tms7000_device::lda_inx, &tms7000_device::sta_inx, &tms7000_device::br_inx, &tms7000_device::cmpa_inx,&tms7000_device::call_inx,&tms7000_device::illegal,
|
||||
|
||||
/* 0xBX */ &tms7000_device::clrc, &tms7000_device::illegal, &tms7000_device::dec_a, &tms7000_device::inc_a, &tms7000_device::inv_a, &tms7000_device::clr_a, &tms7000_device::xchb_a, &tms7000_device::swap_a,
|
||||
&tms7000_device::push_a, &tms7000_device::pop_a, &tms7000_device::djnz_a, &tms7000_device::decd_a, &tms7000_device::rr_a, &tms7000_device::rrc_a, &tms7000_device::rl_a, &tms7000_device::rlc_a,
|
||||
|
||||
/* 0xCX */ &tms7000_device::mov_a2b, &tms7000_device::tstb, &tms7000_device::dec_b, &tms7000_device::inc_b, &tms7000_device::inv_b, &tms7000_device::clr_b, &tms7000_device::xchb_b, &tms7000_device::swap_b,
|
||||
&tms7000_device::push_b, &tms7000_device::pop_b, &tms7000_device::djnz_b, &tms7000_device::decd_b, &tms7000_device::rr_b, &tms7000_device::rrc_b, &tms7000_device::rl_b, &tms7000_device::rlc_b,
|
||||
|
||||
/* 0xDX */ &tms7000_device::mov_a2r, &tms7000_device::mov_b2r, &tms7000_device::dec_r, &tms7000_device::inc_r, &tms7000_device::inv_r, &tms7000_device::clr_r, &tms7000_device::xchb_r, &tms7000_device::swap_r_exl,
|
||||
&tms7000_device::push_r, &tms7000_device::pop_r, &tms7000_device::djnz_r, &tms7000_device::decd_r, &tms7000_device::rr_r, &tms7000_device::rrc_r, &tms7000_device::rl_r, &tms7000_device::rlc_r,
|
||||
|
||||
/* 0xEX */ &tms7000_device::jmp, &tms7000_device::j_jn, &tms7000_device::jeq, &tms7000_device::jc, &tms7000_device::jp, &tms7000_device::jpz, &tms7000_device::jne, &tms7000_device::jl,
|
||||
&tms7000_device::trap_23, &tms7000_device::trap_22, &tms7000_device::trap_21, &tms7000_device::trap_20, &tms7000_device::trap_19, &tms7000_device::trap_18, &tms7000_device::trap_17, &tms7000_device::trap_16,
|
||||
|
||||
/* 0xFX */ &tms7000_device::trap_15, &tms7000_device::trap_14, &tms7000_device::trap_13, &tms7000_device::trap_12, &tms7000_device::trap_11, &tms7000_device::trap_10, &tms7000_device::trap_9, &tms7000_device::trap_8,
|
||||
&tms7000_device::trap_7, &tms7000_device::trap_6, &tms7000_device::trap_5, &tms7000_device::trap_4, &tms7000_device::trap_3, &tms7000_device::trap_2, &tms7000_device::trap_1, &tms7000_device::trap_0
|
||||
};
|
||||
@ -36,7 +36,7 @@
|
||||
|
||||
HM6116LP-4 - Hitachi 2KB SRAM
|
||||
HN61256PC09 - Hitachi DIP-28 32KB CMOS Mask PROM
|
||||
TMX70C20N2L - Texas Instruments TMS70C20 CPU (128 bytes RAM, 2KB ROM) @ 2.5MHz - "X" implies prototype?
|
||||
TMX70C20N2L - Texas Instruments TMS70C20 CPU (128 bytes RAM, 2KB ROM) @ 2.5MHz - "X" implies prototype
|
||||
AMI 8304BXH - 74-pin QFP AMI Gate Array
|
||||
HD44100H - 60-pin QFP Hitachi HD44100 LCD Driver
|
||||
HD44780A00 - 80-pin TFP Hitachi HD44780 LCD Controller
|
||||
|
||||
@ -223,7 +223,7 @@ static DEVICE_IMAGE_UNLOAD( exelv_cart )
|
||||
|
||||
READ8_MEMBER(exelv_state::mailbox_wx319_r)
|
||||
{
|
||||
logerror("[TMS7220] reading mailbox %d", m_wx319);
|
||||
logerror("[TMS7220] reading mailbox %d\n", m_wx319);
|
||||
return m_wx319;
|
||||
}
|
||||
|
||||
@ -325,7 +325,7 @@ WRITE8_MEMBER(exelv_state::tms7041_portb_w)
|
||||
m_tms5220c->rsq_w((data & 0x02) ? 1 : 0);
|
||||
|
||||
logerror("TMS7020 %s int1\n",((data & 0x04) ? "clear" : "assert"));
|
||||
m_maincpu->set_input_line(TMS7000_IRQ1_LINE, (data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
|
||||
m_maincpu->set_input_line(TMS7000_INT1_LINE, (data & 0x04) ? CLEAR_LINE : ASSERT_LINE);
|
||||
|
||||
/* Check for low->high transition on B6 */
|
||||
if (!(m_tms7041_portb & 0x40) && (data & 0x40))
|
||||
@ -434,11 +434,6 @@ static ADDRESS_MAP_START(tms7020_port, AS_IO, 8, exelv_state)
|
||||
AM_RANGE(TMS7000_PORTB, TMS7000_PORTB) AM_WRITE(tms7020_portb_w)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static ADDRESS_MAP_START(tms7041_map, AS_PROGRAM, 8, exelv_state)
|
||||
AM_RANGE(0x0080, 0x00ff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
static ADDRESS_MAP_START(tms7041_port, AS_IO, 8, exelv_state)
|
||||
AM_RANGE(TMS7000_PORTA, TMS7000_PORTA) AM_READ(tms7041_porta_r)
|
||||
AM_RANGE(TMS7000_PORTB, TMS7000_PORTB) AM_WRITE(tms7041_portb_w)
|
||||
@ -462,11 +457,6 @@ static ADDRESS_MAP_START(tms7040_mem, AS_PROGRAM, 8, exelv_state)
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
static ADDRESS_MAP_START(tms7042_map, AS_PROGRAM, 8, exelv_state)
|
||||
AM_RANGE(0x0080, 0x00ff) AM_RAM
|
||||
ADDRESS_MAP_END
|
||||
|
||||
|
||||
/* keyboard: ??? */
|
||||
static INPUT_PORTS_START(exelv)
|
||||
|
||||
@ -515,8 +505,7 @@ static MACHINE_CONFIG_START( exl100, exelv_state )
|
||||
MCFG_CPU_IO_MAP(tms7020_port)
|
||||
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", exelv_state, exelv_hblank_interrupt, "screen", 0, 1)
|
||||
|
||||
MCFG_CPU_ADD("tms7041", TMS7040, XTAL_4_9152MHz) // should be TMS7041
|
||||
MCFG_CPU_PROGRAM_MAP(tms7041_map)
|
||||
MCFG_CPU_ADD("tms7041", TMS7041, XTAL_4_9152MHz)
|
||||
MCFG_CPU_IO_MAP(tms7041_port)
|
||||
|
||||
MCFG_QUANTUM_PERFECT_CPU("maincpu")
|
||||
@ -567,8 +556,7 @@ static MACHINE_CONFIG_START( exeltel, exelv_state )
|
||||
MCFG_CPU_IO_MAP(tms7020_port)
|
||||
MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", exelv_state, exelv_hblank_interrupt, "screen", 0, 1)
|
||||
|
||||
MCFG_CPU_ADD("tms7042", TMS7040, XTAL_4_9152MHz) // should be TMS7042
|
||||
MCFG_CPU_PROGRAM_MAP(tms7042_map)
|
||||
MCFG_CPU_ADD("tms7042", TMS7042, XTAL_4_9152MHz)
|
||||
MCFG_CPU_IO_MAP(tms7041_port)
|
||||
|
||||
MCFG_QUANTUM_PERFECT_CPU("maincpu")
|
||||
|
||||
Loading…
Reference in New Issue
Block a user