Merge pull request #2 from mamedev/master

syncing fork
This commit is contained in:
Ian Karlsson 2015-06-10 18:22:23 +02:00
commit 2bc883fabe
684 changed files with 23514 additions and 12153 deletions

View File

@ -47,7 +47,11 @@
#define luaL_openlib(L,name,reg,nup) luaL_setfuncs(L,reg,nup)
#endif
#ifndef USE_SYSTEM_SQLITE
#include "sqlite3/sqlite3.h"
#else
#include <sqlite3.h>
#endif
/* compile time features */
#if !defined(SQLITE_OMIT_PROGRESS_CALLBACK)

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@ -3697,7 +3697,7 @@ static PaError PaAlsaStream_GetAvailableFrames( PaAlsaStream *self, int queryCap
*available, int *xrunOccurred )
{
PaError result = paNoError;
unsigned long captureFrames, playbackFrames;
unsigned long captureFrames = 0, playbackFrames = 0;
*xrunOccurred = 0;
assert( queryCapture || queryPlayback );
@ -4579,7 +4579,7 @@ error:
PaError PaAlsa_GetStreamInputCard( PaStream* s, int* card )
{
PaAlsaStream *stream;
PaAlsaStream *stream = NULL;
PaError result = paNoError;
snd_pcm_info_t* pcmInfo;
@ -4598,7 +4598,7 @@ error:
PaError PaAlsa_GetStreamOutputCard( PaStream* s, int* card )
{
PaAlsaStream *stream;
PaAlsaStream *stream = NULL;
PaError result = paNoError;
snd_pcm_info_t* pcmInfo;

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@ -2370,32 +2370,112 @@ almost nothing like the prototype.
</software>
<!-- XM board enhanced -->
<!-- from http://atariage.com/forums/topic/204250-donkey-kong-xm-pre-order-and-demo/ -->
<software name="dkongxm">
<description>Donkey Kong (PAL, Demo, XM enhanced)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher>
<info name="programmer" value="TEP392" />
<sharedfeat name="compatibility" value="PAL"/>
<part name="cart" interface="a7800_cart">
<feature name="slot" value="a78_sg9" />
<dataarea name="rom" size="147456">
<rom name="dkxm_final_demo_pal.bin" size="147456" crc="d362712e" sha1="118c462d6698bd23c378785f80062fdd7d65ca00" offset="0" />
</dataarea>
</part>
</software>
<!-- these ones are listed as 'working in MESS' but are apparently the only images that work on real hardware too -->
<software name="dkongxm">
<description>Donkey Kong (PAL, Demo, XM enhanced, V1.2)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher>
<info name="programmer" value="TEP392" />
<sharedfeat name="compatibility" value="PAL"/>
<part name="cart" interface="a7800_cart">
<feature name="slot" value="a78_sg9" />
<dataarea name="rom" size="147456">
<rom name="dkxm_demo_v12_pal.bin" size="147456" crc="9f6c0600" sha1="18409eace880dda3646792f9ec050a87a3b1b382" offset="0" />
</dataarea>
</part>
</software>
<software name="dkongxmnu" cloneof="dkongxm" >
<description>Donkey Kong (NTSC, Demo, XM enhanced)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher>
<info name="programmer" value="TEP392" />
<sharedfeat name="compatibility" value="NTSC"/>
<part name="cart" interface="a7800_cart">
<feature name="slot" value="a78_sg9" />
<dataarea name="rom" size="147456">
<rom name="dkxm_final_demo_ntsc.bin" size="147456" crc="6e170055" sha1="f4da231312da06ff9e8af5681b5013b14886b455" offset="0" />
</dataarea>
</part>
</software>
<software name="dkongxmu" cloneof="dkongxm">
<description>Donkey Kong (NTSC, Demo, XM enhanced, V1.2)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher>
<info name="programmer" value="TEP392" />
<sharedfeat name="compatibility" value="NTSC"/>
<part name="cart" interface="a7800_cart">
<feature name="slot" value="a78_sg9" />
<dataarea name="rom" size="147456">
<rom name="dkxm_demo_v12_ntsc.bin" size="147456" crc="8b06bb4b" sha1="3129cbc91dc8f223f00db5c3273a4a330320be99" offset="0" />
</dataarea>
</part>
</software>
<!-- these are listed as 'with HSC emulation' and are designed for the prosystem emulator, they simulate some of the HSC features -->
<!-- remove them? -->
<software name="dkongxmps" cloneof="dkongxm" supported="no">
<description>Donkey Kong (PAL, Demo, XM enhanced, V1.2, for prosystem emulator)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher>
<info name="programmer" value="TEP392" />
<sharedfeat name="compatibility" value="PAL"/>
<part name="cart" interface="a7800_cart">
<feature name="slot" value="a78_sg9" />
<dataarea name="rom" size="147456">
<rom name="dkxm_final_demo_pal_hsc.bin" size="147456" crc="6510b674" sha1="65b723b470d287af51e9888813149c43fb11ac26" offset="0" />
</dataarea>
</part>
</software>
<software name="dkongxmups" cloneof="dkongxm" supported="no">
<description>Donkey Kong (NTSC, Demo, XM enhanced, V1.2, for prosystem emulator)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher>
<info name="programmer" value="TEP392" />
<sharedfeat name="compatibility" value="NTSC"/>
<part name="cart" interface="a7800_cart">
<feature name="slot" value="a78_sg9" />
<dataarea name="rom" size="147456">
<rom name="dkxm_final_demo_ntsc_hsc.bin" size="147456" crc="2c67fea7" sha1="7825c1946e3c7492fa9bbfae33029cd68c0d1135" offset="0" />
</dataarea>
</part>
</software>
<!-- an older version? sound is broken, did it work on the real hardware? -->
<software name="dkongxmo" cloneof="dkongxm" supported="no">
<description>Donkey Kong (PAL, Demo, XM enhanced, older)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher>
<info name="programmer" value="TEP392" />
<sharedfeat name="compatibility" value="PAL"/>
<part name="cart" interface="a7800_cart">
<feature name="slot" value="a78_sg9" />
<dataarea name="rom" size="147456">
<rom name="dkxm_final_demo_pal.bin" size="147456" crc="d362712e" sha1="118c462d6698bd23c378785f80062fdd7d65ca00" offset="0" />
</dataarea>
</part>
</software>
<software name="dkongxmou" cloneof="dkongxm" supported="no" >
<description>Donkey Kong (NTSC, Demo, XM enhanced, older)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher>
<info name="programmer" value="TEP392" />
<sharedfeat name="compatibility" value="NTSC"/>
<part name="cart" interface="a7800_cart">
<feature name="slot" value="a78_sg9" />
<dataarea name="rom" size="147456">
<rom name="dkxm_final_demo_ntsc.bin" size="147456" crc="6e170055" sha1="f4da231312da06ff9e8af5681b5013b14886b455" offset="0" />
</dataarea>
</part>
</software>
<!-- this one is meant to detect PAL / NTSC and runs on an A7800 CC2 development board, without sound? based off older code? -->
<software name="dkongxmcc" cloneof="dkongxm" supported="no">
<description>Donkey Kong (PAL/NTSC, Demo, XM enhanced, older, for CC2 board)</description>
<year>2012</year>
<publisher>&lt;homebrew&gt;</publisher>
<info name="programmer" value="TEP392" />
<part name="cart" interface="a7800_cart">
<feature name="slot" value="a78_sg9" />
<dataarea name="rom" size="147456">
<rom name="dkxm_final_demo.bin" size="0x20000" crc="fd503bd4" sha1="454d754a0c4603323e476d9418f343a6a1a0d017" offset="0x4000" />
<rom size="0x4000" offset="0x0000" loadflag="continue" />
</dataarea>
</part>
</software>
</softwarelist>

View File

@ -1,13 +1,13 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="cgenie_cart" description="EACA Colour Genie cartridges">
<!-- Where was this plugged exactly?!? -->
<softwarelist name="cgenie_cart" description="EACA Colour Genie EG2000 cartridges">
<software name="cdosintf">
<description>Colour DOS Interface</description>
<year>19??</year>
<year>1997</year>
<publisher>&lt;homebrew?&gt;</publisher>
<info name="author" value="C. Poetzsch, Jürgen Buchmüller" />
<part name="cart" interface="cgenie_cart">
<dataarea name="rom" size="2772">
<rom name="newe000.bin" size="2772" crc="953491a7" sha1="8d6a739a9058b3834897a15bcda5348b94008f5a" offset="0" />
@ -15,5 +15,16 @@
</part>
</software>
<software name="colmon2">
<description>Colour-Monitor 2.0</description>
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<info name="usage" value="Enter CALL E000 to start" />
<part name="cart" interface="cgenie_cart">
<dataarea name="rom" size="0x1000">
<rom name="colour_monitor_2.bin" size="0x1000" crc="a6b08d4d" sha1="2398f8ea430468dbd29fb0fabe89b2c21c2404f7" offset="0" />
</dataarea>
</part>
</software>
</softwarelist>

File diff suppressed because it is too large Load Diff

145
hash/i7000_card.xml Normal file
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@ -0,0 +1,145 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<!--
Thanks to Alexandre Souza (Tabajara) for contributing the initial
cartridges data available in this softlist.
-->
<softwarelist name="i7000_card" description="Itautec I-7000 cartridges">
<software name="set78">
<description>I-7101 SET 78 COML v1.3 R01</description>
<year>198?</year>
<publisher>Itautec</publisher>
<part name="card" interface="i7000_card">
<dataarea name="rom" size="0x2000">
<rom name="i-7101_set_78_coml_v1.3_r01_703d.rom" size="0x2000" crc="12da1687" sha1="b370c2b7718cf89d69e37fc7d1d3c4d80dc5f1cc" offset="0" />
</dataarea>
</part>
</software>
<software name="telex">
<description>I-7104 TELEX v1.0 R4 (Aug 31st, 1987)</description>
<year>1987</year>
<publisher>Itautec</publisher>
<part name="card" interface="i7000_card">
<dataarea name="rom" size="0x8000">
<rom name="i-7104_cart_telex_v1.0_r4_a5e5_31_08_87_1.rom" size="0x2000" crc="5ae6b20d" sha1="f3cbfa81bdc828872790290a53e62750d720b457" offset="0x0000" />
<rom name="i-7104_cart_telex_v1.0_r4_632c_31_08_87_2.rom" size="0x2000" crc="e95dd757" sha1="f90886b8c36063643509fcad4df1061de1dc7a90" offset="0x2000" />
<rom name="i-7104_cart_telex_v1.0_r4_a3b4_31_08_87_3.rom" size="0x2000" crc="ef884b22" sha1="bbc3688a64292dd15fe8103bf6cadfd4a991abb9" offset="0x4000" />
<rom name="i-7104_cart_telex_v1.0_r4_fdcc_31_08_87_4.rom" size="0x2000" crc="82202eb9" sha1="ee2018b5b58a656630c5057b3a65316f38099265" offset="0x6000" />
</dataarea>
</part>
</software>
<software name="redator">
<description>I-7105 REDATOR v1.2 R02 (Sept 16th, 1983)</description>
<year>1983</year>
<publisher>Itautec</publisher>
<part name="card" interface="i7000_card">
<dataarea name="rom" size="0x8000">
<rom name="i-7105_redator_v1.2_r02_16_09_83_1.rom" size="0x2000" crc="2b5bf15f" sha1="1384cab00e1596619e1ae5ae072bd23af6fe6b2e" offset="0x0000" />
<rom name="i-7105_redator_v1.2_r02_16_09_83_2.rom" size="0x2000" crc="22c64fc2" sha1="ef4fbe93deeea65f1705e9b5fb2ad4d376650215" offset="0x2000" />
<rom name="i-7105_redator_v1.2_r02_16_09_83_3.rom" size="0x2000" crc="cfb8e70b" sha1="08683feafbe28e009458a0cfb1301bedd7e03aaa" offset="0x4000" />
<rom name="i-7105_redator_v1.2_r02_16_09_83_4.rom" size="0x2000" crc="f8510fee" sha1="275528441d4c4a410e6be45d0ecbe465aef2afe1" offset="0x6000" />
</dataarea>
</part>
</software>
<software name="set3278">
<description>I-7106 SET 3278 v1.2 R00 (Mar 21st, 1985)</description>
<year>1985</year>
<publisher>Itautec</publisher>
<part name="card" interface="i7000_card">
<dataarea name="rom" size="0x2000">
<rom name="i-7106_set_3278_v1.2_r00_21_03_85.rom" size="0x2000" crc="004275c8" sha1="ff42eb526f6142cff0d6ecfef8e41ef17bfac2c7" offset="0" />
</dataarea>
</part>
</software>
<software name="setvt52">
<description>I-7107 SET VT52 v1.0 R02 (Feb 25th, 1986)</description>
<year>1986</year>
<publisher>Itautec</publisher>
<part name="card" interface="i7000_card">
<dataarea name="rom" size="0x4000">
<rom name="i-7107_set_vt52_v1.0_r02_25_02_86_1.rom" size="0x2000" crc="ead3f48e" sha1="ec7951591cab8e8c2cb22f7e6352c709d24b9706" offset="0x0000" />
<rom name="i-7107_set_vt52_v1.0_r02_25_02_86_2.rom" size="0x2000" crc="da848ec0" sha1="7ed1898de94c7382c081ec3a78f60a6850daa25a" offset="0x2000" />
</dataarea>
</part>
</software>
<software name="i7113">
<description>I-7113 v1.2 R02 (Mar 4th, 1986)</description>
<year>1986</year>
<publisher>Itautec</publisher>
<part name="card" interface="i7000_card">
<dataarea name="rom" size="0x2000">
<rom name="i-7113_v1.2_r02_04_03_86.rom" size="0x2000" crc="865da8b7" sha1="da65dc6d65bbe0b8e84c0eeda15021e2575fd696" offset="0" />
</dataarea>
</part>
</software>
<software name="redelocal">
<description>I-7119 REDE LOCAL v1.0 R01 (Mar 21st, 1987)</description>
<year>1987</year>
<publisher>Itautec</publisher>
<part name="card" interface="i7000_card">
<dataarea name="rom" size="0x4000">
<rom name="i-7119_rede_local_v1.0_r01_21_03_87_1.rom" size="0x2000" crc="f0e95bc4" sha1="fa4482b005d8647dca411911b0f7048c940632c8" offset="0x0000" />
<rom name="i-7119_rede_local_v1.0_r01_21_03_87_2.rom" size="0x2000" crc="3b9461bf" sha1="958a71e61a91433645d402c31955fe4f64efcba0" offset="0x2000" />
</dataarea>
</part>
</software>
<software name="telex2">
<description>I-7120 TELEX II v1.0 R04 (Aug 31st, 1987)</description>
<year>1987</year>
<publisher>Itautec</publisher>
<part name="card" interface="i7000_card">
<dataarea name="rom" size="0x8000">
<rom name="i-7120_telex_ii_v1.0_r04_31_08_87_1.rom" size="0x2000" crc="5ae6b20d" sha1="f3cbfa81bdc828872790290a53e62750d720b457" offset="0x0000" />
<rom name="i-7120_telex_ii_v1.0_r04_31_08_87_2.rom" size="0x2000" crc="e95dd757" sha1="f90886b8c36063643509fcad4df1061de1dc7a90" offset="0x2000" />
<rom name="i-7120_telex_ii_v1.0_r04_31_08_87_3.rom" size="0x2000" crc="ef884b22" sha1="bbc3688a64292dd15fe8103bf6cadfd4a991abb9" offset="0x4000" />
<rom name="i-7120_telex_ii_v1.0_r04_31_08_87_4.rom" size="0x2000" crc="82202eb9" sha1="ee2018b5b58a656630c5057b3a65316f38099265" offset="0x6000" />
</dataarea>
</part>
</software>
<software name="redatorv12">
<description>I-71XX REDATOR v1.2 R04</description>
<year>198?</year>
<publisher>Itautec</publisher>
<part name="card" interface="i7000_card">
<dataarea name="rom" size="0x8000">
<rom name="i-71xx_redator_v1.2_r04_1.rom" size="0x2000" crc="98105005" sha1="3cbd9de8c7e37e16d1dd143a7e735f582cf303c8" offset="0x0000" />
<rom name="i-71xx_redator_v1.2_r04_2.rom" size="0x2000" crc="848d665c" sha1="2095c9007f090d4510265fd3da6ef0d037c7ee86" offset="0x2000" />
<rom name="i-71xx_redator_v1.2_r04_3.rom" size="0x2000" crc="1e61ff21" sha1="d8e28264e7020e912774fd9bda6bacd4b227a14d" offset="0x4000" />
<rom name="i-71xx_redator_v1.2_r04_4.rom" size="0x2000" crc="6c6b96a6" sha1="26bac8e902d40490fcd2e9021a5de3753c0fc26a" offset="0x6000" />
</dataarea>
</part>
</software>
<software name="setdisc">
<description>I-71XX SETDISC</description>
<year>198?</year>
<publisher>Itautec</publisher>
<part name="card" interface="i7000_card">
<dataarea name="rom" size="0x4000">
<rom name="i-71xx_setdisc_1.rom" size="0x2000" crc="0ad7d534" sha1="aecf5f01b8ffb4120f3cd4752705f6538ef70f4e" offset="0x0000" />
<rom name="i-71xx_setdisc_2.rom" size="0x2000" crc="51e24c2b" sha1="172699394690ee46096d9395f6894ebaa26ea6ac" offset="0x2000" />
</dataarea>
</part>
</software>
<software name="videotexto">
<description>I-71XX VIDEOTEXTO</description>
<year>198?</year>
<publisher>Itautec</publisher>
<part name="card" interface="i7000_card">
<dataarea name="rom" size="0x6000">
<rom name="i-71xx_videotexto_1.rom" size="0x2000" crc="28dda7db" sha1="ced755c40fcdf2dc2cd5263a494d51917e1010d1" offset="0x0000" />
<rom name="i-71xx_videotexto_2.rom" size="0x2000" crc="b4293435" sha1="5e2b96c19c4f5c63a5afa2de504d29fe64a4c908" offset="0x2000" />
<rom name="i-71xx_videotexto_3.rom" size="0x2000" crc="07486b26" sha1="e54e32a789e73b772516759ac26badf5805abd95" offset="0x4000" />
</dataarea>
</part>
</software>
</softwarelist>

View File

@ -11175,6 +11175,21 @@ The following floppies came with the machines.
<description>The Tower? of Cabin - Cabin Panic (Jpn)</description>
<year>1992</year>
<publisher>Micro Cabin</publisher>
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="737280">
<rom name="tower of cabin, the (1992)(micro cabin)(jp)(disk 1 of 3).dsk" size="737280" crc="0471dbee" sha1="0e8d2b0177bd601e84c71735b4b498be2818085f" offset="0" />
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<dataarea name="flop" size="737280">
<rom name="tower of cabin, the (1992)(micro cabin)(jp)(disk 2 of 3).dsk" size="737280" crc="0d3afd17" sha1="d8cb95e558065b19f21f434a97a4a59b1892fc1a" offset="0" />
</dataarea>
</part>
<part name="flop3" interface="floppy_3_5">
<dataarea name="flop" size="737280">
<rom name="tower of cabin, the (1992)(micro cabin)(jp)(disk 3 of 3).dsk" size="737280" crc="9ad7d280" sha1="ed0e55d97817e9d98d563fdeb634cc6443564840" offset="0" />
</dataarea>
</part>
</software>
<software name="towercaba" cloneof="towercab">

View File

@ -18,14 +18,14 @@
<year>2002</year>
<publisher>Toshio Fukui</publisher>
<part name="flop1" interface="floppy_3_5">
<part name="flop1" interface="floppy_5_25">
<feature name="part_id" value="System Disk" />
<dataarea name="flop" size="348848">
<rom name="cpmbin.d88" size="348848" crc="040f32e8" sha1="c6d09ed529c23fcbdc9b0468b0481a521a5240e5" offset="0" />
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<part name="flop2" interface="floppy_5_25">
<feature name="part_id" value="Source Disk (w/ TF-DOS)" />
<dataarea name="flop" size="348848">
<rom name="cpmsrc.d88" size="348848" crc="ce3fbee1" sha1="fd6f8d1f8ffea8e33f24d5241ee3deb3f471c313" offset="0" />
@ -48,14 +48,14 @@
<year>2011?</year>
<publisher>Toshio Fukui</publisher>
<part name="flop1" interface="floppy_3_5">
<part name="flop1" interface="floppy_5_25">
<feature name="part_id" value="System Disk" />
<dataarea name="flop" size="348848">
<rom name="mz64cpmb.d88" size="348848" crc="0e65fc85" sha1="10194f69a9e399d4822026026c1a6d0c8de1ab9a" offset="0" />
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<part name="flop2" interface="floppy_5_25">
<feature name="part_id" value="Source Disk (w/ TF-DOS)" />
<dataarea name="flop" size="348848">
<rom name="mz64cpms.d88" size="348848" crc="5d76a801" sha1="a05cd4b99030685d7878e44f9bd1a82d8161de1a" offset="0" />
@ -67,7 +67,7 @@
<description>TF-DOS Ver2.1C (TF)</description>
<year>200?</year>
<publisher>Toshio Fukui</publisher>
<part name="flop1" interface="floppy_3_5">
<part name="flop1" interface="floppy_5_25">
<feature name="part_id" value="Master Disk" />
<dataarea name="flop" size="348848">
<rom name="tfds21cmr.d88" size="348848" crc="dca59c9f" sha1="313465c15b9046104c70202a46e3e7454c8d095e" offset="0" />
@ -79,14 +79,14 @@
<description>TF-DOS Ver2.1 (TF)</description>
<year>200?</year>
<publisher>Toshio Fukui</publisher>
<part name="flop1" interface="floppy_3_5">
<part name="flop1" interface="floppy_5_25">
<feature name="part_id" value="Master Disk" />
<dataarea name="flop" size="348848">
<rom name="tfds21mr.d88" size="348848" crc="ffa75514" sha1="11b13d487dfb6fa3e77e329b32e7f23bcb67609c" offset="0" />
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<part name="flop2" interface="floppy_5_25">
<dataarea name="flop" size="348848">
<rom name="tfds21sr.d88" size="348848" crc="4b324606" sha1="35026012f38a2402a948c9c73630b9a46a7f1a6d" offset="0" />
</dataarea>
@ -97,13 +97,13 @@
<description>TF-DOS Ver2.0B (TS)</description>
<year>200?</year>
<publisher>Toshio Fukui</publisher>
<part name="flop1" interface="floppy_3_5">
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="348848">
<rom name="tfd2ts2e.d88" size="348848" crc="a8bb3380" sha1="f0d2e58f97f4bd8abf8c3b066d2ed4ce751985e3" offset="0" />
</dataarea>
</part>
<part name="flop2" interface="floppy_3_5">
<part name="flop2" interface="floppy_5_25">
<dataarea name="flop" size="348848">
<rom name="tfd2ts2r.d88" size="348848" crc="5bbbe5dc" sha1="e0162ed833bc8dcd691bcf6d2b18e9d7a7a11714" offset="0" />
</dataarea>
@ -114,7 +114,7 @@
<description>Graphic Editor III "Art Magic"</description>
<year>200?</year>
<publisher>Toshio Fukui</publisher>
<part name="flop1" interface="floppy_3_5">
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="348848">
<rom name="gred3_tf.d88" size="348848" crc="82e0843e" sha1="5f6b13dbeaf781b09a157778799da2811cac1624" offset="0" />
</dataarea>
@ -125,7 +125,7 @@
<description>Brave</description>
<year>200?</year>
<publisher>Toshio Fukui</publisher>
<part name="flop1" interface="floppy_3_5">
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="348848">
<rom name="brave.d88" size="348848" crc="8a9bc713" sha1="1747b68b188b0c25b78a2ebb9b9184e82fc2531f" offset="0" />
</dataarea>
@ -136,7 +136,7 @@
<description>Lilas</description>
<year>200?</year>
<publisher>Toshio Fukui</publisher>
<part name="flop1" interface="floppy_3_5">
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="348848">
<rom name="lilascmp.d88" size="348848" crc="ac570829" sha1="15e927727d3498660c1dc3f3ea55409aad4eeef8" offset="0" />
</dataarea>
@ -147,7 +147,7 @@
<description>TF-DOS Programs 1</description>
<year>200?</year>
<publisher>Toshio Fukui</publisher>
<part name="flop1" interface="floppy_3_5">
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="348848">
<rom name="cdosprg1.d88" size="348848" crc="7176ce03" sha1="2ee08c47c4071e03d942ed166253382d0d380780" offset="0" />
</dataarea>
@ -158,7 +158,7 @@
<description>TF-DOS Programs 2</description>
<year>200?</year>
<publisher>Toshio Fukui</publisher>
<part name="flop1" interface="floppy_3_5">
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="348848">
<rom name="cdosprg2.d88" size="348848" crc="4f0a38c6" sha1="fafaee86a65883b7270ff247802220777468c9fc" offset="0" />
</dataarea>
@ -170,7 +170,7 @@
<description>Sharp BASIC Programs 1</description>
<year>200?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="flop1" interface="floppy_3_5">
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="348848">
<rom name="sbasprg1.d88" size="348848" crc="c92c42ca" sha1="c87a02c9ba94b70f26727b018b82ecb9bfe4c41a" offset="0" />
</dataarea>

View File

@ -6480,7 +6480,7 @@ patched out (+ a fix for internal checksum)
</part>
</software>
<software name="miahamm">
<software name="miahamm" cloneof="mikeowen">
<description>Mia Hamm Soccer 64 (USA)</description>
<year>2000</year>
<publisher>South Peak</publisher>
@ -9969,7 +9969,7 @@ patched out (+ a fix for internal checksum)
</part>
</software>
<software name="tazexpru">
<software name="tazexpru" cloneof="tazexpr">
<description>Taz Express (USA, Prototype)</description>
<year>2000?</year>
<publisher>Infogrames</publisher>
@ -9991,7 +9991,7 @@ patched out (+ a fix for internal checksum)
</part>
</software>
<software name="tetris64" cloneof="ntetris">
<software name="tetris64">
<description>Tetris 64 (Jpn)</description>
<year>1998</year>
<publisher>Seta Corporation</publisher>
@ -11754,7 +11754,7 @@ patched out (+ a fix for internal checksum)
</part>
</software>
<software name="gsharka" cloneof="gshark" supported="no">
<software name="gsharka" cloneof="arp64" supported="no">
<description>GameShark Pro (USA, v2.0)</description>
<year>19??</year>
<publisher>&lt;unknown&gt;</publisher>
@ -11765,7 +11765,7 @@ patched out (+ a fix for internal checksum)
</part>
</software>
<software name="gshark" supported="no">
<software name="gshark" cloneof="arp64" supported="no">
<description>GameShark Pro (USA, v3.3)</description>
<year>19??</year>
<publisher>&lt;unknown&gt;</publisher>

View File

@ -140,7 +140,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>198?</year>
<publisher>Sony Corp.</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="121414">
<rom name="cpm22.imd" size="121414" crc="02db74fe" sha1="3f27609dd2d17e983bc337a5530e95883140e5b7" offset="0x0000" />
</dataarea>
@ -153,7 +153,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="305328">
<rom name="develop.1dd" size="305328" crc="13e5971a" sha1="c15d61e00ea2495ef5406a0a6f637ab2746e91cc" offset="0x0000" />
</dataarea>
@ -166,7 +166,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="261808">
<rom name="system 12j.1dd" size="261808" crc="c66e1a07" sha1="44e5ffb697c20f3652d6673885c9824f49a307bb" offset="0x0000" />
</dataarea>
@ -178,7 +178,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="305328">
<rom name="system 11.1dd" size="305328" crc="fcf54a39" sha1="d5aa09c73cef0cf639ef3adbe6e64a109f883ad6" offset="0x0000" />
</dataarea>
@ -190,7 +190,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="305328">
<rom name="system 10.1dd" size="305328" crc="89a0c347" sha1="2d3fdacef43d6b89861b90997715a80d784dd2d9" offset="0x0000" />
</dataarea>
@ -202,7 +202,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>198?</year>
<publisher>Sony</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="211808">
<rom name="choplifter.1dd" size="211808" crc="bf2ea51c" sha1="4610f7456ca6bd1740b9c98fb3d2bd67aadffb5c" offset="0x0000" />
</dataarea>
@ -215,7 +215,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<publisher>Sony</publisher>
<info name="alt_title" value="ストリッツb.h." />
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="305328">
<rom name="strizbh.1dd" size="305328" crc="efa24635" sha1="c2308afeb555197c6d583e6cd46e6c5c5c9b4ea9" offset="0x0000" />
</dataarea>
@ -228,7 +228,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="305056">
<rom name="floppy magazine.1dd" size="305056" crc="44f18e58" sha1="dc4d8bda72d408e53edd4be4f1d9497d9179d35e" offset="0x0000" />
</dataarea>
@ -243,7 +243,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>1987</year>
<publisher>Y. Sato</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="305328">
<rom name="corewars.1dd" size="305328" crc="4bbc1e35" sha1="22d1ba809d69d7e1679842f1d348cc9d6da850c5" offset="0x0000" />
</dataarea>
@ -256,7 +256,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>1987</year>
<publisher>M &amp; M / Alines Soft</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="305328">
<rom name="dragon.1dd" size="305328" crc="dc23c4bc" sha1="45c0d8510f660108d20c82ef116e8dfa8b66b9c2" offset="0x0000" />
</dataarea>
@ -270,7 +270,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>1987</year>
<publisher>M &amp; M</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="305328">
<rom name="dragon (freeware).1dd" size="305328" crc="168925c7" sha1="cf5b4b3f3ae0b77787613c7168eb8cb25dabbe52" offset="0x0000" />
</dataarea>
@ -282,7 +282,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>1987</year>
<publisher>Kawaguchiya</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="305328">
<rom name="develop.1dd" size="305328" crc="b7605b47" sha1="927d173f5d08c7a0ad178af1c191cba7d5435a05" offset="0x0000" />
</dataarea>
@ -295,7 +295,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="305328">
<rom name="s-os sword monitor 2.0.1dd" size="305328" crc="27bc0b34" sha1="18840fab993716e7929b6e0600c446d8fba93059" offset="0x0000" />
</dataarea>
@ -308,7 +308,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="348848">
<rom name="s-os sword monitor 2.2.1dd" size="348848" crc="6e3215ce" sha1="1fffac3db3005e3de750c63ce1285f6b8a40310a" offset="0x0000" />
</dataarea>
@ -322,7 +322,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="261808">
<rom name="compilation 1.1dd" size="261808" crc="cc7827f5" sha1="8c24ec40cab047cff716d57ce44066709d238f5a" offset="0x0000" />
</dataarea>
@ -334,7 +334,7 @@ Known to be dumped, but no longer available: (If you do have any of these please
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="flop1" interface="floppy_5_25">
<part name="flop1" interface="floppy_3_5">
<dataarea name="flop" size="261808">
<rom name="compilation 2.1dd" size="261808" crc="6be3d020" sha1="9398acca8f44c868abc3a837f91c56833962c17f" offset="0x0000" />
</dataarea>

View File

@ -6,7 +6,6 @@ Info Taken from here: http://www.samdal.com/svsoftware.htm
These disks are not dumped:
Wordstar
dBase II
CP/M-80 2.22 Single Sided Disk
According to http://www.tosecdev.org/forum/errors-contributions/spectravideo-svi-318-and-svi-328-(tosec)-549/
@ -26,7 +25,7 @@ Rädda disketten (198x)(sv)
-->
<softwarelist name="svi318_flop" description="Spectravision SVI-318 disk images">
<softwarelist name="svi318_flop" description="Spectravision SVI-318/328 disk images">
<software name="cpm224dd">
<description>CP/M-80 version 2.24</description>
@ -45,7 +44,50 @@ Rädda disketten (198x)(sv)
<rom name="cpm224sd.imd" size="145870" crc="96bb2a7b" sha1="9cc4d5501abb83c586ede91161750b8718394b9a" offset="0x0000" />
</dataarea>
</part>
</software>
<software name="cpm222ss">
<description>CP/M-80 2.22</description>
<year>1983</year>
<publisher>Spectravideo</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="172032">
<rom name="cpmss.dsk" size="172032" crc="cb7f1edb" sha1="676b5752141acaba7f1056909ed75be53ff388ff" offset="0" />
</dataarea>
</part>
</software>
<software name="cpm224ds">
<description>CP/M-80 2.24 for SV-605B</description>
<year>1984</year>
<publisher>Spectravideo</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="346112">
<rom name="cpmds.dsk" size="346112" crc="f7323e1a" sha1="7bfd8c46f8361cb31e9f4f640448cddaad91c55b" offset="0" />
</dataarea>
</part>
</software>
<software name="diskbas">
<description>Disk Basic 1.0</description>
<year>1983?</year>
<publisher>Spectravideo</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="346112">
<rom name="diskbasic10.dsk" size="346112" crc="0744ac56" sha1="eef7d033263d1cc2703d019bf062b1a02b641570" offset="0" />
</dataarea>
</part>
</software>
<software name="zcpr3">
<description>Z-CPR3</description>
<year>1985?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="flop1" interface="floppy_5_25">
<dataarea name="flop" size="172032">
<rom name="zcpr3.dsk" size="172032" crc="a6ea5b81" sha1="c08a6743e713fe8f3b8b694cd92fc70680fc6f66" offset="0" />
</dataarea>
</part>
</software>
</softwarelist>

View File

@ -4,9 +4,6 @@
#
# Core makefile for building MAME and derivatives
#
# Copyright (c) Nicola Salmoria and the MAME Team.
# Visit http://mamedev.org for licensing and usage restrictions.
#
###########################################################################
@ -30,6 +27,7 @@
# USE_DISPATCH_GL = 0
# DIRECTINPUT = 7
# USE_SDL = 1
# SDL_INI_PATH = .;$HOME/.mame/;ini;
# SDL2_MULTIAPI = 1
# NO_USE_MIDI = 1
# DONT_USE_NETWORK = 1
@ -52,9 +50,16 @@
# MAP = 1
# PROFILE = 1
# ARCHOPTS =
# OPT_FLAGS =
# LDOPTS =
# USE_SYSTEM_LIB_EXPAT = 1
# USE_SYSTEM_LIB_ZLIB = 1
# USE_SYSTEM_LIB_JPEG = 1
# USE_SYSTEM_LIB_FLAC = 1
# USE_SYSTEM_LIB_LUA = 1
# USE_SYSTEM_LIB_SQLITE3 = 1
# USE_SYSTEM_LIB_PORTMIDI = 1
# MESA_INSTALL_ROOT = /opt/mesa
# SDL_INSTALL_ROOT = /opt/sdl2
@ -296,6 +301,30 @@ ifndef USE_SYSTEM_LIB_EXPAT
PARAMS += --with-bundled-expat
endif
ifndef USE_SYSTEM_LIB_ZLIB
PARAMS += --with-bundled-zlib
endif
ifndef USE_SYSTEM_LIB_JPEG
PARAMS += --with-bundled-jpeg
endif
ifndef USE_SYSTEM_LIB_FLAC
PARAMS += --with-bundled-flac
endif
ifndef USE_SYSTEM_LIB_LUA
PARAMS += --with-bundled-lua
endif
ifndef USE_SYSTEM_LIB_SQLITE3
PARAMS += --with-bundled-sqlite3
endif
ifndef USE_SYSTEM_LIB_PORTMIDI
PARAMS += --with-bundled-portmidi
endif
#-------------------------------------------------
# distribution may change things
#-------------------------------------------------
@ -396,10 +425,18 @@ ifdef OPTIMIZE
PARAMS += --OPTIMIZE=$(OPTIMIZE)
endif
ifdef SHLIB
PARAMS += --SHLIB=$(SHLIB)
endif
ifdef ARCHOPTS
PARAMS += --ARCHOPTS='$(ARCHOPTS)'
endif
ifdef OPT_FLAGS
PARAMS += --OPT_FLAGS='$(OPT_FLAGS)'
endif
ifdef MAP
PARAMS += --MAP='$(MAP)'
endif
@ -468,6 +505,10 @@ ifdef USE_SDL
PARAMS += --USE_SDL='$(USE_SDL)'
endif
ifdef SDL_INI_PATH
PARAMS += --SDL_INI_PATH='$(SDL_INI_PATH)'
endif
ifdef CYGWIN_BUILD
PARAMS += --CYGWIN_BUILD='$(CYGWIN_BUILD)'
endif
@ -1042,8 +1083,12 @@ CPPCHECK_PARAMS += -Isrc/osd/modules/render
CPPCHECK_PARAMS += -Isrc/osd/windows
CPPCHECK_PARAMS += -Isrc/emu/cpu/m68000
CPPCHECK_PARAMS += -I3rdparty
ifndef USE_SYSTEM_LIB_LUA
CPPCHECK_PARAMS += -I3rdparty/lua/src
endif
ifndef USE_SYSTEM_LIB_ZLIB
CPPCHECK_PARAMS += -I3rdparty/zlib
endif
CPPCHECK_PARAMS += -I3rdparty/bgfx/include
CPPCHECK_PARAMS += -I3rdparty/bx/include
CPPCHECK_PARAMS += -Ibuild/generated/emu
@ -1056,7 +1101,9 @@ CPPCHECK_PARAMS += -DMAME_DEBUG
CPPCHECK_PARAMS += -DMAME_PROFILER
CPPCHECK_PARAMS += -DCRLF=3
CPPCHECK_PARAMS += -DLSB_FIRST
ifndef USE_SYSTEM_LIB_FLAC
CPPCHECK_PARAMS += -DFLAC__NO_DLL
endif
CPPCHECK_PARAMS += -DNATIVE_DRC=drcbe_x64
CPPCHECK_PARAMS += -DLUA_COMPAT_APIINTCASTS
CPPCHECK_PARAMS += -DWIN32

430
nl_examples/kidniki.c Normal file
View File

@ -0,0 +1,430 @@
#include "netlist/devices/net_lib.h"
#include "netlist/devices/nld_system.h"
#include "netlist/analog/nld_bjt.h"
#define USE_FRONTIERS 0
#define USE_FIXED_STV 0
NETLIST_START(dummy)
SOLVER(Solver, 12000)
PARAM(Solver.ACCURACY, 1e-8)
PARAM(Solver.NR_LOOPS, 200)
PARAM(Solver.GS_LOOPS, 4)
PARAM(Solver.SOR_FACTOR, 1)
#if 0
PARAM(Solver.SOR_FACTOR, 1)
PARAM(Solver.DYNAMIC_TS, 1)
PARAM(Solver.LTE, 1e1)
#endif
//FIXME proper models!
NET_MODEL(".model 2SC945 NPN(Is=2.04f Xti=3 Eg=1.11 Vaf=6 Bf=400 Ikf=20m Xtb=1.5 Br=3.377 Rc=1 Cjc=1p Mjc=.3333 Vjc=.75 Fc=.5 Cje=25p Mje=.3333 Vje=.75 Tr=450n Tf=20n Itf=0 Vtf=0 Xtf=0 VCEO=45V ICrating=150M MFG=Toshiba)")
NET_MODEL(".model 1S1588 D(Is=2.52n Rs=.568 N=1.752 Cjo=4p M=.4 tt=20n Iave=200m Vpk=75 mfg=OnSemi type=silicon)")
//NET_C(R44.1, XU1.7)
/*
* Workaround: The simplified opamp model does not correctly
* model the internals of the inputs.
*/
ANALOG_INPUT(VWORKAROUND, 2.061)
RES(RWORKAROUND, RES_K(27))
NET_C(VWORKAROUND.Q, RWORKAROUND.1)
NET_C(XU1.6, RWORKAROUND.2)
ANALOG_INPUT(I_V5, 5)
//ANALOG_INPUT(I_V0, 0)
ALIAS(I_V0.Q, GND)
#if 0
ANALOG_INPUT(I_SD0, 0)
ANALOG_INPUT(I_BD0, 0)
ANALOG_INPUT(I_CH0, 0)
ANALOG_INPUT(I_OH0, 0)
ANALOG_INPUT(I_SOUNDIC0, 0)
ANALOG_INPUT(I_OKI0, 0)
ANALOG_INPUT(I_SOUND0, 0)
ANALOG_INPUT(I_SINH0, 0)
#else
TTL_INPUT(I_SD0, 1)
//CLOCK(I_SD0, 5)
TTL_INPUT(I_BD0, 1)
//CLOCK(I_BD0, 5)
TTL_INPUT(I_CH0, 1)
//CLOCK(I_CH0, 5 )
//TTL_INPUT(I_OH0, 1)
CLOCK(I_OH0, 5)
TTL_INPUT(I_SOUNDIC0, 1)
ANALOG_INPUT(I_MSM2K0, 0)
ANALOG_INPUT(I_MSM3K0, 0)
TTL_INPUT(I_SOUND0, 1)
TTL_INPUT(I_SINH0, 1)
#endif
INCLUDE(kidniki_schematics)
#if (USE_FRONTIERS)
OPTIMIZE_FRONTIER(C63.2, RES_K(27), RES_K(1))
OPTIMIZE_FRONTIER(R31.2, RES_K(5.1), 50)
OPTIMIZE_FRONTIER(R29.2, RES_K(2.7), 50)
#endif
NETLIST_END()
NETLIST_START(kidniki_schematics)
// EESCHEMA NETLIST VERSION 1.1 (SPICE FORMAT) CREATION DATE: SAT 06 JUN 2015 01:06:26 PM CEST
// TO EXCLUDE A COMPONENT FROM THE SPICE NETLIST ADD [SPICE_NETLIST_ENABLED] USER FIELD SET TO: N
// TO REORDER THE COMPONENT SPICE NODE SEQUENCE ADD [SPICE_NODE_SEQUENCE] USER FIELD AND DEFINE SEQUENCE: 2,1,0
// SHEET NAME:/
// IGNORED O_AUDIO0: O_AUDIO0 49 0
// .END
CAP(C200, CAP_N(100))
CAP(C28, CAP_U(1))
CAP(C31, CAP_N(470))
CAP(C32, CAP_N(3.3))
CAP(C33, CAP_U(1))
CAP(C34, CAP_N(1))
CAP(C35, CAP_N(1))
CAP(C36, CAP_N(6.5))
CAP(C37, CAP_N(22))
CAP(C38, CAP_N(1))
CAP(C39, CAP_N(1))
CAP(C40, CAP_P(12))
CAP(C41, CAP_U(1))
CAP(C42, CAP_N(1.2))
CAP(C43, CAP_N(1.2))
CAP(C44, CAP_U(1))
CAP(C45, CAP_N(22))
CAP(C47, CAP_U(1))
CAP(C48, CAP_N(470))
CAP(C49, CAP_N(3.3))
CAP(C50, CAP_N(22))
CAP(C51, CAP_N(22))
CAP(C52, CAP_N(27))
CAP(C53, CAP_N(27))
CAP(C56, CAP_N(6.8))
CAP(C57, CAP_N(6.8))
CAP(C59, CAP_N(6.8))
CAP(C60, CAP_N(22))
CAP(C61, CAP_N(22))
CAP(C62, CAP_N(6.8))
CAP(C63, CAP_N(1))
CAP(C64, CAP_N(68))
CAP(C65, CAP_N(68))
CAP(C66, CAP_N(68))
CAP(C67, CAP_N(15))
CAP(C68, CAP_N(15))
CAP(C69, CAP_N(10))
CAP(C70, CAP_N(22))
CAP(C72, CAP_N(12))
CAP(C73, CAP_N(10))
CAP(C76, CAP_N(68))
CAP(C77, CAP_N(12))
DIODE(D3, "1S1588")
DIODE(D4, "1S1588")
DIODE(D5, "1S1588")
POT(RV1, RES_K(50))
QBJT_EB(Q10, "2SC945")
QBJT_EB(Q3, "2SC945")
QBJT_EB(Q4, "2SC945")
QBJT_EB(Q5, "2SC945")
QBJT_EB(Q6, "2SC945")
QBJT_EB(Q7, "2SC945")
QBJT_EB(Q9, "2SC945")
SUBMODEL(LM324_DIP,XU1)
SUBMODEL(LM358_DIP,XU2)
TTL_7404_DIP(XU3)
RES(R100, RES_K(560))
RES(R101, RES_K(150))
RES(R102, RES_K(150))
RES(R103, RES_K(470))
RES(R104, RES_K(22))
RES(R105, RES_K(470))
RES(R106, RES_K(150))
RES(R107, RES_K(150))
RES(R108, RES_K(560))
RES(R119, RES_K(22))
RES(R200, RES_K(100))
RES(R201, RES_K(100))
RES(R27, RES_K(6.8))
RES(R28, RES_K(150))
RES(R29, RES_K(2.7))
RES(R30, RES_K(10))
RES(R31, RES_K(5.1))
RES(R32, RES_K(4.7))
RES(R34, RES_K(100))
RES(R35, RES_K(100))
RES(R36, RES_K(100))
RES(R37, RES_K(47))
RES(R38, 820)
RES(R39, RES_K(22))
RES(R40, RES_K(10))
RES(R41, RES_K(10))
RES(R42, RES_K(150))
RES(R43, 470)
RES(R44, RES_K(100))
RES(R45, RES_K(1))
RES(R46, RES_K(12))
RES(R48, 470)
RES(R48_2, RES_K(100))
RES(R49, RES_K(10))
RES(R50, RES_K(22))
RES(R51, RES_K(150))
RES(R52, RES_K(100))
RES(R53, RES_K(100))
RES(R54, RES_K(680))
RES(R55, RES_K(510))
RES(R57, 560)
RES(R58, RES_K(39))
RES(R59, 560)
RES(R60, RES_K(39))
RES(R61, RES_K(100))
RES(R62, RES_K(100))
RES(R63, RES_K(1))
RES(R65, RES_K(1))
RES(R65_1, RES_K(27))
RES(R66, RES_M(1))
RES(R67, RES_K(100))
RES(R68, RES_K(100))
RES(R69, RES_K(1))
RES(R70, RES_K(10))
RES(R71, RES_K(100))
RES(R72, RES_K(100))
RES(R73, RES_K(10))
RES(R74, RES_K(10))
RES(R75, RES_K(10))
RES(R76, RES_K(10))
RES(R81, 220)
RES(R82, RES_M(2.2))
RES(R83, RES_K(12))
RES(R84, RES_K(1))
RES(R85, RES_M(2.2))
RES(R86, RES_K(10))
RES(R87, RES_K(68))
RES(R89, RES_K(22))
RES(R90, RES_K(390))
RES(R91, RES_K(100))
RES(R92, RES_K(22))
RES(R93, RES_K(1))
RES(R94, RES_K(22))
RES(R95, RES_K(330))
RES(R96, RES_K(150))
RES(R97, RES_K(150))
RES(R98, RES_K(650))
#if USE_FIXED_STV
ANALOG_INPUT(STV, 2)
#else
RES(R78, RES_K(3.3))
RES(R77, RES_K(2.2))
CAP(C58, CAP_U(47))
#endif
NET_C(R95.1, XU3.2, R96.2)
NET_C(R95.2, XU3.1, C69.1)
NET_C(XU3.3, R103.2, C73.1)
NET_C(XU3.4, R103.1, R102.2)
NET_C(XU3.5, R105.2, C72.1)
NET_C(XU3.6, R105.1, R106.2)
#if USE_FIXED_STV
//FIXME: We should have a NET_C_REMOVE
NET_C(/*XU3.7,*/ C69.2, C73.2, C72.2, C77.2, C67.2, C68.2, R65.2, R38.2, XU1.11, R54.2, Q4.E, R63.2, C47.2, R72.2, R67.2, R71.2, R68.2, C48.2, R46.2, C28.1, C32.1, R43.2, XU2.4, C56.1, C52.1,/* R77.2, C58.1, */ R48.2, R93.2, R94.2, R119.2, R104.2, R53.2, R34.2, R81.2, R92.2, R89.2, C33.1, R37.2, R36.1, R91.1, I_V0.Q, RV1.3)
#else
NET_C(/*XU3.7,*/ C69.2, C73.2, C72.2, C77.2, C67.2, C68.2, R65.2, R38.2, XU1.11, R54.2, Q4.E, R63.2, C47.2, R72.2, R67.2, R71.2, R68.2, C48.2, R46.2, C28.1, C32.1, R43.2, XU2.4, C56.1, C52.1, R77.2, C58.1, R48.2, R93.2, R94.2, R119.2, R104.2, R53.2, R34.2, R81.2, R92.2, R89.2, C33.1, R37.2, R36.1, R91.1, I_V0.Q, RV1.3)
#endif
NET_C(XU3.8, R108.1, R107.2)
NET_C(XU3.9, R108.2, C77.1)
NET_C(XU3.10, R100.1, R101.2)
NET_C(XU3.11, R100.2, C67.1)
NET_C(XU3.12, R98.1, R97.2)
NET_C(XU3.13, R98.2, C68.1)
#if USE_FIXED_STV
NET_C(/*XU3.14,*/ XU1.4, R66.1, R70.1, Q6.C, Q5.C, XU2.8, /* R78.1, */ R86.1, R83.1, Q3.C, I_V5.Q)
#else
NET_C(/*XU3.14,*/ XU1.4, R66.1, R70.1, Q6.C, Q5.C, XU2.8, R78.1, R86.1, R83.1, Q3.C, I_V5.Q)
#endif
NET_C(R96.1, R102.1, R106.1, R107.1, R101.1, R97.1, R65.1, C63.2)
NET_C(C63.1, R65_1.2)
NET_C(R65_1.1, R44.2, C38.2, C40.2, XU1.6)
#if USE_FIXED_STV
NET_C(R30.1, R41.1, R40.1, STV, R76.2, /* R78.2, R77.1, C58.2*/ STV)
#else
NET_C(R30.1, R41.1, R40.1, R76.2, R78.2, R77.1, C58.2)
#endif
NET_C(R30.2, XU1.5)
NET_C(R44.1, C39.1, C40.1, R48_2.2)
NET_C(C38.1, C39.2, R38.1)
NET_C(XU1.1, XU1.2, R39.1, R32.2)
NET_C(XU1.3, C34.1, R41.2)
NET_C(XU1.7, R45.2)
NET_C(XU1.8, XU1.9, R31.2, C36.2)
NET_C(XU1.10, R42.1, C32.2)
NET_C(XU1.12, C49.1, C31.1, R40.2, C61.1, C60.1)
NET_C(XU1.13, R27.1, R28.2)
NET_C(XU1.14, R28.1, R29.2, I_SINH0.Q)
NET_C(R48_2.1, C45.2, R54.1)
NET_C(C45.1, R55.1, Q7.B)
NET_C(R55.2, R90.2, C33.2, R37.1, Q3.E)
NET_C(R45.1, C44.2)
NET_C(C44.1, R66.2, Q4.B)
NET_C(Q4.C, C42.1, C43.1, R46.1, C35.2, D4.K, D5.K)
NET_C(R70.2, R69.2, Q7.C)
NET_C(R63.1, Q7.E)
NET_C(R69.1, C49.2)
NET_C(C42.2, R58.1, D5.A)
NET_C(R58.2, R57.1, C47.1)
NET_C(R57.2, Q6.E)
NET_C(Q6.B, R61.1)
NET_C(C50.1, R67.1, R61.2)
NET_C(C50.2, R72.1, I_OH0.Q)
NET_C(C51.1, R68.1, R62.2)
NET_C(C51.2, R71.1, I_CH0.Q)
NET_C(R62.1, Q5.B)
NET_C(Q5.E, R59.2)
NET_C(R60.1, C43.2, D4.A)
NET_C(R60.2, R59.1, C48.1)
NET_C(C35.1, C34.2, R39.2)
NET_C(R32.1, C31.2)
NET_C(R27.2, C28.2)
NET_C(R29.1, R31.1, R50.2, R49.1, RV1.1)
NET_C(R42.2, R51.1, C36.1)
NET_C(R51.2, C41.1)
NET_C(C41.2, R43.1, I_SOUNDIC0.Q)
NET_C(XU2.1, XU2.2, R73.1)
NET_C(XU2.3, R76.1, C200.2)
NET_C(XU2.5, C56.2, R75.1)
NET_C(XU2.6, XU2.7, R50.1, C53.2)
NET_C(R75.2, R74.1, C53.1)
NET_C(R74.2, C52.2, R73.2)
NET_C(R49.2, R48.1, I_SOUND0.Q)
NET_C(Q9.E, R81.1)
NET_C(Q9.C, R84.2, R83.2, R82.1, C59.1)
NET_C(Q9.B, R82.2, C62.1)
NET_C(Q10.E, R93.1)
NET_C(Q10.C, R87.2, R86.2, R85.1, C76.1)
NET_C(Q10.B, R85.2, C64.1)
NET_C(R84.1, C61.2)
NET_C(C60.2, R87.1)
NET_C(C64.2, C65.1, R94.1, D3.K)
NET_C(C65.2, C66.1, R119.1)
NET_C(C66.2, C76.2, R104.1)
NET_C(R53.1, R52.2, C37.1)
NET_C(R34.1, C37.2, I_BD0.Q)
NET_C(R52.1, D3.A)
NET_C(R92.1, C62.2, C57.1)
NET_C(R89.1, C57.2, C59.2, R90.1)
NET_C(Q3.B, R35.1)
NET_C(R35.2, R36.2, C70.1)
NET_C(R91.2, C70.2, I_SD0.Q)
NET_C(I_MSM3K0.Q, R200.2)
NET_C(I_MSM2K0.Q, R201.2)
NET_C(R200.1, R201.1, C200.1)
NETLIST_END()
NETLIST_START(opamp)
/* Opamp model from
*
* http://www.ecircuitcenter.com/Circuits/opmodel1/opmodel1.htm
*
* Bandwidth 1Mhz
*
*/
/* Terminal definitions for calling netlists */
ALIAS(PLUS, G1.IP) // Positive input
ALIAS(MINUS, G1.IN) // Negative input
ALIAS(OUT, EBUF.OP) // Opamp output ...
ALIAS(GND, EBUF.ON) // GND terminal
ALIAS(VCC, DUMMY.I) // VCC terminal
DUMMY_INPUT(DUMMY)
/* The opamp model */
VCCS(G1)
PARAM(G1.RI, RES_K(1000))
PARAM(G1.G, 100) // typical OP-AMP amplification 100 * 1000 = 100000
RES(RP1, 1000)
CAP(CP1, 1.59e-5) // <== change to 1.59e-3 for 10Khz bandwidth
VCVS(EBUF)
PARAM(EBUF.RO, 50)
PARAM(EBUF.G, 1)
// NET_C(EBUF.ON, GND)
NET_C(G1.ON, GND)
NET_C(RP1.2, GND)
NET_C(CP1.2, GND)
NET_C(EBUF.IN, GND)
NET_C(RP1.1, G1.OP)
NET_C(CP1.1, RP1.1)
DIODE(DP,"1N914")
DIODE(DN,"1N914")
NET_C(DP.K, VCC)
NET_C(DP.A, DN.K, RP1.1)
NET_C(DN.A, GND)
NET_C(EBUF.IP, RP1.1)
NETLIST_END()
NETLIST_START(LM324_DIP)
SUBMODEL(opamp, op1)
SUBMODEL(opamp, op2)
SUBMODEL(opamp, op3)
SUBMODEL(opamp, op4)
ALIAS( 1, op1.OUT)
ALIAS( 2, op1.MINUS)
ALIAS( 3, op1.PLUS)
ALIAS( 7, op2.OUT)
ALIAS( 6, op2.MINUS)
ALIAS( 5, op2.PLUS)
ALIAS( 8, op3.OUT)
ALIAS( 9, op3.MINUS)
ALIAS(10, op3.PLUS)
ALIAS(14, op4.OUT)
ALIAS(13, op4.MINUS)
ALIAS(12, op4.PLUS)
NET_C(op1.GND, op2.GND, op3.GND, op4.GND)
NET_C(op1.VCC, op2.VCC, op3.VCC, op4.VCC)
ALIAS(11, op1.GND)
ALIAS( 4, op1.VCC)
NETLIST_END()
NETLIST_START(LM358_DIP)
SUBMODEL(opamp, op1)
SUBMODEL(opamp, op2)
ALIAS( 1, op1.OUT)
ALIAS( 2, op1.MINUS)
ALIAS( 3, op1.PLUS)
ALIAS( 7, op2.OUT)
ALIAS( 6, op2.MINUS)
ALIAS( 5, op2.PLUS)
NET_C(op1.GND, op2.GND)
NET_C(op1.VCC, op2.VCC)
ALIAS( 4, op1.GND)
ALIAS( 8, op1.VCC)
NETLIST_END()

View File

@ -16,14 +16,20 @@ NETLIST_START(main)
//PARAM(Solver.CONVERG, 1.0)
//PARAM(Solver.GS_LOOPS, 30)
// Tie up +5 to opamps thought it's not currently needed
// Stay compatible
ANALOG_INPUT(V5, 5)
NET_C(op.VCC, V5)
NET_C(op1.VCC, V5)
/* Opamp wired as impedance changer */
SUBMODEL(op, opamp)
SUBMODEL(opamp, op)
NET_C(op.GND, GND)
NET_C(op.PLUS, clk)
NET_C(op.MINUS, op.OUT)
SUBMODEL(op1, opamp)
SUBMODEL(opamp, op1)
/* Wired as inverting amplifier connected to output of first opamp */
RES(R1, 100000)
@ -41,7 +47,7 @@ NETLIST_START(main)
NET_C(RL.2, GND)
NET_C(RL.1, op1.OUT)
LOG(logX, op1.OUT)
//LOG(logX, op1.OUT)
//LOG(logY, clk)
NETLIST_END()
@ -62,6 +68,8 @@ NETLIST_START(opamp)
ALIAS(OUT, EBUF.OP) // Opamp output ...
ALIAS(GND, EBUF.ON) // GND terminal
ALIAS(VCC, DUMMY.I) // VCC terminal
DUMMY_INPUT(DUMMY)
/* The opamp model */

View File

@ -98,6 +98,36 @@ newoption {
description = 'Build bundled Expat library',
}
newoption {
trigger = 'with-bundled-zlib',
description = 'Build bundled Zlib library',
}
newoption {
trigger = 'with-bundled-jpeg',
description = 'Build bundled JPEG library',
}
newoption {
trigger = 'with-bundled-flac',
description = 'Build bundled FLAC library',
}
newoption {
trigger = 'with-bundled-lua',
description = 'Build bundled LUA library',
}
newoption {
trigger = 'with-bundled-sqlite3',
description = 'Build bundled SQLite library',
}
newoption {
trigger = 'with-bundled-portmidi',
description = 'Build bundled PortMidi library',
}
newoption {
trigger = "distro",
description = "Choose distribution",
@ -168,6 +198,11 @@ newoption {
description = "ARCHOPTS.",
}
newoption {
trigger = "OPT_FLAGS",
description = "OPT_FLAGS.",
}
newoption {
trigger = "LDOPTS",
description = "Additional linker options",
@ -311,6 +346,21 @@ newoption {
}
newoption {
trigger = "SHLIB",
description = "Generate shared libs.",
allowed = {
{ "0", "Static libs" },
{ "1", "Shared libs" },
}
}
if _OPTIONS["SHLIB"]=="1" then
LIBTYPE = "SharedLib"
else
LIBTYPE = "StaticLib"
end
PYTHON = "python"
if _OPTIONS["PYTHON_EXECUTABLE"]~=nil then
@ -576,9 +626,29 @@ else
end
-- need to ensure FLAC functions are statically linked
defines {
"FLAC__NO_DLL",
}
if _OPTIONS["with-bundled-flac"] then
defines {
"FLAC__NO_DLL",
}
end
if not _OPTIONS["with-bundled-jpeg"] then
defines {
"USE_SYSTEM_JPEGLIB",
}
end
if not _OPTIONS["with-bundled-portmidi"] then
defines {
"USE_SYSTEM_PORTMIDI",
}
end
if not _OPTIONS["with-bundled-sqlite3"] then
defines {
"USE_SYSTEM_SQLITE",
}
end
if _OPTIONS["NOASM"]=="1" then
defines {
@ -650,7 +720,7 @@ end
}
end
-- add -g if we need symbols, and ensure we have frame pointers
if _OPTIONS["SYMBOLS"]~=nil then
if _OPTIONS["SYMBOLS"]~=nil and _OPTIONS["SYMBOLS"]~="0" then
buildoptions {
"-g" .. _OPTIONS["SYMLEVEL"],
"-fno-omit-frame-pointer",
@ -695,7 +765,7 @@ if _OPTIONS["PROFILE"] then
}
end
if _OPTIONS["SYMBOLS"]~=nil then
if _OPTIONS["SYMBOLS"]~=nil and _OPTIONS["SYMBOLS"]~="0" then
flags {
"Symbols",
}
@ -724,30 +794,36 @@ if _OPTIONS["OPTIMIZE"] then
_OPTIONS["ARCHOPTS"]
}
end
if _OPTIONS["LTO"]=="1" then
if _OPTIONS["OPT_FLAGS"] then
buildoptions {
"-flto",
_OPTIONS["OPT_FLAGS"]
}
end
if _OPTIONS["LTO"]=="1" then
-- -flto=4 -> 4 threads
buildoptions {
"-flto=4",
}
buildoptions {
"-fno-fat-lto-objects",
}
-- buildoptions {
-- "-ffat-lto-objects",
-- }
-- buildoptions {
-- "-flto-partition=1to1",
-- }
linkoptions {
"-flto",
"-flto=4",
}
linkoptions {
"-fno-fat-lto-objects",
}
-- linkoptions {
-- "-flto-partition=1to1",
-- }
-- linkoptions {
-- "-ffat-lto-objects",
-- }
end
end
if _OPTIONS["SHLIB"] then
buildoptions {
"-fPIC"
}
end
if _OPTIONS["SSE2"]=="1" then
buildoptions {
"-msse2",
@ -847,6 +923,7 @@ end
end
if (version >= 30400) then
buildoptions {
"-Wno-inline-new-delete",
"-Wno-constant-logical-operand",
}
end
@ -878,7 +955,6 @@ end
if (version >= 40800) then
-- array bounds checking seems to be buggy in 4.8.1 (try it on video/stvvdp1.c and video/model1.c without -Wno-array-bounds)
buildoptions {
"-Wno-unused-variable",
"-Wno-array-bounds"
}
end

View File

@ -34,6 +34,7 @@ end
-- zlib library objects
--------------------------------------------------
if _OPTIONS["with-bundled-zlib"] then
project "zlib"
uuid "3d78bd2a-2bd0-4449-8087-42ddfaef7ec9"
kind "StaticLib"
@ -71,6 +72,11 @@ project "zlib"
"-Wshadow"
}
end
else
links {
"z",
}
end
--------------------------------------------------
-- SoftFloat library objects
@ -112,6 +118,7 @@ project "softfloat"
-- libJPEG library objects
--------------------------------------------------
if _OPTIONS["with-bundled-jpeg"] then
project "jpeg"
uuid "447c6800-dcfd-4c48-b72a-a8223bb409ca"
kind "StaticLib"
@ -169,11 +176,17 @@ project "jpeg"
"-Wshadow"
}
end
else
links {
"jpeg",
}
end
--------------------------------------------------
-- libflac library objects
--------------------------------------------------
if _OPTIONS["with-bundled-flac"] then
project "flac"
uuid "b6fc19e8-073a-4541-bb7b-d24b548d424a"
kind "StaticLib"
@ -223,6 +236,11 @@ project "flac"
"-Wshadow"
}
end
else
links {
"FLAC",
}
end
--------------------------------------------------
-- lib7z library objects
@ -268,6 +286,7 @@ project "7z"
-- LUA library objects
--------------------------------------------------
if _OPTIONS["with-bundled-lua"] then
project "lua"
uuid "d9e2eed1-f1ab-4737-a6ac-863700b1a5a9"
kind "StaticLib"
@ -342,6 +361,11 @@ project "lua"
"-Wshadow"
}
end
else
links {
"lua",
}
end
--------------------------------------------------
-- sqlite3 lua library objects
@ -362,8 +386,12 @@ project "lsqlite3"
includedirs {
MAME_DIR .. "3rdparty",
MAME_DIR .. "3rdparty/lua/src",
}
if _OPTIONS["with-bundled-lua"] then
includedirs {
MAME_DIR .. "3rdparty/lua/src",
}
end
files {
MAME_DIR .. "3rdparty/lsqlite3/lsqlite3.c",
@ -435,6 +463,7 @@ project "jsoncpp"
-- SQLite3 library objects
--------------------------------------------------
if _OPTIONS["with-bundled-sqlite3"] then
project "sqllite3"
uuid "5cb3d495-57ed-461c-81e5-80dc0857517d"
kind "StaticLib"
@ -455,11 +484,17 @@ project "sqllite3"
"-Wshadow"
}
end
else
links {
"sqlite3",
}
end
--------------------------------------------------
-- portmidi library objects
--------------------------------------------------
if _OPTIONS["NO_USE_MIDI"]~="1" then
if _OPTIONS["with-bundled-portmidi"] then
project "portmidi"
uuid "587f2da6-3274-4a65-86a2-f13ea315bb98"
kind "StaticLib"
@ -514,6 +549,11 @@ project "portmidi"
"-Wshadow"
}
end
else
links {
"portmidi",
}
end
end
--------------------------------------------------
-- BGFX library objects
@ -554,6 +594,7 @@ project "bgfx"
configuration { "gmake" }
buildoptions {
"-Wno-uninitialized",
"-Wno-unused-function",
}
configuration { }
@ -619,23 +660,32 @@ project "portaudio"
"-Wno-bad-function-cast",
"-Wno-undef",
"-Wno-missing-braces",
"-Wno-unused-but-set-variable",
"-Wno-maybe-uninitialized",
"-Wno-unused-variable",
"-Wno-unused-value",
"-Wno-unused-function",
"-Wno-unknown-pragmas",
"-Wno-sometimes-uninitialized",
}
local version = str_to_version(_OPTIONS["gcc_version"])
if (_OPTIONS["gcc"]~=nil) and string.find(_OPTIONS["gcc"], "clang") then
buildoptions_c {
"-Wno-unknown-warning-option",
"-Wno-absolute-value",
"-Wno-unused-variable",
}
local version = str_to_version(_OPTIONS["gcc_version"])
if (_OPTIONS["gcc"]~=nil) then
if string.find(_OPTIONS["gcc"], "clang") then
buildoptions_c {
"-Wno-unknown-warning-option",
"-Wno-absolute-value",
"-Wno-unused-but-set-variable",
"-Wno-maybe-uninitialized",
"-Wno-sometimes-uninitialized",
}
else
if (version >= 40600) then
buildoptions_c {
"-Wno-unused-but-set-variable",
"-Wno-maybe-uninitialized",
"-Wno-sometimes-uninitialized",
}
end
end
end
configuration { "vs*" }
buildoptions {
"/wd4204", -- warning C4204: nonstandard extension used : non-constant aggregate initializer

View File

@ -162,6 +162,23 @@ if (BUSES["APF"]~=null) then
end
---------------------------------------------------
--
--@src/emu/bus/apricot/expansion.h,BUSES += APRICOT_EXPANSION
---------------------------------------------------
if (BUSES["APRICOT_EXPANSION"]~=null) then
files {
MAME_DIR .. "src/emu/bus/apricot/expansion.c",
MAME_DIR .. "src/emu/bus/apricot/expansion.h",
MAME_DIR .. "src/emu/bus/apricot/cards.c",
MAME_DIR .. "src/emu/bus/apricot/cards.h",
MAME_DIR .. "src/emu/bus/apricot/ram.c",
MAME_DIR .. "src/emu/bus/apricot/ram.h",
}
end
---------------------------------------------------
--
--@src/emu/bus/arcadia/slot.h,BUSES += ARCADIA

View File

@ -631,6 +631,22 @@ if (CPUS["SH4"]~=null or _OPTIONS["with-tools"]) then
table.insert(disasm_files , MAME_DIR .. "src/emu/cpu/sh4/sh4dasm.c")
end
--------------------------------------------------
-- HP Hybrid processor
---@src/emu/cpu/hphybrid/hphybrid.h,CPUS += HPHYBRID
--------------------------------------------------
if (CPUS["HPHYBRID"]~=null) then
files {
MAME_DIR .. "src/emu/cpu/hphybrid/hphybrid.c",
MAME_DIR .. "src/emu/cpu/hphybrid/hphybrid.h",
}
end
if (CPUS["HPHYBRID"]~=null or _OPTIONS["with-tools"]) then
table.insert(disasm_files , MAME_DIR .. "src/emu/cpu/hphybrid/hphybrid_dasm.c")
end
--------------------------------------------------
-- Hudsonsoft 6280
---@src/emu/cpu/h6280/h6280.h,CPUS += H6280

View File

@ -2,8 +2,9 @@
-- copyright-holders:MAMEdev Team
project ("emu")
targetsubdir(_OPTIONS["target"] .."_" .. _OPTIONS["subtarget"])
uuid ("e6fa15e4-a354-4526-acef-13c8e80fcacf")
kind "StaticLib"
kind (LIBTYPE)
options {
"ForceCPP",
}
@ -14,8 +15,6 @@ includedirs {
MAME_DIR .. "src/lib",
MAME_DIR .. "src/lib/util",
MAME_DIR .. "3rdparty",
MAME_DIR .. "3rdparty/lua/src",
MAME_DIR .. "3rdparty/zlib",
GEN_DIR .. "emu",
GEN_DIR .. "emu/layout",
}
@ -24,6 +23,16 @@ if _OPTIONS["with-bundled-expat"] then
MAME_DIR .. "3rdparty/expat/lib",
}
end
if _OPTIONS["with-bundled-zlib"] then
includedirs {
MAME_DIR .. "3rdparty/zlib",
}
end
if _OPTIONS["with-bundled-lua"] then
includedirs {
MAME_DIR .. "3rdparty/lua/src",
}
end
files {
MAME_DIR .. "src/emu/emu.h",
@ -265,8 +274,6 @@ files {
MAME_DIR .. "src/emu/machine/laserdsc.h",
MAME_DIR .. "src/emu/machine/latch.c",
MAME_DIR .. "src/emu/machine/latch.h",
MAME_DIR .. "src/emu/machine/netlist.c",
MAME_DIR .. "src/emu/machine/netlist.h",
MAME_DIR .. "src/emu/machine/nvram.c",
MAME_DIR .. "src/emu/machine/nvram.h",
MAME_DIR .. "src/emu/machine/ram.c",
@ -358,7 +365,7 @@ function emuProject(_target, _subtarget)
project ("optional")
uuid (os.uuid("optional-" .. _target .."_" .. _subtarget))
kind "StaticLib"
kind (LIBTYPE)
targetsubdir(_target .."_" .. _subtarget)
options {
"ForceCPP",
@ -372,8 +379,6 @@ function emuProject(_target, _subtarget)
MAME_DIR .. "src/lib",
MAME_DIR .. "src/lib/util",
MAME_DIR .. "3rdparty",
MAME_DIR .. "3rdparty/lua/src",
MAME_DIR .. "3rdparty/zlib",
GEN_DIR .. "emu",
GEN_DIR .. "emu/layout",
MAME_DIR .. "src/emu/cpu/m68000",
@ -383,21 +388,32 @@ function emuProject(_target, _subtarget)
MAME_DIR .. "3rdparty/expat/lib",
}
end
if _OPTIONS["with-bundled-zlib"] then
includedirs {
MAME_DIR .. "3rdparty/zlib",
}
end
if _OPTIONS["with-bundled-lua"] then
includedirs {
MAME_DIR .. "3rdparty/lua/src",
}
end
dofile(path.join("src", "cpu.lua"))
dofile(path.join("src", "sound.lua"))
dofile(path.join("src", "netlist.lua"))
dofile(path.join("src", "video.lua"))
dofile(path.join("src", "machine.lua"))
-- netlist now defines a project
dofile(path.join("src", "netlist.lua"))
project ("bus")
uuid ("5d782c89-cf7e-4cfe-8f9f-0d4bfc16c91d")
kind "StaticLib"
kind (LIBTYPE)
targetsubdir(_target .."_" .. _subtarget)
options {
"ForceCPP",
@ -410,8 +426,6 @@ function emuProject(_target, _subtarget)
MAME_DIR .. "src/lib",
MAME_DIR .. "src/lib/util",
MAME_DIR .. "3rdparty",
MAME_DIR .. "3rdparty/lua/src",
MAME_DIR .. "3rdparty/zlib",
MAME_DIR .. "src/mess", -- some mess bus devices need this
MAME_DIR .. "src/mame", -- used for nes bus devices
GEN_DIR .. "emu",
@ -422,13 +436,23 @@ function emuProject(_target, _subtarget)
MAME_DIR .. "3rdparty/expat/lib",
}
end
if _OPTIONS["with-bundled-zlib"] then
includedirs {
MAME_DIR .. "3rdparty/zlib",
}
end
if _OPTIONS["with-bundled-lua"] then
includedirs {
MAME_DIR .. "3rdparty/lua/src",
}
end
dofile(path.join("src", "bus.lua"))
project ("dasm")
uuid ("f2d28b0a-6da5-4f78-b629-d834aa00429d")
kind "StaticLib"
kind (LIBTYPE)
targetsubdir(_target .."_" .. _subtarget)
options {
"ForceCPP",
@ -440,8 +464,6 @@ function emuProject(_target, _subtarget)
MAME_DIR .. "src/lib",
MAME_DIR .. "src/lib/util",
MAME_DIR .. "3rdparty",
MAME_DIR .. "3rdparty/lua/src",
MAME_DIR .. "3rdparty/zlib",
GEN_DIR .. "emu",
}
if _OPTIONS["with-bundled-expat"] then
@ -449,6 +471,16 @@ function emuProject(_target, _subtarget)
MAME_DIR .. "3rdparty/expat/lib",
}
end
if _OPTIONS["with-bundled-zlib"] then
includedirs {
MAME_DIR .. "3rdparty/zlib",
}
end
if _OPTIONS["with-bundled-lua"] then
includedirs {
MAME_DIR .. "3rdparty/lua/src",
}
end
files {
disasm_files

View File

@ -2,8 +2,9 @@
-- copyright-holders:MAMEdev Team
project "utils"
targetsubdir(_OPTIONS["target"] .."_" .. _OPTIONS["subtarget"])
uuid "22489ad0-4cb2-4d91-ad81-24b0d80ca30a"
kind "StaticLib"
kind (LIBTYPE)
options {
"ForceCPP",
@ -13,13 +14,17 @@ project "utils"
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib/util",
MAME_DIR .. "3rdparty",
MAME_DIR .. "3rdparty/zlib",
}
if _OPTIONS["with-bundled-expat"] then
includedirs {
MAME_DIR .. "3rdparty/expat/lib",
}
end
if _OPTIONS["with-bundled-zlib"] then
includedirs {
MAME_DIR .. "3rdparty/zlib",
}
end
files {
MAME_DIR .. "src/lib/util/bitstream.h",
@ -94,8 +99,9 @@ project "utils"
project "formats"
targetsubdir(_OPTIONS["target"] .."_" .. _OPTIONS["subtarget"])
uuid "f69636b1-fcce-45ce-b09a-113e371a2d7a"
kind "StaticLib"
kind (LIBTYPE)
options {
"ForceCPP",
@ -108,10 +114,17 @@ project "formats"
MAME_DIR .. "src/lib",
MAME_DIR .. "src/lib/util",
MAME_DIR .. "3rdparty",
MAME_DIR .. "3rdparty/zlib",
}
if _OPTIONS["with-bundled-zlib"] then
includedirs {
MAME_DIR .. "3rdparty/zlib",
}
end
files {
MAME_DIR .. "src/lib/formats/2d_dsk.c",
MAME_DIR .. "src/lib/formats/2d_dsk.h",
MAME_DIR .. "src/lib/formats/cassimg.c",
MAME_DIR .. "src/lib/formats/cassimg.h",
MAME_DIR .. "src/lib/formats/flopimg.c",
@ -154,10 +167,10 @@ project "formats"
MAME_DIR .. "src/lib/formats/asst128_dsk.h",
MAME_DIR .. "src/lib/formats/atari_dsk.c",
MAME_DIR .. "src/lib/formats/atari_dsk.h",
MAME_DIR .. "src/lib/formats/atarist_dsk.c",
MAME_DIR .. "src/lib/formats/atarist_dsk.h",
MAME_DIR .. "src/lib/formats/atom_tap.c",
MAME_DIR .. "src/lib/formats/atom_tap.h",
MAME_DIR .. "src/lib/formats/bbc_dsk.c",
MAME_DIR .. "src/lib/formats/bbc_dsk.h",
MAME_DIR .. "src/lib/formats/bw2_dsk.c",
MAME_DIR .. "src/lib/formats/bw2_dsk.h",
MAME_DIR .. "src/lib/formats/bw12_dsk.c",
@ -176,14 +189,14 @@ project "formats"
MAME_DIR .. "src/lib/formats/cbm_tap.h",
MAME_DIR .. "src/lib/formats/ccvf_dsk.c",
MAME_DIR .. "src/lib/formats/ccvf_dsk.h",
MAME_DIR .. "src/lib/formats/cd90_640_dsk.c",
MAME_DIR .. "src/lib/formats/cd90_640_dsk.h",
MAME_DIR .. "src/lib/formats/cgen_cas.c",
MAME_DIR .. "src/lib/formats/cgen_cas.h",
MAME_DIR .. "src/lib/formats/cgenie_dsk.c",
MAME_DIR .. "src/lib/formats/cgenie_dsk.h",
MAME_DIR .. "src/lib/formats/coco_cas.c",
MAME_DIR .. "src/lib/formats/coco_cas.h",
MAME_DIR .. "src/lib/formats/coco_dsk.c",
MAME_DIR .. "src/lib/formats/coco_dsk.h",
MAME_DIR .. "src/lib/formats/comx35_dsk.c",
MAME_DIR .. "src/lib/formats/comx35_dsk.h",
MAME_DIR .. "src/lib/formats/concept_dsk.c",
@ -251,12 +264,16 @@ project "formats"
MAME_DIR .. "src/lib/formats/hect_dsk.h",
MAME_DIR .. "src/lib/formats/hect_tap.c",
MAME_DIR .. "src/lib/formats/hect_tap.h",
MAME_DIR .. "src/lib/formats/hector_minidisc.c",
MAME_DIR .. "src/lib/formats/hector_minidisc.h",
MAME_DIR .. "src/lib/formats/iq151_dsk.c",
MAME_DIR .. "src/lib/formats/iq151_dsk.h",
MAME_DIR .. "src/lib/formats/imd_dsk.c",
MAME_DIR .. "src/lib/formats/imd_dsk.h",
MAME_DIR .. "src/lib/formats/ipf_dsk.c",
MAME_DIR .. "src/lib/formats/ipf_dsk.h",
MAME_DIR .. "src/lib/formats/jvc_dsk.c",
MAME_DIR .. "src/lib/formats/jvc_dsk.h",
MAME_DIR .. "src/lib/formats/kaypro_dsk.c",
MAME_DIR .. "src/lib/formats/kaypro_dsk.h",
MAME_DIR .. "src/lib/formats/kc_cas.c",
@ -309,6 +326,8 @@ project "formats"
MAME_DIR .. "src/lib/formats/pc98fdi_dsk.h",
MAME_DIR .. "src/lib/formats/phc25_cas.c",
MAME_DIR .. "src/lib/formats/phc25_cas.h",
MAME_DIR .. "src/lib/formats/pk8020_dsk.c",
MAME_DIR .. "src/lib/formats/pk8020_dsk.h",
MAME_DIR .. "src/lib/formats/pmd_cas.c",
MAME_DIR .. "src/lib/formats/pmd_cas.h",
MAME_DIR .. "src/lib/formats/primoptp.c",
@ -359,8 +378,8 @@ project "formats"
MAME_DIR .. "src/lib/formats/trd_dsk.h",
MAME_DIR .. "src/lib/formats/trs_cas.c",
MAME_DIR .. "src/lib/formats/trs_cas.h",
MAME_DIR .. "src/lib/formats/trs_dsk.c",
MAME_DIR .. "src/lib/formats/trs_dsk.h",
MAME_DIR .. "src/lib/formats/trs80_dsk.c",
MAME_DIR .. "src/lib/formats/trs80_dsk.h",
MAME_DIR .. "src/lib/formats/tvc_cas.c",
MAME_DIR .. "src/lib/formats/tvc_cas.h",
MAME_DIR .. "src/lib/formats/tvc_dsk.c",
@ -371,16 +390,16 @@ project "formats"
MAME_DIR .. "src/lib/formats/uef_cas.h",
MAME_DIR .. "src/lib/formats/upd765_dsk.c",
MAME_DIR .. "src/lib/formats/upd765_dsk.h",
MAME_DIR .. "src/lib/formats/vdk_dsk.c",
MAME_DIR .. "src/lib/formats/vdk_dsk.h",
MAME_DIR .. "src/lib/formats/vector06_dsk.c",
MAME_DIR .. "src/lib/formats/vector06_dsk.h",
MAME_DIR .. "src/lib/formats/victor9k_dsk.c",
MAME_DIR .. "src/lib/formats/victor9k_dsk.h",
MAME_DIR .. "src/lib/formats/vg5k_cas.c",
MAME_DIR .. "src/lib/formats/vg5k_cas.h",
MAME_DIR .. "src/lib/formats/vt_cas.c",
MAME_DIR .. "src/lib/formats/vt_cas.h",
MAME_DIR .. "src/lib/formats/vt_dsk.c",
MAME_DIR .. "src/lib/formats/vt_dsk.h",
MAME_DIR .. "src/lib/formats/vtech1_dsk.c",
MAME_DIR .. "src/lib/formats/vtech1_dsk.h",
MAME_DIR .. "src/lib/formats/wavfile.c",
MAME_DIR .. "src/lib/formats/wavfile.h",
MAME_DIR .. "src/lib/formats/wd177x_dsk.c",

View File

@ -2241,18 +2241,6 @@ if (MACHINES["WD11C00_17"]~=null) then
}
end
---------------------------------------------------
--
--@src/emu/machine/wd17xx.h,MACHINES += WD17XX
---------------------------------------------------
if (MACHINES["WD17XX"]~=null) then
files {
MAME_DIR .. "src/emu/machine/wd17xx.c",
MAME_DIR .. "src/emu/machine/wd17xx.h",
}
end
---------------------------------------------------
--
--@src/emu/machine/wd2010.h,MACHINES += WD2010
@ -2662,3 +2650,14 @@ if (MACHINES["PCI9050"]~=null) then
}
end
---------------------------------------------------
--
--@src/emu/machine/netlist.h,MACHINES += NETLIST
---------------------------------------------------
if (MACHINES["NETLIST"]~=null) then
files {
MAME_DIR .. "src/emu/machine/netlist.c",
MAME_DIR .. "src/emu/machine/netlist.h",
}
end

View File

@ -87,6 +87,7 @@ function mainProject(_target, _subtarget)
links {
"osd_" .. _OPTIONS["osd"],
"bus",
"netlist",
"optional",
"emu",
"dasm",
@ -94,16 +95,44 @@ function mainProject(_target, _subtarget)
"expat",
"softfloat",
"jpeg",
"flac",
"7z",
"formats",
"lua",
"lsqlite3",
"sqllite3",
"zlib",
"jsoncpp",
"mongoose",
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
if _OPTIONS["with-bundled-flac"] then
links {
"flac",
}
else
links {
"FLAC",
}
end
if _OPTIONS["with-bundled-sqlite3"] then
links {
"sqllite3",
}
else
links {
"sqlite3",
}
end
if _OPTIONS["NO_USE_MIDI"]~="1" then
links {
"portmidi",
@ -129,11 +158,16 @@ function mainProject(_target, _subtarget)
MAME_DIR .. "src/lib",
MAME_DIR .. "src/lib/util",
MAME_DIR .. "3rdparty",
MAME_DIR .. "3rdparty/zlib",
GEN_DIR .. _target .. "/layout",
GEN_DIR .. "resource",
}
if _OPTIONS["with-bundled-zlib"] then
includedirs {
MAME_DIR .. "3rdparty/zlib",
}
end
if _OPTIONS["targetos"]=="macosx" and (not override_resources) then
linkoptions {
"-sectcreate __TEXT __info_plist " .. GEN_DIR .. "/resource/" .. _subtarget .. "-Info.plist"

View File

@ -1,127 +1,152 @@
-- license:BSD-3-Clause
-- copyright-holders:MAMEdev Team
files {
MAME_DIR .. "src/emu/netlist/nl_config.h",
MAME_DIR .. "src/emu/netlist/nl_dice_compat.h",
MAME_DIR .. "src/emu/netlist/nl_lists.h",
MAME_DIR .. "src/emu/netlist/nl_time.h",
MAME_DIR .. "src/emu/netlist/nl_util.h",
MAME_DIR .. "src/emu/netlist/nl_base.c",
MAME_DIR .. "src/emu/netlist/nl_base.h",
MAME_DIR .. "src/emu/netlist/nl_parser.c",
MAME_DIR .. "src/emu/netlist/nl_parser.h",
MAME_DIR .. "src/emu/netlist/nl_setup.c",
MAME_DIR .. "src/emu/netlist/nl_setup.h",
MAME_DIR .. "src/emu/netlist/nl_factory.c",
MAME_DIR .. "src/emu/netlist/nl_factory.h",
MAME_DIR .. "src/emu/netlist/plib/pconfig.h",
MAME_DIR .. "src/emu/netlist/plib/palloc.c",
MAME_DIR .. "src/emu/netlist/plib/palloc.h",
MAME_DIR .. "src/emu/netlist/plib/plists.h",
MAME_DIR .. "src/emu/netlist/plib/poptions.h",
MAME_DIR .. "src/emu/netlist/plib/pparser.c",
MAME_DIR .. "src/emu/netlist/plib/pparser.h",
MAME_DIR .. "src/emu/netlist/plib/pstate.c",
MAME_DIR .. "src/emu/netlist/plib/pstate.h",
MAME_DIR .. "src/emu/netlist/plib/pstring.c",
MAME_DIR .. "src/emu/netlist/plib/pstring.h",
MAME_DIR .. "src/emu/netlist/analog/nld_bjt.c",
MAME_DIR .. "src/emu/netlist/analog/nld_bjt.h",
MAME_DIR .. "src/emu/netlist/analog/nld_fourterm.c",
MAME_DIR .. "src/emu/netlist/analog/nld_fourterm.h",
MAME_DIR .. "src/emu/netlist/analog/nld_solver.c",
MAME_DIR .. "src/emu/netlist/analog/nld_solver.h",
MAME_DIR .. "src/emu/netlist/analog/nld_switches.c",
MAME_DIR .. "src/emu/netlist/analog/nld_switches.h",
MAME_DIR .. "src/emu/netlist/analog/nld_twoterm.c",
MAME_DIR .. "src/emu/netlist/analog/nld_twoterm.h",
MAME_DIR .. "src/emu/netlist/analog/nld_opamps.c",
MAME_DIR .. "src/emu/netlist/analog/nld_opamps.h",
MAME_DIR .. "src/emu/netlist/analog/nld_ms_direct.h",
MAME_DIR .. "src/emu/netlist/analog/nld_ms_direct1.h",
MAME_DIR .. "src/emu/netlist/analog/nld_ms_direct2.h",
MAME_DIR .. "src/emu/netlist/analog/nld_ms_gauss_seidel.h",
MAME_DIR .. "src/emu/netlist/devices/nld_4020.c",
MAME_DIR .. "src/emu/netlist/devices/nld_4020.h",
MAME_DIR .. "src/emu/netlist/devices/nld_4066.c",
MAME_DIR .. "src/emu/netlist/devices/nld_4066.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7400.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7400.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7402.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7402.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7404.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7404.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7408.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7408.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7410.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7410.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7411.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7411.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7420.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7420.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7425.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7425.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7427.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7427.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7430.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7430.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7432.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7432.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7437.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7437.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7448.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7448.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7450.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7450.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7474.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7474.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7483.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7483.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7486.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7486.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7490.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7490.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7493.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7493.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74107.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74107.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74123.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74123.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74153.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74153.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74175.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74175.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74192.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74192.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74193.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74193.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74279.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74279.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74ls629.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74ls629.h",
MAME_DIR .. "src/emu/netlist/devices/nld_82S16.c",
MAME_DIR .. "src/emu/netlist/devices/nld_82S16.h",
MAME_DIR .. "src/emu/netlist/devices/nld_9310.c",
MAME_DIR .. "src/emu/netlist/devices/nld_9310.h",
MAME_DIR .. "src/emu/netlist/devices/nld_9312.c",
MAME_DIR .. "src/emu/netlist/devices/nld_9312.h",
MAME_DIR .. "src/emu/netlist/devices/nld_9316.c",
MAME_DIR .. "src/emu/netlist/devices/nld_9316.h",
MAME_DIR .. "src/emu/netlist/devices/nld_ne555.c",
MAME_DIR .. "src/emu/netlist/devices/nld_ne555.h",
MAME_DIR .. "src/emu/netlist/devices/nld_r2r_dac.c",
MAME_DIR .. "src/emu/netlist/devices/nld_r2r_dac.h",
MAME_DIR .. "src/emu/netlist/devices/nld_legacy.c",
MAME_DIR .. "src/emu/netlist/devices/nld_legacy.h",
MAME_DIR .. "src/emu/netlist/devices/net_lib.c",
MAME_DIR .. "src/emu/netlist/devices/net_lib.h",
MAME_DIR .. "src/emu/netlist/devices/nld_log.c",
MAME_DIR .. "src/emu/netlist/devices/nld_log.h",
MAME_DIR .. "src/emu/netlist/devices/nld_system.c",
MAME_DIR .. "src/emu/netlist/devices/nld_system.h",
MAME_DIR .. "src/emu/netlist/devices/nld_cmos.h",
MAME_DIR .. "src/emu/netlist/devices/nld_signal.h",
MAME_DIR .. "src/emu/netlist/devices/nld_truthtable.c",
MAME_DIR .. "src/emu/netlist/devices/nld_truthtable.h",
project "netlist"
targetsubdir(_OPTIONS["target"] .."_" .. _OPTIONS["subtarget"])
uuid "665ef8ac-2a4c-4c3e-a05f-fd1e5db11de9"
kind (LIBTYPE)
options {
"ForceCPP",
}
includedirs {
MAME_DIR .. "src/emu/netlist",
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib/util",
}
-- if _OPTIONS["with-bundled-expat"] then
-- includedirs {
-- MAME_DIR .. "3rdparty/expat/lib",
-- }
--end
files {
MAME_DIR .. "src/emu/netlist/nl_config.h",
MAME_DIR .. "src/emu/netlist/nl_dice_compat.h",
MAME_DIR .. "src/emu/netlist/nl_lists.h",
MAME_DIR .. "src/emu/netlist/nl_time.h",
MAME_DIR .. "src/emu/netlist/nl_util.h",
MAME_DIR .. "src/emu/netlist/nl_base.c",
MAME_DIR .. "src/emu/netlist/nl_base.h",
MAME_DIR .. "src/emu/netlist/nl_parser.c",
MAME_DIR .. "src/emu/netlist/nl_parser.h",
MAME_DIR .. "src/emu/netlist/nl_setup.c",
MAME_DIR .. "src/emu/netlist/nl_setup.h",
MAME_DIR .. "src/emu/netlist/nl_factory.c",
MAME_DIR .. "src/emu/netlist/nl_factory.h",
MAME_DIR .. "src/emu/netlist/plib/pconfig.h",
MAME_DIR .. "src/emu/netlist/plib/palloc.c",
MAME_DIR .. "src/emu/netlist/plib/palloc.h",
MAME_DIR .. "src/emu/netlist/plib/plists.h",
MAME_DIR .. "src/emu/netlist/plib/poptions.h",
MAME_DIR .. "src/emu/netlist/plib/pparser.c",
MAME_DIR .. "src/emu/netlist/plib/pparser.h",
MAME_DIR .. "src/emu/netlist/plib/pstate.c",
MAME_DIR .. "src/emu/netlist/plib/pstate.h",
MAME_DIR .. "src/emu/netlist/plib/pstring.c",
MAME_DIR .. "src/emu/netlist/plib/pstring.h",
MAME_DIR .. "src/emu/netlist/plib/pstring.c",
MAME_DIR .. "src/emu/netlist/plib/pstring.h",
MAME_DIR .. "src/emu/netlist/tools/nl_convert.c",
MAME_DIR .. "src/emu/netlist/tools/nl_convert.h",
MAME_DIR .. "src/emu/netlist/analog/nld_bjt.c",
MAME_DIR .. "src/emu/netlist/analog/nld_bjt.h",
MAME_DIR .. "src/emu/netlist/analog/nld_fourterm.c",
MAME_DIR .. "src/emu/netlist/analog/nld_fourterm.h",
MAME_DIR .. "src/emu/netlist/analog/nld_solver.c",
MAME_DIR .. "src/emu/netlist/analog/nld_solver.h",
MAME_DIR .. "src/emu/netlist/analog/nld_switches.c",
MAME_DIR .. "src/emu/netlist/analog/nld_switches.h",
MAME_DIR .. "src/emu/netlist/analog/nld_twoterm.c",
MAME_DIR .. "src/emu/netlist/analog/nld_twoterm.h",
MAME_DIR .. "src/emu/netlist/analog/nld_opamps.c",
MAME_DIR .. "src/emu/netlist/analog/nld_opamps.h",
MAME_DIR .. "src/emu/netlist/analog/nld_ms_direct.h",
MAME_DIR .. "src/emu/netlist/analog/nld_ms_direct1.h",
MAME_DIR .. "src/emu/netlist/analog/nld_ms_direct2.h",
MAME_DIR .. "src/emu/netlist/analog/nld_ms_gauss_seidel.h",
MAME_DIR .. "src/emu/netlist/devices/nld_4020.c",
MAME_DIR .. "src/emu/netlist/devices/nld_4020.h",
MAME_DIR .. "src/emu/netlist/devices/nld_4066.c",
MAME_DIR .. "src/emu/netlist/devices/nld_4066.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7400.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7400.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7402.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7402.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7404.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7404.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7408.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7408.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7410.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7410.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7411.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7411.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7420.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7420.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7425.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7425.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7427.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7427.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7430.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7430.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7432.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7432.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7437.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7437.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7448.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7448.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7450.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7450.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7474.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7474.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7483.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7483.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7486.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7486.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7490.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7490.h",
MAME_DIR .. "src/emu/netlist/devices/nld_7493.c",
MAME_DIR .. "src/emu/netlist/devices/nld_7493.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74107.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74107.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74123.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74123.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74153.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74153.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74175.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74175.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74192.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74192.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74193.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74193.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74279.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74279.h",
MAME_DIR .. "src/emu/netlist/devices/nld_74ls629.c",
MAME_DIR .. "src/emu/netlist/devices/nld_74ls629.h",
MAME_DIR .. "src/emu/netlist/devices/nld_82S16.c",
MAME_DIR .. "src/emu/netlist/devices/nld_82S16.h",
MAME_DIR .. "src/emu/netlist/devices/nld_9310.c",
MAME_DIR .. "src/emu/netlist/devices/nld_9310.h",
MAME_DIR .. "src/emu/netlist/devices/nld_9312.c",
MAME_DIR .. "src/emu/netlist/devices/nld_9312.h",
MAME_DIR .. "src/emu/netlist/devices/nld_9316.c",
MAME_DIR .. "src/emu/netlist/devices/nld_9316.h",
MAME_DIR .. "src/emu/netlist/devices/nld_ne555.c",
MAME_DIR .. "src/emu/netlist/devices/nld_ne555.h",
MAME_DIR .. "src/emu/netlist/devices/nld_r2r_dac.c",
MAME_DIR .. "src/emu/netlist/devices/nld_r2r_dac.h",
MAME_DIR .. "src/emu/netlist/devices/nld_legacy.c",
MAME_DIR .. "src/emu/netlist/devices/nld_legacy.h",
MAME_DIR .. "src/emu/netlist/devices/net_lib.c",
MAME_DIR .. "src/emu/netlist/devices/net_lib.h",
MAME_DIR .. "src/emu/netlist/devices/nld_log.c",
MAME_DIR .. "src/emu/netlist/devices/nld_log.h",
MAME_DIR .. "src/emu/netlist/devices/nld_system.c",
MAME_DIR .. "src/emu/netlist/devices/nld_system.h",
MAME_DIR .. "src/emu/netlist/devices/nld_cmos.h",
MAME_DIR .. "src/emu/netlist/devices/nld_signal.h",
MAME_DIR .. "src/emu/netlist/devices/nld_truthtable.c",
MAME_DIR .. "src/emu/netlist/devices/nld_truthtable.h",
}

View File

@ -7,7 +7,7 @@ end
project ("osd_" .. _OPTIONS["osd"])
uuid (os.uuid("osd_" .. _OPTIONS["osd"]))
kind "StaticLib"
kind (LIBTYPE)
removeflags {
"SingleOutputDir",
@ -54,7 +54,7 @@ project ("osd_" .. _OPTIONS["osd"])
project ("ocore_" .. _OPTIONS["osd"])
uuid (os.uuid("ocore_" .. _OPTIONS["osd"]))
kind "StaticLib"
kind (LIBTYPE)
options {
"ForceCPP",

View File

@ -101,6 +101,11 @@ newoption {
description = "link against specific GL-Library - also adds rpath to executable (overridden by USE_DISPATCH_GL)",
}
newoption {
trigger = "SDL_INI_PATH",
description = "Default search path for .ini files",
}
newoption {
trigger = "NO_X11",
description = "Disable use of X11",
@ -293,8 +298,9 @@ end
project ("osd_" .. _OPTIONS["osd"])
targetsubdir(_OPTIONS["target"] .."_" .._OPTIONS["subtarget"])
uuid (os.uuid("osd_" .. _OPTIONS["osd"]))
kind "StaticLib"
kind (LIBTYPE)
dofile("sdl_cfg.lua")
osdmodulesbuild()
@ -361,8 +367,9 @@ project ("osd_" .. _OPTIONS["osd"])
project ("ocore_" .. _OPTIONS["osd"])
targetsubdir(_OPTIONS["target"] .."_" .. _OPTIONS["subtarget"])
uuid (os.uuid("ocore_" .. _OPTIONS["osd"]))
kind "StaticLib"
kind (LIBTYPE)
options {
"ForceCPP",

View File

@ -18,6 +18,11 @@ if _OPTIONS["NO_OPENGL"]~="1" and _OPTIONS["USE_DISPATCH_GL"]~="1" and _OPTIONS[
}
end
if _OPTIONS["SDL_INI_PATH"]~=nil then
defines {
"'INI_PATH=\"" .. _OPTIONS["SDL_INI_PATH"] .. "\"'",
}
end
if _OPTIONS["NO_X11"]=="1" then
defines {

View File

@ -90,7 +90,7 @@ end
project ("osd_" .. _OPTIONS["osd"])
uuid (os.uuid("osd_" .. _OPTIONS["osd"]))
kind "StaticLib"
kind (LIBTYPE)
dofile("windows_cfg.lua")
osdmodulesbuild()
@ -153,7 +153,7 @@ project ("osd_" .. _OPTIONS["osd"])
project ("ocore_" .. _OPTIONS["osd"])
uuid (os.uuid("ocore_" .. _OPTIONS["osd"]))
kind "StaticLib"
kind (LIBTYPE)
options {
"ForceCPP",

View File

@ -24,10 +24,19 @@ end
links {
"utils",
"expat",
"zlib",
"ocore_" .. _OPTIONS["osd"],
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib/util",
@ -60,12 +69,30 @@ end
links {
"utils",
"expat",
"zlib",
"flac",
"7z",
"ocore_" .. _OPTIONS["osd"],
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
if _OPTIONS["with-bundled-flac"] then
links {
"flac",
}
else
links {
"FLAC",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib/util",
@ -100,10 +127,19 @@ end
links {
"utils",
"expat",
"zlib",
"ocore_" .. _OPTIONS["osd"],
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib/util",
@ -138,12 +174,30 @@ links {
"emu",
"utils",
"expat",
"zlib",
"flac",
"7z",
"ocore_" .. _OPTIONS["osd"],
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
if _OPTIONS["with-bundled-flac"] then
links {
"flac",
}
else
links {
"FLAC",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/emu",
@ -179,12 +233,30 @@ end
links {
"utils",
"expat",
"zlib",
"flac",
"7z",
"ocore_" .. _OPTIONS["osd"],
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
if _OPTIONS["with-bundled-flac"] then
links {
"flac",
}
else
links {
"FLAC",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib/util",
@ -218,12 +290,30 @@ end
links {
"utils",
"expat",
"zlib",
"flac",
"7z",
"ocore_" .. _OPTIONS["osd"],
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
if _OPTIONS["with-bundled-flac"] then
links {
"flac",
}
else
links {
"FLAC",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib/util",
@ -257,10 +347,19 @@ end
links {
"utils",
"expat",
"zlib",
"ocore_" .. _OPTIONS["osd"],
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib/util",
@ -293,10 +392,19 @@ end
links {
"utils",
"expat",
"zlib",
"ocore_" .. _OPTIONS["osd"],
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib/util",
@ -329,10 +437,19 @@ end
links {
"utils",
"expat",
"zlib",
"ocore_" .. _OPTIONS["osd"],
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib/util",
@ -365,12 +482,30 @@ end
links {
"utils",
"expat",
"zlib",
"flac",
"7z",
"ocore_" .. _OPTIONS["osd"],
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
if _OPTIONS["with-bundled-flac"] then
links {
"flac",
}
else
links {
"FLAC",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib/util",
@ -403,10 +538,19 @@ end
links {
"utils",
"expat",
"zlib",
"ocore_" .. _OPTIONS["osd"],
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib/util",
@ -439,12 +583,31 @@ end
links {
"utils",
"expat",
"zlib",
"flac",
"7z",
"ocore_" .. _OPTIONS["osd"],
"netlist",
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
if _OPTIONS["with-bundled-flac"] then
links {
"flac",
}
else
links {
"FLAC",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib/util",
@ -455,8 +618,6 @@ files {
MAME_DIR .. "src/tools/nltool.c",
}
dofile("netlist.lua")
--------------------------------------------------
-- castool
--------------------------------------------------
@ -481,12 +642,30 @@ links {
"formats",
"utils",
"expat",
"zlib",
"flac",
"7z",
"ocore_" .. _OPTIONS["osd"],
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
if _OPTIONS["with-bundled-flac"] then
links {
"flac",
}
else
links {
"FLAC",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib",
@ -522,12 +701,30 @@ links {
"emu",
"utils",
"expat",
"zlib",
"flac",
"7z",
"ocore_" .. _OPTIONS["osd"],
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
if _OPTIONS["with-bundled-flac"] then
links {
"flac",
}
else
links {
"FLAC",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib",
@ -563,12 +760,30 @@ links {
"emu",
"utils",
"expat",
"zlib",
"flac",
"7z",
"ocore_" .. _OPTIONS["osd"],
}
if _OPTIONS["with-bundled-zlib"] then
links {
"zlib",
}
else
links {
"z",
}
end
if _OPTIONS["with-bundled-flac"] then
links {
"flac",
}
else
links {
"FLAC",
}
end
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/lib",
@ -590,6 +805,10 @@ files {
MAME_DIR .. "src/mess/tools/imgtool/imgterrs.c",
MAME_DIR .. "src/mess/tools/imgtool/imghd.c",
MAME_DIR .. "src/mess/tools/imgtool/charconv.c",
MAME_DIR .. "src/mess/tools/imgtool/formats/vt_dsk.c",
MAME_DIR .. "src/mess/tools/imgtool/formats/vt_dsk.h",
MAME_DIR .. "src/mess/tools/imgtool/formats/coco_dsk.c",
MAME_DIR .. "src/mess/tools/imgtool/formats/coco_dsk.h",
MAME_DIR .. "src/mess/tools/imgtool/modules/amiga.c",
MAME_DIR .. "src/mess/tools/imgtool/modules/macbin.c",
MAME_DIR .. "src/mess/tools/imgtool/modules/rsdos.c",

View File

@ -54,7 +54,7 @@ BUSES["MIDI"] = true
function createProjects_ldplayer_ldplayer(_target, _subtarget)
project ("drvldplayer")
targetsubdir(_target .."_" .. _subtarget)
kind "StaticLib"
kind (LIBTYPE)
uuid (os.uuid("drvldplayer"))
options {
@ -68,9 +68,13 @@ function createProjects_ldplayer_ldplayer(_target, _subtarget)
MAME_DIR .. "src/lib",
MAME_DIR .. "src/lib/util",
MAME_DIR .. "3rdparty",
MAME_DIR .. "3rdparty/zlib",
GEN_DIR .. "mame/layout",
}
}
if _OPTIONS["with-bundled-zlib"] then
includedirs {
MAME_DIR .. "3rdparty/zlib",
}
end
files{
MAME_DIR .. "src/emu/drivers/emudummy.c",
@ -89,4 +93,4 @@ function linkProjects_ldplayer_ldplayer(_target, _subtarget)
links {
"drvldplayer",
}
end
end

View File

@ -470,6 +470,7 @@ MACHINES["MSM6242"] = true
--MACHINES["NCR5380N"] = true
--MACHINES["NCR5390"] = true
MACHINES["NCR539x"] = true
MACHINES["NETLIST"] = true
--MACHINES["NCR53C7XX"] = true
MACHINES["NMC9306"] = true
--MACHINES["NSC810"] = true
@ -534,7 +535,6 @@ MACHINES["UPD765"] = true
MACHINES["V3021"] = true
MACHINES["WD_FDC"] = true
MACHINES["WD11C00_17"] = true
MACHINES["WD17XX"] = true
MACHINES["WD2010"] = true
MACHINES["WD33C93"] = true
MACHINES["X2212"] = true
@ -760,7 +760,7 @@ end
function createMAMEProjects(_target, _subtarget, _name)
project (_name)
targetsubdir(_target .."_" .. _subtarget)
kind "StaticLib"
kind (LIBTYPE)
uuid (os.uuid("drv-" .. _target .."_" .. _subtarget .. "_" .._name))
options {
@ -774,9 +774,14 @@ function createMAMEProjects(_target, _subtarget, _name)
MAME_DIR .. "src/lib",
MAME_DIR .. "src/lib/util",
MAME_DIR .. "3rdparty",
MAME_DIR .. "3rdparty/zlib",
GEN_DIR .. "mame/layout",
}
if _OPTIONS["with-bundled-zlib"] then
includedirs {
MAME_DIR .. "3rdparty/zlib",
}
end
end
function createProjects_mame_arcade(_target, _subtarget)
@ -2421,6 +2426,7 @@ files {
MAME_DIR .. "src/mame/drivers/model1.c",
MAME_DIR .. "src/mame/machine/model1.c",
MAME_DIR .. "src/mame/video/model1.c",
MAME_DIR .. "src/mame/machine/m1comm.c",
MAME_DIR .. "src/mame/audio/dsbz80.c",
MAME_DIR .. "src/mame/drivers/model2.c",
MAME_DIR .. "src/mame/video/model2.c",

View File

@ -15,7 +15,7 @@ dofile("mess.lua")
function createProjects_mame_dummy(_target, _subtarget)
project ("mame_dummy")
targetsubdir(_target .."_" .. _subtarget)
kind "StaticLib"
kind (LIBTYPE)
uuid (os.uuid("drv-mame_dummy"))
options {
@ -29,9 +29,13 @@ function createProjects_mame_dummy(_target, _subtarget)
MAME_DIR .. "src/lib",
MAME_DIR .. "src/lib/util",
MAME_DIR .. "3rdparty",
MAME_DIR .. "3rdparty/zlib",
GEN_DIR .. "mess/layout",
}
}
if _OPTIONS["with-bundled-zlib"] then
includedirs {
MAME_DIR .. "3rdparty/zlib",
}
end
files{
MAME_DIR .. "src/mess/drivers/coleco.c",
@ -43,4 +47,4 @@ function linkProjects_mame_dummy(_target, _subtarget)
links {
"mame_dummy",
}
end
end

View File

@ -128,6 +128,7 @@ CPUS["UCOM4"] = true
CPUS["HMCS40"] = true
CPUS["E0C6200"] = true
CPUS["MELPS4"] = true
CPUS["HPHYBRID"] = true
--------------------------------------------------
-- specify available sound cores; some of these are
@ -471,6 +472,7 @@ MACHINES["NCR5380N"] = true
MACHINES["NCR5390"] = true
MACHINES["NCR539x"] = true
MACHINES["NCR53C7XX"] = true
MACHINES["NETLIST"] = true
MACHINES["NMC9306"] = true
MACHINES["NSC810"] = true
MACHINES["NSCSI"] = true
@ -532,7 +534,6 @@ MACHINES["UPD765"] = true
MACHINES["V3021"] = true
MACHINES["WD_FDC"] = true
MACHINES["WD11C00_17"] = true
MACHINES["WD17XX"] = true
MACHINES["WD2010"] = true
MACHINES["WD33C93"] = true
MACHINES["WD7600"] = true
@ -572,6 +573,7 @@ BUSES["ABCKB"] = true
BUSES["ADAM"] = true
BUSES["ADAMNET"] = true
BUSES["APF"] = true
BUSES["APRICOT_EXPANSION"] = true
BUSES["ARCADIA"] = true
BUSES["ASTROCADE"] = true
BUSES["BML3"] = true
@ -859,7 +861,7 @@ end
function createMESSProjects(_target, _subtarget, _name)
project (_name)
targetsubdir(_target .."_" .. _subtarget)
kind "StaticLib"
kind (LIBTYPE)
uuid (os.uuid("drv-" .. _target .."_" .. _subtarget .. "_" .._name))
options {
@ -874,11 +876,15 @@ function createMESSProjects(_target, _subtarget, _name)
MAME_DIR .. "src/lib",
MAME_DIR .. "src/lib/util",
MAME_DIR .. "3rdparty",
MAME_DIR .. "3rdparty/zlib",
GEN_DIR .. "mess/layout",
GEN_DIR .. "mame/layout",
MAME_DIR .. "src/emu/cpu/m68000",
}
if _OPTIONS["with-bundled-zlib"] then
includedirs {
MAME_DIR .. "3rdparty/zlib",
}
end
end
function createProjects_mame_mess(_target, _subtarget)
@ -1016,6 +1022,7 @@ files {
MAME_DIR .. "src/mess/drivers/apricotf.c",
MAME_DIR .. "src/mess/drivers/apricotp.c",
MAME_DIR .. "src/mess/machine/apricotkb.c",
MAME_DIR .. "src/mess/machine/apricotkb_hle.c",
MAME_DIR .. "src/mess/drivers/victor9k.c",
MAME_DIR .. "src/mess/machine/victor9kb.c",
MAME_DIR .. "src/mess/machine/victor9k_fdc.c",
@ -1597,6 +1604,7 @@ files {
MAME_DIR .. "src/mess/drivers/hp9845.c",
MAME_DIR .. "src/mess/drivers/hp9k.c",
MAME_DIR .. "src/mess/drivers/hp9k_3xx.c",
MAME_DIR .. "src/mess/drivers/hp64k.c",
}
createMESSProjects(_target, _subtarget, "hec2hrp")
@ -1880,6 +1888,7 @@ files {
createMESSProjects(_target, _subtarget, "olivetti")
files {
MAME_DIR .. "src/mess/drivers/m20.c",
MAME_DIR .. "src/mess/machine/m20_kbd.c",
MAME_DIR .. "src/mess/drivers/m24.c",
MAME_DIR .. "src/mess/machine/m24_kbd.c",
MAME_DIR .. "src/mess/machine/m24_z8000.c"
@ -2604,6 +2613,7 @@ files {
MAME_DIR .. "src/mess/drivers/hunter2.c",
MAME_DIR .. "src/emu/machine/nsc810.c",
MAME_DIR .. "src/emu/machine/nsc810.h",
MAME_DIR .. "src/mess/drivers/i7000.c",
MAME_DIR .. "src/mess/drivers/ibm6580.c",
MAME_DIR .. "src/mess/drivers/ie15.c",
MAME_DIR .. "src/mess/machine/ie15_kbd.c",

126
scripts/target/mame/nl.lua Normal file
View File

@ -0,0 +1,126 @@
-- license:BSD-3-Clause
-- copyright-holders:MAMEdev Team
---------------------------------------------------------------------------
--
-- nl.lua
--
-- Compiles all drivers using netlist code
-- Use make SUBTARGET=nl to build
--
---------------------------------------------------------------------------
--------------------------------------------------
-- Specify all the CPU cores necessary for the
-- drivers referenced in nl.lst.
--------------------------------------------------
CPUS["Z80"] = true
--CPUS["M6502"] = true
--CPUS["MCS48"] = true
--CPUS["MCS51"] = true
--CPUS["M6800"] = true
--CPUS["M6809"] = true
--CPUS["M680X0"] = true
--CPUS["TMS9900"] = true
--CPUS["COP400"] = true
--------------------------------------------------
-- Specify all the sound cores necessary for the
-- drivers referenced in nl.lst.
--------------------------------------------------
--SOUNDS["SAMPLES"] = true
SOUNDS["DAC"] = true
--SOUNDS["DISCRETE"] = true
SOUNDS["AY8910"] = true
--SOUNDS["YM2151"] = true
--SOUNDS["ASTROCADE"] = true
--SOUNDS["TMS5220"] = true
--SOUNDS["OKIM6295"] = true
--SOUNDS["HC55516"] = true
--SOUNDS["YM3812"] = true
--SOUNDS["CEM3394"] = true
--SOUNDS["VOTRAX"] = true
--------------------------------------------------
-- specify available video cores
--------------------------------------------------
VIDEOS["FIXFREQ"] = true
--------------------------------------------------
-- specify available machine cores
--------------------------------------------------
MACHINES["NETLIST"] = true
--MACHINES["6821PIA"] = true
--MACHINES["TTL74148"] = true
--MACHINES["TTL74153"] = true
--MACHINES["TTL7474"] = true
--MACHINES["RIOT6532"] = true
--MACHINES["PIT8253"] = true
--MACHINES["Z80CTC"] = true
--MACHINES["68681"] = true
--MACHINES["BANKDEV"] = true
--------------------------------------------------
-- specify available bus cores
--------------------------------------------------
-- not needed by nl.lua but build system wants at least one bus
BUSES["CENTRONICS"] = true
--------------------------------------------------
-- This is the list of files that are necessary
-- for building all of the drivers referenced
-- in nl.lst
--------------------------------------------------
function createProjects_mame_nl(_target, _subtarget)
project ("mame_netlist")
targetsubdir(_target .."_" .. _subtarget)
kind (LIBTYPE)
uuid (os.uuid("drv-mame-nl"))
options {
"ForceCPP",
}
includedirs {
MAME_DIR .. "src/osd",
MAME_DIR .. "src/emu",
MAME_DIR .. "src/mame",
MAME_DIR .. "src/lib",
MAME_DIR .. "src/lib/util",
MAME_DIR .. "3rdparty",
GEN_DIR .. "mame/layout",
}
if _OPTIONS["with-bundled-zlib"] then
includedirs {
MAME_DIR .. "3rdparty/zlib",
}
end
files{
MAME_DIR .. "src/mame/drivers/pong.c",
MAME_DIR .. "src/mame/drivers/nl_pong.c",
MAME_DIR .. "src/mame/drivers/nl_pongd.c",
MAME_DIR .. "src/mame/drivers/nl_breakout.c",
MAME_DIR .. "src/mame/drivers/1942.c",
MAME_DIR .. "src/mame/video/1942.c",
MAME_DIR .. "src/mame/drivers/popeye.c",
MAME_DIR .. "src/mame/video/popeye.c",
}
end
function linkProjects_mame_nl(_target, _subtarget)
links {
"mame_netlist",
}
end

View File

@ -78,7 +78,7 @@ BUSES["CENTRONICS"] = true
function createProjects_mame_tiny(_target, _subtarget)
project ("mame_tiny")
targetsubdir(_target .."_" .. _subtarget)
kind "StaticLib"
kind (LIBTYPE)
uuid (os.uuid("drv-mame-tiny"))
options {
@ -92,9 +92,13 @@ function createProjects_mame_tiny(_target, _subtarget)
MAME_DIR .. "src/lib",
MAME_DIR .. "src/lib/util",
MAME_DIR .. "3rdparty",
MAME_DIR .. "3rdparty/zlib",
GEN_DIR .. "mame/layout",
}
}
if _OPTIONS["with-bundled-zlib"] then
includedirs {
MAME_DIR .. "3rdparty/zlib",
}
end
files{
MAME_DIR .. "src/mame/machine/ticket.c",

View File

@ -28,7 +28,7 @@ def parse_file(srcfile):
if c==13 and line[srcptr]==10:
srcptr+=1
continue
if c==' ':
if c==' ' or c==9:
continue
if in_comment==1 and c=='*' and line[srcptr]=='/' :
srcptr+=1

View File

@ -488,7 +488,7 @@ void a78_partialhash(hash_collection &dest, const unsigned char *data,
void a78_cart_slot_device::call_unload()
{
if (m_cart && m_cart->get_nvram_size())
if (m_cart && m_cart->get_nvram_base() && m_cart->get_nvram_size())
battery_save(m_cart->get_nvram_base(), 0x800);
}

View File

@ -0,0 +1,15 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
/***************************************************************************
ACT Apricot Expansion Slot Devices
***************************************************************************/
#include "cards.h"
SLOT_INTERFACE_START( apricot_expansion_cards )
SLOT_INTERFACE("128k", APRICOT_128K_RAM)
SLOT_INTERFACE("256k", APRICOT_256K_RAM)
SLOT_INTERFACE("512k", APRICOT_512K_RAM)
SLOT_INTERFACE_END

View File

@ -0,0 +1,19 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
/***************************************************************************
ACT Apricot Expansion Slot Devices
***************************************************************************/
#pragma once
#ifndef __APRICOT_CARDS_H__
#define __APRICOT_CARDS_H__
#include "emu.h"
#include "ram.h"
SLOT_INTERFACE_EXTERN( apricot_expansion_cards );
#endif // __APRICOT_CARDS_H__

View File

@ -0,0 +1,192 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
/***************************************************************************
ACT Apricot Expansion Slot
***************************************************************************/
#include "expansion.h"
//**************************************************************************
// EXPANSION SLOT DEVICE
//**************************************************************************
const device_type APRICOT_EXPANSION_SLOT = &device_creator<apricot_expansion_slot_device>;
//-------------------------------------------------
// apricot_expansion_slot_device - constructor
//-------------------------------------------------
apricot_expansion_slot_device::apricot_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, APRICOT_EXPANSION_SLOT, "Apricot Expansion Slot", tag, owner, clock, "apricot_exp_slot", __FILE__),
device_slot_interface(mconfig, *this)
{
}
apricot_expansion_slot_device::apricot_expansion_slot_device(const machine_config &mconfig, device_type type, const char *name,
const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source) :
device_t(mconfig, type, name, tag, owner, clock, shortname, source),
device_slot_interface(mconfig, *this)
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void apricot_expansion_slot_device::device_start()
{
device_apricot_expansion_card_interface *dev = dynamic_cast<device_apricot_expansion_card_interface *>(get_card_device());
if (dev)
{
apricot_expansion_bus_device *bus = downcast<apricot_expansion_bus_device *>(m_owner);
bus->add_card(dev);
}
}
//**************************************************************************
// EXPANSION BUS DEVICE
//**************************************************************************
const device_type APRICOT_EXPANSION_BUS = &device_creator<apricot_expansion_bus_device>;
//-------------------------------------------------
// apricot_expansion_bus_device - constructor
//-------------------------------------------------
apricot_expansion_bus_device::apricot_expansion_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, APRICOT_EXPANSION_BUS, "Apricot Expansion Bus", tag, owner, clock, "apricot_exp_bus", __FILE__),
m_program(NULL),
m_io(NULL),
m_program_iop(NULL),
m_io_iop(NULL),
m_dma1_handler(*this),
m_dma2_handler(*this),
m_ext1_handler(*this),
m_ext2_handler(*this),
m_int2_handler(*this),
m_int3_handler(*this)
{
}
//-------------------------------------------------
// apricot_expansion_bus_device - destructor
//-------------------------------------------------
apricot_expansion_bus_device::~apricot_expansion_bus_device()
{
m_dev.detach_all();
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void apricot_expansion_bus_device::device_start()
{
// resolve callbacks
m_dma1_handler.resolve_safe();
m_dma2_handler.resolve_safe();
m_ext1_handler.resolve_safe();
m_ext2_handler.resolve_safe();
m_int2_handler.resolve_safe();
m_int3_handler.resolve_safe();
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void apricot_expansion_bus_device::device_reset()
{
cpu_device *cpu = m_owner->subdevice<cpu_device>(m_cpu_tag);
m_program = &cpu->space(AS_PROGRAM);
m_io = &cpu->space(AS_IO);
cpu_device *iop = m_owner->subdevice<cpu_device>(m_iop_tag);
m_program_iop = &iop->space(AS_PROGRAM);
m_io_iop = &iop->space(AS_IO);
}
//-------------------------------------------------
// add_card - add new card to our bus
//-------------------------------------------------
void apricot_expansion_bus_device::add_card(device_apricot_expansion_card_interface *card)
{
card->set_bus_device(this);
m_dev.append(*card);
}
//-------------------------------------------------
// set_cpu_tag - set cpu we are attached to
//-------------------------------------------------
void apricot_expansion_bus_device::set_cpu_tag(device_t &device, device_t *owner, const char *tag)
{
apricot_expansion_bus_device &bus = dynamic_cast<apricot_expansion_bus_device &>(device);
bus.m_cpu_tag = tag;
}
//-------------------------------------------------
// set_iop_tag - set iop we are attached to
//-------------------------------------------------
void apricot_expansion_bus_device::set_iop_tag(device_t &device, device_t *owner, const char *tag)
{
apricot_expansion_bus_device &bus = dynamic_cast<apricot_expansion_bus_device &>(device);
bus.m_iop_tag = tag;
}
// callbacks from slot device to the host
WRITE_LINE_MEMBER( apricot_expansion_bus_device::dma1_w ) { m_dma1_handler(state); }
WRITE_LINE_MEMBER( apricot_expansion_bus_device::dma2_w ) { m_dma2_handler(state); }
WRITE_LINE_MEMBER( apricot_expansion_bus_device::ext1_w ) { m_ext1_handler(state); }
WRITE_LINE_MEMBER( apricot_expansion_bus_device::ext2_w ) { m_ext2_handler(state); }
WRITE_LINE_MEMBER( apricot_expansion_bus_device::int2_w ) { m_int2_handler(state); }
WRITE_LINE_MEMBER( apricot_expansion_bus_device::int3_w ) { m_int3_handler(state); }
//-------------------------------------------------
// install_ram - attach ram to cpu/iop
//-------------------------------------------------
void apricot_expansion_bus_device::install_ram(offs_t addrstart, offs_t addrend, void *baseptr)
{
m_program->install_ram(addrstart, addrend, baseptr);
if (m_program_iop)
m_program_iop->install_ram(addrstart, addrend, baseptr);
}
//**************************************************************************
// CARTRIDGE INTERFACE
//**************************************************************************
//-------------------------------------------------
// device_apricot_expansion_card_interface - constructor
//-------------------------------------------------
device_apricot_expansion_card_interface::device_apricot_expansion_card_interface(const machine_config &mconfig, device_t &device) :
device_slot_card_interface(mconfig, device),
m_next(NULL),
m_bus(NULL)
{
}
//-------------------------------------------------
// ~device_apricot_expansion_card_interface - destructor
//-------------------------------------------------
device_apricot_expansion_card_interface::~device_apricot_expansion_card_interface()
{
}
void device_apricot_expansion_card_interface::set_bus_device(apricot_expansion_bus_device *bus)
{
m_bus = bus;
}

View File

@ -0,0 +1,208 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
/***************************************************************************
ACT Apricot Expansion Slot
A B
-12V 32 +12V
+5V 31 +5V
DB0 30 DB1
DB2 29 DB3
DB4 28 DB5
DB6 27 DB7
AB10 26 AB9
AB11 25 AB12
/AMWC 24 /MRDC
/DMA2 23 DT/R
/DMA1 22 /IORC
/MWTC 21 /RES
/IOWC 20 /AIOWC
GND 19 GND
/CLK5 18 DEN
/IRDY 17 /MRDY
/EXT1 16 /EXT2
/INT3 15 /ALE
AB6 14 /INT2
AB8 13 AB7
DB9 12 DB8
DB11 11 DB10
DB13 10 DB12
DB15 9 DB14
AB2 8 AB1
AB4 7 AB3
AB0 6 AB5
AB14 5 AB13
AB15 4 AB16
AB17 3 AB18
AB19 2 /BHE
NMI 1 CLK15
***************************************************************************/
#pragma once
#ifndef __APRICOT_EXPANSION_H__
#define __APRICOT_EXPANSION_H__
#include "emu.h"
//**************************************************************************
// INTERFACE CONFIGURATION MACROS
//**************************************************************************
#define MCFG_EXPANSION_ADD(_tag, _cpu_tag) \
MCFG_DEVICE_ADD(_tag, APRICOT_EXPANSION_BUS, 0) \
apricot_expansion_bus_device::set_cpu_tag(*device, owner, _cpu_tag);
#define MCFG_EXPANSION_IOP_ADD(_tag) \
apricot_expansion_bus_device::set_iop_tag(*device, owner, _tag);
#define MCFG_EXPANSION_SLOT_ADD(_tag, _slot_intf, _def_slot) \
MCFG_DEVICE_ADD(_tag, APRICOT_EXPANSION_SLOT, 0) \
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false)
#define MCFG_EXPANSION_DMA1_HANDLER(_devcb) \
devcb = &apricot_expansion_bus_device::set_dma1_handler(*device, DEVCB_##_devcb);
#define MCFG_EXPANSION_DMA2_HANDLER(_devcb) \
devcb = &apricot_expansion_bus_device::set_dma2_handler(*device, DEVCB_##_devcb);
#define MCFG_EXPANSION_EXT1_HANDLER(_devcb) \
devcb = &apricot_expansion_bus_device::set_ext1_handler(*device, DEVCB_##_devcb);
#define MCFG_EXPANSION_EXT2_HANDLER(_devcb) \
devcb = &apricot_expansion_bus_device::set_ext2_handler(*device, DEVCB_##_devcb);
#define MCFG_EXPANSION_INT2_HANDLER(_devcb) \
devcb = &apricot_expansion_bus_device::set_int2_handler(*device, DEVCB_##_devcb);
#define MCFG_EXPANSION_INT3_HANDLER(_devcb) \
devcb = &apricot_expansion_bus_device::set_int3_handler(*device, DEVCB_##_devcb);
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// forward declaration
class device_apricot_expansion_card_interface;
// ======================> apricot_expansion_slot_device
class apricot_expansion_slot_device : public device_t, public device_slot_interface
{
public:
// construction/destruction
apricot_expansion_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
apricot_expansion_slot_device(const machine_config &mconfig, device_type type, const char *name,
const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
// device-level overrides
virtual void device_start();
};
// device type definition
extern const device_type APRICOT_EXPANSION_SLOT;
// ======================> apricot_expansion_bus_device
class apricot_expansion_bus_device : public device_t
{
public:
// construction/destruction
apricot_expansion_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
virtual ~apricot_expansion_bus_device();
template<class _Object> static devcb_base &set_dma1_handler(device_t &device, _Object object)
{ return downcast<apricot_expansion_bus_device &>(device).m_dma1_handler.set_callback(object); }
template<class _Object> static devcb_base &set_dma2_handler(device_t &device, _Object object)
{ return downcast<apricot_expansion_bus_device &>(device).m_dma2_handler.set_callback(object); }
template<class _Object> static devcb_base &set_ext1_handler(device_t &device, _Object object)
{ return downcast<apricot_expansion_bus_device &>(device).m_ext1_handler.set_callback(object); }
template<class _Object> static devcb_base &set_ext2_handler(device_t &device, _Object object)
{ return downcast<apricot_expansion_bus_device &>(device).m_ext2_handler.set_callback(object); }
template<class _Object> static devcb_base &set_int2_handler(device_t &device, _Object object)
{ return downcast<apricot_expansion_bus_device &>(device).m_int2_handler.set_callback(object); }
template<class _Object> static devcb_base &set_int3_handler(device_t &device, _Object object)
{ return downcast<apricot_expansion_bus_device &>(device).m_int3_handler.set_callback(object); }
// inline configuration
static void set_cpu_tag(device_t &device, device_t *owner, const char *tag);
static void set_iop_tag(device_t &device, device_t *owner, const char *tag);
void add_card(device_apricot_expansion_card_interface *card);
// from cards
DECLARE_WRITE_LINE_MEMBER( dma1_w );
DECLARE_WRITE_LINE_MEMBER( dma2_w );
DECLARE_WRITE_LINE_MEMBER( ext1_w );
DECLARE_WRITE_LINE_MEMBER( ext2_w );
DECLARE_WRITE_LINE_MEMBER( int2_w );
DECLARE_WRITE_LINE_MEMBER( int3_w );
void install_ram(offs_t addrstart, offs_t addrend, void *baseptr);
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
private:
simple_list<device_apricot_expansion_card_interface> m_dev;
// address spaces we have access to
address_space *m_program;
address_space *m_io;
address_space *m_program_iop;
address_space *m_io_iop;
devcb_write_line m_dma1_handler;
devcb_write_line m_dma2_handler;
devcb_write_line m_ext1_handler;
devcb_write_line m_ext2_handler;
devcb_write_line m_int2_handler;
devcb_write_line m_int3_handler;
// configuration
const char *m_cpu_tag;
const char *m_iop_tag;
};
// device type definition
extern const device_type APRICOT_EXPANSION_BUS;
// ======================> device_apricot_expansion_card_interface
class device_apricot_expansion_card_interface : public device_slot_card_interface
{
public:
// construction/destruction
device_apricot_expansion_card_interface(const machine_config &mconfig, device_t &device);
virtual ~device_apricot_expansion_card_interface();
void set_bus_device(apricot_expansion_bus_device *bus);
device_apricot_expansion_card_interface *next() const { return m_next; }
device_apricot_expansion_card_interface *m_next;
protected:
apricot_expansion_bus_device *m_bus;
};
// include here so drivers don't need to
#include "cards.h"
#endif // __APRICOT_EXPANSION_H__

177
src/emu/bus/apricot/ram.c Normal file
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@ -0,0 +1,177 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
/***************************************************************************
ACT Apricot RAM Expansions
***************************************************************************/
#include "ram.h"
//**************************************************************************
// DEVICE DEFINITIONS
//**************************************************************************
const device_type APRICOT_256K_RAM = &device_creator<apricot_256k_ram_device>;
const device_type APRICOT_128K_RAM = &device_creator<apricot_128k_ram_device>;
const device_type APRICOT_512K_RAM = &device_creator<apricot_512k_ram_device>;
//**************************************************************************
// APRICOT 256K RAM DEVICE
//**************************************************************************
//-------------------------------------------------
// input_ports - device-specific input ports
//-------------------------------------------------
static INPUT_PORTS_START( apricot_256k )
PORT_START("sw")
PORT_DIPNAME(0x01, 0x00, "Base Address")
PORT_DIPSETTING(0x00, "40000H")
PORT_DIPSETTING(0x01, "80000H")
INPUT_PORTS_END
ioport_constructor apricot_256k_ram_device::device_input_ports() const
{
return INPUT_PORTS_NAME( apricot_256k );
}
//-------------------------------------------------
// apricot_256k_ram_device - constructor
//-------------------------------------------------
apricot_256k_ram_device::apricot_256k_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, APRICOT_256K_RAM, "Apricot 256K RAM Expansion Board", tag, owner, clock, "apricot_256k_ram", __FILE__),
device_apricot_expansion_card_interface(mconfig, *this),
m_sw(*this, "sw")
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void apricot_256k_ram_device::device_start()
{
m_ram.resize(0x40000 / 2);
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void apricot_256k_ram_device::device_reset()
{
if (m_sw->read() == 0)
m_bus->install_ram(0x40000, 0x7ffff, &m_ram[0]);
else
m_bus->install_ram(0x80000, 0xbffff, &m_ram[0]);
}
//**************************************************************************
// APRICOT 128K RAM DEVICE
//**************************************************************************
//-------------------------------------------------
// input_ports - device-specific input ports
//-------------------------------------------------
static INPUT_PORTS_START( apricot_128k )
PORT_START("strap")
PORT_DIPNAME(0x03, 0x01, "Base Address")
PORT_DIPSETTING(0x00, "512K")
PORT_DIPSETTING(0x01, "256K - 384K")
PORT_DIPSETTING(0x02, "384K - 512K")
INPUT_PORTS_END
ioport_constructor apricot_128k_ram_device::device_input_ports() const
{
return INPUT_PORTS_NAME( apricot_128k );
}
//-------------------------------------------------
// apricot_128_512k_ram_device - constructor
//-------------------------------------------------
apricot_128k_ram_device::apricot_128k_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, APRICOT_128K_RAM, "Apricot 128/512K RAM Expansion Board (128K)", tag, owner, clock, "apricot_128k_ram", __FILE__),
device_apricot_expansion_card_interface(mconfig, *this),
m_strap(*this, "strap")
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void apricot_128k_ram_device::device_start()
{
m_ram.resize(0x20000 / 2);
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void apricot_128k_ram_device::device_reset()
{
if (m_strap->read() == 1)
m_bus->install_ram(0x40000, 0x5ffff, &m_ram[0]);
else if (m_strap->read() == 2)
m_bus->install_ram(0x60000, 0x7ffff, &m_ram[0]);
}
//**************************************************************************
// APRICOT 512K RAM DEVICE
//**************************************************************************
//-------------------------------------------------
// input_ports - device-specific input ports
//-------------------------------------------------
static INPUT_PORTS_START( apricot_512k )
PORT_START("strap")
PORT_DIPNAME(0x03, 0x00, "Base Address")
PORT_DIPSETTING(0x00, "512K")
PORT_DIPSETTING(0x01, "256K - 384K")
PORT_DIPSETTING(0x02, "384K - 512K")
INPUT_PORTS_END
ioport_constructor apricot_512k_ram_device::device_input_ports() const
{
return INPUT_PORTS_NAME( apricot_512k );
}
//-------------------------------------------------
// apricot_128_512k_ram_device - constructor
//-------------------------------------------------
apricot_512k_ram_device::apricot_512k_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, APRICOT_512K_RAM, "Apricot 128/512K RAM Expansion Board (512K)", tag, owner, clock, "apricot_512k_ram", __FILE__),
device_apricot_expansion_card_interface(mconfig, *this),
m_strap(*this, "strap")
{
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
void apricot_512k_ram_device::device_start()
{
m_ram.resize(0x80000 / 2);
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void apricot_512k_ram_device::device_reset()
{
if (m_strap->read() == 0)
m_bus->install_ram(0x40000, 0xbffff, &m_ram[0]);
}

89
src/emu/bus/apricot/ram.h Normal file
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@ -0,0 +1,89 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
/***************************************************************************
ACT Apricot RAM Expansions
***************************************************************************/
#pragma once
#ifndef __APRICOT_RAM__
#define __APRICOT_RAM__
#include "emu.h"
#include "expansion.h"
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************
// ======================> apricot_256k_ram_device
class apricot_256k_ram_device : public device_t, public device_apricot_expansion_card_interface
{
public:
// construction/destruction
apricot_256k_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
virtual ioport_constructor device_input_ports() const;
virtual void device_start();
virtual void device_reset();
private:
required_ioport m_sw;
std::vector<UINT16> m_ram;
};
// ======================> apricot_128k_ram_device
class apricot_128k_ram_device : public device_t, public device_apricot_expansion_card_interface
{
public:
// construction/destruction
apricot_128k_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
virtual ioport_constructor device_input_ports() const;
virtual void device_start();
virtual void device_reset();
private:
required_ioport m_strap;
std::vector<UINT16> m_ram;
};
// ======================> apricot_512k_ram_device
class apricot_512k_ram_device : public device_t, public device_apricot_expansion_card_interface
{
public:
// construction/destruction
apricot_512k_ram_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
protected:
virtual ioport_constructor device_input_ports() const;
virtual void device_start();
virtual void device_reset();
private:
required_ioport m_strap;
std::vector<UINT16> m_ram;
};
// device type definition
extern const device_type APRICOT_256K_RAM;
extern const device_type APRICOT_128K_RAM;
extern const device_type APRICOT_512K_RAM;
#endif // __APRICOT_RAM__

View File

@ -23,12 +23,9 @@
const device_type BML3BUS_MP1802 = &device_creator<bml3bus_mp1802_device>;
static const floppy_interface bml3_mp1802_floppy_interface =
{
FLOPPY_STANDARD_5_25_DSDD,
LEGACY_FLOPPY_OPTIONS_NAME(default),
NULL
};
static SLOT_INTERFACE_START( mp1802_floppies )
SLOT_INTERFACE("dd", FLOPPY_525_DD)
SLOT_INTERFACE_END
WRITE_LINE_MEMBER( bml3bus_mp1802_device::bml3_wd17xx_intrq_w )
{
@ -46,11 +43,13 @@ ROM_START( mp1802 )
ROM_END
MACHINE_CONFIG_FRAGMENT( mp1802 )
MCFG_DEVICE_ADD("wd17xx", MB8866, 0)
MCFG_WD17XX_DEFAULT_DRIVE2_TAGS
MCFG_WD17XX_INTRQ_CALLBACK(WRITELINE(bml3bus_mp1802_device, bml3_wd17xx_intrq_w))
MCFG_MB8866x_ADD("fdc", XTAL_1MHz)
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(bml3bus_mp1802_device, bml3_wd17xx_intrq_w))
MCFG_LEGACY_FLOPPY_2_DRIVES_ADD(bml3_mp1802_floppy_interface)
MCFG_FLOPPY_DRIVE_ADD("fdc:0", mp1802_floppies, "dd", floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fdc:1", mp1802_floppies, "dd", floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fdc:2", mp1802_floppies, "", floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fdc:3", mp1802_floppies, "", floppy_image_device::default_floppy_formats)
MACHINE_CONFIG_END
/***************************************************************************
@ -78,34 +77,28 @@ const rom_entry *bml3bus_mp1802_device::device_rom_region() const
READ8_MEMBER( bml3bus_mp1802_device::bml3_mp1802_r)
{
return m_wd17xx->drq_r() ? 0x00 : 0x80;
return m_fdc->drq_r() ? 0x00 : 0x80;
}
WRITE8_MEMBER( bml3bus_mp1802_device::bml3_mp1802_w)
{
int drive = data & 0x03;
int side = BIT(data, 4);
int motor = BIT(data, 3);
const char *floppy_name = NULL;
switch (drive) {
case 0:
floppy_name = FLOPPY_0;
break;
case 1:
floppy_name = FLOPPY_1;
break;
case 2:
floppy_name = FLOPPY_2;
break;
case 3:
floppy_name = FLOPPY_3;
break;
floppy_image_device *floppy = NULL;
switch (data & 0x03)
{
case 0: floppy = m_floppy0->get_device(); break;
case 1: floppy = m_floppy1->get_device(); break;
case 2: floppy = m_floppy2->get_device(); break;
case 3: floppy = m_floppy3->get_device(); break;
}
m_fdc->set_floppy(floppy);
if (floppy)
{
floppy->mon_w(!BIT(data, 3));
floppy->ss_w(BIT(data, 4));
}
legacy_floppy_image_device *floppy = subdevice<legacy_floppy_image_device>(floppy_name);
m_wd17xx->set_drive(drive);
floppy->floppy_mon_w(!motor);
floppy->floppy_drive_set_ready_state(ASSERT_LINE, 0);
m_wd17xx->set_side(side);
}
@ -116,7 +109,11 @@ WRITE8_MEMBER( bml3bus_mp1802_device::bml3_mp1802_w)
bml3bus_mp1802_device::bml3bus_mp1802_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, BML3BUS_MP1802, "Hitachi MP-1802 Floppy Controller Card", tag, owner, clock, "bml3mp1802", __FILE__),
device_bml3bus_card_interface(mconfig, *this),
m_wd17xx(*this, "wd17xx")
m_fdc(*this, "fdc"),
m_floppy0(*this, "fdc:0"),
m_floppy1(*this, "fdc:1"),
m_floppy2(*this, "fdc:2"),
m_floppy3(*this, "fdc:3")
{
}
@ -134,8 +131,8 @@ void bml3bus_mp1802_device::device_start()
// install into memory
address_space &space_prg = machine().firstcpu->space(AS_PROGRAM);
space_prg.install_readwrite_handler(0xff00, 0xff03, read8_delegate(FUNC(mb8866_device::read),(mb8866_device*)m_wd17xx), write8_delegate(FUNC(mb8866_device::write),(mb8866_device*)m_wd17xx));
space_prg.install_readwrite_handler(0xff04, 0xff04, read8_delegate(FUNC(bml3bus_mp1802_device::bml3_mp1802_r), this), write8_delegate(FUNC(bml3bus_mp1802_device::bml3_mp1802_w), this) );
space_prg.install_readwrite_handler(0xff00, 0xff03, read8_delegate(FUNC(mb8866_t::read),(mb8866_t*)m_fdc), write8_delegate(FUNC(mb8866_t::write),(mb8866_t*)m_fdc));
space_prg.install_readwrite_handler(0xff04, 0xff04, read8_delegate(FUNC(bml3bus_mp1802_device::bml3_mp1802_r), this), write8_delegate(FUNC(bml3bus_mp1802_device::bml3_mp1802_w), this));
// overwriting the main ROM (rather than using e.g. install_rom) should mean that bank switches for RAM expansion still work...
UINT8 *mainrom = device().machine().root_device().memregion("maincpu")->base();
memcpy(mainrom + 0xf800, m_rom + 0xf800, 0x800);

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@ -15,7 +15,8 @@
#include "emu.h"
#include "bml3bus.h"
#include "imagedev/flopdrv.h"
#include "machine/wd17xx.h"
#include "machine/wd_fdc.h"
//**************************************************************************
// TYPE DEFINITIONS
@ -36,13 +37,18 @@ public:
DECLARE_READ8_MEMBER(bml3_mp1802_r);
DECLARE_WRITE8_MEMBER(bml3_mp1802_w);
DECLARE_WRITE_LINE_MEMBER(bml3_wd17xx_intrq_w);
protected:
virtual void device_start();
virtual void device_reset();
required_device<mb8866_device> m_wd17xx;
private:
required_device<mb8866_t> m_fdc;
required_device<floppy_connector> m_floppy0;
required_device<floppy_connector> m_floppy1;
required_device<floppy_connector> m_floppy2;
required_device<floppy_connector> m_floppy3;
UINT8 *m_rom;
};

View File

@ -5,8 +5,6 @@
EACA Colour Genie Floppy Disc Controller
TODO:
- Only native MESS .mfi files load (some sectors are marked DDM)
- FM mode disks can be formatted but don't work correctly
- What's the exact FD1793 model?
- How does it turn off the motor?
- What's the source of the timer and the exact timings?
@ -33,11 +31,10 @@ const device_type CGENIE_FDC = &device_creator<cgenie_fdc_device>;
DEVICE_ADDRESS_MAP_START( mmio, 8, cgenie_fdc_device )
AM_RANGE(0xe0, 0xe3) AM_MIRROR(0x10) AM_READWRITE(irq_r, select_w)
AM_RANGE(0xec, 0xef) AM_MIRROR(0x10) AM_DEVREAD("fd1793", fd1793_t, read)
AM_RANGE(0xec, 0xec) AM_MIRROR(0x10) AM_WRITE(command_w)
AM_RANGE(0xed, 0xed) AM_MIRROR(0x10) AM_DEVWRITE("fd1793", fd1793_t, track_w)
AM_RANGE(0xee, 0xee) AM_MIRROR(0x10) AM_DEVWRITE("fd1793", fd1793_t, sector_w)
AM_RANGE(0xef, 0xef) AM_MIRROR(0x10) AM_DEVWRITE("fd1793", fd1793_t, data_w)
AM_RANGE(0xec, 0xec) AM_MIRROR(0x10) AM_DEVREAD("fd1793", fd1793_t, status_r) AM_WRITE(command_w)
AM_RANGE(0xed, 0xed) AM_MIRROR(0x10) AM_DEVREADWRITE("fd1793", fd1793_t, track_r, track_w)
AM_RANGE(0xee, 0xee) AM_MIRROR(0x10) AM_DEVREADWRITE("fd1793", fd1793_t, sector_r, sector_w)
AM_RANGE(0xef, 0xef) AM_MIRROR(0x10) AM_DEVREADWRITE("fd1793", fd1793_t, data_r, data_w)
ADDRESS_MAP_END
FLOPPY_FORMATS_MEMBER( cgenie_fdc_device::floppy_formats )

View File

@ -73,7 +73,9 @@
#include "imagedev/flopdrv.h"
#include "includes/coco.h"
#include "imagedev/flopdrv.h"
#include "formats/coco_dsk.h"
#include "formats/dmk_dsk.h"
#include "formats/jvc_dsk.h"
#include "formats/vdk_dsk.h"
/***************************************************************************
@ -94,12 +96,15 @@
LOCAL VARIABLES
***************************************************************************/
static const floppy_interface coco_floppy_interface =
{
FLOPPY_STANDARD_5_25_DSHD,
LEGACY_FLOPPY_OPTIONS_NAME(coco),
"floppy_5_25"
};
FLOPPY_FORMATS_MEMBER( coco_fdc_device::floppy_formats )
FLOPPY_DMK_FORMAT,
FLOPPY_JVC_FORMAT,
FLOPPY_VDK_FORMAT
FLOPPY_FORMATS_END
static SLOT_INTERFACE_START( coco_fdc_floppies )
SLOT_INTERFACE("qd", FLOPPY_525_QD)
SLOT_INTERFACE_END
/***************************************************************************
@ -149,15 +154,17 @@ WRITE_LINE_MEMBER( coco_fdc_device::fdc_drq_w )
//**************************************************************************
static MACHINE_CONFIG_FRAGMENT(coco_fdc)
MCFG_DEVICE_ADD(WD_TAG, WD1773, 0)
MCFG_WD17XX_DEFAULT_DRIVE4_TAGS
MCFG_WD17XX_INTRQ_CALLBACK(WRITELINE(coco_fdc_device, fdc_intrq_w))
MCFG_WD17XX_DRQ_CALLBACK(WRITELINE(coco_fdc_device, fdc_drq_w))
MCFG_WD1773x_ADD(WD_TAG, XTAL_8MHz)
MCFG_WD_FDC_INTRQ_CALLBACK(WRITELINE(coco_fdc_device, fdc_intrq_w))
MCFG_WD_FDC_DRQ_CALLBACK(WRITELINE(coco_fdc_device, fdc_drq_w))
MCFG_FLOPPY_DRIVE_ADD(WD_TAG ":0", coco_fdc_floppies, "qd", coco_fdc_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(WD_TAG ":1", coco_fdc_floppies, "qd", coco_fdc_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(WD_TAG ":2", coco_fdc_floppies, "", coco_fdc_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(WD_TAG ":3", coco_fdc_floppies, "", coco_fdc_device::floppy_formats)
MCFG_DEVICE_ADD(DISTO_TAG, MSM6242, XTAL_32_768kHz)
MCFG_DS1315_ADD(CLOUD9_TAG)
MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(coco_floppy_interface)
MACHINE_CONFIG_END
ROM_START( coco_fdc )
@ -291,16 +298,17 @@ void coco_fdc_device::dskreg_w(UINT8 data)
else if (data & 0x40)
drive = 3;
legacy_floppy_image_device *floppy[4];
floppy_image_device *floppy[4];
floppy[0] = subdevice<legacy_floppy_image_device>(FLOPPY_0);
floppy[1] = subdevice<legacy_floppy_image_device>(FLOPPY_1);
floppy[2] = subdevice<legacy_floppy_image_device>(FLOPPY_2);
floppy[3] = subdevice<legacy_floppy_image_device>(FLOPPY_3);
floppy[0] = subdevice<floppy_connector>(WD_TAG ":0")->get_device();
floppy[1] = subdevice<floppy_connector>(WD_TAG ":1")->get_device();
floppy[2] = subdevice<floppy_connector>(WD_TAG ":2")->get_device();
floppy[3] = subdevice<floppy_connector>(WD_TAG ":3")->get_device();
for (int i = 0; i < 4; i++)
{
floppy[i]->floppy_mon_w(i == drive ? CLEAR_LINE : ASSERT_LINE);
if (floppy[i])
floppy[i]->mon_w(i == drive ? CLEAR_LINE : ASSERT_LINE);
}
head = ((data & 0x40) && (drive != 3)) ? 1 : 0;
@ -309,8 +317,11 @@ void coco_fdc_device::dskreg_w(UINT8 data)
update_lines();
m_wd17xx->set_drive(drive);
m_wd17xx->set_side(head);
m_wd17xx->set_floppy(floppy[drive]);
if (floppy[drive])
floppy[drive]->ss_w(head);
m_wd17xx->dden_w(!BIT(m_dskreg, 5));
}
@ -379,7 +390,7 @@ WRITE8_MEMBER(coco_fdc_device::write)
dskreg_w(data);
break;
case 8:
m_wd17xx->command_w(space, 0, data);
m_wd17xx->cmd_w(space, 0, data);
break;
case 9:
m_wd17xx->track_w(space, 0, data);
@ -388,6 +399,7 @@ WRITE8_MEMBER(coco_fdc_device::write)
m_wd17xx->sector_w(space, 0, data);
break;
case 11:
//printf("data w %02x\n", data);
m_wd17xx->data_w(space, 0, data);
break;
};
@ -413,10 +425,12 @@ WRITE8_MEMBER(coco_fdc_device::write)
//**************************************************************************
static MACHINE_CONFIG_FRAGMENT(dragon_fdc)
MCFG_DEVICE_ADD(WD2797_TAG, WD2797, 0)
MCFG_WD17XX_DEFAULT_DRIVE4_TAGS
MCFG_WD2797x_ADD(WD2797_TAG, XTAL_1MHz)
MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(coco_floppy_interface)
MCFG_FLOPPY_DRIVE_ADD(WD2797_TAG ":0", coco_fdc_floppies, "qd", coco_fdc_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(WD2797_TAG ":1", coco_fdc_floppies, "qd", coco_fdc_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(WD2797_TAG ":2", coco_fdc_floppies, "", coco_fdc_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD(WD2797_TAG ":3", coco_fdc_floppies, "", coco_fdc_device::floppy_formats)
MACHINE_CONFIG_END
@ -511,10 +525,20 @@ void dragon_fdc_device::dskreg_w(UINT8 data)
data);
}
if (data & 0x04)
m_wd2797->set_drive(data & 0x03);
floppy_image_device *floppy = NULL;
switch (data & 0x03)
{
case 0: floppy = subdevice<floppy_connector>(WD2797_TAG ":0")->get_device(); break;
case 1: floppy = subdevice<floppy_connector>(WD2797_TAG ":1")->get_device(); break;
case 2: floppy = subdevice<floppy_connector>(WD2797_TAG ":2")->get_device(); break;
case 3: floppy = subdevice<floppy_connector>(WD2797_TAG ":3")->get_device(); break;
}
m_wd2797->set_floppy(floppy);
m_wd2797->dden_w(BIT(data, 3));
m_dskreg = data;
}
@ -556,12 +580,7 @@ WRITE8_MEMBER(dragon_fdc_device::write)
switch(offset & 0xEF)
{
case 0:
m_wd2797->command_w(space, 0, data);
/* disk head is encoded in the command byte */
/* Only for type 3 & 4 commands */
if (data & 0x80)
m_wd2797->set_side((data & 0x02) ? 1 : 0);
m_wd2797->cmd_w(space, 0, data);
break;
case 1:
m_wd2797->track_w(space, 0, data);

View File

@ -9,7 +9,7 @@
#include "cococart.h"
#include "machine/msm6242.h"
#include "machine/ds1315.h"
#include "machine/wd17xx.h"
#include "machine/wd_fdc.h"
//**************************************************************************
@ -37,6 +37,8 @@ public:
coco_fdc_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
coco_fdc_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
DECLARE_FLOPPY_FORMATS(floppy_formats);
// optional information overrides
virtual machine_config_constructor device_mconfig_additions() const;
virtual const rom_entry *device_rom_region() const;
@ -66,8 +68,8 @@ protected:
UINT8 m_drq : 1;
UINT8 m_intrq : 1;
optional_device<wd1773_device> m_wd17xx; /* WD17xx */
optional_device<wd2797_device> m_wd2797; /* WD2797 */
optional_device<wd1773_t> m_wd17xx; /* WD17xx */
optional_device<wd2797_t> m_wd2797; /* WD2797 */
optional_device<ds1315_device> m_ds1315; /* DS1315 */
/* Disto RTC */

View File

@ -438,7 +438,7 @@ bool megaduck_cart_slot_device::call_load()
void base_gb_cart_slot_device::call_unload()
{
if (m_cart && m_cart->get_ram_size() && m_cart->get_has_battery())
if (m_cart && m_cart->get_ram_base() && m_cart->get_ram_size() && m_cart->get_has_battery())
battery_save(m_cart->get_ram_base(), m_cart->get_ram_size());
}

View File

@ -368,8 +368,7 @@ WRITE8_MEMBER(gb_rom_mbc1_device::write_bank)
m_ram_bank = data & 0x3;
break;
case 0x6000: // MBC1 Mode Register
default:
m_mode = (data & 0x1) ? MODE_4M_256k : MODE_16M_8k;
m_mode = (data & 0x1) ? MODE_4M_256k : MODE_16M_64k;
break;
}
}
@ -399,31 +398,29 @@ WRITE8_MEMBER(gb_rom_mbc1_device::write_ram)
READ8_MEMBER(gb_rom_mbc2_device::read_rom)
{
if (offset < 0x4000)
return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)];
else
if (offset & 0x4000) /* RB1 */
return m_rom[rom_bank_map[m_latch_bank2] * 0x4000 + (offset & 0x3fff)];
else /* RB0 */
return m_rom[rom_bank_map[m_latch_bank] * 0x4000 + (offset & 0x3fff)];
}
WRITE8_MEMBER(gb_rom_mbc2_device::write_bank)
{
if (offset < 0x2000)
m_ram_enable = ((data & 0x0f) == 0x0a) ? 1 : 0;
else if (offset < 0x4000)
{
// 4bits only
data &= 0x0f;
// bank = 0 => bank = 1
if (data == 0)
data = 1;
// the mapper only has data lines D3..D0
data &= 0x0f;
// The least significant bit of the upper address byte must be 1
if (offset & 0x0100)
m_latch_bank2 = (m_latch_bank2 & 0x100) | data;
// the mapper only uses inputs A15..A14, A8 for register accesses
switch (offset & 0xc100)
{
case 0x0000: // RAM Enable Register
m_ram_enable = (data == 0x0a) ? 1 : 0;
break;
case 0x0100: // ROM Bank Register
m_latch_bank2 = (data == 0x00) ? 0x01 : data;
break;
}
}
// 1 bank only??
READ8_MEMBER(gb_rom_mbc2_device::read_ram)
{
if (!m_ram.empty() && m_ram_enable)

View File

@ -37,7 +37,7 @@ class gb_rom_mbc1_device : public gb_rom_mbc_device
public:
enum {
MODE_16M_8k = 0, /// 16Mbit ROM, 8kBit RAM
MODE_16M_64k = 0, /// 16Mbit ROM, 64kBit RAM
MODE_4M_256k = 1, /// 4Mbit ROM, 256kBit RAM
};
@ -47,7 +47,7 @@ public:
// device-level overrides
virtual void device_start() { shared_start(); save_item(NAME(m_mode)); };
virtual void device_reset() { shared_reset(); m_mode = MODE_16M_8k; };
virtual void device_reset() { shared_reset(); m_mode = MODE_16M_64k; };
virtual void set_additional_wirings(UINT8 mask, int shift) { m_mask = mask; m_shift = shift; } // these get set at cart loading
virtual DECLARE_READ8_MEMBER(read_rom);

View File

@ -35,8 +35,8 @@ WRITE8_MEMBER( isa8_gblaster_device::saa1099_1_16_w )
{
switch(offset)
{
case 0 : m_saa1099_1->control_w( space, offset, data ); break;
case 1 : m_saa1099_1->data_w( space, offset, data ); break;
case 0 : m_saa1099_1->data_w( space, offset, data ); break;
case 1 : m_saa1099_1->control_w( space, offset, data ); break;
}
}
@ -44,8 +44,29 @@ WRITE8_MEMBER( isa8_gblaster_device::saa1099_2_16_w )
{
switch(offset)
{
case 0 : m_saa1099_2->control_w( space, offset, data ); break;
case 1 : m_saa1099_2->data_w( space, offset, data ); break;
case 0 : m_saa1099_2->data_w( space, offset, data ); break;
case 1 : m_saa1099_2->control_w( space, offset, data ); break;
}
}
READ8_MEMBER( isa8_gblaster_device::detect_r )
{
switch(offset)
{
case 0:
case 1: return 0x7f; break; // this register reportedly returns 0x3f on a Tandy 1000 TL, and 0x7f on a generic 486 PC.
case 6:
case 7: return detect_reg; break;
default: return 0xff;
}
}
WRITE8_MEMBER( isa8_gblaster_device::detect_w )
{
switch(offset)
{
case 2:
case 3: detect_reg = (data & 0xff); break;
}
}
@ -77,7 +98,8 @@ isa8_gblaster_device::isa8_gblaster_device(const machine_config &mconfig, const
device_t(mconfig, ISA8_GAME_BLASTER, "Game Blaster Sound Card", tag, owner, clock, "isa_gblaster", __FILE__),
device_isa8_card_interface(mconfig, *this),
m_saa1099_1(*this, "saa1099.1"),
m_saa1099_2(*this, "saa1099.2")
m_saa1099_2(*this, "saa1099.2"),
detect_reg(0xFF)
{
}
@ -90,6 +112,7 @@ void isa8_gblaster_device::device_start()
set_isa_device();
m_isa->install_device(0x0220, 0x0221, 0, 0, read8_delegate( FUNC(isa8_gblaster_device::saa1099_16_r), this ), write8_delegate( FUNC(isa8_gblaster_device::saa1099_1_16_w), this ) );
m_isa->install_device(0x0222, 0x0223, 0, 0, read8_delegate( FUNC(isa8_gblaster_device::saa1099_16_r), this ), write8_delegate( FUNC(isa8_gblaster_device::saa1099_2_16_w), this ) );
m_isa->install_device(0x0224, 0x022F, 0, 0, read8_delegate( FUNC(isa8_gblaster_device::detect_r), this ), write8_delegate( FUNC(isa8_gblaster_device::detect_w), this ) );
}
//-------------------------------------------------

View File

@ -29,6 +29,8 @@ public:
DECLARE_READ8_MEMBER(saa1099_16_r);
DECLARE_WRITE8_MEMBER(saa1099_1_16_w);
DECLARE_WRITE8_MEMBER(saa1099_2_16_w);
DECLARE_READ8_MEMBER(detect_r);
DECLARE_WRITE8_MEMBER(detect_w);
protected:
// device-level overrides
virtual void device_start();
@ -37,6 +39,7 @@ private:
// internal state
required_device<saa1099_device> m_saa1099_1;
required_device<saa1099_device> m_saa1099_2;
UINT8 detect_reg;
};

View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
// copyright-holders:Wilbert Pol
/**********************************************************************
ISA 8 bit XT Hard Disk Controller

View File

@ -1,5 +1,5 @@
// license:BSD-3-Clause
// copyright-holders:Miodrag Milanovic
// copyright-holders:Wilbert Pol
/**********************************************************************
ISA 8 bit XT Hard Disk Controller

View File

@ -29,6 +29,7 @@
pro audio spectrum 16: 1 OPL3
2 x saa1099 chips
inherited from game blaster
also on sound blaster 1.0
option on sound blaster 1.5
@ -150,8 +151,8 @@ WRITE8_MEMBER( isa8_sblaster1_0_device::saa1099_1_16_w )
{
switch(offset)
{
case 0 : m_saa1099_1->control_w( space, offset, data ); break;
case 1 : m_saa1099_1->data_w( space, offset, data ); break;
case 0 : m_saa1099_1->data_w( space, offset, data ); break;
case 1 : m_saa1099_1->control_w( space, offset, data ); break;
}
}
@ -159,8 +160,8 @@ WRITE8_MEMBER( isa8_sblaster1_0_device::saa1099_2_16_w )
{
switch(offset)
{
case 0 : m_saa1099_2->control_w( space, offset, data ); break;
case 1 : m_saa1099_2->data_w( space, offset, data ); break;
case 0 : m_saa1099_2->data_w( space, offset, data ); break;
case 1 : m_saa1099_2->control_w( space, offset, data ); break;
}
}

View File

@ -11,7 +11,6 @@
#include "cpu/z80/z80.h"
#include "machine/upd765.h"
#include "machine/ataintf.h"
#include "formats/basicdsk.h"
#include "imagedev/harddriv.h"

View File

@ -552,7 +552,7 @@ int base_md_cart_slot_device::load_nonlist()
void base_md_cart_slot_device::call_unload()
{
if (m_cart && m_cart->get_nvram_size())
if (m_cart && m_cart->get_nvram_base() && m_cart->get_nvram_size())
battery_save(m_cart->get_nvram_base(), m_cart->get_nvram_size());
}

View File

@ -215,6 +215,8 @@ void nubus_image_device::device_start()
filectx.curdir[0] = '.';
filectx.curdir[1] = '\0';
filectx.dirp = NULL;
filectx.fd = NULL;
}
//-------------------------------------------------
@ -280,7 +282,7 @@ WRITE32_MEMBER( nubus_image_device::file_cmd_w )
strcpy((char*)filectx.filename, (char*)filectx.curdir);
break;
case kFileCmdSetDir:
if(filectx.filename[0] == '/') {
if ((filectx.filename[0] == '/') || (filectx.filename[0] == '$')) {
strcpy((char*)filectx.curdir, (char*)filectx.filename);
} else {
strcat((char*)filectx.curdir, "/");
@ -291,10 +293,15 @@ WRITE32_MEMBER( nubus_image_device::file_cmd_w )
if(filectx.dirp) osd_closedir(filectx.dirp);
filectx.dirp = osd_opendir((const char *)filectx.curdir);
case kFileCmdGetNextListing:
dp = osd_readdir(filectx.dirp);
if(dp) {
strncpy((char*)filectx.filename, dp->name, sizeof(filectx.filename));
} else {
if (filectx.dirp) {
dp = osd_readdir(filectx.dirp);
if(dp) {
strncpy((char*)filectx.filename, dp->name, sizeof(filectx.filename));
} else {
memset(filectx.filename, 0, sizeof(filectx.filename));
}
}
else {
memset(filectx.filename, 0, sizeof(filectx.filename));
}
break;

View File

@ -23,6 +23,7 @@ public:
virtual DECLARE_READ8_MEMBER(read_cart) { return m_subslot->read_cart(space, offset); }
virtual DECLARE_WRITE8_MEMBER(write_cart) { m_subslot->write_cart(space, offset, data); }
virtual DECLARE_WRITE8_MEMBER(write_mapper) { m_subslot->write_mapper(space, offset, data); }
virtual int get_lphaser_xoffs() { return m_subslot->m_cart ? m_subslot->m_cart->get_lphaser_xoffs() : -1; }
virtual machine_config_constructor device_mconfig_additions() const;

View File

@ -410,7 +410,7 @@ bool sega8_cart_slot_device::call_load()
void sega8_cart_slot_device::call_unload()
{
if (m_cart && m_cart->get_ram_size() && m_cart->get_has_battery())
if (m_cart && m_cart->get_ram_base() && m_cart->get_ram_size() && m_cart->get_has_battery())
battery_save(m_cart->get_ram_base(), m_cart->get_ram_size());
}

View File

@ -47,6 +47,7 @@ public:
virtual DECLARE_READ8_MEMBER(read_cart) { return 0xff; }
virtual DECLARE_WRITE8_MEMBER(write_cart) {}
virtual DECLARE_WRITE8_MEMBER(write_mapper) {}
virtual int get_lphaser_xoffs() { return m_lphaser_xoffs; }
// a few carts (for SG1000) acts as a RAM expansion, taking control of the system RAM in 0xc000-0xffff
virtual DECLARE_READ8_MEMBER(read_ram) { return 0xff; }
virtual DECLARE_WRITE8_MEMBER(write_ram) {}
@ -61,7 +62,6 @@ public:
void set_late_battery(bool val) { m_late_battery_enable = val; }
bool get_late_battery() { return m_late_battery_enable; }
void set_lphaser_xoffs(int val) { m_lphaser_xoffs = val; }
int get_lphaser_xoffs() { return m_lphaser_xoffs; }
void set_sms_mode(int val) { m_sms_mode = val; }
int get_sms_mode() { return m_sms_mode; }

View File

@ -31,7 +31,7 @@
Known issues (Feb 2014):
1. The BwG controller cannot run with the Geneve or other non-9900 computers.
- The BwG controller cannot run with the Geneve or other non-9900 computers.
The reason for that is the wait state logic. It assumes that when
executing MOVB @>5FF6,*R2, first a value from 5FF7 is attempted to be read,
just as the TI console does. In that case, wait states are inserted if
@ -39,12 +39,6 @@
only and therefore circumvent the wait state generation. This is in fact
not an emulation glitch but the behavior of the real expansion card.
Resolved issues (Feb 2014):
1. The BwG controller failed to read single-density disks. This only occurs
with the legacy implementation because the modern floppy implementation
reproduces the correct recording format on the medium, so the controller
actually detects FM or MFM.
*******************************************************************************/
@ -704,498 +698,3 @@ const rom_entry *snug_bwg_device::device_rom_region() const
}
const device_type TI99_BWG = &device_creator<snug_bwg_device>;
// ==========================================================================
#define FDCLEG_TAG "wd1773"
/*
Legacy implementation
*/
snug_bwg_legacy_device::snug_bwg_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: ti_expansion_card_device(mconfig, TI99_BWG_LEG, "SNUG BwG Floppy Controller LEGACY", tag, owner, clock, "ti99_bwg_leg", __FILE__),
m_wd1773(*this, FDCLEG_TAG),
m_clock(*this, CLOCK_TAG) { }
/*
Callback called at the end of DVENA pulse
*/
void snug_bwg_legacy_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
m_DVENA = CLEAR_LINE;
set_ready_line();
}
/*
Operate the wait state logic.
*/
void snug_bwg_legacy_device::set_ready_line()
{
// This is the wait state logic
if (TRACE_SIGNALS) logerror("bwg: address=%04x, DRQ=%d, INTRQ=%d, MOTOR=%d\n", m_address & 0xffff, m_DRQ, m_IRQ, m_DVENA);
line_state nready = (m_dataregLB && // Are we accessing 5ff7
m_WAITena && // and the wait state generation is active (SBO 2)
(m_DRQ==CLEAR_LINE) && // and we are waiting for a byte
(m_IRQ==CLEAR_LINE) && // and there is no interrupt yet
(m_DVENA==ASSERT_LINE) // and the motor is turning?
)? ASSERT_LINE : CLEAR_LINE; // In that case, clear READY and thus trigger wait states
if (TRACE_READY) if (nready==ASSERT_LINE) logerror("bwg: READY line = %d\n", (nready==CLEAR_LINE)? 1:0);
m_slot->set_ready((nready==CLEAR_LINE)? ASSERT_LINE : CLEAR_LINE);
}
/*
Callback, called from the controller chip whenever DRQ/IRQ state change
*/
WRITE_LINE_MEMBER( snug_bwg_legacy_device::intrq_w )
{
if (TRACE_SIGNALS) logerror("bwg: set intrq = %d\n", state);
m_IRQ = (line_state)state;
// Note that INTB is actually not used in the TI-99 family. But the
// controller asserts the line nevertheless, probably intended for
// use in another planned TI system
m_slot->set_intb(state==ASSERT_LINE);
// We need to explicitly set the READY line to release the datamux
set_ready_line();
}
WRITE_LINE_MEMBER( snug_bwg_legacy_device::drq_w )
{
if (TRACE_SIGNALS) logerror("bwg: set drq = %d\n", state);
m_DRQ = (line_state)state;
// We need to explicitly set the READY line to release the datamux
set_ready_line();
}
SETADDRESS_DBIN_MEMBER( snug_bwg_legacy_device::setaddress_dbin )
{
// Selection login in the PAL and some circuits on the board
// Is the card being selected?
m_address = offset;
m_inDsrArea = ((m_address & m_select_mask)==m_select_value);
if (!m_inDsrArea) return;
if (TRACE_ADDRESS) logerror("bwg: set address = %04x\n", offset & 0xffff);
// Is the WD chip on the card being selected?
// We need the even and odd addresses for the wait state generation,
// but only the even addresses when we access it
m_WDsel0 = m_inDsrArea && !m_rtc_enabled
&& ((state==ASSERT_LINE && ((m_address & 0x1ff8)==0x1ff0)) // read
|| (state==CLEAR_LINE && ((m_address & 0x1ff8)==0x1ff8))); // write
m_WDsel = m_WDsel0 && ((m_address & 1)==0);
// Is the RTC selected on the card? (even addr)
m_RTCsel = m_inDsrArea && m_rtc_enabled && ((m_address & 0x1fe1)==0x1fe0);
// RTC disabled:
// 5c00 - 5fef: RAM
// 5ff0 - 5fff: Controller (f0 = status, f2 = track, f4 = sector, f6 = data)
// RTC enabled:
// 5c00 - 5fdf: RAM
// 5fe0 - 5fff: Clock (even addr)
// Is RAM selected? We just check for the last 1K and let the RTC or WD
// just take control before
m_lastK = m_inDsrArea && ((m_address & 0x1c00)==0x1c00);
// Is the data register port of the WD being selected?
// In fact, the address to read the data from is 5FF6, but the TI-99 datamux
// fetches both bytes from 5FF7 and 5FF6, the odd one first. The BwG uses
// the odd address to operate the READY line
m_dataregLB = m_WDsel0 && ((m_address & 0x07)==0x07);
// Clear or assert the outgoing READY line
set_ready_line();
}
/*
Read a byte from ROM, RAM, FDC, or RTC. See setaddress_dbin for selection
logic.
*/
READ8Z_MEMBER(snug_bwg_legacy_device::readz)
{
if (m_inDsrArea && m_selected)
{
// 010x xxxx xxxx xxxx
if (m_lastK)
{
// ...1 11xx xxxx xxxx
if (m_rtc_enabled)
{
if (m_RTCsel)
{
// .... ..11 111x xxx0
if (!space.debugger_access()) *value = m_clock->read(space, (m_address & 0x001e) >> 1);
if (TRACE_RW) logerror("bwg: read RTC: %04x -> %02x\n", m_address & 0xffff, *value);
}
else
{
*value = m_buffer_ram[(m_ram_page<<10) | (m_address & 0x03ff)];
if (TRACE_RW) logerror("bwg: read ram: %04x (page %d)-> %02x\n", m_address & 0xffff, m_ram_page, *value);
}
}
else
{
if (m_WDsel)
{
// .... ..11 1111 0xx0
// Note that the value is inverted again on the board,
// so we can drop the inversion
if (!space.debugger_access()) *value = m_wd1773->read(space, (m_address >> 1)&0x03);
if (TRACE_RW) logerror("bwg: read FDC: %04x -> %02x\n", m_address & 0xffff, *value);
if (TRACE_DATA)
{
if ((m_address & 0xffff)==0x5ff6) logerror("%02x ", *value);
else logerror("\n%04x: %02x", m_address&0xffff, *value);
}
}
else
{
*value = m_buffer_ram[(m_ram_page<<10) | (m_address & 0x03ff)];
if (TRACE_RW) logerror("bwg: read ram: %04x (page %d)-> %02x\n", m_address & 0xffff, m_ram_page, *value);
}
}
}
else
{
*value = m_dsrrom[(m_rom_page<<13) | (m_address & 0x1fff)];
if (TRACE_RW) logerror("bwg: read dsr: %04x (page %d)-> %02x\n", m_address & 0xffff, m_rom_page, *value);
}
}
}
/*
Resets the drive geometry. This is required because the heuristic of
the default implementation sets the drive geometry to the geometry
of the medium.
*/
void snug_bwg_legacy_device::set_geometry(legacy_floppy_image_device *drive, floppy_type_t type)
{
// This assertion may fail when the names of the floppy devices change.
// Unfortunately, the wd17xx device assumes the floppy drives at root
// level, so we use an explicitly qualified tag. See peribox.h.
assert(drive != NULL);
drive->floppy_drive_set_geometry(type);
}
void snug_bwg_legacy_device::set_all_geometries(floppy_type_t type)
{
set_geometry(machine().device<legacy_floppy_image_device>(PFLOPPY_0), type);
set_geometry(machine().device<legacy_floppy_image_device>(PFLOPPY_1), type);
set_geometry(machine().device<legacy_floppy_image_device>(PFLOPPY_2), type);
}
/*
Write a byte
4000 - 5bff: ROM, ignore write (4 banks)
rtc disabled:
5c00 - 5fef: RAM
5ff0 - 5fff: Controller (f8 = command, fa = track, fc = sector, fe = data)
rtc enabled:
5c00 - 5fdf: RAM
5fe0 - 5fff: Clock (even addr)
*/
WRITE8_MEMBER(snug_bwg_legacy_device::write)
{
if (m_inDsrArea && m_selected)
{
if (m_lastK)
{
if (m_rtc_enabled)
{
if (m_RTCsel)
{
// .... ..11 111x xxx0
if (TRACE_RW) logerror("bwg: write RTC: %04x <- %02x\n", m_address & 0xffff, data);
if (!space.debugger_access()) m_clock->write(space, (m_address & 0x001e) >> 1, data);
}
else
{
if (TRACE_RW) logerror("bwg: write ram: %04x (page %d) <- %02x\n", m_address & 0xffff, m_ram_page, data);
m_buffer_ram[(m_ram_page<<10) | (m_address & 0x03ff)] = data;
}
}
else
{
if (m_WDsel)
{
// .... ..11 1111 1xx0
// Note that the value is inverted again on the board,
// so we can drop the inversion
if (TRACE_RW) logerror("bwg: write FDC: %04x <- %02x\n", m_address & 0xffff, data);
if (!space.debugger_access()) m_wd1773->write(space, (m_address >> 1)&0x03, data);
}
else
{
if (TRACE_RW) logerror("bwg: write ram: %04x (page %d) <- %02x\n", m_address & 0xffff, m_ram_page, data);
m_buffer_ram[(m_ram_page<<10) | (m_address & 0x03ff)] = data;
}
}
}
}
}
/*
CRU read handler. *=inverted.
bit 0: DSK4 connected*
bit 1: DSK1 connected*
bit 2: DSK2 connected*
bit 3: DSK3 connected*
bit 4: Dip 1
bit 5: Dip 2
bit 6: Dip 3
bit 7: Dip 4
*/
READ8Z_MEMBER(snug_bwg_legacy_device::crureadz)
{
UINT8 reply = 0;
if ((offset & 0xff00)==m_cru_base)
{
if ((offset & 0x00ff)==0)
{
// Assume that we have 4 drives connected
// If we want to do that properly, we need to check the actually
// available drives (not the images!). But why should we connect less?
reply = 0x00;
// DIP switches. Note that a closed switch means 0
// xx01 1111 11 = only dsk1; 10 = 1+2, 01=1/2/3, 00=1-4
if (m_dip1 != 0) reply |= 0x10;
if (m_dip2 != 0) reply |= 0x20;
reply |= (m_dip34 << 6);
*value = ~reply;
}
else
*value = 0;
if (TRACE_CRU) logerror("bwg: Read CRU = %02x\n", *value);
}
}
WRITE8_MEMBER(snug_bwg_legacy_device::cruwrite)
{
int drive, drivebit;
if ((offset & 0xff00)==m_cru_base)
{
int bit = (offset >> 1) & 0x0f;
switch (bit)
{
case 0:
/* (De)select the card. Indicated by a LED on the board. */
m_selected = (data != 0);
if (TRACE_CRU) logerror("bwg: Map DSR (bit 0) = %d\n", m_selected);
break;
case 1:
/* Activate motor */
if (data && !m_strobe_motor)
{ /* on rising edge, set motor_running for 4.23s */
if (TRACE_CRU) logerror("bwg: trigger motor (bit 1)\n");
m_DVENA = ASSERT_LINE;
m_motor_on_timer->adjust(attotime::from_msec(4230));
}
m_strobe_motor = (data != 0);
break;
case 2:
/* Set disk ready/hold (bit 2) */
// 0: ignore IRQ and DRQ
// 1: TMS9900 is stopped until IRQ or DRQ are set
// OR the motor stops rotating - rotates for 4.23s after write
// to CRU bit 1
if (TRACE_CRU) logerror("bwg: arm wait state logic (bit 2) = %d\n", data);
m_WAITena = (data != 0);
break;
case 4:
case 5:
case 6:
case 8:
/* Select drive 0-2 (DSK1-DSK3) (bits 4-6) */
/* Select drive 3 (DSK4) (bit 8) */
drive = (bit == 8) ? 3 : (bit - 4); /* drive # (0-3) */
if (TRACE_CRU) logerror("bwg: set drive (bit %d) = %d\n", bit, data);
drivebit = 1<<drive;
if (data != 0)
{
if ((m_DSEL & drivebit) == 0) /* select drive */
{
if (m_DSEL != 0)
logerror("bwg: Multiple drives selected, %02x\n", m_DSEL);
m_DSEL |= drivebit;
m_wd1773->set_drive(drive);
}
}
else
m_DSEL &= ~drivebit;
break;
case 7:
/* Select side of disk (bit 7) */
m_SIDE = data;
if (TRACE_CRU) logerror("bwg: set side (bit 7) = %d\n", data);
m_wd1773->set_side(m_SIDE);
break;
case 10:
/* double density enable (active low) */
if (TRACE_CRU) logerror("bwg: set double density (bit 10) = %d\n", data);
m_wd1773->dden_w((data != 0) ? ASSERT_LINE : CLEAR_LINE);
break;
case 11:
/* EPROM A13 */
if (data != 0)
m_rom_page |= 1;
else
m_rom_page &= 0xfe; // 11111110
if (TRACE_CRU) logerror("bwg: set ROM page (bit 11) = %d, page = %d\n", bit, m_rom_page);
break;
case 13:
/* RAM A10 */
m_ram_page = data;
if (TRACE_CRU) logerror("bwg: set RAM page (bit 13) = %d, page = %d\n", bit, m_ram_page);
break;
case 14:
/* Override FDC with RTC (active high) */
if (TRACE_CRU) logerror("bwg: turn on RTC (bit 14) = %d\n", data);
m_rtc_enabled = (data != 0);
break;
case 15:
/* EPROM A14 */
if (data != 0)
m_rom_page |= 2;
else
m_rom_page &= 0xfd; // 11111101
if (TRACE_CRU) logerror("bwg: set ROM page (bit 15) = %d, page = %d\n", bit, m_rom_page);
break;
case 3:
if (TRACE_CRU) logerror("bwg: set head load (bit 3) = %d\n", data);
break;
case 9:
case 12:
/* Unused (bit 3, 9 & 12) */
if (TRACE_CRU) logerror("bwg: set unknown bit %d = %d\n", bit, data);
break;
}
}
}
void snug_bwg_legacy_device::device_start(void)
{
logerror("bwg: BWG start\n");
m_dsrrom = memregion(DSRROM)->base();
m_buffer_ram = memregion(BUFFER)->base();
m_motor_on_timer = timer_alloc(MOTOR_TIMER);
m_cru_base = 0x1100;
}
void snug_bwg_legacy_device::device_reset()
{
logerror("bwg: BWG reset\n");
if (m_genmod)
{
m_select_mask = 0x1fe000;
m_select_value = 0x174000;
}
else
{
m_select_mask = 0x7e000;
m_select_value = 0x74000;
}
m_strobe_motor = false;
m_DVENA = CLEAR_LINE;
m_DSEL = 0;
m_SIDE = 0;
ti99_set_80_track_drives(FALSE);
floppy_type_t type = FLOPPY_STANDARD_5_25_DSDD_40;
set_all_geometries(type);
m_DRQ = CLEAR_LINE;
m_IRQ = CLEAR_LINE;
m_WAITena = false;
m_rtc_enabled = false;
m_selected = false;
m_dataregLB = false;
m_inDsrArea = false;
m_dip1 = ioport("BWGDIP1")->read();
m_dip2 = ioport("BWGDIP2")->read();
m_dip34 = ioport("BWGDIP34")->read();
m_rom_page = 0;
m_ram_page = 0;
}
INPUT_PORTS_START( bwg_fdc_legacy )
PORT_START( "BWGDIP1" )
PORT_DIPNAME( 0x01, 0x00, "BwG step rate" )
PORT_DIPSETTING( 0x00, "6 ms")
PORT_DIPSETTING( 0x01, "20 ms")
PORT_START( "BWGDIP2" )
PORT_DIPNAME( 0x01, 0x00, "BwG date/time display" )
PORT_DIPSETTING( 0x00, "Hide")
PORT_DIPSETTING( 0x01, "Show")
PORT_START( "BWGDIP34" )
PORT_DIPNAME( 0x03, 0x03, "BwG drives" )
PORT_DIPSETTING( 0x00, "DSK1 only")
PORT_DIPSETTING( 0x01, "DSK1-DSK2")
PORT_DIPSETTING( 0x02, "DSK1-DSK3")
PORT_DIPSETTING( 0x03, "DSK1-DSK4")
INPUT_PORTS_END
MACHINE_CONFIG_FRAGMENT( bwg_fdc_legacy )
MCFG_DEVICE_ADD(FDCLEG_TAG, WD1773, 0)
MCFG_WD17XX_DEFAULT_DRIVE4_TAGS
MCFG_WD17XX_INTRQ_CALLBACK(WRITELINE(snug_bwg_legacy_device, intrq_w))
MCFG_WD17XX_DRQ_CALLBACK(WRITELINE(snug_bwg_legacy_device, drq_w))
MCFG_DEVICE_ADD(CLOCK_TAG, MM58274C, 0)
MCFG_MM58274C_MODE24(1) // 24 hour
MCFG_MM58274C_DAY1(0) // sunday
MACHINE_CONFIG_END
ROM_START( bwg_fdc_legacy )
ROM_REGION(0x8000, DSRROM, 0)
ROM_LOAD("bwg.bin", 0x0000, 0x8000, CRC(06f1ec89) SHA1(6ad77033ed268f986d9a5439e65f7d391c4b7651)) /* BwG disk DSR ROM */
ROM_REGION(0x0800, BUFFER, 0) /* BwG RAM buffer */
ROM_FILL(0x0000, 0x0400, 0x00)
ROM_END
machine_config_constructor snug_bwg_legacy_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( bwg_fdc_legacy );
}
const rom_entry *snug_bwg_legacy_device::device_rom_region() const
{
return ROM_NAME( bwg_fdc_legacy );
}
ioport_constructor snug_bwg_legacy_device::device_input_ports() const
{
return INPUT_PORTS_NAME( bwg_fdc_legacy );
}
const device_type TI99_BWG_LEG = &device_creator<snug_bwg_legacy_device>;

View File

@ -20,9 +20,6 @@
extern const device_type TI99_BWG;
/*
Implementation for modern floppy system.
*/
class snug_bwg_device : public ti_expansion_card_device
{
public:
@ -142,109 +139,4 @@ private:
// Debugging
bool m_debug_dataout;
};
// =========================================================================
/*
Legacy implementation.
*/
#include "machine/wd17xx.h"
extern const device_type TI99_BWG_LEG;
class snug_bwg_legacy_device : public ti_expansion_card_device
{
public:
snug_bwg_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ8Z_MEMBER(readz);
DECLARE_WRITE8_MEMBER(write);
DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin);
DECLARE_WRITE_LINE_MEMBER( intrq_w );
DECLARE_WRITE_LINE_MEMBER( drq_w );
DECLARE_READ8Z_MEMBER(crureadz);
DECLARE_WRITE8_MEMBER(cruwrite);
protected:
virtual void device_start(void);
virtual void device_reset(void);
virtual const rom_entry *device_rom_region() const;
virtual machine_config_constructor device_mconfig_additions() const;
virtual ioport_constructor device_input_ports() const;
private:
void set_ready_line();
void set_all_geometries(floppy_type_t type);
void set_geometry(legacy_floppy_image_device *drive, floppy_type_t type);
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
// Holds the status of the DRQ and IRQ lines.
line_state m_DRQ, m_IRQ;
// DIP switch state
int m_dip1, m_dip2, m_dip34;
// Page selection for ROM and RAM
int m_ram_page; // 0-1
int m_rom_page; // 0-3
// When true, the READY line will be cleared (create wait states) when
// waiting for data from the controller.
bool m_WAITena;
// Address in card area
bool m_inDsrArea;
// WD selected
bool m_WDsel, m_WDsel0;
// RTC selected
bool m_RTCsel;
// last 1K area selected
bool m_lastK;
// Data register +1 selected
bool m_dataregLB;
/* Indicates whether the clock is mapped into the address space. */
bool m_rtc_enabled;
/* When TRUE, keeps DVENA high. */
bool m_strobe_motor;
// Signal DVENA. When TRUE, makes some drive turning.
line_state m_DVENA;
// Recent address
int m_address;
/* Indicates which drive has been selected. Values are 0, 1, 2, and 4. */
// 000 = no drive
// 001 = drive 1
// 010 = drive 2
// 100 = drive 3
int m_DSEL;
/* Signal SIDSEL. 0 or 1, indicates the selected head. */
int m_SIDE;
// Link to the WD1773 controller on the board.
required_device<wd1773_device> m_wd1773;
// Link to the real-time clock on the board.
required_device<mm58274c_device> m_clock;
// count 4.23s from rising edge of motor_on
emu_timer* m_motor_on_timer;
// DSR ROM
UINT8* m_dsrrom;
// Buffer RAM
UINT8* m_buffer_ram;
};
#endif

View File

@ -74,12 +74,12 @@
#define CLK_ADDR 0x0fe0
#define RAM_ADDR 0x1000
#define TRACE_EMU 1
#define TRACE_EMU 0
#define TRACE_CRU 0
#define TRACE_COMP 0
#define TRACE_RAM 0
#define TRACE_ROM 0
#define TRACE_LINES 1
#define TRACE_LINES 0
#define TRACE_MOTOR 0
#define TRACE_DMA 0
#define TRACE_INT 0
@ -510,17 +510,27 @@ void myarc_hfdc_device::floppy_index_callback(floppy_image_device *floppy, int s
*/
void myarc_hfdc_device::harddisk_index_callback(mfm_harddisk_device *harddisk, int state)
{
/* if (TRACE_LINES) */ if (state==1) logerror("%s: HD index pulse\n", tag());
if (TRACE_LINES) if (state==1) logerror("%s: HD index pulse\n", tag());
set_bits(m_status_latch, HDC_DS_INDEX, (state==ASSERT_LINE));
signal_drive_status();
}
/*
This is called back from the hard disk when READY becomes asserted.
*/
void myarc_hfdc_device::harddisk_ready_callback(mfm_harddisk_device *harddisk, int state)
{
if (TRACE_LINES) logerror("%s: HD READY = %d\n", tag(), state);
set_bits(m_status_latch, HDC_DS_READY, (state==ASSERT_LINE));
signal_drive_status();
}
/*
This is called back from the hard disk when seek_complete becomes asserted.
*/
void myarc_hfdc_device::harddisk_skcom_callback(mfm_harddisk_device *harddisk, int state)
{
/* if (TRACE_LINES) */ if (state==1) logerror("%s: HD seek complete\n", tag());
if (TRACE_LINES) logerror("%s: HD seek complete = %d\n", tag(), state);
set_bits(m_status_latch, HDC_DS_SKCOM, (state==ASSERT_LINE));
signal_drive_status();
}
@ -674,6 +684,7 @@ WRITE8_MEMBER( myarc_hfdc_device::auxbus_out )
// Dir = 0 -> outward
m_current_harddisk->direction_in_w((data & 0x20)? ASSERT_LINE : CLEAR_LINE);
m_current_harddisk->step_w((data & 0x10)? ASSERT_LINE : CLEAR_LINE);
m_current_harddisk->headsel_w(data & 0x0f);
}
// We are pushing the drive status after OUTPUT2
@ -728,6 +739,7 @@ void myarc_hfdc_device::connect_harddisk_unit(int index)
if (m_current_harddisk != NULL)
{
m_current_harddisk->setup_index_pulse_cb(mfm_harddisk_device::index_pulse_cb(FUNC(myarc_hfdc_device::harddisk_index_callback), this));
m_current_harddisk->setup_ready_cb(mfm_harddisk_device::ready_cb(FUNC(myarc_hfdc_device::harddisk_ready_callback), this));
m_current_harddisk->setup_seek_complete_cb(mfm_harddisk_device::seek_complete_cb(FUNC(myarc_hfdc_device::harddisk_skcom_callback), this));
}
else
@ -993,8 +1005,8 @@ static SLOT_INTERFACE_START( hfdc_floppies )
SLOT_INTERFACE_END
static SLOT_INTERFACE_START( hfdc_harddisks )
SLOT_INTERFACE( "generic", MFM_HD_GENERIC ) // Generic high-level emulation
// SLOT_INTERFACE( "seagatemfm", MFM_HD_SEAGATE ) // Seagate ST-225 and others
SLOT_INTERFACE( "generic", MFMHD_GENERIC ) // Generic high-level emulation
SLOT_INTERFACE( "st225", MFMHD_ST225 ) // Seagate ST-225 and others
SLOT_INTERFACE_END
MACHINE_CONFIG_FRAGMENT( ti99_hfdc )
@ -1012,9 +1024,9 @@ MACHINE_CONFIG_FRAGMENT( ti99_hfdc )
MCFG_FLOPPY_DRIVE_ADD("f4", hfdc_floppies, NULL, myarc_hfdc_device::floppy_formats)
// NB: Hard disks don't go without image (other than floppy drives)
MCFG_MFM_HARDDISK_ADD("h1", hfdc_harddisks, NULL)
MCFG_MFM_HARDDISK_ADD("h2", hfdc_harddisks, NULL)
MCFG_MFM_HARDDISK_ADD("h3", hfdc_harddisks, NULL)
MCFG_MFM_HARDDISK_CONN_ADD("h1", hfdc_harddisks, NULL, MFM_BYTE, 3000, 20)
MCFG_MFM_HARDDISK_CONN_ADD("h2", hfdc_harddisks, NULL, MFM_BYTE, 2000, 20)
MCFG_MFM_HARDDISK_CONN_ADD("h3", hfdc_harddisks, NULL, MFM_BYTE, 2000, 20)
MCFG_DEVICE_ADD(CLOCK_TAG, MM58274C, 0)
MCFG_MM58274C_MODE24(1) // 24 hour
@ -1046,27 +1058,6 @@ ioport_constructor myarc_hfdc_device::device_input_ports() const
const device_type TI99_HFDC = &device_creator<myarc_hfdc_device>;
mfm_harddisk_connector::mfm_harddisk_connector(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock):
device_t(mconfig, MFM_HD_CONNECTOR, "MFM hard disk connector", tag, owner, clock, "mfm_hd_connector", __FILE__),
device_slot_interface(mconfig, *this)
{
}
mfm_harddisk_connector::~mfm_harddisk_connector()
{
}
mfm_harddisk_device *mfm_harddisk_connector::get_device()
{
return dynamic_cast<mfm_harddisk_device *>(get_card_device());
}
void mfm_harddisk_connector::device_start()
{
}
const device_type MFM_HD_CONNECTOR = &device_creator<mfm_harddisk_connector>;
// =========================================================================
/*

View File

@ -69,6 +69,7 @@ private:
// Callbacks for the index hole and seek complete
void floppy_index_callback(floppy_image_device *floppy, int state);
void harddisk_index_callback(mfm_harddisk_device *harddisk, int state);
void harddisk_ready_callback(mfm_harddisk_device *harddisk, int state);
void harddisk_skcom_callback(mfm_harddisk_device *harddisk, int state);
// Operate the floppy motors
@ -182,26 +183,6 @@ private:
int m_readyflags;
};
/* Connector for a MFM hard disk. See also floppy.c */
class mfm_harddisk_connector : public device_t,
public device_slot_interface
{
public:
mfm_harddisk_connector(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
~mfm_harddisk_connector();
mfm_harddisk_device *get_device();
protected:
void device_start();
};
extern const device_type MFM_HD_CONNECTOR;
#define MCFG_MFM_HARDDISK_ADD(_tag, _slot_intf, _def_slot) \
MCFG_DEVICE_ADD(_tag, MFM_HD_CONNECTOR, 0) \
MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, false);
// =========================================================================
/*

View File

@ -431,16 +431,13 @@ SLOT_INTERFACE_END
SLOT_INTERFACE_START( peribox_slot7 )
SLOT_INTERFACE("ide", TI99_IDE)
SLOT_INTERFACE("usbsm", TI99_USBSM)
SLOT_INTERFACE("bwgleg", TI99_BWG_LEG)
SLOT_INTERFACE("bwg", TI99_BWG)
SLOT_INTERFACE("hfdc", TI99_HFDC_LEG)
SLOT_INTERFACE("hfdcnew", TI99_HFDC)
SLOT_INTERFACE_END
SLOT_INTERFACE_START( peribox_slot8 )
SLOT_INTERFACE("tifdcleg", TI99_FDC_LEG)
SLOT_INTERFACE("tifdc", TI99_FDC)
SLOT_INTERFACE("bwgleg", TI99_BWG_LEG)
SLOT_INTERFACE("bwg", TI99_BWG)
SLOT_INTERFACE("hfdc", TI99_HFDC_LEG)
SLOT_INTERFACE("hfdcnew", TI99_HFDC)
@ -497,7 +494,6 @@ SLOT_INTERFACE_START( peribox_slot7nobwg )
SLOT_INTERFACE_END
SLOT_INTERFACE_START( peribox_slot8nobwg )
SLOT_INTERFACE("tifdcleg", TI99_FDC_LEG)
SLOT_INTERFACE("tifdc", TI99_FDC)
SLOT_INTERFACE("hfdc", TI99_HFDC_LEG)
SLOT_INTERFACE("hfdcnew", TI99_HFDC)

View File

@ -427,313 +427,3 @@ const rom_entry *ti_fdc_device::device_rom_region() const
}
const device_type TI99_FDC = &device_creator<ti_fdc_device>;
//===========================================================================
/***********************************************
Legacy implementation, to be removed
***********************************************/
#define TI_FDCLEG_TAG "ti_dssd_controller_legacy"
#define FDCLEG_TAG "wd1771"
ti_fdc_legacy_device::ti_fdc_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: ti_expansion_card_device(mconfig, TI99_FDC_LEG, "TI-99 Standard DSSD Floppy Controller LEGACY", tag, owner, clock, "ti99_fdc_leg", __FILE__),
m_fd1771(*this, FDCLEG_TAG) { }
/*
callback called at the end of DVENA pulse
*/
void ti_fdc_legacy_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
{
m_DVENA = CLEAR_LINE;
if (TRACE_MOTOR) logerror("tifdc: Motor off\n");
set_ready_line();
}
/*
Operate the wait state logic.
*/
void ti_fdc_legacy_device::set_ready_line()
{
// This is the wait state logic
if (TRACE_SIGNALS) logerror("tifdc: address=%04x, DRQ=%d, INTRQ=%d, MOTOR=%d\n", m_address & 0xffff, m_DRQ, m_IRQ, m_DVENA);
line_state nready = (m_WDsel && // Are we accessing 5ffx (even addr)?
m_WAITena && // and the wait state generation is active (SBO 2)
(m_DRQ==CLEAR_LINE) && // and we are waiting for a byte
(m_IRQ==CLEAR_LINE) && // and there is no interrupt yet
(m_DVENA==ASSERT_LINE) // and the motor is turning?
)? ASSERT_LINE : CLEAR_LINE; // In that case, clear READY and thus trigger wait states
if (TRACE_READY) logerror("tifdc: READY line = %d\n", (nready==CLEAR_LINE)? 1:0);
m_slot->set_ready((nready==CLEAR_LINE)? ASSERT_LINE : CLEAR_LINE);
}
SETADDRESS_DBIN_MEMBER( ti_fdc_legacy_device::setaddress_dbin )
{
// Selection login in the PAL and some circuits on the board
// Is the card being selected?
m_address = offset;
m_inDsrArea = ((m_address & m_select_mask)==m_select_value);
if (!m_inDsrArea) return;
if (TRACE_ADDRESS) logerror("tifdc: set address = %04x\n", offset & 0xffff);
// Is the WD chip on the card being selected?
m_WDsel = m_inDsrArea && ((m_address & 0x1ff1)==0x1ff0);
// Clear or assert the outgoing READY line
set_ready_line();
}
READ8Z_MEMBER(ti_fdc_legacy_device::readz)
{
if (m_inDsrArea && m_selected)
{
// only use the even addresses from 1ff0 to 1ff6.
// Note that data is inverted.
// 0101 1111 1111 0xx0
UINT8 reply = 0;
if (m_WDsel && ((m_address & 9)==0))
{
if (!space.debugger_access()) reply = m_fd1771->read(space, (offset >> 1)&0x03);
if (TRACE_DATA)
{
if ((m_address & 0xffff)==0x5ff6) logerror("%02x ", ~reply & 0xff);
else logerror("\n%04x: %02x", m_address&0xffff, ~reply & 0xff);
}
}
else
{
reply = m_dsrrom[m_address & 0x1fff];
}
*value = reply;
if (TRACE_RW) logerror("ti_fdc: %04x -> %02x\n", offset & 0xffff, *value);
}
}
WRITE8_MEMBER(ti_fdc_legacy_device::write)
{
if (m_inDsrArea && m_selected)
{
if (TRACE_RW) logerror("ti_fdc: %04x <- %02x\n", offset & 0xffff, ~data & 0xff);
// only use the even addresses from 1ff8 to 1ffe.
// Note that data is inverted.
// 0101 1111 1111 1xx0
if (m_WDsel && ((m_address & 9)==8))
{
if (!space.debugger_access()) m_fd1771->write(space, (offset >> 1)&0x03, data);
}
}
}
/*
The CRU read handler.
bit 0: HLD pin
bit 1-3: drive n active
bit 4: 0: motor strobe on
bit 5: always 0
bit 6: always 1
bit 7: selected side
*/
READ8Z_MEMBER(ti_fdc_legacy_device::crureadz)
{
if ((offset & 0xff00)==m_cru_base)
{
int addr = offset & 0x07;
UINT8 reply = 0;
if (addr == 0)
{
// deliver bits 0-7
// TODO: HLD pin
// The DVENA state is returned inverted
if (m_DVENA==ASSERT_LINE) reply |= ((m_DSEL)<<1);
else reply |= 0x10;
reply |= 0x40;
if (m_SIDSEL) reply |= 0x80;
}
*value = reply;
if (TRACE_CRU) logerror("tifdc: Read CRU = %02x\n", *value);
}
}
WRITE8_MEMBER(ti_fdc_legacy_device::cruwrite)
{
int drive, drivebit;
if ((offset & 0xff00)==m_cru_base)
{
int bit = (offset >> 1) & 0x07;
switch (bit)
{
case 0:
/* (De)select the card. Indicated by a LED on the board. */
m_selected = (data!=0);
if (TRACE_CRU) logerror("tifdc: Map DSR (bit 0) = %d\n", m_selected);
break;
case 1:
/* Activate motor */
if (data==1 && m_lastval==0)
{ /* on rising edge, set motor_running for 4.23s */
if (TRACE_CRU) logerror("tifdc: trigger motor (bit 1)\n");
m_DVENA = ASSERT_LINE;
if (TRACE_MOTOR) logerror("tifdc: motor on\n");
set_ready_line();
m_motor_on_timer->adjust(attotime::from_msec(4230));
}
m_lastval = data;
break;
case 2:
/* Set disk ready/hold (bit 2) */
// 0: ignore IRQ and DRQ
// 1: TMS9900 is stopped until IRQ or DRQ are set
// OR the motor stops rotating - rotates for 4.23s after write
// to CRU bit 1
m_WAITena = (data != 0);
if (TRACE_CRU) logerror("tifdc: arm wait state logic (bit 2) = %d\n", data);
break;
case 3:
/* Load disk heads (HLT pin) (bit 3). Not implemented. */
if (TRACE_CRU) logerror("tifdc: set head load (bit 3) = %d\n", data);
break;
case 4:
case 5:
case 6:
/* Select drive X (bits 4-6) */
drive = bit-4; /* drive # (0-2) */
if (TRACE_CRU) logerror("tifdc: set drive (bit %d) = %d\n", bit, data);
drivebit = 1<<drive;
if (data != 0)
{
if ((m_DSEL & drivebit) == 0) /* select drive */
{
if (m_DSEL != 0)
logerror("tifdc: Multiple drives selected, %02x\n", m_DSEL);
m_DSEL |= drivebit;
m_fd1771->set_drive(drive);
}
}
else
m_DSEL &= ~drivebit;
break;
case 7:
/* Select side of disk (bit 7) */
m_SIDSEL = data;
if (TRACE_CRU) logerror("tifdc: set side (bit 7) = %d\n", data);
m_fd1771->set_side(data);
break;
}
}
}
/*
Resets the drive geometry. This is required because the heuristic of
the default implementation sets the drive geometry to the geometry
of the medium.
*/
void ti_fdc_legacy_device::set_geometry(legacy_floppy_image_device *drive, floppy_type_t type)
{
// This assertion may fail when the names of the floppy devices change.
// Unfortunately, the wd17xx device assumes the floppy drives at root
// level, so we use an explicitly qualified tag. See peribox.h.
assert (drive!=NULL);
drive->floppy_drive_set_geometry(type);
}
void ti_fdc_legacy_device::set_all_geometries(floppy_type_t type)
{
set_geometry(machine().device<legacy_floppy_image_device>(PFLOPPY_0), type);
set_geometry(machine().device<legacy_floppy_image_device>(PFLOPPY_1), type);
set_geometry(machine().device<legacy_floppy_image_device>(PFLOPPY_2), type);
}
/*
Callback, called from the controller chip whenever DRQ/IRQ state change
*/
WRITE_LINE_MEMBER( ti_fdc_legacy_device::intrq_w )
{
if (TRACE_SIGNALS) logerror("ti_fdc: set irq = %d\n", state);
m_IRQ = (line_state)state;
// Note that INTB is actually not used in the TI-99 family. But the
// controller asserts the line nevertheless, probably intended for
// use in another planned TI system
m_slot->set_intb(state);
set_ready_line();
}
WRITE_LINE_MEMBER( ti_fdc_legacy_device::drq_w )
{
if (TRACE_SIGNALS) logerror("ti_fdc: set drq = %d\n", state);
m_DRQ = (line_state)state;
set_ready_line();
}
void ti_fdc_legacy_device::device_start(void)
{
logerror("ti_fdc: TI FDC (legacy) start\n");
m_dsrrom = memregion(DSRROM)->base();
m_motor_on_timer = timer_alloc(MOTOR_TIMER);
m_cru_base = 0x1100;
}
void ti_fdc_legacy_device::device_reset(void)
{
logerror("ti_fdc: TI FDC (legacy) reset\n");
m_DSEL = 0;
m_SIDSEL = 0;
m_DVENA = CLEAR_LINE;
m_lastval = 0;
if (m_genmod)
{
m_select_mask = 0x1fe000;
m_select_value = 0x174000;
}
else
{
m_select_mask = 0x7e000;
m_select_value = 0x74000;
}
m_DRQ = CLEAR_LINE;
m_IRQ = CLEAR_LINE;
m_WAITena = false;
m_selected = false;
m_inDsrArea = false;
m_WDsel = false;
ti99_set_80_track_drives(FALSE);
floppy_type_t type = FLOPPY_STANDARD_5_25_DSDD_40;
set_all_geometries(type);
}
MACHINE_CONFIG_FRAGMENT( ti_fdc_legacy )
MCFG_DEVICE_ADD(FDCLEG_TAG, FD1771, 0)
MCFG_WD17XX_DRIVE_TAGS(PFLOPPY_0, PFLOPPY_1, PFLOPPY_2, NULL)
MCFG_WD17XX_INTRQ_CALLBACK(WRITELINE(ti_fdc_legacy_device, intrq_w))
MCFG_WD17XX_DRQ_CALLBACK(WRITELINE(ti_fdc_legacy_device, drq_w))
MACHINE_CONFIG_END
ROM_START( ti_fdc_legacy )
ROM_REGION(0x2000, DSRROM, 0)
ROM_LOAD("disk.bin", 0x0000, 0x2000, CRC(8f7df93f) SHA1(ed91d48c1eaa8ca37d5055bcf67127ea51c4cad5)) /* TI disk DSR ROM */
ROM_END
machine_config_constructor ti_fdc_legacy_device::device_mconfig_additions() const
{
return MACHINE_CONFIG_NAME( ti_fdc_legacy );
}
const rom_entry *ti_fdc_legacy_device::device_rom_region() const
{
return ROM_NAME( ti_fdc_legacy );
}
const device_type TI99_FDC_LEG = &device_creator<ti_fdc_legacy_device>;

View File

@ -108,85 +108,4 @@ private:
// Debugging
bool m_debug_dataout;
};
//===========================================================================
/***********************************************
Legacy implementation
***********************************************/
#include "machine/wd17xx.h"
#include "imagedev/flopdrv.h"
extern const device_type TI99_FDC_LEG;
class ti_fdc_legacy_device : public ti_expansion_card_device
{
public:
ti_fdc_legacy_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
DECLARE_READ8Z_MEMBER(readz);
DECLARE_WRITE8_MEMBER(write);
DECLARE_SETADDRESS_DBIN_MEMBER(setaddress_dbin);
DECLARE_WRITE_LINE_MEMBER( intrq_w );
DECLARE_WRITE_LINE_MEMBER( drq_w );
DECLARE_READ8Z_MEMBER(crureadz);
DECLARE_WRITE8_MEMBER(cruwrite);
protected:
virtual void device_start(void);
virtual void device_reset(void);
virtual const rom_entry *device_rom_region() const;
virtual machine_config_constructor device_mconfig_additions() const;
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
void set_ready_line();
void set_all_geometries(floppy_type_t type);
void set_geometry(legacy_floppy_image_device *drive, floppy_type_t type);
// Recent address
int m_address;
// Holds the status of the DRQ and IRQ lines.
line_state m_DRQ, m_IRQ;
// Needed for triggering the motor monoflop
UINT8 m_lastval;
// Signal DVENA. When TRUE, makes some drive turning.
line_state m_DVENA;
// When TRUE the CPU is halted while DRQ/IRQ are true.
bool m_WAITena;
// WD chip selected
bool m_WDsel;
// Set when address is in card area
bool m_inDsrArea;
// Indicates which drive has been selected. Values are 0, 1, 2, and 4.
// 000 = no drive
// 001 = drive 1
// 010 = drive 2
// 100 = drive 3
int m_DSEL;
// Signal SIDSEL. 0 or 1, indicates the selected head.
int m_SIDSEL;
// count 4.23s from rising edge of motor_on
emu_timer* m_motor_on_timer;
// Link to the FDC1771 controller on the board.
required_device<fd1771_device> m_fd1771;
// DSR ROM
UINT8* m_dsrrom;
};
#endif

View File

@ -213,7 +213,7 @@ bool vboy_cart_slot_device::call_load()
void vboy_cart_slot_device::call_unload()
{
if (m_cart && m_cart->get_eeprom_size())
if (m_cart && m_cart->get_eeprom_base() && m_cart->get_eeprom_size())
battery_save(m_cart->get_eeprom_base(), m_cart->get_eeprom_size() * 4);
}

View File

@ -1,5 +1,5 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
// copyright-holders:Dirk Best, Olivier Galibert
/***************************************************************************
VTech Laser/VZ Floppy Controller Cartridge
@ -10,7 +10,7 @@
***************************************************************************/
#include "floppy.h"
#include "formats/vtech1_dsk.h"
//**************************************************************************
// DEVICE DEFINITIONS
@ -44,18 +44,14 @@ const rom_entry *floppy_controller_device::device_rom_region() const
// machine configurations
//-------------------------------------------------
FLOPPY_FORMATS_MEMBER( floppy_controller_device::floppy_formats )
FLOPPY_MFI_FORMAT
FLOPPY_FORMATS_END
static SLOT_INTERFACE_START( laser_floppies )
SLOT_INTERFACE( "525", FLOPPY_525_SSSD )
SLOT_INTERFACE("525", FLOPPY_525_SSSD)
SLOT_INTERFACE_END
static MACHINE_CONFIG_FRAGMENT( floppy_controller )
MCFG_MEMEXP_SLOT_ADD("mem")
MCFG_FLOPPY_DRIVE_ADD("0", laser_floppies, "525", floppy_controller_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("1", laser_floppies, "525", floppy_controller_device::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("0", laser_floppies, "525", floppy_image_device::default_floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("1", laser_floppies, "525", floppy_image_device::default_floppy_formats)
MACHINE_CONFIG_END
machine_config_constructor floppy_controller_device::device_mconfig_additions() const

View File

@ -1,5 +1,5 @@
// license:GPL-2.0+
// copyright-holders:Dirk Best
// copyright-holders:Dirk Best, Olivier Galibert
/***************************************************************************
VTech Laser/VZ Floppy Controller Cartridge
@ -38,8 +38,6 @@ public:
DECLARE_READ8_MEMBER(rd_r);
DECLARE_READ8_MEMBER(wpt_r);
DECLARE_FLOPPY_FORMATS( floppy_formats );
protected:
virtual const rom_entry *device_rom_region() const;
virtual machine_config_constructor device_mconfig_additions() const;

View File

@ -232,7 +232,7 @@ bool ws_cart_slot_device::call_load()
void ws_cart_slot_device::call_unload()
{
if (m_cart && m_cart->get_nvram_size())
if (m_cart && m_cart->get_nvram_base() && m_cart->get_nvram_size())
battery_save(m_cart->get_nvram_base(), m_cart->get_nvram_size());
}

View File

@ -1134,25 +1134,30 @@ void cheat_manager::reload()
m_lastline = 0;
m_disabled = false;
// load the cheat file, MESS will load a crc32.xml ( eg. 01234567.xml )
// and MAME will load gamename.xml
// load the cheat file, if it's a system that has a software list then try softlist_name/shortname.xml first,
// if it fails to load then try to load via crc32 - basename/crc32.xml ( eg. 01234567.xml )
image_interface_iterator iter(machine().root_device());
for (device_image_interface *image = iter.first(); image != NULL; image = iter.next())
if (image->exists())
{
// if we are loading through software lists, try to load shortname.xml
// if we are loading through a software list, try to load softlist_name/shortname.xml
// this allows the coexistence of arcade cheats with cheats for home conversions which
// have the same shortname
if (image->software_entry() != NULL)
{
load_cheats(image->basename());
std::string filename;
strprintf(filename, "%s%s%s", image->software_list_name(), PATH_SEPARATOR, image->basename());
load_cheats(filename.c_str());
break;
}
// else we are loading outside the software list, try to load machine_basename/crc32.xml
else
{
UINT32 crc = image->crc();
if (crc != 0)
{
std::string filename;
strprintf(filename,"%08X", crc);
strprintf(filename, "%s%s%08X", machine().basename(), PATH_SEPARATOR, crc);
load_cheats(filename.c_str());
break;
}

View File

@ -110,6 +110,8 @@ int cli_frontend::execute(int argc, char **argv)
std::string option_errors;
m_options.parse_command_line(argc, argv, option_errors);
m_options.parse_standard_inis(option_errors);
if (*(m_options.software_name()) != 0)
{
const game_driver *system = m_options.system();
@ -175,7 +177,6 @@ int cli_frontend::execute(int argc, char **argv)
}
}
m_options.parse_standard_inis(option_errors);
// parse the command line, adding any system-specific options
if (!m_options.parse_command_line(argc, argv, option_errors))
{

View File

@ -1,4 +1,4 @@
// license:???
// license:BSD-3-Clause
// copyright-holders:Raphael Nabet
/*
cpu/apexc/apexc.c: APE(X)C CPU emulation

View File

@ -1,4 +1,4 @@
// license:???
// license:BSD-3-Clause
// copyright-holders:Raphael Nabet
/* register names for apexc_get_reg & apexc_set_reg */
#pragma once

View File

@ -1,4 +1,4 @@
// license:???
// license:BSD-3-Clause
// copyright-holders:Raphael Nabet
/*
cpu/apexc/apexcsm.c : APE(X)C CPU disassembler

View File

@ -1,4 +1,4 @@
// license:???
// license:BSD-3-Clause
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
/*****************************************************************************
*
@ -8,18 +8,6 @@
* Copyright Steve Ellenoff, all rights reserved.
* Thumb, DSP, and MMU support and many bugfixes by R. Belmont and Ryan Holtz.
*
* - This source code is released as freeware for non-commercial purposes.
* - You are free to use and redistribute this code in modified or
* unmodified form, provided you list me in the credits.
* - If you modify this source code, you must add a notice to each modified
* source file that it has been changed. If you're a nice person, you
* will clearly mark each change too. :)
* - If you wish to use this for commercial purposes, please contact me at
* sellenoff@hotmail.com
* - The author of this copywritten work reserves the right to change the
* terms of its usage and license at any time, including retroactively
* - This entire notice must remain in the source code.
*
* This work is based on:
* #1) 'Atmel Corporation ARM7TDMI (Thumb) Datasheet - January 1999'
* #2) Arm 2/3/6 emulator By Bryan McPhail (bmcphail@tendril.co.uk) and Phil Stroffolino (MAME CORE 0.76)

View File

@ -1,4 +1,4 @@
// license:???
// license:BSD-3-Clause
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
/*****************************************************************************
*
@ -7,18 +7,6 @@
*
* Copyright Steve Ellenoff, all rights reserved.
*
* - This source code is released as freeware for non-commercial purposes.
* - You are free to use and redistribute this code in modified or
* unmodified form, provided you list me in the credits.
* - If you modify this source code, you must add a notice to each modified
* source file that it has been changed. If you're a nice person, you
* will clearly mark each change too. :)
* - If you wish to use this for commercial purposes, please contact me at
* sellenoff@hotmail.com
* - The author of this copywritten work reserves the right to change the
* terms of its usage and license at any time, including retroactively
* - This entire notice must remain in the source code.
*
* This work is based on:
* #1) 'Atmel Corporation ARM7TDMI (Thumb) Datasheet - January 1999'
* #2) Arm 2/3/6 emulator By Bryan McPhail (bmcphail@tendril.co.uk) and Phil Stroffolino (MAME CORE 0.76)

View File

@ -1,4 +1,4 @@
// license:???
// license:BSD-3-Clause
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
/*****************************************************************************
*
@ -7,18 +7,6 @@
*
* Copyright Steve Ellenoff, all rights reserved.
*
* - This source code is released as freeware for non-commercial purposes.
* - You are free to use and redistribute this code in modified or
* unmodified form, provided you list me in the credits.
* - If you modify this source code, you must add a notice to each modified
* source file that it has been changed. If you're a nice person, you
* will clearly mark each change too. :)
* - If you wish to use this for commercial purposes, please contact me at
* sellenoff@hotmail.com
* - The author of this copywritten work reserves the right to change the
* terms of its usage and license at any time, including retroactively
* - This entire notice must remain in the source code.
*
* This work is based on:
* #1) 'Atmel Corporation ARM7TDMI (Thumb) Datasheet - January 1999'
* #2) Arm 2/3/6 emulator By Bryan McPhail (bmcphail@tendril.co.uk) and Phil Stroffolino (MAME CORE 0.76)

View File

@ -1,4 +1,4 @@
// license:???
// license:BSD-3-Clause
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
/*****************************************************************************
*
@ -7,18 +7,6 @@
*
* Copyright Steve Ellenoff, all rights reserved.
*
* - This source code is released as freeware for non-commercial purposes.
* - You are free to use and redistribute this code in modified or
* unmodified form, provided you list me in the credits.
* - If you modify this source code, you must add a notice to each modified
* source file that it has been changed. If you're a nice person, you
* will clearly mark each change too. :)
* - If you wish to use this for commercial purposes, please contact me at
* sellenoff@hotmail.com
* - The author of this copywritten work reserves the right to change the
* terms of its usage and license at any time, including retroactively
* - This entire notice must remain in the source code.
*
* This work is based on:
* #1) 'Atmel Corporation ARM7TDMI (Thumb) Datasheet - January 1999'
* #2) Arm 2/3/6 emulator By Bryan McPhail (bmcphail@tendril.co.uk) and Phil Stroffolino (MAME CORE 0.76)

View File

@ -1,4 +1,4 @@
// license:???
// license:BSD-3-Clause
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
/*****************************************************************************
*
@ -7,18 +7,6 @@
*
* Copyright Steve Ellenoff, all rights reserved.
*
* - This source code is released as freeware for non-commercial purposes.
* - You are free to use and redistribute this code in modified or
* unmodified form, provided you list me in the credits.
* - If you modify this source code, you must add a notice to each modified
* source file that it has been changed. If you're a nice person, you
* will clearly mark each change too. :)
* - If you wish to use this for commercial purposes, please contact me at
* sellenoff@hotmail.com
* - The author of this copywritten work reserves the right to change the
* terms of its usage and license at any time, including retroactively
* - This entire notice must remain in the source code.
*
* This work is based on:
* #1) 'Atmel Corporation ARM7TDMI (Thumb) Datasheet - January 1999'
* #2) Arm 2/3/6 emulator By Bryan McPhail (bmcphail@tendril.co.uk) and Phil Stroffolino (MAME CORE 0.76)

View File

@ -1,4 +1,4 @@
// license:???
// license:BSD-3-Clause
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
/*****************************************************************************
*
@ -9,18 +9,6 @@
* Thumb, DSP, and MMU support and many bugfixes by R. Belmont and Ryan Holtz.
* Dyanmic Recompiler (DRC) / Just In Time Compiler (JIT) by Ryan Holtz.
*
* - This source code is released as freeware for non-commercial purposes.
* - You are free to use and redistribute this code in modified or
* unmodified form, provided you list me in the credits.
* - If you modify this source code, you must add a notice to each modified
* source file that it has been changed. If you're a nice person, you
* will clearly mark each change too. :)
* - If you wish to use this for commercial purposes, please contact me at
* sellenoff@hotmail.com
* - The author of this copywritten work reserves the right to change the
* terms of its usage and license at any time, including retroactively
* - This entire notice must remain in the source code.
*
* This work is based on:
* #1) 'Atmel Corporation ARM7TDMI (Thumb) Datasheet - January 1999'
* #2) Arm 2/3/6 emulator By Bryan McPhail (bmcphail@tendril.co.uk) and Phil Stroffolino (MAME CORE 0.76)

View File

@ -1,4 +1,4 @@
// license:???
// license:BSD-3-Clause
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
/* ARM7 core helper Macros / Functions */

View File

@ -1,4 +1,4 @@
// license:???
// license:BSD-3-Clause
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
#include "emu.h"
#include "arm7.h"

View File

@ -1,4 +1,4 @@
// license:???
// license:BSD-3-Clause
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
#include "emu.h"
#include "arm7core.h"

View File

@ -1,4 +1,4 @@
// license:???
// license:BSD-3-Clause
// copyright-holders:Steve Ellenoff,R. Belmont,Ryan Holtz
#include "emu.h"
#include "arm7.h"

View File

@ -7,16 +7,6 @@
*
* Copyright Frank Palazzolo, all rights reserved.
*
* - This source code is released as freeware for non-commercial purposes.
* - You are free to use and redistribute this code in modified or
* unmodified form, provided you list me in the credits.
* - If you modify this source code, you must add a notice to each modified
* source file that it has been changed. If you're a nice person, you
* will clearly mark each change too. :)
* - If you wish to use this for commercial purposes, please contact me at
* palazzol@comcast.net
* - This entire notice must remain in the source code.
*
* This work is based on Juergen Buchmueller's F8 emulation,
* and the 'General Instruments CP1610' data sheets.
* Special thanks to Joe Zbiciak for his GPL'd CP1610 emulator

View File

@ -7,16 +7,6 @@
*
* Copyright Frank Palazzolo, all rights reserved.
*
* - This source code is released as freeware for non-commercial purposes.
* - You are free to use and redistribute this code in modified or
* unmodified form, provided you list me in the credits.
* - If you modify this source code, you must add a notice to each modified
* source file that it has been changed. If you're a nice person, you
* will clearly mark each change too. :)
* - If you wish to use this for commercial purposes, please contact me at
* palazzol@comcast.net
* - This entire notice must remain in the source code.
*
*****************************************************************************/
#pragma once

View File

@ -90,7 +90,7 @@ ADDRESS_MAP_END
// device definitions
hmcs43_cpu_device::hmcs43_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, UINT16 polarity, const char *shortname)
: hmcs40_cpu_device(mconfig, type, name, tag, owner, clock, FAMILY_HMCS43, polarity, 3, 10, 11, ADDRESS_MAP_NAME(program_1k), 7, ADDRESS_MAP_NAME(data_80x4), shortname, __FILE__)
: hmcs40_cpu_device(mconfig, type, name, tag, owner, clock, FAMILY_HMCS43, polarity, 3 /* stack levels */, 10 /* pc width */, 11 /* prg width */, ADDRESS_MAP_NAME(program_1k), 7 /* data width */, ADDRESS_MAP_NAME(data_80x4), shortname, __FILE__)
{ }
hd38750_device::hd38750_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
@ -188,6 +188,7 @@ void hmcs40_cpu_device::device_start()
m_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(hmcs40_cpu_device::simple_timer_cb), this));
reset_prescaler();
// resolve callbacks
m_read_r0.resolve_safe(0);
m_read_r1.resolve_safe(0);
m_read_r2.resolve_safe(0);
@ -215,6 +216,7 @@ void hmcs40_cpu_device::device_start()
m_prev_op = 0;
m_i = 0;
m_eint_line = 0;
m_halt = 0;
m_pc = 0;
m_prev_pc = 0;
m_page = 0;
@ -242,6 +244,8 @@ void hmcs40_cpu_device::device_start()
save_item(NAME(m_prev_op));
save_item(NAME(m_i));
save_item(NAME(m_eint_line));
save_item(NAME(m_halt));
save_item(NAME(m_timer_halted_remain));
save_item(NAME(m_pc));
save_item(NAME(m_prev_pc));
save_item(NAME(m_page));
@ -477,9 +481,25 @@ void hmcs40_cpu_device::do_interrupt()
void hmcs40_cpu_device::execute_set_input(int line, int state)
{
state = (state) ? 1 : 0;
// halt/unhalt mcu
if (line == HMCS40_INPUT_LINE_HLT && state != m_halt)
{
if (state)
{
m_timer_halted_remain = m_timer->remaining();
m_timer->reset();
}
else
m_timer->adjust(m_timer_halted_remain);
m_halt = state;
return;
}
if (line != 0 && line != 1)
return;
state = (state) ? 1 : 0;
// external interrupt request on rising edge
if (state && !m_int[line])
@ -551,6 +571,13 @@ inline void hmcs40_cpu_device::increment_pc()
void hmcs40_cpu_device::execute_run()
{
// in HLT state, the internal clock is not running
if (m_halt)
{
m_icount = 0;
return;
}
while (m_icount > 0)
{
// LPU is handled 1 cycle later

View File

@ -26,7 +26,6 @@
#define MCFG_HMCS40_WRITE_D_CB(_devcb) \
hmcs40_cpu_device::set_write_d_callback(*device, DEVCB_##_devcb);
enum
{
HMCS40_PORT_R0X = 0,
@ -39,6 +38,13 @@ enum
HMCS40_PORT_R7X
};
enum
{
HMCS40_INPUT_LINE_INT0 = 0,
HMCS40_INPUT_LINE_INT1,
HMCS40_INPUT_LINE_HLT
};
// pinout reference
@ -181,6 +187,8 @@ protected:
UINT8 m_i; // 4-bit immediate opcode param
int m_eint_line; // which input_line caused an interrupt
emu_timer *m_timer;
int m_halt; // internal HLT state
attotime m_timer_halted_remain;
int m_icount;
UINT16 m_pc; // Program Counter

View File

@ -0,0 +1,925 @@
// license:BSD-3-Clause
// copyright-holders:F. Ulivi
//
// TODO:
// - DMA
#include "emu.h"
#include "debugger.h"
#include "hphybrid.h"
enum {
HPHYBRID_A,
HPHYBRID_B,
HPHYBRID_C,
HPHYBRID_D,
HPHYBRID_P,
HPHYBRID_R,
HPHYBRID_IV,
HPHYBRID_PA,
HPHYBRID_DMAPA,
HPHYBRID_DMAMA,
HPHYBRID_DMAC,
HPHYBRID_I
};
#define BIT_MASK(n) (1U << (n))
// Macros to clear/set single bits
#define BIT_CLR(w , n) ((w) &= ~BIT_MASK(n))
#define BIT_SET(w , n) ((w) |= BIT_MASK(n))
// Bits in m_flags
#define HPHYBRID_C_BIT 0 // Carry/extend
#define HPHYBRID_O_BIT 1 // Overflow
#define HPHYBRID_CB_BIT 2 // Cb
#define HPHYBRID_DB_BIT 3 // Db
#define HPHYBRID_INTEN_BIT 4 // Interrupt enable
#define HPHYBRID_DMAEN_BIT 5 // DMA enable
#define HPHYBRID_DMADIR_BIT 6 // DMA direction (1 = OUT)
#define HPHYBRID_HALT_BIT 7 // Halt flag
#define HPHYBRID_IRH_BIT 8 // IRH requested
#define HPHYBRID_IRL_BIT 9 // IRL requested
#define HPHYBRID_IRH_SVC_BIT 10 // IRH in service
#define HPHYBRID_IRL_SVC_BIT 11 // IRL in service
#define HPHYBRID_IV_MASK 0xfff0 // IV mask
#define CURRENT_PA (m_reg_PA[ 0 ])
#define HP_RESET_ADDR 0x0020
const device_type HP_5061_3011 = &device_creator<hp_5061_3011_cpu_device>;
hp_hybrid_cpu_device::hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, __FILE__),
m_program_config("program", ENDIANNESS_BIG, 16, 16, -1),
m_io_config("io", ENDIANNESS_BIG, 16, 6, -1)
{
}
void hp_hybrid_cpu_device::device_start()
{
m_reg_A = 0;
m_reg_B = 0;
m_reg_P = HP_RESET_ADDR;
m_reg_R = 0;
m_reg_C = 0;
m_reg_D = 0;
m_reg_IV = 0;
m_reg_PA[ 0 ] = 0;
m_reg_PA[ 1 ] = 0;
m_reg_PA[ 2 ] = 0;
m_flags = 0;
m_dmapa = 0;
m_dmama = 0;
m_dmac = 0;
m_reg_I = 0;
{
state_add(HPHYBRID_A, "A", m_reg_A);
state_add(HPHYBRID_B, "B", m_reg_B);
state_add(HPHYBRID_C, "C", m_reg_C);
state_add(HPHYBRID_D, "D", m_reg_D);
state_add(HPHYBRID_P, "P", m_reg_P);
state_add(STATE_GENPC, "GENPC", m_reg_P).noshow();
state_add(HPHYBRID_R, "R", m_reg_R);
state_add(STATE_GENSP, "GENSP", m_reg_R).noshow();
state_add(HPHYBRID_IV, "IV", m_reg_IV);
state_add(HPHYBRID_PA, "PA", m_reg_PA[ 0 ]);
state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).noshow().formatstr("%9s");
state_add(HPHYBRID_DMAPA , "DMAPA" , m_dmapa).noshow();
state_add(HPHYBRID_DMAMA , "DMAMA" , m_dmama).noshow();
state_add(HPHYBRID_DMAC , "DMAC" , m_dmac).noshow();
state_add(HPHYBRID_I , "I" , m_reg_I).noshow();
}
m_program = &space(AS_PROGRAM);
m_direct = &m_program->direct();
m_io = &space(AS_IO);
save_item(NAME(m_reg_A));
save_item(NAME(m_reg_B));
save_item(NAME(m_reg_C));
save_item(NAME(m_reg_D));
save_item(NAME(m_reg_P));
save_item(NAME(m_reg_R));
save_item(NAME(m_reg_IV));
save_item(NAME(m_reg_PA[0]));
save_item(NAME(m_reg_PA[1]));
save_item(NAME(m_reg_PA[2]));
save_item(NAME(m_flags));
save_item(NAME(m_dmapa));
save_item(NAME(m_dmama));
save_item(NAME(m_dmac));
save_item(NAME(m_reg_I));
m_icountptr = &m_icount;
}
void hp_hybrid_cpu_device::device_reset()
{
m_reg_P = HP_RESET_ADDR;
m_reg_I = RM(m_reg_P);
m_flags = 0;
}
void hp_hybrid_cpu_device::execute_run()
{
do {
debugger_instruction_hook(this, m_reg_P);
// Check for interrupts
check_for_interrupts();
// TODO: check dma
m_reg_I = execute_one(m_reg_I);
} while (m_icount > 0);
}
void hp_hybrid_cpu_device::execute_set_input(int inputnum, int state)
{
if (inputnum < HPHYBRID_INT_LVLS) {
if (state) {
BIT_SET(m_flags , HPHYBRID_IRH_BIT + inputnum);
} else {
BIT_CLR(m_flags , HPHYBRID_IRH_BIT + inputnum);
}
}
}
/**
* Execute 1 instruction
*
* @param opcode Opcode to be executed
*
* @return Next opcode to be executed
*/
UINT16 hp_hybrid_cpu_device::execute_one(UINT16 opcode)
{
if ((opcode & 0x7fe0) == 0x7000) {
// EXE
m_icount -= 8;
return RM(opcode & 0x1f);
} else {
m_reg_P = execute_one_sub(opcode);
return RM(m_reg_P);
}
}
/**
* Execute 1 instruction (except EXE)
*
* @param opcode Opcode to be executed (no EXE instructions)
*
* @return new value of P register
*/
UINT16 hp_hybrid_cpu_device::execute_one_sub(UINT16 opcode)
{
UINT16 ea;
UINT16 tmp;
switch (opcode & 0x7800) {
case 0x0000:
// LDA
m_icount -= 13;
m_reg_A = RM(get_ea(opcode));
break;
case 0x0800:
// LDB
m_icount -= 13;
m_reg_B = RM(get_ea(opcode));
break;
case 0x1000:
// CPA
m_icount -= 16;
if (m_reg_A != RM(get_ea(opcode))) {
// Skip next instruction
return m_reg_P + 2;
}
break;
case 0x1800:
// CPB
m_icount -= 16;
if (m_reg_B != RM(get_ea(opcode))) {
// Skip next instruction
return m_reg_P + 2;
}
break;
case 0x2000:
// ADA
m_icount -= 13;
do_add(m_reg_A , RM(get_ea(opcode)));
break;
case 0x2800:
// ADB
m_icount -= 13;
do_add(m_reg_B , RM(get_ea(opcode)));
break;
case 0x3000:
// STA
m_icount -= 13;
WM(get_ea(opcode) , m_reg_A);
break;
case 0x3800:
// STB
m_icount -= 13;
WM(get_ea(opcode) , m_reg_B);
break;
case 0x4000:
// JSM
m_icount -= 17;
WM(++m_reg_R , m_reg_P);
return get_ea(opcode);
case 0x4800:
// ISZ
m_icount -= 19;
ea = get_ea(opcode);
tmp = RM(ea) + 1;
WM(ea , tmp);
if (tmp == 0) {
// Skip next instruction
return m_reg_P + 2;
}
break;
case 0x5000:
// AND
m_icount -= 13;
m_reg_A &= RM(get_ea(opcode));
break;
case 0x5800:
// DSZ
m_icount -= 19;
ea = get_ea(opcode);
tmp = RM(ea) - 1;
WM(ea , tmp);
if (tmp == 0) {
// Skip next instruction
return m_reg_P + 2;
}
break;
case 0x6000:
// IOR
m_icount -= 13;
m_reg_A |= RM(get_ea(opcode));
break;
case 0x6800:
// JMP
m_icount -= 8;
return get_ea(opcode);
default:
switch (opcode & 0xfec0) {
case 0x7400:
// RZA
// SZA
m_icount -= 14;
return get_skip_addr(opcode , m_reg_A == 0);
case 0x7440:
// RIA
// SIA
m_icount -= 14;
return get_skip_addr(opcode , m_reg_A++ == 0);
case 0x7480:
// SFS
// SFC
m_icount -= 14;
// TODO: read flag bit
return get_skip_addr(opcode , true);
case 0x7C00:
// RZB
// SZB
m_icount -= 14;
return get_skip_addr(opcode , m_reg_B == 0);
case 0x7C40:
// RIB
// SIB
m_icount -= 14;
return get_skip_addr(opcode , m_reg_B++ == 0);
case 0x7c80:
// SSS
// SSC
m_icount -= 14;
// TODO: read status bit
return get_skip_addr(opcode , true);
case 0x7cc0:
// SHS
// SHC
m_icount -= 14;
return get_skip_addr(opcode , !BIT(m_flags , HPHYBRID_HALT_BIT));
default:
switch (opcode & 0xfe00) {
case 0x7600:
// SLA
// RLA
m_icount -= 14;
return get_skip_addr_sc(opcode , m_reg_A , 0);
case 0x7e00:
// SLB
// RLB
m_icount -= 14;
return get_skip_addr_sc(opcode , m_reg_B , 0);
case 0xf400:
// SAP
// SAM
m_icount -= 14;
return get_skip_addr_sc(opcode , m_reg_A , 15);
case 0xf600:
// SOC
// SOS
m_icount -= 14;
return get_skip_addr_sc(opcode , m_flags , HPHYBRID_O_BIT);
case 0xfc00:
// SBP
// SBM
m_icount -= 14;
return get_skip_addr_sc(opcode , m_reg_B , 15);
case 0xfe00:
// SEC
// SES
m_icount -= 14;
return get_skip_addr_sc(opcode , m_flags , HPHYBRID_C_BIT);
default:
switch (opcode & 0xfff0) {
case 0xf100:
// AAR
tmp = (opcode & 0xf) + 1;
m_icount -= (9 + tmp);
// A shift by 16 positions is equivalent to a shift by 15
tmp = tmp > 15 ? 15 : tmp;
m_reg_A = ((m_reg_A ^ 0x8000) >> tmp) - (0x8000 >> tmp);
break;
case 0xf900:
// ABR
tmp = (opcode & 0xf) + 1;
m_icount -= (9 + tmp);
tmp = tmp > 15 ? 15 : tmp;
m_reg_B = ((m_reg_B ^ 0x8000) >> tmp) - (0x8000 >> tmp);
break;
case 0xf140:
// SAR
tmp = (opcode & 0xf) + 1;
m_icount -= (9 + tmp);
m_reg_A >>= tmp;
break;
case 0xf940:
// SBR
tmp = (opcode & 0xf) + 1;
m_icount -= (9 + tmp);
m_reg_B >>= tmp;
break;
case 0xf180:
// SAL
tmp = (opcode & 0xf) + 1;
m_icount -= (9 + tmp);
m_reg_A <<= tmp;
break;
case 0xf980:
// SBL
tmp = (opcode & 0xf) + 1;
m_icount -= (9 + tmp);
m_reg_B <<= tmp;
break;
case 0xf1c0:
// RAR
tmp = (opcode & 0xf) + 1;
m_icount -= (9 + tmp);
m_reg_A = (m_reg_A >> tmp) | (m_reg_A << (16 - tmp));
break;
case 0xf9c0:
// RBR
tmp = (opcode & 0xf) + 1;
m_icount -= (9 + tmp);
m_reg_B = (m_reg_B >> tmp) | (m_reg_B << (16 - tmp));
break;
default:
if ((opcode & 0xf760) == 0x7160) {
// Place/withdraw instructions
m_icount -= 23;
do_pw(opcode);
} else if ((opcode & 0xff80) == 0xf080) {
// RET
m_icount -= 16;
if (BIT(opcode , 6)) {
// Pop PA stack
if (BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) {
BIT_CLR(m_flags , HPHYBRID_IRH_SVC_BIT);
memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS);
} else if (BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
BIT_CLR(m_flags , HPHYBRID_IRL_SVC_BIT);
memmove(&m_reg_PA[ 0 ] , &m_reg_PA[ 1 ] , HPHYBRID_INT_LVLS);
}
}
tmp = RM(m_reg_R--) + (opcode & 0x1f);
return BIT(opcode , 5) ? tmp - 0x20 : tmp;
} else {
switch (opcode) {
case 0x7100:
// SDO
m_icount -= 12;
BIT_SET(m_flags , HPHYBRID_DMADIR_BIT);
break;
case 0x7108:
// SDI
m_icount -= 12;
BIT_CLR(m_flags , HPHYBRID_DMADIR_BIT);
break;
case 0x7110:
// EIR
m_icount -= 12;
BIT_SET(m_flags , HPHYBRID_INTEN_BIT);
break;
case 0x7118:
// DIR
m_icount -= 12;
BIT_CLR(m_flags , HPHYBRID_INTEN_BIT);
break;
case 0x7120:
// DMA
m_icount -= 12;
BIT_SET(m_flags , HPHYBRID_DMAEN_BIT);
break;
case 0x7138:
// DDR
m_icount -= 12;
BIT_CLR(m_flags , HPHYBRID_DMAEN_BIT);
break;
case 0x7140:
// DBL
m_icount -= 12;
BIT_CLR(m_flags , HPHYBRID_DB_BIT);
break;
case 0x7148:
// CBL
m_icount -= 12;
BIT_CLR(m_flags , HPHYBRID_CB_BIT);
break;
case 0x7150:
// DBU
m_icount -= 12;
BIT_SET(m_flags , HPHYBRID_DB_BIT);
break;
case 0x7158:
// CBU
m_icount -= 12;
BIT_SET(m_flags , HPHYBRID_CB_BIT);
break;
case 0xf020:
// TCA
m_icount -= 9;
m_reg_A = ~m_reg_A;
do_add(m_reg_A , 1);
break;
case 0xf060:
// CMA
m_icount -= 9;
m_reg_A = ~m_reg_A;
break;
case 0xf820:
// TCB
m_icount -= 9;
m_reg_B = ~m_reg_B;
do_add(m_reg_B , 1);
break;
case 0xf860:
// CMB
m_icount -= 9;
m_reg_B = ~m_reg_B;
break;
default:
// Unrecognized instructions: NOP
// Execution time is fictional
m_icount -= 6;
}
}
}
}
}
}
return m_reg_P + 1;
}
void hp_hybrid_cpu_device::state_string_export(const device_state_entry &entry, std::string &str)
{
if (entry.index() == STATE_GENFLAGS) {
strprintf(str, "%s %s %c %c",
BIT(m_flags , HPHYBRID_DB_BIT) ? "Db":"..",
BIT(m_flags , HPHYBRID_CB_BIT) ? "Cb":"..",
BIT(m_flags , HPHYBRID_O_BIT) ? 'O':'.',
BIT(m_flags , HPHYBRID_C_BIT) ? 'E':'.');
}
}
offs_t hp_hybrid_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
{
extern CPU_DISASSEMBLE(hp_hybrid);
return CPU_DISASSEMBLE_NAME(hp_hybrid)(this, buffer, pc, oprom, opram, options);
}
UINT16 hp_hybrid_cpu_device::get_ea(UINT16 opcode)
{
UINT16 base;
UINT16 off;
if (BIT(opcode , 10)) {
// Current page
base = m_reg_P;
} else {
// Base page
base = 0;
}
off = opcode & 0x3ff;
if (off & 0x200) {
off -= 0x400;
}
base += off;
if (BIT(opcode , 15)) {
// Indirect addressing
m_icount -= 6;
return RM(base);
} else {
// Direct addressing
return base;
}
}
void hp_hybrid_cpu_device::do_add(UINT16& addend1 , UINT16 addend2)
{
UINT32 tmp = addend1 + addend2;
if (BIT(tmp , 16)) {
// Carry
BIT_SET(m_flags , HPHYBRID_C_BIT);
}
if (BIT((tmp ^ addend1) & (tmp ^ addend2) , 15)) {
// Overflow
BIT_SET(m_flags , HPHYBRID_O_BIT);
}
addend1 = (UINT16)tmp;
}
UINT16 hp_hybrid_cpu_device::get_skip_addr(UINT16 opcode , bool condition) const
{
bool skip_val = BIT(opcode , 8) != 0;
if (condition == skip_val) {
UINT16 off = opcode & 0x1f;
if (BIT(opcode , 5)) {
off -= 0x20;
}
return m_reg_P + off;
} else {
return m_reg_P + 1;
}
}
UINT16 hp_hybrid_cpu_device::get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n)
{
bool val = BIT(v , n);
if (BIT(opcode , 7)) {
if (BIT(opcode , 6)) {
BIT_SET(v , n);
} else {
BIT_CLR(v , n);
}
}
return get_skip_addr(opcode , val);
}
void hp_hybrid_cpu_device::do_pw(UINT16 opcode)
{
UINT16 tmp;
UINT16 reg_addr = opcode & 7;
UINT16 *ptr_reg;
UINT16 b_mask;
if (BIT(opcode , 3)) {
ptr_reg = &m_reg_D;
b_mask = BIT_MASK(HPHYBRID_DB_BIT);
} else {
ptr_reg = &m_reg_C;
b_mask = BIT_MASK(HPHYBRID_CB_BIT);
}
if (BIT(opcode , 4)) {
// Withdraw
if (BIT(opcode , 11)) {
// Byte
UINT32 tmp_addr = (UINT32)(*ptr_reg);
if (m_flags & b_mask) {
tmp_addr |= 0x10000;
}
tmp = RM((UINT16)(tmp_addr >> 1));
if (BIT(tmp_addr , 0)) {
tmp &= 0xff;
} else {
tmp >>= 8;
}
} else {
// Word
tmp = RM(*ptr_reg);
}
WM(reg_addr , tmp);
if (BIT(opcode , 7)) {
// Post-decrement
if ((*ptr_reg)-- == 0) {
m_flags ^= b_mask;
}
} else {
// Post-increment
if (++(*ptr_reg) == 0) {
m_flags ^= b_mask;
}
}
} else {
// Place
if (BIT(opcode , 7)) {
// Pre-decrement
if ((*ptr_reg)-- == 0) {
m_flags ^= b_mask;
}
} else {
// Pre-increment
if (++(*ptr_reg) == 0) {
m_flags ^= b_mask;
}
}
tmp = RM(reg_addr);
if (BIT(opcode , 11)) {
// Byte
UINT32 tmp_addr = (UINT32)(*ptr_reg);
if (m_flags & b_mask) {
tmp_addr |= 0x10000;
}
WMB(tmp_addr , (UINT8)tmp);
} else {
// Word
WM(*ptr_reg , tmp);
}
}
}
void hp_hybrid_cpu_device::check_for_interrupts(void)
{
if (!BIT(m_flags , HPHYBRID_INTEN_BIT) || BIT(m_flags , HPHYBRID_IRH_SVC_BIT)) {
return;
}
int irqline;
if (BIT(m_flags , HPHYBRID_IRH_BIT)) {
// Service high-level interrupt
BIT_SET(m_flags , HPHYBRID_IRH_SVC_BIT);
irqline = HPHYBRID_IRH;
} else if (BIT(m_flags , HPHYBRID_IRL_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
// Service low-level interrupt
BIT_SET(m_flags , HPHYBRID_IRL_SVC_BIT);
irqline = HPHYBRID_IRL;
} else {
return;
}
// Get interrupt vector in low byte
UINT8 vector = (UINT8)standard_irq_callback(irqline);
UINT8 new_PA;
// Get highest numbered 1
// Don't know what happens if vector is 0, here we assume bit 7 = 1
if (vector == 0) {
new_PA = 7;
} else {
for (new_PA = 7; new_PA && !BIT(vector , 7); new_PA--, vector <<= 1) {
}
}
if (irqline == HPHYBRID_IRH) {
BIT_SET(new_PA , 3);
}
// Push PA stack
memmove(&m_reg_PA[ 1 ] , &m_reg_PA[ 0 ] , HPHYBRID_INT_LVLS);
CURRENT_PA = new_PA;
// Is this correct? Patent @ pg 210 suggests that the whole interrupt recognition sequence
// lasts for 32 cycles (6 are already accounted for in get_ea for one indirection)
m_icount -= 26;
// Do a double-indirect JSM IV,I instruction
WM(++m_reg_R , m_reg_P);
m_reg_P = RM(get_ea(0xc008));
m_reg_I = RM(m_reg_P);
}
UINT16 hp_hybrid_cpu_device::RM(UINT16 addr)
{
UINT16 tmp;
if (addr <= HP_REG_LAST_ADDR) {
// Memory mapped registers
switch (addr) {
case HP_REG_A_ADDR:
return m_reg_A;
case HP_REG_B_ADDR:
return m_reg_B;
case HP_REG_P_ADDR:
return m_reg_P;
case HP_REG_R_ADDR:
return m_reg_R;
case HP_REG_R4_ADDR:
case HP_REG_R5_ADDR:
case HP_REG_R6_ADDR:
case HP_REG_R7_ADDR:
return RIO(CURRENT_PA , addr - HP_REG_R4_ADDR);
case HP_REG_IV_ADDR:
// Correct?
if (!BIT(m_flags , HPHYBRID_IRH_SVC_BIT) && !BIT(m_flags , HPHYBRID_IRL_SVC_BIT)) {
return m_reg_IV;
} else {
return m_reg_IV | CURRENT_PA;
}
case HP_REG_PA_ADDR:
return CURRENT_PA;
case HP_REG_DMAPA_ADDR:
tmp = m_dmapa & HP_REG_PA_MASK;
if (BIT(m_flags , HPHYBRID_CB_BIT)) {
BIT_SET(tmp , 15);
}
if (BIT(m_flags , HPHYBRID_DB_BIT)) {
BIT_SET(tmp , 14);
}
return tmp;
case HP_REG_DMAMA_ADDR:
return m_dmama;
case HP_REG_DMAC_ADDR:
return m_dmac;
case HP_REG_C_ADDR:
return m_reg_C;
case HP_REG_D_ADDR:
return m_reg_D;
default:
// Unknown registers are returned as 0
return 0;
}
} else {
return m_direct->read_decrypted_word((offs_t)addr << 1);
}
}
void hp_hybrid_cpu_device::WM(UINT16 addr , UINT16 v)
{
if (addr <= HP_REG_LAST_ADDR) {
// Memory mapped registers
switch (addr) {
case HP_REG_A_ADDR:
m_reg_A = v;
break;
case HP_REG_B_ADDR:
m_reg_B = v;
break;
case HP_REG_P_ADDR:
m_reg_P = v;
break;
case HP_REG_R_ADDR:
m_reg_R = v;
break;
case HP_REG_R4_ADDR:
case HP_REG_R5_ADDR:
case HP_REG_R6_ADDR:
case HP_REG_R7_ADDR:
WIO(CURRENT_PA , addr - HP_REG_R4_ADDR , v);
break;
case HP_REG_IV_ADDR:
m_reg_IV = v & HP_REG_IV_MASK;
break;
case HP_REG_PA_ADDR:
CURRENT_PA = v & HP_REG_PA_MASK;
break;
case HP_REG_DMAPA_ADDR:
m_dmapa = v & HP_REG_PA_MASK;
break;
case HP_REG_DMAMA_ADDR:
m_dmama = v;
break;
case HP_REG_DMAC_ADDR:
m_dmac = v;
break;
case HP_REG_C_ADDR:
m_reg_C = v;
break;
case HP_REG_D_ADDR:
m_reg_D = v;
break;
default:
// Unknown registers are silently discarded
break;
}
} else {
m_program->write_word((offs_t)addr << 1 , v);
}
}
void hp_hybrid_cpu_device::WMB(UINT32 addr , UINT8 v)
{
if (addr <= (HP_REG_LAST_ADDR * 2 + 1)) {
// Cannot write bytes to registers
} else {
m_program->write_byte(addr , v);
}
}
UINT16 hp_hybrid_cpu_device::RIO(UINT8 pa , UINT8 ic)
{
return m_io->read_word(HP_MAKE_IOADDR(pa, ic) << 1);
}
void hp_hybrid_cpu_device::WIO(UINT8 pa , UINT8 ic , UINT16 v)
{
m_io->write_word(HP_MAKE_IOADDR(pa, ic) << 1 , v);
}
hp_5061_3011_cpu_device::hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: hp_hybrid_cpu_device(mconfig, HP_5061_3011, "HP_5061_3011", tag, owner, clock, "5061-3011")
{
}

View File

@ -0,0 +1,143 @@
// license:BSD-3-Clause
// copyright-holders:F. Ulivi
//
// *****************************************
// Emulator for HP "hybrid" processor series
// *****************************************
//
// The HP hybrid processor series is composed of a few different models with different
// capabilities. The series was derived from HP's own 2116 processor by translating a
// discrete implementation of the 1960s into a multi-chip module (hence the "hybrid" name).
// This emulator currently supports the 5061-3011 version only.
//
// For this emulator I mainly relied on these sources:
// - http://www.hp9845.net/ website
// - HP manual "Assembly development ROM manual for the HP9845": this is the most precious
// and "enabling" resource of all
// - US Patent 4,180,854 describing the HP9845 system
// - Study of disassembly of firmware of HP64000 system
// - A lot of "educated" guessing
#ifndef _HPHYBRID_H_
#define _HPHYBRID_H_
// Input lines
#define HPHYBRID_IRH 0 // High-level interrupt
#define HPHYBRID_IRL 1 // Low-level interrupt
#define HPHYBRID_INT_LVLS 2 // Levels of interrupt
#define HPHYBRID_DMAR 2 // DMA request
#define HPHYBRID_HALT 3 // "Halt" input
#define HPHYBRID_STS 4 // "Status" input
#define HPHYBRID_FLG 5 // "Flag" input
// I/O addressing space (16-bit wide)
// Addresses into this space are composed as follows:
// b[5..2] = Peripheral address 0..15
// b[1..0] = Register address (IC) 0..3
#define HP_IOADDR_PA_SHIFT 2
#define HP_IOADDR_IC_SHIFT 0
// Compose an I/O address from PA & IC
#define HP_MAKE_IOADDR(pa , ic) (((pa) << HP_IOADDR_PA_SHIFT) | ((ic) << HP_IOADDR_IC_SHIFT))
// Addresses of memory mapped registers
#define HP_REG_A_ADDR 0x0000
#define HP_REG_B_ADDR 0x0001
#define HP_REG_P_ADDR 0x0002
#define HP_REG_R_ADDR 0x0003
#define HP_REG_R4_ADDR 0x0004
#define HP_REG_R5_ADDR 0x0005
#define HP_REG_R6_ADDR 0x0006
#define HP_REG_R7_ADDR 0x0007
#define HP_REG_IV_ADDR 0x0008
#define HP_REG_PA_ADDR 0x0009
#define HP_REG_DMAPA_ADDR 0x000B
#define HP_REG_DMAMA_ADDR 0x000C
#define HP_REG_DMAC_ADDR 0x000D
#define HP_REG_C_ADDR 0x000e
#define HP_REG_D_ADDR 0x000f
#define HP_REG_LAST_ADDR 0x001f
#define HP_REG_IV_MASK 0xfff0
#define HP_REG_PA_MASK 0x000f
class hp_hybrid_cpu_device : public cpu_device
{
public:
protected:
hp_hybrid_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname);
// device-level overrides
virtual void device_start();
virtual void device_reset();
// device_execute_interface overrides
virtual UINT32 execute_min_cycles() const { return 6; }
virtual UINT32 execute_max_cycles() const { return 25; }
virtual UINT32 execute_input_lines() const { return 2; }
virtual UINT32 execute_default_irq_vector() const { return 0xffff; }
virtual void execute_run();
virtual void execute_set_input(int inputnum, int state);
UINT16 execute_one(UINT16 opcode);
UINT16 execute_one_sub(UINT16 opcode);
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return (spacenum == AS_PROGRAM) ? &m_program_config : ( (spacenum == AS_IO) ? &m_io_config : NULL ); }
// device_state_interface overrides
void state_string_export(const device_state_entry &entry, std::string &str);
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const { return 2; }
virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
private:
address_space_config m_program_config;
address_space_config m_io_config;
address_space *m_program;
direct_read_data *m_direct;
address_space *m_io;
int m_icount;
// State of processor
UINT16 m_reg_A; // Register A
UINT16 m_reg_B; // Register B
UINT16 m_reg_P; // Register P
UINT16 m_reg_R; // Register R
UINT16 m_reg_C; // Register C
UINT16 m_reg_D; // Register D
UINT16 m_reg_IV; // Register IV
UINT8 m_reg_PA[ HPHYBRID_INT_LVLS + 1 ]; // Stack of register PA (4 bit-long)
UINT16 m_flags; // Flags (carry, overflow, cb, db, int en, dma en, dma dir)
UINT8 m_dmapa; // DMA peripheral address (4 bits)
UINT16 m_dmama; // DMA address
UINT16 m_dmac; // DMA counter
UINT16 m_reg_I; // Instruction register
UINT16 get_ea(UINT16 opcode);
void do_add(UINT16& addend1 , UINT16 addend2);
UINT16 get_skip_addr(UINT16 opcode , bool condition) const;
UINT16 get_skip_addr_sc(UINT16 opcode , UINT16& v , unsigned n);
void do_pw(UINT16 opcode);
void check_for_interrupts(void);
UINT16 RM(UINT16 addr);
void WM(UINT16 addr , UINT16 v);
void WMB(UINT32 addr , UINT8 v);
UINT16 RIO(UINT8 pa , UINT8 ic);
void WIO(UINT8 pa , UINT8 ic , UINT16 v);
};
class hp_5061_3011_cpu_device : public hp_hybrid_cpu_device
{
public:
hp_5061_3011_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
extern const device_type HP_5061_3011;
#endif /* _HPHYBRID_H_ */

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@ -0,0 +1,281 @@
// license:BSD-3-Clause
// copyright-holders:F. Ulivi
// ********************************************************************************
// * HP "hybrid" processor disassembler
// ********************************************************************************
#include "emu.h"
#include "debugger.h"
#include "hphybrid.h"
typedef void (*fn_dis_param)(char *buffer , offs_t pc , UINT16 opcode);
typedef struct {
UINT16 m_op_mask;
UINT16 m_opcode;
const char *m_mnemonic;
fn_dis_param m_param_fn;
UINT32 m_dasm_flags;
} dis_entry_t;
static void addr_2_str(char *buffer , UINT16 addr , bool indirect)
{
char *s = buffer + strlen(buffer);
s += sprintf(s , "$%04x" , addr);
switch (addr) {
case HP_REG_A_ADDR:
strcpy(s , "(A)");
break;
case HP_REG_B_ADDR:
strcpy(s , "(B)");
break;
case HP_REG_P_ADDR:
strcpy(s , "(P)");
break;
case HP_REG_R_ADDR:
strcpy(s , "(R)");
break;
case HP_REG_R4_ADDR:
strcpy(s , "(R4)");
break;
case HP_REG_R5_ADDR:
strcpy(s , "(R5)");
break;
case HP_REG_R6_ADDR:
strcpy(s , "(R6)");
break;
case HP_REG_R7_ADDR:
strcpy(s , "(R7)");
break;
case HP_REG_IV_ADDR:
strcpy(s , "(IV)");
break;
case HP_REG_PA_ADDR:
strcpy(s , "(PA)");
break;
case HP_REG_DMAPA_ADDR:
strcpy(s , "(DMAPA)");
break;
case HP_REG_DMAMA_ADDR:
strcpy(s , "(DMAMA)");
break;
case HP_REG_DMAC_ADDR:
strcpy(s , "(DMAC)");
break;
case HP_REG_C_ADDR:
strcpy(s , "(C)");
break;
case HP_REG_D_ADDR:
strcpy(s , "(D)");
break;
}
if (indirect) {
strcat(s , ",I");
}
}
static void param_none(char *buffer , offs_t pc , UINT16 opcode)
{
}
static void param_loc(char *buffer , offs_t pc , UINT16 opcode)
{
UINT16 base;
UINT16 off;
if (opcode & 0x0400) {
// Current page
base = pc;
} else {
// Base page
base = 0;
}
off = opcode & 0x3ff;
if (off & 0x200) {
off -= 0x400;
}
addr_2_str(buffer , base + off , (opcode & 0x8000) != 0);
}
static void param_addr32(char *buffer , offs_t pc , UINT16 opcode)
{
addr_2_str(buffer , opcode & 0x1f , (opcode & 0x8000) != 0);
}
static void param_skip(char *buffer , offs_t pc , UINT16 opcode)
{
UINT16 off = opcode & 0x3f;
if (off & 0x20) {
off -= 0x40;
}
addr_2_str(buffer , pc + off , false);
}
static void param_skip_sc(char *buffer , offs_t pc , UINT16 opcode)
{
param_skip(buffer, pc, opcode);
if (opcode & 0x80) {
if (opcode & 0x40) {
strcat(buffer , ",S");
} else {
strcat(buffer , ",C");
}
}
}
static void param_ret(char *buffer , offs_t pc , UINT16 opcode)
{
char *s = buffer + strlen(buffer);
int off = opcode & 0x3f;
if (off & 0x20) {
off -= 0x40;
}
s += sprintf(s , "%d" , off);
if (opcode & 0x40) {
strcpy(s , ",P");
}
}
static void param_n16(char *buffer , offs_t pc , UINT16 opcode)
{
char *s = buffer + strlen(buffer);
sprintf(s , "%u" , (opcode & 0xf) + 1);
}
static void param_reg_id(char *buffer , offs_t pc , UINT16 opcode)
{
addr_2_str(buffer, opcode & 7, false);
if (opcode & 0x80) {
strcat(buffer , ",D");
} else {
strcat(buffer , ",I");
}
}
static const dis_entry_t dis_table[] = {
// *** BPC Instructions ***
{0xffff , 0x0000 , "NOP" , param_none , 0 },
{0x7800 , 0x0000 , "LDA" , param_loc , 0 },
{0x7800 , 0x0800 , "LDB" , param_loc , 0 },
{0x7800 , 0x1000 , "CPA" , param_loc , 0 },
{0x7800 , 0x1800 , "CPB" , param_loc , 0 },
{0x7800 , 0x2000 , "ADA" , param_loc , 0 },
{0x7800 , 0x2800 , "ADB" , param_loc , 0 },
{0x7800 , 0x3000 , "STA" , param_loc , 0 },
{0x7800 , 0x3800 , "STB" , param_loc , 0 },
{0x7800 , 0x4000 , "JSM" , param_loc , DASMFLAG_STEP_OVER },
{0x7800 , 0x4800 , "ISZ" , param_loc , 0 },
{0x7800 , 0x5000 , "AND" , param_loc , 0 },
{0x7800 , 0x5800 , "DSZ" , param_loc , 0 },
{0x7800 , 0x6000 , "IOR" , param_loc , 0 },
{0x7800 , 0x6800 , "JMP" , param_loc , 0 },
{0x7fe0 , 0x7000 , "EXE" , param_addr32 , 0 },
{0xffc0 , 0x7400 , "RZA" , param_skip , 0 },
{0xffc0 , 0x7C00 , "RZB" , param_skip , 0 },
{0xffc0 , 0x7440 , "RIA" , param_skip , 0 },
{0xffc0 , 0x7C40 , "RIB" , param_skip , 0 },
{0xffc0 , 0x7500 , "SZA" , param_skip , 0 },
{0xffc0 , 0x7D00 , "SZB" , param_skip , 0 },
{0xffc0 , 0x7540 , "SIA" , param_skip , 0 },
{0xffc0 , 0x7D40 , "SIB" , param_skip , 0 },
{0xffc0 , 0x7480 , "SFS" , param_skip , 0 },
{0xffc0 , 0x7580 , "SFC" , param_skip , 0 },
{0xffc0 , 0x7c80 , "SSS" , param_skip , 0 },
{0xffc0 , 0x7d80 , "SSC" , param_skip , 0 },
{0xffc0 , 0x7cc0 , "SHS" , param_skip , 0 },
{0xffc0 , 0x7dc0 , "SHC" , param_skip , 0 },
{0xff00 , 0x7600 , "SLA" , param_skip_sc , 0 },
{0xff00 , 0x7e00 , "SLB" , param_skip_sc , 0 },
{0xff00 , 0x7700 , "RLA" , param_skip_sc , 0 },
{0xff00 , 0x7f00 , "RLB" , param_skip_sc , 0 },
{0xff00 , 0xf400 , "SAP" , param_skip_sc , 0 },
{0xff00 , 0xfc00 , "SBP" , param_skip_sc , 0 },
{0xff00 , 0xf500 , "SAM" , param_skip_sc , 0 },
{0xff00 , 0xfd00 , "SBM" , param_skip_sc , 0 },
{0xff00 , 0xf600 , "SOC" , param_skip_sc , 0 },
{0xff00 , 0xf700 , "SOS" , param_skip_sc , 0 },
{0xff00 , 0xfe00 , "SEC" , param_skip_sc , 0 },
{0xff00 , 0xff00 , "SES" , param_skip_sc , 0 },
{0xffff , 0xf020 , "TCA" , param_none , 0 },
{0xffff , 0xf820 , "TCB" , param_none , 0 },
{0xffff , 0xf060 , "CMA" , param_none , 0 },
{0xffff , 0xf860 , "CMB" , param_none , 0 },
{0xff80 , 0xf080 , "RET" , param_ret , DASMFLAG_STEP_OUT },
{0xfff0 , 0xf100 , "AAR" , param_n16 , 0 },
{0xfff0 , 0xf900 , "ABR" , param_n16 , 0 },
{0xffff , 0xf14f , "CLA" , param_none , 0 },
{0xfff0 , 0xf140 , "SAR" , param_n16 , 0 },
{0xffff , 0xf94f , "CLB" , param_none , 0 },
{0xfff0 , 0xf940 , "SBR" , param_n16 , 0 },
{0xfff0 , 0xf180 , "SAL" , param_n16 , 0 },
{0xfff0 , 0xf980 , "SBL" , param_n16 , 0 },
{0xfff0 , 0xf1c0 , "RAR" , param_n16 , 0 },
{0xfff0 , 0xf9c0 , "RBR" , param_n16 , 0 },
// *** IOC Instructions ***
{0xffff , 0x7100 , "SDO" , param_none , 0 },
{0xffff , 0x7108 , "SDI" , param_none , 0 },
{0xffff , 0x7110 , "EIR" , param_none , 0 },
{0xffff , 0x7118 , "DIR" , param_none , 0 },
{0xffff , 0x7120 , "DMA" , param_none , 0 },
{0xffff , 0x7128 , "PCM" , param_none , 0 },
{0xffff , 0x7138 , "DDR" , param_none , 0 },
{0xffff , 0x7140 , "DBL" , param_none , 0 },
{0xffff , 0x7148 , "CBL" , param_none , 0 },
{0xffff , 0x7150 , "DBU" , param_none , 0 },
{0xffff , 0x7158 , "CBU" , param_none , 0 },
{0xff78 , 0x7160 , "PWC" , param_reg_id , 0 },
{0xff78 , 0x7168 , "PWD" , param_reg_id , 0 },
{0xff78 , 0x7960 , "PBC" , param_reg_id , 0 },
{0xff78 , 0x7968 , "PBD" , param_reg_id , 0 },
{0xff78 , 0x7170 , "WWC" , param_reg_id , 0 },
{0xff78 , 0x7178 , "WWD" , param_reg_id , 0 },
{0xff78 , 0x7970 , "WBC" , param_reg_id , 0 },
{0xff78 , 0x7978 , "WBD" , param_reg_id , 0 },
// *** END ***
{0 , 0 , NULL , NULL , 0 }
};
CPU_DISASSEMBLE(hp_hybrid)
{
UINT16 opcode = ((UINT16)oprom[ 0 ] << 8) | oprom[ 1 ];
const dis_entry_t *p;
for (p = dis_table; p->m_op_mask; p++) {
if ((opcode & p->m_op_mask) == p->m_opcode) {
strcpy(buffer , p->m_mnemonic);
strcat(buffer , " ");
p->m_param_fn(buffer , pc , opcode);
return 1 | p->m_dasm_flags | DASMFLAG_SUPPORTED;
}
}
// Unknown opcode
strcpy(buffer , "???");
return 1 | DASMFLAG_SUPPORTED;
}

View File

@ -33,7 +33,7 @@ const device_type I8089 = &device_creator<i8089_device>;
//-------------------------------------------------
i8089_device::i8089_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
cpu_device(mconfig, I8089, "Intel 8089", tag, owner, clock, "i8089", __FILE__),
cpu_device(mconfig, I8089, "I8089", tag, owner, clock, "i8089", __FILE__),
m_icount(0),
m_ch1(*this, "1"),
m_ch2(*this, "2"),

View File

@ -51,10 +51,13 @@ const device_type I8089_CHANNEL = &device_creator<i8089_channel>;
i8089_channel::i8089_channel(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) :
device_t(mconfig, I8089_CHANNEL, "Intel 8089 I/O Channel", tag, owner, clock, "i8089_channel", __FILE__),
m_write_sintr(*this),
m_iop(NULL),
m_icount(0),
m_xfer_pending(false),
m_dma_value(0),
m_dma_state(DMA_IDLE)
m_dma_state(DMA_IDLE),
m_drq(0),
m_prio(PRIO_IDLE)
{
}
@ -74,6 +77,7 @@ void i8089_channel::device_start()
save_item(NAME(m_xfer_pending));
save_item(NAME(m_dma_value));
save_item(NAME(m_dma_state));
save_item(NAME(m_drq));
save_item(NAME(m_prio));
for (int i = 0; i < ARRAY_LENGTH(m_r); i++)
@ -246,11 +250,13 @@ int i8089_channel::execute_run()
break;
case DMA_WAIT_FOR_SOURCE_DRQ:
fatalerror("%s('%s'): wait for source drq not supported\n", shortname(), tag());
if (m_drq)
m_dma_state = DMA_FETCH;
break;
case DMA_FETCH:
if (VERBOSE_DMA)
logerror("%s('%s'): entering state: DMA_FETCH", shortname(), tag());
logerror("%s('%s'): entering state: DMA_FETCH\n", shortname(), tag());
// source is 16-bit?
if (BIT(m_r[PSW].w, 1))
@ -306,7 +312,9 @@ int i8089_channel::execute_run()
fatalerror("%s('%s'): dma translate requested\n", shortname(), tag());
case DMA_WAIT_FOR_DEST_DRQ:
fatalerror("%s('%s'): wait for destination drq not supported\n", shortname(), tag());
if (m_drq)
m_dma_state = DMA_STORE;
break;
case DMA_STORE:
if (VERBOSE_DMA)
@ -834,5 +842,7 @@ WRITE_LINE_MEMBER( i8089_channel::ext_w )
WRITE_LINE_MEMBER( i8089_channel::drq_w )
{
if (VERBOSE)
logerror("%s('%s'): ext_w: %d\n", shortname(), tag(), state);
logerror("%s('%s'): drq_w: %d\n", shortname(), tag(), state);
m_drq = state;
}

View File

@ -186,6 +186,7 @@ private:
bool m_xfer_pending;
UINT16 m_dma_value;
int m_dma_state;
bool m_drq;
// dma state
enum

View File

@ -282,6 +282,8 @@ i8086_common_cpu_device::i8086_common_cpu_device(const machine_config &mconfig,
, m_irq_state(0)
, m_test_state(1)
, m_pc(0)
, m_lock(false)
, m_lock_handler(*this)
{
static const BREGS reg_name[8]={ AL, CL, DL, BL, AH, CH, DH, BH };
@ -391,6 +393,8 @@ void i8086_common_cpu_device::device_start()
state_add(STATE_GENFLAGS, "GENFLAGS", m_TF).callimport().callexport().formatstr("%16s").noshow();
m_icountptr = &m_icount;
m_lock_handler.resolve_safe();
}
@ -438,6 +442,7 @@ void i8086_common_cpu_device::device_reset()
m_dst = 0;
m_src = 0;
m_halt = false;
m_lock = false;
}
@ -1910,7 +1915,9 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
break;
case 0xe4: // i_inal
if (m_lock) m_lock_handler(1);
m_regs.b[AL] = read_port_byte( fetch() );
if (m_lock) { m_lock_handler(0); m_lock = false; }
CLK(IN_IMM8);
break;
@ -2011,6 +2018,7 @@ bool i8086_common_cpu_device::common_op(UINT8 op)
case 0xf0: // i_lock
logerror("%s: %06x: Warning - BUSLOCK\n", tag(), pc());
m_lock = true;
m_no_interrupt = 1;
CLK(NOP);
break;

View File

@ -14,6 +14,10 @@ extern const device_type I8088;
#define INPUT_LINE_TEST 20
#define MCFG_I8086_LOCK_HANDLER(_write) \
devcb = &i8086_common_cpu_device::set_lock_handler(*device, DEVCB_##_write);
enum
{
I8086_PC=0,
@ -29,6 +33,9 @@ public:
// construction/destruction
i8086_common_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, const char *shortname, const char *source);
template<class _Object> static devcb_base &set_lock_handler(device_t &device, _Object object)
{ return downcast<i8086_common_cpu_device &>(device).m_lock_handler.set_callback(object); }
protected:
enum
{
@ -325,6 +332,9 @@ protected:
UINT8 m_timing[200];
bool m_halt;
bool m_lock;
devcb_write_line m_lock_handler;
};
class i8086_cpu_device : public i8086_common_cpu_device

View File

@ -5,20 +5,6 @@
* lr35902d.c
* Portable Sharp LR35902 disassembler
*
* Copyright The MESS Team.
*
* - This source code is released as freeware for non-commercial purposes.
* - You are free to use and redistribute this code in modified or
* unmodified form, provided you list me in the credits.
* - If you modify this source code, you must add a notice to each modified
* source file that it has been changed. If you're a nice person, you
* will clearly mark each change too. :)
* - If you wish to use this for commercial purposes, please contact me at
* pullmoll@t-online.de
* - The author of this copywritten work reserves the right to change the
* terms of its usage and license at any time, including retroactively
* - This entire notice must remain in the source code.
*
*****************************************************************************/
#include "emu.h"

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