From 232bec8a8d45ec08fbf14a0c99b3d03cad4c82bb Mon Sep 17 00:00:00 2001 From: mamehaze Date: Sun, 29 Mar 2015 17:14:28 +0100 Subject: [PATCH 01/11] new clones Super Puzzle Fighter II Turbo (Euro 960529) [fluxcore, idc/Team Avalaunch] (had to dig out the old keyfinder again for this one, we were lucky because the code is at different offsets here and needed some shifting to find the key, and it's the smallest game too, so longest search time) --- src/mame/drivers/cps2.c | 26 +++++++++++++++++++++++++- src/mame/machine/cps2crpt.c | 3 ++- src/mame/mame.lst | 3 ++- 3 files changed, 29 insertions(+), 3 deletions(-) diff --git a/src/mame/drivers/cps2.c b/src/mame/drivers/cps2.c index d730dd6640e..f0ea66d2582 100644 --- a/src/mame/drivers/cps2.c +++ b/src/mame/drivers/cps2.c @@ -6786,6 +6786,28 @@ ROM_START( sgemfh ) ROM_END ROM_START( spf2t ) + ROM_REGION(CODE_SIZE, "maincpu", 0 ) /* 68000 code */ + ROM_LOAD16_WORD_SWAP( "pzfe.03", 0x000000, 0x80000, CRC(2af51954) SHA1(51f8797918391e772cf3cc27074ed6ca419806bd) ) + ROM_LOAD16_WORD_SWAP( "pzf.04", 0x080000, 0x80000, CRC(b80649e2) SHA1(5bfccd656aea7ff82e9a20bb5856f4ab99b5a007) ) // marked pzfe.04 but same as pzf.04 + + ROM_REGION( 0xC00000, "gfx", 0 ) + ROM_FILL( 0x000000, 0x800000, 0 ) + ROMX_LOAD( "pzf.14m", 0x800000, 0x100000, CRC(2d4881cb) SHA1(fd3baa183c25bed153b19c251980e2fb761600e2) , ROM_GROUPWORD | ROM_SKIP(6) ) + ROMX_LOAD( "pzf.16m", 0x800002, 0x100000, CRC(4b0fd1be) SHA1(377aafdcdb7a866b1c8487670e3598d8197976e4) , ROM_GROUPWORD | ROM_SKIP(6) ) + ROMX_LOAD( "pzf.18m", 0x800004, 0x100000, CRC(e43aac33) SHA1(d041e0688c3807d3363861a7f216de43b34d846c) , ROM_GROUPWORD | ROM_SKIP(6) ) + ROMX_LOAD( "pzf.20m", 0x800006, 0x100000, CRC(7f536ff1) SHA1(905b9d62ef7bef47297c7f4a4dd697aed6df38a5) , ROM_GROUPWORD | ROM_SKIP(6) ) + + ROM_REGION(QSOUND_SIZE, "audiocpu", 0 ) /* 64k for the audio CPU (+banks) */ + ROM_LOAD( "pzf.01", 0x00000, 0x08000, CRC(600fb2a3) SHA1(1fab1c2a23bf6ad8309d29ddbbc29435a8aeea13) ) + ROM_CONTINUE( 0x10000, 0x18000 ) + ROM_LOAD( "pzf.02", 0x28000, 0x20000, CRC(496076e0) SHA1(1ee4e135140afd0e8e03231e570cd77d140f6367) ) + + ROM_REGION( 0x400000, "qsound", 0 ) /* QSound samples */ + ROM_LOAD16_WORD_SWAP( "pzf.11m", 0x000000, 0x200000, CRC(78442743) SHA1(b61190bb586871de6d54af580e3e1d9cc0de0acb) ) + ROM_LOAD16_WORD_SWAP( "pzf.12m", 0x200000, 0x200000, CRC(399d2c7b) SHA1(e849dea97b8d16540415c0d9bbc4f9f4eb755ec4) ) +ROM_END + +ROM_START( spf2tu ) ROM_REGION(CODE_SIZE, "maincpu", 0 ) /* 68000 code */ ROM_LOAD16_WORD_SWAP( "pzfu.03a", 0x000000, 0x80000, CRC(346e62ef) SHA1(9db5ea0aac2d459be957f8b6e2e0d18421587d4d) ) ROM_LOAD16_WORD_SWAP( "pzf.04", 0x080000, 0x80000, CRC(b80649e2) SHA1(5bfccd656aea7ff82e9a20bb5856f4ab99b5a007) ) @@ -6807,6 +6829,7 @@ ROM_START( spf2t ) ROM_LOAD16_WORD_SWAP( "pzf.12m", 0x200000, 0x200000, CRC(399d2c7b) SHA1(e849dea97b8d16540415c0d9bbc4f9f4eb755ec4) ) ROM_END + ROM_START( spf2xj ) ROM_REGION(CODE_SIZE, "maincpu", 0 ) /* 68000 code */ ROM_LOAD16_WORD_SWAP( "pzfj.03a", 0x000000, 0x80000, CRC(2070554a) SHA1(fa818e6bd2e11667345d3d8f2397b60802ef72f9) ) @@ -8804,7 +8827,8 @@ GAME( 1996, sfz2al, 0, cps2, cps2_2p6b, cps_state, cps2, ROT0, GAME( 1996, sfz2alj, sfz2al, cps2, cps2_2p6b, cps_state, cps2, ROT0, "Capcom", "Street Fighter Zero 2 Alpha (Japan 960805)", GAME_SUPPORTS_SAVE ) GAME( 1996, sfz2alh, sfz2al, cps2, cps2_2p6b, cps_state, cps2, ROT0, "Capcom", "Street Fighter Zero 2 Alpha (Hispanic 960813)", GAME_SUPPORTS_SAVE ) GAME( 1996, sfz2alb, sfz2al, cps2, cps2_2p6b, cps_state, cps2, ROT0, "Capcom", "Street Fighter Zero 2 Alpha (Brazil 960813)", GAME_SUPPORTS_SAVE ) -GAME( 1996, spf2t, 0, cps2, cps2_2p2b, cps_state, cps2, ROT0, "Capcom", "Super Puzzle Fighter II Turbo (USA 960620)", GAME_SUPPORTS_SAVE ) +GAME( 1996, spf2t, 0, cps2, cps2_2p2b, cps_state, cps2, ROT0, "Capcom", "Super Puzzle Fighter II Turbo (Euro 960529)", GAME_SUPPORTS_SAVE ) +GAME( 1996, spf2tu, spf2t, cps2, cps2_2p2b, cps_state, cps2, ROT0, "Capcom", "Super Puzzle Fighter II Turbo (USA 960620)", GAME_SUPPORTS_SAVE ) GAME( 1996, spf2xj, spf2t, cps2, cps2_2p2b, cps_state, cps2, ROT0, "Capcom", "Super Puzzle Fighter II X (Japan 960531)", GAME_SUPPORTS_SAVE ) GAME( 1996, spf2ta, spf2t, cps2, cps2_2p2b, cps_state, cps2, ROT0, "Capcom", "Super Puzzle Fighter II Turbo (Asia 960529)", GAME_SUPPORTS_SAVE ) GAME( 1996, spf2th, spf2t, cps2, cps2_2p2b, cps_state, cps2, ROT0, "Capcom", "Super Puzzle Fighter II Turbo (Hispanic 960531)", GAME_SUPPORTS_SAVE ) diff --git a/src/mame/machine/cps2crpt.c b/src/mame/machine/cps2crpt.c index 07d0e309e35..f0298b40c40 100644 --- a/src/mame/machine/cps2crpt.c +++ b/src/mame/machine/cps2crpt.c @@ -899,7 +899,8 @@ static const struct game_keys keys_table[] = { "sfz2alj", { 0x99450c88,0xa00a2c4d }, 0x100000 }, // 0C80 8E73 9110 cmpi.l #$8E739110,D0 { "sfz2alh", { 0x95f15b7c,0x200c08c6 }, 0x100000 }, // 0C80 8E73 9110 cmpi.l #$8E739110,D0 { "sfz2alb", { 0x73cd4a28,0xff83af1c }, 0x100000 }, // 0C80 8E73 9110 cmpi.l #$8E739110,D0 - { "spf2t", { 0x706a8750,0x7d0fc185 }, 0x040000 }, // 0C80 3039 9819 cmpi.l #$30399819,D0 + { "spf2t", { 0xdde26f09,0x55821ee7 }, 0x040000 }, // 0C80 3039 9819 cmpi.l #$30399819,D0 + { "spf2tu", { 0x706a8750,0x7d0fc185 }, 0x040000 }, // 0C80 3039 9819 cmpi.l #$30399819,D0 { "spf2xj", { 0xb12c835a,0xe90976ff }, 0x040000 }, // 0C80 3039 9819 cmpi.l #$30399819,D0 { "spf2ta", { 0x9c48e1ab,0xd60f34fb }, 0x040000 }, // 0C80 3039 9819 cmpi.l #$30399819,D0 { "spf2th", { 0x51ed8cab,0x228f85b6 }, 0x040000 }, // 0C80 3039 9819 cmpi.l #$30399819,D0 diff --git a/src/mame/mame.lst b/src/mame/mame.lst index e7ee4700e5e..22b56e4e0ae 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -3439,7 +3439,8 @@ sfz2b // 31/05/1996 (c) 1996 (Brazil) sfz2br1 // 04/03/1996 (c) 1996 (Brazil) sfz2h // 04/03/1996 (c) 1996 (Hispanic) sfz2n // 29/02/1996 (c) 1996 (Oceania) -spf2t // 20/06/1996 (c) 1996 (USA) +spf2t // 29/05/1996 (c) 1996 (Europe) +spf2tu // 20/06/1996 (c) 1996 (USA) spf2xj // 31/05/1996 (c) 1996 (Japan) spf2ta // 29/05/1996 (c) 1996 (Asia) spf2th // 31/05/1996 (c) 1996 (Hispanic) From 02f7ff9b9035185697e72e3bac85bb9971e8ad64 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Sun, 29 Mar 2015 18:26:15 +0200 Subject: [PATCH 02/11] fix genie location (nw) --- makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/makefile b/makefile index 2f41b8f9661..8f14ad6d7cd 100644 --- a/makefile +++ b/makefile @@ -590,12 +590,12 @@ endif $(SILENT) $(MAKE) --no-print-directory -R -C build/projects/$(SUBDIR)/gmake-osx-clang config=$(CONFIG)32 $(GENIE): - $(SILENT) $(MAKE) --no-print-directory -R -C 3rdparty/genie/build/gmake.$(OS) -f genie.make + $(SILENT) $(MAKE) --no-print-directory -R -C 3rdparty/genie/build/gmake.$(GENIEOS) -f genie.make clean: @echo Cleaning... -@rm -rf build - $(SILENT) $(MAKE) --no-print-directory -R -C 3rdparty/genie/build/gmake.$(OS) -f genie.make clean + $(SILENT) $(MAKE) --no-print-directory -R -C 3rdparty/genie/build/gmake.$(GENIEOS) -f genie.make clean GEN_FOLDERS := \ $(GENDIR) \ From 816518fd495a4b468b6db60771dd6ee00b0aff25 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Sun, 29 Mar 2015 18:33:25 +0200 Subject: [PATCH 03/11] Fix for OSX (nw) --- scripts/genie.lua | 3 +++ 1 file changed, 3 insertions(+) diff --git a/scripts/genie.lua b/scripts/genie.lua index bc87a067b3b..5c8ad04dc75 100644 --- a/scripts/genie.lua +++ b/scripts/genie.lua @@ -709,6 +709,9 @@ configuration { "osx*" } "SDL2.framework", "pthread", } + buildoptions { + "-F/Library/Frameworks/", + } configuration { "mingw*" } From 602e2de3e016272f29067f7c98b24c5cdfa65834 Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Mon, 30 Mar 2015 03:50:34 +1100 Subject: [PATCH 04/11] Fix osdmini build on Windows (crashes if you run it though) --- scripts/genie.lua | 7 ------- scripts/src/osd/sdl.lua | 8 ++++++++ scripts/src/osd/sdl_cfg.lua | 1 + scripts/src/osd/windows.lua | 5 +++++ scripts/src/osd/windows_cfg.lua | 1 + 5 files changed, 15 insertions(+), 7 deletions(-) diff --git a/scripts/genie.lua b/scripts/genie.lua index 5c8ad04dc75..d16ebf179a7 100644 --- a/scripts/genie.lua +++ b/scripts/genie.lua @@ -715,13 +715,9 @@ configuration { "osx*" } configuration { "mingw*" } - defines { - "main=utf8_main", - } linkoptions { "-static-libgcc", "-static-libstdc++", - "-municode", } if _OPTIONS["osd"]=="sdl" then links { @@ -748,9 +744,6 @@ end } configuration { "vs*" } - defines { - "main=utf8_main", - } defines { "XML_STATIC", "WIN32", diff --git a/scripts/src/osd/sdl.lua b/scripts/src/osd/sdl.lua index ffe4080a6e4..e548aa677f1 100644 --- a/scripts/src/osd/sdl.lua +++ b/scripts/src/osd/sdl.lua @@ -28,6 +28,14 @@ function maintargetosdoptions(_target) configuration { } end + +if _OPTIONS["targetos"]=="windows" then + linkoptions { + "-municode", + } +end + + configuration { "mingw*" } linkoptions { "-Wl,--allow-multiple-definition", diff --git a/scripts/src/osd/sdl_cfg.lua b/scripts/src/osd/sdl_cfg.lua index e746dcf40df..600e19035b6 100644 --- a/scripts/src/osd/sdl_cfg.lua +++ b/scripts/src/osd/sdl_cfg.lua @@ -13,6 +13,7 @@ if _OPTIONS["targetos"]=="windows" then "USE_OPENGL=1", "USE_QTDEBUG=1", "SDLMAME_NET_PCAP", + "main=utf8_main", } buildoptions { diff --git a/scripts/src/osd/windows.lua b/scripts/src/osd/windows.lua index 6cdc4009b11..70aa239e766 100644 --- a/scripts/src/osd/windows.lua +++ b/scripts/src/osd/windows.lua @@ -13,6 +13,11 @@ function maintargetosdoptions(_target) end +linkoptions { + "-municode", +} + + project ("osd_" .. _OPTIONS["osd"]) uuid (os.uuid("osd_" .. _OPTIONS["osd"])) kind "StaticLib" diff --git a/scripts/src/osd/windows_cfg.lua b/scripts/src/osd/windows_cfg.lua index 90944ecbb4f..50775976b01 100644 --- a/scripts/src/osd/windows_cfg.lua +++ b/scripts/src/osd/windows_cfg.lua @@ -12,4 +12,5 @@ defines { "USE_DISPATCH_GL=1", "DIRECTINPUT_VERSION=0x0800", "SDLMAME_NET_PCAP", + "main=utf8_main", } From 8e78543be3d1c3837cd1eb97e6aa799fcafd43ca Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Mon, 30 Mar 2015 03:53:36 +1100 Subject: [PATCH 05/11] Fix OSD=sdl tools on Windows --- scripts/src/osd/sdl.lua | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/scripts/src/osd/sdl.lua b/scripts/src/osd/sdl.lua index e548aa677f1..e3ccd96d7b7 100644 --- a/scripts/src/osd/sdl.lua +++ b/scripts/src/osd/sdl.lua @@ -1,6 +1,7 @@ function maintargetosdoptions(_target) if _OPTIONS["targetos"]=="windows" then linkoptions{ + "-municode", "-L$(shell qmake -query QT_INSTALL_LIBS)", } @@ -29,13 +30,6 @@ function maintargetosdoptions(_target) end -if _OPTIONS["targetos"]=="windows" then - linkoptions { - "-municode", - } -end - - configuration { "mingw*" } linkoptions { "-Wl,--allow-multiple-definition", From 08fd3f4ec65aa22328722f43facfa05a95ca28fb Mon Sep 17 00:00:00 2001 From: Vas Crabb Date: Mon, 30 Mar 2015 03:55:46 +1100 Subject: [PATCH 06/11] Fix TOOLS=1 with OSD=windows --- scripts/src/osd/windows.lua | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/scripts/src/osd/windows.lua b/scripts/src/osd/windows.lua index 70aa239e766..26b9b34826f 100644 --- a/scripts/src/osd/windows.lua +++ b/scripts/src/osd/windows.lua @@ -1,4 +1,8 @@ function maintargetosdoptions(_target) + linkoptions { + "-municode", + } + local rcfile = MAME_DIR .. "src/" .. _target .. "/osd/windows/" .. _target ..".rc" if os.isfile(rcfile) then @@ -13,11 +17,6 @@ function maintargetosdoptions(_target) end -linkoptions { - "-municode", -} - - project ("osd_" .. _OPTIONS["osd"]) uuid (os.uuid("osd_" .. _OPTIONS["osd"])) kind "StaticLib" From 28165887618417add2d95be2e823391f98613569 Mon Sep 17 00:00:00 2001 From: Miodrag Milanovic Date: Sun, 29 Mar 2015 19:10:34 +0200 Subject: [PATCH 07/11] more OSX 10.10 fixes and fixed mistake with x64 (nw) --- makefile | 2 +- scripts/genie.lua | 5 ++++- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/makefile b/makefile index 8f14ad6d7cd..c054d84f739 100644 --- a/makefile +++ b/makefile @@ -367,7 +367,7 @@ endif ifeq ($(TARGETOS),macosx) ifneq (,$(findstring 3.,$(CLANG_VERSION))) -ifeq ($(ARCHITECTURE),x64) +ifeq ($(ARCHITECTURE),_x64) ARCHITECTURE=_x64_clang else ARCHITECTURE=_x86_clang diff --git a/scripts/genie.lua b/scripts/genie.lua index 5c8ad04dc75..3d4de308570 100644 --- a/scripts/genie.lua +++ b/scripts/genie.lua @@ -702,16 +702,19 @@ configuration { "linux-*" } configuration { "osx*" } links { + "SDL2.framework", "Cocoa.framework", "OpenGL.framework", "CoreAudio.framework", "CoreMIDI.framework", - "SDL2.framework", "pthread", } buildoptions { "-F/Library/Frameworks/", } + linkoptions { + "-F/Library/Frameworks/", + } configuration { "mingw*" } From 9be2780fcd8d92b0008bd5b834691ebc2ed32032 Mon Sep 17 00:00:00 2001 From: hap Date: Sun, 29 Mar 2015 19:18:40 +0200 Subject: [PATCH 08/11] confirmed pla --- src/mess/drivers/ticalc1x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mess/drivers/ticalc1x.c b/src/mess/drivers/ticalc1x.c index 1339288d536..8c3d5c7fcfe 100644 --- a/src/mess/drivers/ticalc1x.c +++ b/src/mess/drivers/ticalc1x.c @@ -946,7 +946,7 @@ ROM_START( lilprof78 ) ROM_LOAD( "tmc1993nl", 0x0000, 0x0400, CRC(e941316b) SHA1(7e1542045d1e731cea81a639c9ac9e91bb233b15) ) ROM_REGION( 782, "maincpu:ipla", 0 ) - ROM_LOAD( "tms0970_lilprof78_ipla.pla", 0, 782, BAD_DUMP CRC(05306ef8) SHA1(60a0a3c49ce330bce0c27f15f81d61461d0432ce) ) // not verified + ROM_LOAD( "tms0970_lilprof78_ipla.pla", 0, 782, CRC(05306ef8) SHA1(60a0a3c49ce330bce0c27f15f81d61461d0432ce) ) ROM_REGION( 860, "maincpu:mpla", 0 ) ROM_LOAD( "tms0970_lilprof78_mpla.pla", 0, 860, CRC(7f50ab2e) SHA1(bff3be9af0e322986f6e545b567c97d70e135c93) ) ROM_REGION( 352, "maincpu:opla", 0 ) From 4e11cfcb0daa55a6e0f1eac61dd04555bf8378d4 Mon Sep 17 00:00:00 2001 From: "therealmogminer@gmail.com" Date: Sun, 29 Mar 2015 19:20:21 +0200 Subject: [PATCH 09/11] - mips3: Made fast RAM option common to both interpreter and DRC. [MooglyGuy] --- src/emu/cpu/mips/mips3.c | 560 +++++++++++++++++++----------------- src/emu/cpu/mips/mips3.h | 50 ++-- src/emu/cpu/mips/mips3drc.c | 79 +---- src/mame/drivers/hng64.c | 8 +- src/mame/drivers/kinst.c | 8 +- src/mame/drivers/namcos23.c | 2 +- src/mame/drivers/seattle.c | 6 +- src/mame/drivers/vegas.c | 6 +- src/mame/machine/n64.c | 14 +- 9 files changed, 359 insertions(+), 374 deletions(-) diff --git a/src/emu/cpu/mips/mips3.c b/src/emu/cpu/mips/mips3.c index 646f010555f..1847012f125 100644 --- a/src/emu/cpu/mips/mips3.c +++ b/src/emu/cpu/mips/mips3.c @@ -148,9 +148,12 @@ mips3_device::mips3_device(const machine_config &mconfig, device_type type, cons , m_pfnmask(0) , m_tlbentries(0) , m_bigendian(endianness == ENDIANNESS_BIG) + , m_byte_xor(m_bigendian ? BYTE4_XOR_BE(0) : BYTE4_XOR_LE(0)) + , m_word_xor(m_bigendian ? WORD_XOR_BE(0) : WORD_XOR_LE(0)) , c_icache_size(0) , c_dcache_size(0) , m_vtlb(NULL) + , m_fastram_select(0) , m_debugger_temp(0) , m_cache(CACHE_SIZE + sizeof(internal_mips3_state)) , m_drcuml(NULL) @@ -161,7 +164,6 @@ mips3_device::mips3_device(const machine_config &mconfig, device_type type, cons , m_nocode(NULL) , m_out_of_cycles(NULL) , m_tlb_mismatch(NULL) - , m_fastram_select(0) , m_hotspot_select(0) { memset(m_fpmode, 0, sizeof(m_fpmode)); @@ -996,12 +998,23 @@ offs_t mips3_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *op TLB HANDLING ***************************************************************************/ -inline int mips3_device::RBYTE(offs_t address, UINT32 *result) +bool mips3_device::RBYTE(offs_t address, UINT32 *result) { - UINT32 tlbval = m_tlb_table[address >> 12]; + const UINT32 tlbval = m_tlb_table[address >> 12]; if (tlbval & VTLB_READ_ALLOWED) { - *result = (*m_memory.read_byte)(*m_program, (tlbval & ~0xfff) | (address & 0xfff)); + const UINT32 tlbaddress = (tlbval & ~0xfff) | (address & 0xfff); + for (int ramnum = 0; ramnum < m_fastram_select; ramnum++) + { + if (tlbaddress < m_fastram[ramnum].start || tlbaddress > m_fastram[ramnum].end) + { + continue; + } + UINT8 *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start; + *result = fastbase[tlbaddress ^ m_byte_xor]; + return true; + } + *result = (*m_memory.read_byte)(*m_program, tlbaddress); } else { @@ -1014,18 +1027,28 @@ inline int mips3_device::RBYTE(offs_t address, UINT32 *result) generate_tlb_exception(EXCEPTION_TLBLOAD_FILL, address); } *result = 0; - return 0; + return false; } - return 1; + return true; } - -inline int mips3_device::RHALF(offs_t address, UINT32 *result) +bool mips3_device::RHALF(offs_t address, UINT32 *result) { - UINT32 tlbval = m_tlb_table[address >> 12]; + const UINT32 tlbval = m_tlb_table[address >> 12]; if (tlbval & VTLB_READ_ALLOWED) { - *result = (*m_memory.read_word)(*m_program, (tlbval & ~0xfff) | (address & 0xfff)); + const UINT32 tlbaddress = (tlbval & ~0xfff) | (address & 0xfff); + for (int ramnum = 0; ramnum < m_fastram_select; ramnum++) + { + if (tlbaddress < m_fastram[ramnum].start || tlbaddress > m_fastram[ramnum].end) + { + continue; + } + UINT8 *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start; + *result = ((UINT16*)fastbase)[(tlbaddress ^ m_word_xor) >> 1]; + return true; + } + *result = (*m_memory.read_word)(*m_program, tlbaddress); } else { @@ -1038,18 +1061,28 @@ inline int mips3_device::RHALF(offs_t address, UINT32 *result) generate_tlb_exception(EXCEPTION_TLBLOAD_FILL, address); } *result = 0; - return 0; + return false; } - return 1; + return true; } - -inline int mips3_device::RWORD(offs_t address, UINT32 *result) +bool mips3_device::RWORD(offs_t address, UINT32 *result) { - UINT32 tlbval = m_tlb_table[address >> 12]; + const UINT32 tlbval = m_tlb_table[address >> 12]; if (tlbval & VTLB_READ_ALLOWED) { - *result = (*m_memory.read_dword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff)); + const UINT32 tlbaddress = (tlbval & ~0xfff) | (address & 0xfff); + for (int ramnum = 0; ramnum < m_fastram_select; ramnum++) + { + if (tlbaddress < m_fastram[ramnum].start || tlbaddress > m_fastram[ramnum].end) + { + continue; + } + UINT8 *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start; + *result = ((UINT32*)fastbase)[tlbaddress >> 2]; + return true; + } + *result = (*m_memory.read_dword)(*m_program, tlbaddress); } else { @@ -1062,15 +1095,14 @@ inline int mips3_device::RWORD(offs_t address, UINT32 *result) generate_tlb_exception(EXCEPTION_TLBLOAD_FILL, address); } *result = 0; - return 0; + return false; } - return 1; + return true; } - -inline int mips3_device::RWORD_MASKED(offs_t address, UINT32 *result, UINT32 mem_mask) +bool mips3_device::RWORD_MASKED(offs_t address, UINT32 *result, UINT32 mem_mask) { - UINT32 tlbval = m_tlb_table[address >> 12]; + const UINT32 tlbval = m_tlb_table[address >> 12]; if (tlbval & VTLB_READ_ALLOWED) { *result = (*m_memory.read_dword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), mem_mask); @@ -1086,15 +1118,14 @@ inline int mips3_device::RWORD_MASKED(offs_t address, UINT32 *result, UINT32 mem generate_tlb_exception(EXCEPTION_TLBLOAD_FILL, address); } *result = 0; - return 0; + return false; } - return 1; + return true; } - -inline int mips3_device::RDOUBLE(offs_t address, UINT64 *result) +bool mips3_device::RDOUBLE(offs_t address, UINT64 *result) { - UINT32 tlbval = m_tlb_table[address >> 12]; + const UINT32 tlbval = m_tlb_table[address >> 12]; if (tlbval & VTLB_READ_ALLOWED) { *result = (*m_memory.read_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff)); @@ -1110,15 +1141,14 @@ inline int mips3_device::RDOUBLE(offs_t address, UINT64 *result) generate_tlb_exception(EXCEPTION_TLBLOAD_FILL, address); } *result = 0; - return 0; + return false; } - return 1; + return true; } - -inline int mips3_device::RDOUBLE_MASKED(offs_t address, UINT64 *result, UINT64 mem_mask) +bool mips3_device::RDOUBLE_MASKED(offs_t address, UINT64 *result, UINT64 mem_mask) { - UINT32 tlbval = m_tlb_table[address >> 12]; + const UINT32 tlbval = m_tlb_table[address >> 12]; if (tlbval & VTLB_READ_ALLOWED) { *result = (*m_memory.read_qword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), mem_mask); @@ -1134,18 +1164,28 @@ inline int mips3_device::RDOUBLE_MASKED(offs_t address, UINT64 *result, UINT64 m generate_tlb_exception(EXCEPTION_TLBLOAD_FILL, address); } *result = 0; - return 0; + return false; } - return 1; + return true; } - -inline void mips3_device::WBYTE(offs_t address, UINT8 data) +void mips3_device::WBYTE(offs_t address, UINT8 data) { - UINT32 tlbval = m_tlb_table[address >> 12]; + const UINT32 tlbval = m_tlb_table[address >> 12]; if (tlbval & VTLB_WRITE_ALLOWED) { - (*m_memory.write_byte)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data); + const UINT32 tlbaddress = (tlbval & ~0xfff) | (address & 0xfff); + for (int ramnum = 0; ramnum < m_fastram_select; ramnum++) + { + if (m_fastram[ramnum].readonly == TRUE || tlbaddress < m_fastram[ramnum].start || tlbaddress > m_fastram[ramnum].end) + { + continue; + } + UINT8 *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start; + fastbase[tlbaddress ^ m_byte_xor] = data; + return; + } + (*m_memory.write_byte)(*m_program, tlbaddress, data); } else { @@ -1164,13 +1204,23 @@ inline void mips3_device::WBYTE(offs_t address, UINT8 data) } } - -inline void mips3_device::WHALF(offs_t address, UINT16 data) +void mips3_device::WHALF(offs_t address, UINT16 data) { - UINT32 tlbval = m_tlb_table[address >> 12]; + const UINT32 tlbval = m_tlb_table[address >> 12]; if (tlbval & VTLB_WRITE_ALLOWED) { - (*m_memory.write_word)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data); + const UINT32 tlbaddress = (tlbval & ~0xfff) | (address & 0xfff); + for (int ramnum = 0; ramnum < m_fastram_select; ramnum++) + { + if (m_fastram[ramnum].readonly == TRUE || tlbaddress < m_fastram[ramnum].start || tlbaddress > m_fastram[ramnum].end) + { + continue; + } + void *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start; + ((UINT16*)fastbase)[(tlbaddress ^ m_word_xor) >> 1] = data; + return; + } + (*m_memory.write_word)(*m_program, tlbaddress, data); } else { @@ -1189,13 +1239,23 @@ inline void mips3_device::WHALF(offs_t address, UINT16 data) } } - -inline void mips3_device::WWORD(offs_t address, UINT32 data) +void mips3_device::WWORD(offs_t address, UINT32 data) { - UINT32 tlbval = m_tlb_table[address >> 12]; + const UINT32 tlbval = m_tlb_table[address >> 12]; if (tlbval & VTLB_WRITE_ALLOWED) { - (*m_memory.write_dword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data); + const UINT32 tlbaddress = (tlbval & ~0xfff) | (address & 0xfff); + for (int ramnum = 0; ramnum < m_fastram_select; ramnum++) + { + if (m_fastram[ramnum].readonly == TRUE || tlbaddress < m_fastram[ramnum].start || tlbaddress > m_fastram[ramnum].end) + { + continue; + } + void *fastbase = (UINT8*)m_fastram[ramnum].base - m_fastram[ramnum].start; + ((UINT32*)fastbase)[tlbaddress >> 2] = data; + return; + } + (*m_memory.write_dword)(*m_program, tlbaddress, data); } else { @@ -1214,10 +1274,9 @@ inline void mips3_device::WWORD(offs_t address, UINT32 data) } } - -inline void mips3_device::WWORD_MASKED(offs_t address, UINT32 data, UINT32 mem_mask) +void mips3_device::WWORD_MASKED(offs_t address, UINT32 data, UINT32 mem_mask) { - UINT32 tlbval = m_tlb_table[address >> 12]; + const UINT32 tlbval = m_tlb_table[address >> 12]; if (tlbval & VTLB_WRITE_ALLOWED) { (*m_memory.write_dword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data, mem_mask); @@ -1239,14 +1298,12 @@ inline void mips3_device::WWORD_MASKED(offs_t address, UINT32 data, UINT32 mem_m } } - -inline void mips3_device::WDOUBLE(offs_t address, UINT64 data) +void mips3_device::WDOUBLE(offs_t address, UINT64 data) { - UINT32 tlbval = m_tlb_table[address >> 12]; - //printf("%08x: %08x\n", (UINT32)address, (UINT32)tlbval); + const UINT32 tlbval = m_tlb_table[address >> 12]; if (tlbval & VTLB_WRITE_ALLOWED) { - (*m_memory.write_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data); + (*m_memory.write_qword)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data); } else { @@ -1265,10 +1322,9 @@ inline void mips3_device::WDOUBLE(offs_t address, UINT64 data) } } - -inline void mips3_device::WDOUBLE_MASKED(offs_t address, UINT64 data, UINT64 mem_mask) +void mips3_device::WDOUBLE_MASKED(offs_t address, UINT64 data, UINT64 mem_mask) { - UINT32 tlbval = m_tlb_table[address >> 12]; + const UINT32 tlbval = m_tlb_table[address >> 12]; if (tlbval & VTLB_WRITE_ALLOWED) { (*m_memory.write_qword_masked)(*m_program, (tlbval & ~0xfff) | (address & 0xfff), data, mem_mask); @@ -1296,7 +1352,7 @@ inline void mips3_device::WDOUBLE_MASKED(offs_t address, UINT64 data, UINT64 mem COP0 (SYSTEM) EXECUTION HANDLING ***************************************************************************/ -inline UINT64 mips3_device::get_cop0_reg(int idx) +UINT64 mips3_device::get_cop0_reg(int idx) { if (idx == COP0_Count) { @@ -1329,7 +1385,7 @@ inline UINT64 mips3_device::get_cop0_reg(int idx) return m_core->cpr[0][idx]; } -inline void mips3_device::set_cop0_reg(int idx, UINT64 val) +void mips3_device::set_cop0_reg(int idx, UINT64 val) { switch (idx) { @@ -1406,7 +1462,7 @@ inline void mips3_device::set_cop0_creg(int idx, UINT64 val) m_core->ccr[0][idx] = val; } -inline void mips3_device::handle_cop0(UINT32 op) +void mips3_device::handle_cop0(UINT32 op) { if ((SR & SR_KSU_MASK) != SR_KSU_KERNEL && !(SR & SR_COP0)) { @@ -1541,7 +1597,7 @@ inline void mips3_device::set_cop1_creg(int idx, UINT64 val) } } -inline void mips3_device::handle_cop1_fr0(UINT32 op) +void mips3_device::handle_cop1_fr0(UINT32 op) { double dtemp; @@ -1900,7 +1956,7 @@ inline void mips3_device::handle_cop1_fr0(UINT32 op) } -inline void mips3_device::handle_cop1_fr1(UINT32 op) +void mips3_device::handle_cop1_fr1(UINT32 op) { double dtemp; @@ -2264,7 +2320,7 @@ inline void mips3_device::handle_cop1_fr1(UINT32 op) COP1X (FPU EXTRA) EXECUTION HANDLING ***************************************************************************/ -inline void mips3_device::handle_cop1x_fr0(UINT32 op) +void mips3_device::handle_cop1x_fr0(UINT32 op) { UINT64 temp64; UINT32 temp; @@ -2342,8 +2398,7 @@ inline void mips3_device::handle_cop1x_fr0(UINT32 op) } } - -inline void mips3_device::handle_cop1x_fr1(UINT32 op) +void mips3_device::handle_cop1x_fr1(UINT32 op) { UINT64 temp64; UINT32 temp; @@ -2447,34 +2502,7 @@ inline void mips3_device::set_cop2_creg(int idx, UINT64 val) m_core->ccr[2][idx] = val; } -inline void mips3_device::handle_integer_divide_by_zero(UINT32 op) -{ - HIVAL64 = (INT32)RSVAL32; - if (m_flavor == MIPS3_TYPE_VR4300) - { - if (RSVAL32 >= 0) - { - LOVAL64 = (INT32)0x7fffffff; - } - else - { - LOVAL64 = (INT32)0x80000001; - } - } - else - { - if (RSVAL32 >= 0) - { - LOVAL64 = -1; - } - else - { - LOVAL64 = 1; - } - } -} - -inline void mips3_device::handle_cop2(UINT32 op) +void mips3_device::handle_cop2(UINT32 op) { if (!(SR & SR_COP2)) { @@ -2526,6 +2554,159 @@ inline void mips3_device::handle_cop2(UINT32 op) CORE EXECUTION LOOP ***************************************************************************/ +void mips3_device::handle_regimm(UINT32 op) +{ + switch (RTREG) + { + case 0x00: /* BLTZ */ if ((INT64)RSVAL64 < 0) ADDPC(SIMMVAL); break; + case 0x01: /* BGEZ */ if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); break; + case 0x02: /* BLTZL */ if ((INT64)RSVAL64 < 0) ADDPC(SIMMVAL); else m_core->pc += 4; break; + case 0x03: /* BGEZL */ if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); else m_core->pc += 4; break; + case 0x08: /* TGEI */ if ((INT64)RSVAL64 >= SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; + case 0x09: /* TGEIU */ if (RSVAL64 >= UIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; + case 0x0a: /* TLTI */ if ((INT64)RSVAL64 < SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; + case 0x0b: /* TLTIU */ if (RSVAL64 >= UIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; + case 0x0c: /* TEQI */ if (RSVAL64 == UIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; + case 0x0e: /* TNEI */ if (RSVAL64 != UIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; + case 0x10: /* BLTZAL */ if ((INT64)RSVAL64 < 0) ADDPCL(SIMMVAL,31); break; + case 0x11: /* BGEZAL */ if ((INT64)RSVAL64 >= 0) ADDPCL(SIMMVAL,31); break; + case 0x12: /* BLTZALL */ if ((INT64)RSVAL64 < 0) ADDPCL(SIMMVAL,31) else m_core->pc += 4; break; + case 0x13: /* BGEZALL */ if ((INT64)RSVAL64 >= 0) ADDPCL(SIMMVAL,31) else m_core->pc += 4; break; + default: /* ??? */ invalid_instruction(op); break; + } +} + +void mips3_device::handle_special(UINT32 op) +{ + switch (op & 63) + { + case 0x00: /* SLL */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 << SHIFT); break; + case 0x01: /* MOVF - R5000*/if (RDREG && GET_FCC((op >> 18) & 7) == ((op >> 16) & 1)) RDVAL64 = RSVAL64; break; + case 0x02: /* SRL */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 >> SHIFT); break; + case 0x03: /* SRA */ if (RDREG) RDVAL64 = (INT32)RTVAL32 >> SHIFT; break; + case 0x04: /* SLLV */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 << (RSVAL32 & 31)); break; + case 0x06: /* SRLV */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 >> (RSVAL32 & 31)); break; + case 0x07: /* SRAV */ if (RDREG) RDVAL64 = (INT32)RTVAL32 >> (RSVAL32 & 31); break; + case 0x08: /* JR */ SETPC(RSVAL32); break; + case 0x09: /* JALR */ SETPCL(RSVAL32,RDREG); break; + case 0x0a: /* MOVZ - R5000 */if (RTVAL64 == 0) { if (RDREG) RDVAL64 = RSVAL64; } break; + case 0x0b: /* MOVN - R5000 */if (RTVAL64 != 0) { if (RDREG) RDVAL64 = RSVAL64; } break; + case 0x0c: /* SYSCALL */ generate_exception(EXCEPTION_SYSCALL, 1); break; + case 0x0d: /* BREAK */ generate_exception(EXCEPTION_BREAK, 1); break; + case 0x0f: /* SYNC */ /* effective no-op */ break; + case 0x10: /* MFHI */ if (RDREG) RDVAL64 = HIVAL64; break; + case 0x11: /* MTHI */ HIVAL64 = RSVAL64; break; + case 0x12: /* MFLO */ if (RDREG) RDVAL64 = LOVAL64; break; + case 0x13: /* MTLO */ LOVAL64 = RSVAL64; break; + case 0x14: /* DSLLV */ if (RDREG) RDVAL64 = RTVAL64 << (RSVAL32 & 63); break; + case 0x16: /* DSRLV */ if (RDREG) RDVAL64 = RTVAL64 >> (RSVAL32 & 63); break; + case 0x17: /* DSRAV */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> (RSVAL32 & 63); break; + case 0x18: /* MULT */ + { + UINT64 temp64 = (INT64)(INT32)RSVAL32 * (INT64)(INT32)RTVAL32; + LOVAL64 = (INT32)temp64; + HIVAL64 = (INT32)(temp64 >> 32); + m_core->icount -= 3; + break; + } + case 0x19: /* MULTU */ + { + UINT64 temp64 = (UINT64)RSVAL32 * (UINT64)RTVAL32; + LOVAL64 = (INT32)temp64; + HIVAL64 = (INT32)(temp64 >> 32); + m_core->icount -= 3; + break; + } + case 0x1a: /* DIV */ + if (RTVAL32) + { + LOVAL64 = (INT32)((INT32)RSVAL32 / (INT32)RTVAL32); + HIVAL64 = (INT32)((INT32)RSVAL32 % (INT32)RTVAL32); + } + m_core->icount -= 35; + break; + case 0x1b: /* DIVU */ + if (RTVAL32) + { + LOVAL64 = (INT32)(RSVAL32 / RTVAL32); + HIVAL64 = (INT32)(RSVAL32 % RTVAL32); + } + m_core->icount -= 35; + break; + case 0x1c: /* DMULT */ + { + UINT64 temp64 = (INT64)RSVAL64 * (INT64)RTVAL64; + LOVAL64 = temp64; + HIVAL64 = (INT64)temp64 >> 63; + m_core->icount -= 7; + break; + } + case 0x1d: /* DMULTU */ + { + UINT64 temp64 = (UINT64)RSVAL64 * (UINT64)RTVAL64; + LOVAL64 = temp64; + HIVAL64 = 0; + m_core->icount -= 7; + break; + } + case 0x1e: /* DDIV */ + if (RTVAL64) + { + LOVAL64 = (INT64)RSVAL64 / (INT64)RTVAL64; + HIVAL64 = (INT64)RSVAL64 % (INT64)RTVAL64; + } + m_core->icount -= 67; + break; + case 0x1f: /* DDIVU */ + if (RTVAL64) + { + LOVAL64 = RSVAL64 / RTVAL64; + HIVAL64 = RSVAL64 % RTVAL64; + } + m_core->icount -= 67; + break; + case 0x20: /* ADD */ + if (ENABLE_OVERFLOWS && RSVAL32 > ~RTVAL32) generate_exception(EXCEPTION_OVERFLOW, 1); + else if (RDREG) RDVAL64 = (INT32)(RSVAL32 + RTVAL32); + break; + case 0x21: /* ADDU */ if (RDREG) RDVAL64 = (INT32)(RSVAL32 + RTVAL32); break; + case 0x22: /* SUB */ + if (ENABLE_OVERFLOWS && RSVAL32 < RTVAL32) generate_exception(EXCEPTION_OVERFLOW, 1); + else if (RDREG) RDVAL64 = (INT32)(RSVAL32 - RTVAL32); + break; + case 0x23: /* SUBU */ if (RDREG) RDVAL64 = (INT32)(RSVAL32 - RTVAL32); break; + case 0x24: /* AND */ if (RDREG) RDVAL64 = RSVAL64 & RTVAL64; break; + case 0x25: /* OR */ if (RDREG) RDVAL64 = RSVAL64 | RTVAL64; break; + case 0x26: /* XOR */ if (RDREG) RDVAL64 = RSVAL64 ^ RTVAL64; break; + case 0x27: /* NOR */ if (RDREG) RDVAL64 = ~(RSVAL64 | RTVAL64); break; + case 0x2a: /* SLT */ if (RDREG) RDVAL64 = (INT64)RSVAL64 < (INT64)RTVAL64; break; + case 0x2b: /* SLTU */ if (RDREG) RDVAL64 = (UINT64)RSVAL64 < (UINT64)RTVAL64; break; + case 0x2c: /* DADD */ + if (ENABLE_OVERFLOWS && RSVAL64 > ~RTVAL64) generate_exception(EXCEPTION_OVERFLOW, 1); + else if (RDREG) RDVAL64 = RSVAL64 + RTVAL64; + break; + case 0x2d: /* DADDU */ if (RDREG) RDVAL64 = RSVAL64 + RTVAL64; break; + case 0x2e: /* DSUB */ + if (ENABLE_OVERFLOWS && RSVAL64 < RTVAL64) generate_exception(EXCEPTION_OVERFLOW, 1); + else if (RDREG) RDVAL64 = RSVAL64 - RTVAL64; + break; + case 0x2f: /* DSUBU */ if (RDREG) RDVAL64 = RSVAL64 - RTVAL64; break; + case 0x30: /* TGE */ if ((INT64)RSVAL64 >= (INT64)RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break; + case 0x31: /* TGEU */ if (RSVAL64 >= RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break; + case 0x32: /* TLT */ if ((INT64)RSVAL64 < (INT64)RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break; + case 0x33: /* TLTU */ if (RSVAL64 < RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break; + case 0x34: /* TEQ */ if (RSVAL64 == RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break; + case 0x36: /* TNE */ if (RSVAL64 != RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break; + case 0x38: /* DSLL */ if (RDREG) RDVAL64 = RTVAL64 << SHIFT; break; + case 0x3a: /* DSRL */ if (RDREG) RDVAL64 = RTVAL64 >> SHIFT; break; + case 0x3b: /* DSRA */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> SHIFT; break; + case 0x3c: /* DSLL32 */ if (RDREG) RDVAL64 = RTVAL64 << (SHIFT + 32); break; + case 0x3e: /* DSRL32 */ if (RDREG) RDVAL64 = RTVAL64 >> (SHIFT + 32); break; + case 0x3f: /* DSRA32 */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> (SHIFT + 32); break; + default: /* ??? */ invalid_instruction(op); break; + } +} + void mips3_device::execute_run() { if (m_isdrc) @@ -2602,154 +2783,11 @@ void mips3_device::execute_run() switch (op >> 26) { case 0x00: /* SPECIAL */ - switch (op & 63) - { - case 0x00: /* SLL */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 << SHIFT); break; - case 0x01: /* MOVF - R5000*/if (RDREG && GET_FCC((op >> 18) & 7) == ((op >> 16) & 1)) RDVAL64 = RSVAL64; break; - case 0x02: /* SRL */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 >> SHIFT); break; - case 0x03: /* SRA */ if (RDREG) RDVAL64 = (INT32)RTVAL32 >> SHIFT; break; - case 0x04: /* SLLV */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 << (RSVAL32 & 31)); break; - case 0x06: /* SRLV */ if (RDREG) RDVAL64 = (INT32)(RTVAL32 >> (RSVAL32 & 31)); break; - case 0x07: /* SRAV */ if (RDREG) RDVAL64 = (INT32)RTVAL32 >> (RSVAL32 & 31); break; - case 0x08: /* JR */ SETPC(RSVAL32); break; - case 0x09: /* JALR */ SETPCL(RSVAL32,RDREG); break; - case 0x0a: /* MOVZ - R5000 */if (RTVAL64 == 0) { if (RDREG) RDVAL64 = RSVAL64; } break; - case 0x0b: /* MOVN - R5000 */if (RTVAL64 != 0) { if (RDREG) RDVAL64 = RSVAL64; } break; - case 0x0c: /* SYSCALL */ generate_exception(EXCEPTION_SYSCALL, 1); break; - case 0x0d: /* BREAK */ generate_exception(EXCEPTION_BREAK, 1); break; - case 0x0f: /* SYNC */ /* effective no-op */ break; - case 0x10: /* MFHI */ if (RDREG) RDVAL64 = HIVAL64; break; - case 0x11: /* MTHI */ HIVAL64 = RSVAL64; break; - case 0x12: /* MFLO */ if (RDREG) RDVAL64 = LOVAL64; break; - case 0x13: /* MTLO */ LOVAL64 = RSVAL64; break; - case 0x14: /* DSLLV */ if (RDREG) RDVAL64 = RTVAL64 << (RSVAL32 & 63); break; - case 0x16: /* DSRLV */ if (RDREG) RDVAL64 = RTVAL64 >> (RSVAL32 & 63); break; - case 0x17: /* DSRAV */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> (RSVAL32 & 63); break; - case 0x18: /* MULT */ - temp64 = (INT64)(INT32)RSVAL32 * (INT64)(INT32)RTVAL32; - LOVAL64 = (INT32)temp64; - HIVAL64 = (INT32)(temp64 >> 32); - m_core->icount -= 3; - break; - case 0x19: /* MULTU */ - temp64 = (UINT64)RSVAL32 * (UINT64)RTVAL32; - LOVAL64 = (INT32)temp64; - HIVAL64 = (INT32)(temp64 >> 32); - m_core->icount -= 3; - break; - case 0x1a: /* DIV */ - if (RTVAL32) - { - LOVAL64 = (INT32)((INT32)RSVAL32 / (INT32)RTVAL32); - HIVAL64 = (INT32)((INT32)RSVAL32 % (INT32)RTVAL32); - } - else - { - handle_integer_divide_by_zero(op); - } - m_core->icount -= 35; - break; - case 0x1b: /* DIVU */ - if (RTVAL32) - { - LOVAL64 = (INT32)(RSVAL32 / RTVAL32); - HIVAL64 = (INT32)(RSVAL32 % RTVAL32); - } - else - { - handle_integer_divide_by_zero(op); - } - m_core->icount -= 35; - break; - case 0x1c: /* DMULT */ - temp64 = (INT64)RSVAL64 * (INT64)RTVAL64; - LOVAL64 = temp64; - HIVAL64 = (INT64)temp64 >> 63; - m_core->icount -= 7; - break; - case 0x1d: /* DMULTU */ - temp64 = (UINT64)RSVAL64 * (UINT64)RTVAL64; - LOVAL64 = temp64; - HIVAL64 = 0; - m_core->icount -= 7; - break; - case 0x1e: /* DDIV */ - if (RTVAL64) - { - LOVAL64 = (INT64)RSVAL64 / (INT64)RTVAL64; - HIVAL64 = (INT64)RSVAL64 % (INT64)RTVAL64; - } - m_core->icount -= 67; - break; - case 0x1f: /* DDIVU */ - if (RTVAL64) - { - LOVAL64 = RSVAL64 / RTVAL64; - HIVAL64 = RSVAL64 % RTVAL64; - } - m_core->icount -= 67; - break; - case 0x20: /* ADD */ - if (ENABLE_OVERFLOWS && RSVAL32 > ~RTVAL32) generate_exception(EXCEPTION_OVERFLOW, 1); - else if (RDREG) RDVAL64 = (INT32)(RSVAL32 + RTVAL32); - break; - case 0x21: /* ADDU */ if (RDREG) RDVAL64 = (INT32)(RSVAL32 + RTVAL32); break; - case 0x22: /* SUB */ - if (ENABLE_OVERFLOWS && RSVAL32 < RTVAL32) generate_exception(EXCEPTION_OVERFLOW, 1); - else if (RDREG) RDVAL64 = (INT32)(RSVAL32 - RTVAL32); - break; - case 0x23: /* SUBU */ if (RDREG) RDVAL64 = (INT32)(RSVAL32 - RTVAL32); break; - case 0x24: /* AND */ if (RDREG) RDVAL64 = RSVAL64 & RTVAL64; break; - case 0x25: /* OR */ if (RDREG) RDVAL64 = RSVAL64 | RTVAL64; break; - case 0x26: /* XOR */ if (RDREG) RDVAL64 = RSVAL64 ^ RTVAL64; break; - case 0x27: /* NOR */ if (RDREG) RDVAL64 = ~(RSVAL64 | RTVAL64); break; - case 0x2a: /* SLT */ if (RDREG) RDVAL64 = (INT64)RSVAL64 < (INT64)RTVAL64; break; - case 0x2b: /* SLTU */ if (RDREG) RDVAL64 = (UINT64)RSVAL64 < (UINT64)RTVAL64; break; - case 0x2c: /* DADD */ - if (ENABLE_OVERFLOWS && RSVAL64 > ~RTVAL64) generate_exception(EXCEPTION_OVERFLOW, 1); - else if (RDREG) RDVAL64 = RSVAL64 + RTVAL64; - break; - case 0x2d: /* DADDU */ if (RDREG) RDVAL64 = RSVAL64 + RTVAL64; break; - case 0x2e: /* DSUB */ - if (ENABLE_OVERFLOWS && RSVAL64 < RTVAL64) generate_exception(EXCEPTION_OVERFLOW, 1); - else if (RDREG) RDVAL64 = RSVAL64 - RTVAL64; - break; - case 0x2f: /* DSUBU */ if (RDREG) RDVAL64 = RSVAL64 - RTVAL64; break; - case 0x30: /* TGE */ if ((INT64)RSVAL64 >= (INT64)RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break; - case 0x31: /* TGEU */ if (RSVAL64 >= RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break; - case 0x32: /* TLT */ if ((INT64)RSVAL64 < (INT64)RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break; - case 0x33: /* TLTU */ if (RSVAL64 < RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break; - case 0x34: /* TEQ */ if (RSVAL64 == RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break; - case 0x36: /* TNE */ if (RSVAL64 != RTVAL64) generate_exception(EXCEPTION_TRAP, 1); break; - case 0x38: /* DSLL */ if (RDREG) RDVAL64 = RTVAL64 << SHIFT; break; - case 0x3a: /* DSRL */ if (RDREG) RDVAL64 = RTVAL64 >> SHIFT; break; - case 0x3b: /* DSRA */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> SHIFT; break; - case 0x3c: /* DSLL32 */ if (RDREG) RDVAL64 = RTVAL64 << (SHIFT + 32); break; - case 0x3e: /* DSRL32 */ if (RDREG) RDVAL64 = RTVAL64 >> (SHIFT + 32); break; - case 0x3f: /* DSRA32 */ if (RDREG) RDVAL64 = (INT64)RTVAL64 >> (SHIFT + 32); break; - default: /* ??? */ invalid_instruction(op); break; - } + handle_special(op); break; case 0x01: /* REGIMM */ - switch (RTREG) - { - case 0x00: /* BLTZ */ if ((INT64)RSVAL64 < 0) ADDPC(SIMMVAL); break; - case 0x01: /* BGEZ */ if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); break; - case 0x02: /* BLTZL */ if ((INT64)RSVAL64 < 0) ADDPC(SIMMVAL); else m_core->pc += 4; break; - case 0x03: /* BGEZL */ if ((INT64)RSVAL64 >= 0) ADDPC(SIMMVAL); else m_core->pc += 4; break; - case 0x08: /* TGEI */ if ((INT64)RSVAL64 >= SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; - case 0x09: /* TGEIU */ if (RSVAL64 >= UIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; - case 0x0a: /* TLTI */ if ((INT64)RSVAL64 < SIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; - case 0x0b: /* TLTIU */ if (RSVAL64 >= UIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; - case 0x0c: /* TEQI */ if (RSVAL64 == UIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; - case 0x0e: /* TNEI */ if (RSVAL64 != UIMMVAL) generate_exception(EXCEPTION_TRAP, 1); break; - case 0x10: /* BLTZAL */ if ((INT64)RSVAL64 < 0) ADDPCL(SIMMVAL,31); break; - case 0x11: /* BGEZAL */ if ((INT64)RSVAL64 >= 0) ADDPCL(SIMMVAL,31); break; - case 0x12: /* BLTZALL */ if ((INT64)RSVAL64 < 0) ADDPCL(SIMMVAL,31) else m_core->pc += 4; break; - case 0x13: /* BGEZALL */ if ((INT64)RSVAL64 >= 0) ADDPCL(SIMMVAL,31) else m_core->pc += 4; break; - default: /* ??? */ invalid_instruction(op); break; - } + handle_regimm(op); break; case 0x02: /* J */ ABSPC(LIMMVAL); break; @@ -2819,34 +2857,34 @@ void mips3_device::execute_run() case 0x36: /* LDC2 */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64)) set_cop2_reg(RTREG, temp64); break; case 0x37: /* LD */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64) && RTREG) RTVAL64 = temp64; break; case 0x38: /* SC */ if (RWORD(SIMMVAL+RSVAL32, &temp) && RTREG) - { - if (temp == m_ll_value) - { - WWORD(SIMMVAL+RSVAL32, RTVAL32); - RTVAL64 = (UINT32)1; - } - else - { - RTVAL64 = (UINT32)0; - } - } - break; + { + if (temp == m_ll_value) + { + WWORD(SIMMVAL+RSVAL32, RTVAL32); + RTVAL64 = (UINT32)1; + } + else + { + RTVAL64 = (UINT32)0; + } + } + break; case 0x39: /* SWC1 */ WWORD(SIMMVAL+RSVAL32, get_cop1_reg32(RTREG)); break; case 0x3a: /* SWC2 */ WWORD(SIMMVAL+RSVAL32, get_cop2_reg(RTREG)); break; case 0x3b: /* SWC3 */ invalid_instruction(op); break; case 0x3c: /* SCD */ if (RDOUBLE(SIMMVAL+RSVAL32, &temp64) && RTREG) - { - if (temp64 == m_lld_value) - { - WDOUBLE(SIMMVAL+RSVAL32, RTVAL64); - RTVAL64 = 1; - } - else - { - RTVAL64 = 0; - } - } - break; + { + if (temp64 == m_lld_value) + { + WDOUBLE(SIMMVAL+RSVAL32, RTVAL64); + RTVAL64 = 1; + } + else + { + RTVAL64 = 0; + } + } + break; case 0x3d: /* SDC1 */ WDOUBLE(SIMMVAL+RSVAL32, get_cop1_reg64(RTREG)); break; case 0x3e: /* SDC2 */ WDOUBLE(SIMMVAL+RSVAL32, get_cop2_reg(RTREG)); break; case 0x3f: /* SD */ WDOUBLE(SIMMVAL+RSVAL32, RTVAL64); break; diff --git a/src/emu/cpu/mips/mips3.h b/src/emu/cpu/mips/mips3.h index 5a95b87823e..29759fe8471 100644 --- a/src/emu/cpu/mips/mips3.h +++ b/src/emu/cpu/mips/mips3.h @@ -194,7 +194,7 @@ enum MIPS3_BADVADDR }; -#define MIPS3_MAX_FASTRAM 4 +#define MIPS3_MAX_FASTRAM 3 #define MIPS3_MAX_HOTSPOTS 16 enum @@ -296,8 +296,9 @@ public: TIMER_CALLBACK_MEMBER(compare_int_callback); + void add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base); + void mips3drc_set_options(UINT32 options); - void mips3drc_add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base); void mips3drc_add_hotspot(offs_t pc, UINT32 opcode, UINT32 cycles); protected: @@ -326,6 +327,7 @@ protected: virtual UINT32 disasm_max_opcode_bytes() const { return 4; } virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options); + private: struct internal_mips3_state { @@ -394,6 +396,8 @@ private: /* memory accesses */ bool m_bigendian; + UINT32 m_byte_xor; + UINT32 m_word_xor; data_accessors m_memory; /* cache memory */ @@ -404,6 +408,16 @@ private: vtlb_state * m_vtlb; mips3_tlb_entry m_tlb[MIPS3_MAX_TLB_ENTRIES]; + /* fast RAM */ + UINT32 m_fastram_select; + struct + { + offs_t start; /* start of the RAM block */ + offs_t end; /* end of the RAM block */ + UINT8 readonly; /* TRUE if read-only */ + void * base; /* base in memory where the RAM lives */ + } m_fastram[MIPS3_MAX_FASTRAM]; + UINT64 m_debugger_temp; /* core state */ @@ -442,16 +456,6 @@ private: uml::code_handle * m_exception[18/*EXCEPTION_COUNT*/]; /* array of exception handlers */ uml::code_handle * m_exception_norecover[18/*EXCEPTION_COUNT*/]; /* array of no-recover exception handlers */ - /* fast RAM */ - UINT32 m_fastram_select; - struct - { - offs_t start; /* start of the RAM block */ - offs_t end; /* end of the RAM block */ - UINT8 readonly; /* TRUE if read-only */ - void * base; /* base in memory where the RAM lives */ - } m_fastram[MIPS3_MAX_FASTRAM]; - /* hotspots */ UINT32 m_hotspot_select; struct @@ -477,25 +481,29 @@ public: private: UINT32 compute_config_register(); UINT32 compute_prid_register(); + void tlb_map_entry(int tlbindex); void tlb_write_common(int tlbindex); - int RBYTE(offs_t address, UINT32 *result); - int RHALF(offs_t address, UINT32 *result); - int RWORD(offs_t address, UINT32 *result); - int RWORD_MASKED(offs_t address, UINT32 *result, UINT32 mem_mask); - int RDOUBLE(offs_t address, UINT64 *result); - int RDOUBLE_MASKED(offs_t address, UINT64 *result, UINT64 mem_mask); + + bool RBYTE(offs_t address, UINT32 *result); + bool RHALF(offs_t address, UINT32 *result); + bool RWORD(offs_t address, UINT32 *result); + bool RWORD_MASKED(offs_t address, UINT32 *result, UINT32 mem_mask); + bool RDOUBLE(offs_t address, UINT64 *result); + bool RDOUBLE_MASKED(offs_t address, UINT64 *result, UINT64 mem_mask); void WBYTE(offs_t address, UINT8 data); void WHALF(offs_t address, UINT16 data); void WWORD(offs_t address, UINT32 data); void WWORD_MASKED(offs_t address, UINT32 data, UINT32 mem_mask); void WDOUBLE(offs_t address, UINT64 data); void WDOUBLE_MASKED(offs_t address, UINT64 data, UINT64 mem_mask); + UINT64 get_cop0_reg(int idx); void set_cop0_reg(int idx, UINT64 val); UINT64 get_cop0_creg(int idx); void set_cop0_creg(int idx, UINT64 val); void handle_cop0(UINT32 op); + UINT32 get_cop1_reg32(int idx); UINT64 get_cop1_reg64(int idx); void set_cop1_reg32(int idx, UINT32 val); @@ -506,12 +514,16 @@ private: void handle_cop1_fr1(UINT32 op); void handle_cop1x_fr0(UINT32 op); void handle_cop1x_fr1(UINT32 op); + UINT64 get_cop2_reg(int idx); void set_cop2_reg(int idx, UINT64 val); UINT64 get_cop2_creg(int idx); void set_cop2_creg(int idx, UINT64 val); void handle_cop2(UINT32 op); - void handle_integer_divide_by_zero(UINT32 op); + + void handle_special(UINT32 op); + void handle_regimm(UINT32 op); + void lwl_be(UINT32 op); void lwr_be(UINT32 op); void ldl_be(UINT32 op); diff --git a/src/emu/cpu/mips/mips3drc.c b/src/emu/cpu/mips/mips3drc.c index 1800913fed6..c1ade211c67 100644 --- a/src/emu/cpu/mips/mips3drc.c +++ b/src/emu/cpu/mips/mips3drc.c @@ -160,9 +160,8 @@ void mips3_device::mips3drc_set_options(UINT32 options) region -------------------------------------------------*/ -void mips3_device::mips3drc_add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base) +void mips3_device::add_fastram(offs_t start, offs_t end, UINT8 readonly, void *base) { - if (!machine().options().drc()) return; if (m_fastram_select < ARRAY_LENGTH(m_fastram)) { m_fastram[m_fastram_select].start = start; @@ -2054,79 +2053,15 @@ int mips3_device::generate_special(drcuml_block *block, compiler_state *compiler return TRUE; case 0x1a: /* DIV - MIPS I */ - { - if (m_drcoptions & MIPS3DRC_ACCURATE_DIVZERO) - { - code_label divzero, done; - - UML_CMP(block, R32(RTREG), 0); // cmp , 0 - UML_JMPc(block, COND_E, divzero = compiler->labelnum++); // jmp divzero,E - - UML_DIVS(block, I0, I1, R32(RSREG), R32(RTREG)); // divs i0,i1,, - UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword - UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword - UML_JMP(block, done = compiler->labelnum++); // jmp done - - UML_LABEL(block, divzero); // divzero: - if (m_flavor != MIPS3_TYPE_VR4300) - { - UML_MOVc(block, COND_L, I0, 0x00000001); // mov i0,0x00000001,L - UML_MOVc(block, COND_GE, I0, 0xffffffff); // mov i0,0xffffffff,GE - } - else - { - UML_MOVc(block, COND_L, I0, 0x80000001); // mov i0,0x80000001,L - UML_MOVc(block, COND_GE, I0, 0x7fffffff); // mov i0,0x7fffffff,GE - } - UML_DSEXT(block, HI64, R32(RSREG), SIZE_DWORD); // dsext hi,,dword - UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword - - UML_LABEL(block, done); // done: - } - else - { - UML_DIVS(block, I0, I1, R32(RSREG), R32(RTREG)); // divs i0,i1,, - UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword - UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword - } + UML_DIVS(block, I0, I1, R32(RSREG), R32(RTREG)); // divs i0,i1,, + UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword + UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword return TRUE; - } case 0x1b: /* DIVU - MIPS I */ - if (m_drcoptions & MIPS3DRC_ACCURATE_DIVZERO) - { - code_label divzero, done; - - UML_CMP(block, R32(RTREG), 0); // cmp , 0 - UML_JMPc(block, COND_E, divzero = compiler->labelnum++); // jmp divzero,E - - UML_DIVU(block, I0, I1, R32(RSREG), R32(RTREG)); // divu i0,i1,, - UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword - UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword - UML_JMP(block, done = compiler->labelnum++); // jmp done - - UML_LABEL(block, divzero); // divzero: - if (m_flavor != MIPS3_TYPE_VR4300) - { - UML_MOVc(block, COND_L, I0, 0x00000001); // mov i0,0x00000001,L - UML_MOVc(block, COND_GE, I0, 0xffffffff); // mov i0,0xffffffff,GE - } - else - { - UML_MOVc(block, COND_L, I0, 0x80000001); // mov i0,0x80000001,L - UML_MOVc(block, COND_GE, I0, 0x7fffffff); // mov i0,0x7fffffff,GE - } - UML_DSEXT(block, HI64, R32(RSREG), SIZE_DWORD); // dsext hi,,dword - UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword - - UML_LABEL(block, done); // done: - } - else - { - UML_DIVU(block, I0, I1, R32(RSREG), R32(RTREG)); // divu i0,i1,, - UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword - UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword - } + UML_DIVU(block, I0, I1, R32(RSREG), R32(RTREG)); // divu i0,i1,, + UML_DSEXT(block, LO64, I0, SIZE_DWORD); // dsext lo,i0,dword + UML_DSEXT(block, HI64, I1, SIZE_DWORD); // dsext hi,i1,dword return TRUE; case 0x1e: /* DDIV - MIPS III */ diff --git a/src/mame/drivers/hng64.c b/src/mame/drivers/hng64.c index 0b01b59c823..7046dccd0c6 100644 --- a/src/mame/drivers/hng64.c +++ b/src/mame/drivers/hng64.c @@ -1490,10 +1490,10 @@ void hng64_state::machine_start() /* set the fastest DRC options */ m_maincpu->mips3drc_set_options(MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY); - /* configure fast RAM regions for DRC */ - m_maincpu->mips3drc_add_fastram(0x00000000, 0x00ffffff, FALSE, m_mainram); - m_maincpu->mips3drc_add_fastram(0x04000000, 0x05ffffff, TRUE, m_cart); - m_maincpu->mips3drc_add_fastram(0x1fc00000, 0x1fc7ffff, TRUE, m_rombase); + /* configure fast RAM regions */ + m_maincpu->add_fastram(0x00000000, 0x00ffffff, FALSE, m_mainram); + m_maincpu->add_fastram(0x04000000, 0x05ffffff, TRUE, m_cart); + m_maincpu->add_fastram(0x1fc00000, 0x1fc7ffff, TRUE, m_rombase); m_comm_rom = memregion("user2")->base(); m_comm_ram = auto_alloc_array(machine(),UINT8,0x10000); diff --git a/src/mame/drivers/kinst.c b/src/mame/drivers/kinst.c index f613c7f8a0d..c87d33efb6f 100644 --- a/src/mame/drivers/kinst.c +++ b/src/mame/drivers/kinst.c @@ -203,10 +203,10 @@ void kinst_state::machine_start() /* set the fastest DRC options */ m_maincpu->mips3drc_set_options(MIPS3DRC_FASTEST_OPTIONS); - /* configure fast RAM regions for DRC */ - m_maincpu->mips3drc_add_fastram(0x08000000, 0x087fffff, FALSE, m_rambase2); - m_maincpu->mips3drc_add_fastram(0x00000000, 0x0007ffff, FALSE, m_rambase); - m_maincpu->mips3drc_add_fastram(0x1fc00000, 0x1fc7ffff, TRUE, m_rombase); + /* configure fast RAM regions */ + m_maincpu->add_fastram(0x08000000, 0x087fffff, FALSE, m_rambase2); + m_maincpu->add_fastram(0x00000000, 0x0007ffff, FALSE, m_rambase); + m_maincpu->add_fastram(0x1fc00000, 0x1fc7ffff, TRUE, m_rombase); } diff --git a/src/mame/drivers/namcos23.c b/src/mame/drivers/namcos23.c index 6f7088672df..d3d2d988edd 100644 --- a/src/mame/drivers/namcos23.c +++ b/src/mame/drivers/namcos23.c @@ -3223,7 +3223,7 @@ void namcos23_state::machine_start() m_c361.timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(namcos23_state::c361_timer_cb),this)); m_c361.timer->adjust(attotime::never); - m_maincpu->mips3drc_add_fastram(0, m_mainram.bytes()-1, FALSE, reinterpret_cast(memshare("mainram")->ptr())); + m_maincpu->add_fastram(0, m_mainram.bytes()-1, FALSE, reinterpret_cast(memshare("mainram")->ptr())); } diff --git a/src/mame/drivers/seattle.c b/src/mame/drivers/seattle.c index 1b846ac620c..240ed6de3ad 100644 --- a/src/mame/drivers/seattle.c +++ b/src/mame/drivers/seattle.c @@ -566,9 +566,9 @@ void seattle_state::machine_start() /* set the fastest DRC options, but strict verification */ m_maincpu->mips3drc_set_options(MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY); - /* configure fast RAM regions for DRC */ - m_maincpu->mips3drc_add_fastram(0x00000000, 0x007fffff, FALSE, m_rambase); - m_maincpu->mips3drc_add_fastram(0x1fc00000, 0x1fc7ffff, TRUE, m_rombase); + /* configure fast RAM regions */ + m_maincpu->add_fastram(0x00000000, 0x007fffff, FALSE, m_rambase); + m_maincpu->add_fastram(0x1fc00000, 0x1fc7ffff, TRUE, m_rombase); /* register for save states */ save_item(NAME(m_galileo.reg)); diff --git a/src/mame/drivers/vegas.c b/src/mame/drivers/vegas.c index 2594138895b..ba3ebe5ee0f 100644 --- a/src/mame/drivers/vegas.c +++ b/src/mame/drivers/vegas.c @@ -595,9 +595,9 @@ void vegas_state::machine_start() /* set the fastest DRC options, but strict verification */ m_maincpu->mips3drc_set_options(MIPS3DRC_FASTEST_OPTIONS + MIPS3DRC_STRICT_VERIFY + MIPS3DRC_FLUSH_PC); - /* configure fast RAM regions for DRC */ - m_maincpu->mips3drc_add_fastram(0x00000000, m_rambase.bytes() - 1, FALSE, m_rambase); - m_maincpu->mips3drc_add_fastram(0x1fc00000, 0x1fc7ffff, TRUE, m_rombase); + /* configure fast RAM regions */ + m_maincpu->add_fastram(0x00000000, m_rambase.bytes() - 1, FALSE, m_rambase); + m_maincpu->add_fastram(0x1fc00000, 0x1fc7ffff, TRUE, m_rombase); /* register for save states */ save_item(NAME(m_nile_irq_state)); diff --git a/src/mame/machine/n64.c b/src/mame/machine/n64.c index b7bf5164cda..9411a807e5b 100644 --- a/src/mame/machine/n64.c +++ b/src/mame/machine/n64.c @@ -1458,7 +1458,7 @@ void n64_periphs::pi_dma_tick() //pi_status |= 8; // Set INTERRUPT ?? Does this bit exist ?? if(update_bm) - dd_update_bm(); + dd_update_bm(); signal_rcp_interrupt(PI_INTERRUPT); @@ -2189,7 +2189,7 @@ void n64_periphs::dd_update_bm() { if(((dd_track_reg & 0xFFF) == 6) && (dd_start_block == 0)) { - dd_status_reg &= ~DD_ASIC_STATUS_DREQ; + dd_status_reg &= ~DD_ASIC_STATUS_DREQ; } else if(dd_current_reg < SECTORS_PER_BLOCK) { @@ -2239,7 +2239,7 @@ void n64_periphs::dd_write_sector() sector += (dd_current_reg - 1) * ddZoneSecSize[dd_zone]; //logerror("Write Block %d, Sector %d\n", dd_start_block, dd_current_reg - 1); - + for(int i = 0; i < ddZoneSecSize[dd_zone]/4; i++) { sector[i*4 + 0] = (dd_sector_data[i] >> 24) & 0xFF; @@ -2492,12 +2492,12 @@ WRITE32_MEMBER( n64_periphs::dd_reg_w ) logerror("dd BM Status write\n"); dd_start_sector = (data >> 16) & 0xFF; if(dd_start_sector == 0x00) - { + { dd_start_block = 0; dd_current_reg = 0; } else if (dd_start_sector == 0x5A) - { + { dd_start_block = 1; dd_current_reg = 0; } @@ -2620,8 +2620,8 @@ void n64_state::machine_start() dynamic_cast(machine().device("maincpu"))->mips3drc_set_options(MIPS3DRC_COMPATIBLE_OPTIONS); - /* configure fast RAM regions for DRC */ - dynamic_cast(machine().device("maincpu"))->mips3drc_add_fastram(0x00000000, 0x007fffff, FALSE, rdram); + /* configure fast RAM regions */ + dynamic_cast(machine().device("maincpu"))->add_fastram(0x00000000, 0x007fffff, FALSE, rdram); rsp_device *rsp = machine().device("rsp"); rsp->rspdrc_set_options(RSPDRC_STRICT_VERIFY); From 705ad1e389d6089c182fe9860074570608e6f21d Mon Sep 17 00:00:00 2001 From: Lord-Nightmare Date: Sun, 29 Mar 2015 12:47:16 -0400 Subject: [PATCH 10/11] tms5220: some preparation for a possible future merge of tms51xx and 52xx into one .c file (n/w) --- src/emu/sound/tms5220.c | 28 +++++++++++++++------------- src/emu/sound/tms5220.h | 2 +- 2 files changed, 16 insertions(+), 14 deletions(-) diff --git a/src/emu/sound/tms5220.c b/src/emu/sound/tms5220.c index f213e3854d9..59cc39d7f84 100644 --- a/src/emu/sound/tms5220.c +++ b/src/emu/sound/tms5220.c @@ -322,6 +322,7 @@ static INT16 clip_analog(INT16 cliptemp); #define TMS5220_IS_CD2501E TMS5220_IS_5200 #define TMS5220_HAS_RATE_CONTROL ((m_variant == TMS5220_IS_5220C) || (m_variant == TMS5220_IS_CD2501ECD)) +#define TMS5220_IS_52xx ((m_variant == TMS5220_IS_5220C) || (m_variant == TMS5220_IS_5200) || (m_variant == TMS5220_IS_5220) || (m_variant == TMS5220_IS_CD2501ECD)) static const UINT8 reload_table[4] = { 0, 2, 4, 6 }; //sample count reload for 5220c and cd2501ecd only; 5200 and 5220 always reload with 0; keep in mind this is loaded on IP=0 PC=12 subcycle=1 so it immediately will increment after one sample, effectively being 1,3,5,7 as in the comments above. @@ -474,7 +475,7 @@ void tms5220_device::data_write(int data) #ifdef DEBUG_FIFO logerror("data_write: Added byte to FIFO (current count=%2d)\n", m_fifo_count); #endif - update_status_and_ints(); + update_fifo_status_and_ints(); if ((m_talk_status == 0) && (m_buffer_low == 0)) // we just unset buffer low with that last write, and talk status *was* zero... { int i; @@ -514,7 +515,7 @@ void tms5220_device::data_write(int data) /********************************************************************************************** - update_status_and_ints -- check to see if the various flags should be on or off + update_fifo_status_and_ints -- check to see if the various flags should be on or off Description of flags, and their position in the status register: From the data sheet: bit D0(bit 7) = TS - Talk Status is active (high) when the VSP is processing speech data. @@ -535,10 +536,10 @@ void tms5220_device::data_write(int data) ***********************************************************************************************/ -void tms5220_device::update_status_and_ints() +void tms5220_device::update_fifo_status_and_ints() { - /* update flags and set ints if needed */ - + /* update 52xx fifo flags and set ints if needed */ + if (!TMS5220_IS_52xx) return; // bail out if not a 52xx chip update_ready_state(); /* BL is set if neither byte 9 nor 8 of the fifo are in use; this @@ -605,7 +606,7 @@ int tms5220_device::extract_bits(int count) m_fifo[m_fifo_head] = 0; // zero the newly depleted fifo head byte m_fifo_head = (m_fifo_head + 1) % FIFO_SIZE; m_fifo_bits_taken = 0; - update_status_and_ints(); + update_fifo_status_and_ints(); } } } @@ -797,7 +798,7 @@ void tms5220_device::process(INT16 *buffer, unsigned int size) { m_talk_status = m_speak_external = 0; set_interrupt_state(1); - update_status_and_ints(); + update_fifo_status_and_ints(); } /* in all cases where interpolation would be inhibited, set the inhibit flag; otherwise clear it. @@ -1250,7 +1251,7 @@ void tms5220_device::process_command(unsigned char cmd) } /* update the buffer low state */ - update_status_and_ints(); + update_fifo_status_and_ints(); } /****************************************************************************************** @@ -1279,7 +1280,7 @@ void tms5220_device::parse_frame() else // non-5220C and 5220C in fixed rate mode m_IP = reload_table[m_c_variant_rate&0x3]; - update_status_and_ints(); + update_fifo_status_and_ints(); if (!m_talk_status) goto ranout; // attempt to extract the energy index @@ -1288,7 +1289,7 @@ void tms5220_device::parse_frame() printbits(m_new_frame_energy_idx,m_coeff->energy_bits); fprintf(stderr," "); #endif - update_status_and_ints(); + update_fifo_status_and_ints(); if (!m_talk_status) goto ranout; // if the energy index is 0 or 15, we're done if ((m_new_frame_energy_idx == 0) || (m_new_frame_energy_idx == 15)) @@ -1308,7 +1309,7 @@ void tms5220_device::parse_frame() printbits(m_new_frame_pitch_idx,m_coeff->pitch_bits); fprintf(stderr," "); #endif - update_status_and_ints(); + update_fifo_status_and_ints(); if (!m_talk_status) goto ranout; // if this is a repeat frame, just do nothing, it will reuse the old coefficients if (rep_flag) @@ -1322,7 +1323,7 @@ void tms5220_device::parse_frame() printbits(m_new_frame_k_idx[i],m_coeff->kbits[i]); fprintf(stderr," "); #endif - update_status_and_ints(); + update_fifo_status_and_ints(); if (!m_talk_status) goto ranout; } @@ -1341,7 +1342,7 @@ void tms5220_device::parse_frame() printbits(m_new_frame_k_idx[i],m_coeff->kbits[i]); fprintf(stderr," "); #endif - update_status_and_ints(); + update_fifo_status_and_ints(); if (!m_talk_status) goto ranout; } #ifdef VERBOSE @@ -1367,6 +1368,7 @@ void tms5220_device::parse_frame() void tms5220_device::set_interrupt_state(int state) { + if (!TMS5220_IS_52xx) return; // bail out if not a 52xx chip, since there's no int pin #ifdef DEBUG_PIN_READS logerror("irq pin set to state %d\n", state); #endif diff --git a/src/emu/sound/tms5220.h b/src/emu/sound/tms5220.h index c73ddb71c89..6aab4638a13 100644 --- a/src/emu/sound/tms5220.h +++ b/src/emu/sound/tms5220.h @@ -73,7 +73,7 @@ protected: private: void register_for_save_states(); void data_write(int data); - void update_status_and_ints(); + void update_fifo_status_and_ints(); int extract_bits(int count); int status_read(); int ready_read(); From d462fbfa59739505fa8169c79131dce3e541d3f1 Mon Sep 17 00:00:00 2001 From: Curt Coder Date: Sun, 29 Mar 2015 23:52:34 +0300 Subject: [PATCH 11/11] (MESS) abc80: Added ABCDemo floppy and cassette to the software lists. [Genesis Project] --- hash/abc80_cass.xml | 17 +++++++++++++++++ hash/{abc80.xml => abc80_flop.xml} | 14 +++++++++++++- src/mess/drivers/abc80.c | 4 +++- 3 files changed, 33 insertions(+), 2 deletions(-) create mode 100644 hash/abc80_cass.xml rename hash/{abc80.xml => abc80_flop.xml} (83%) diff --git a/hash/abc80_cass.xml b/hash/abc80_cass.xml new file mode 100644 index 00000000000..ac568c36b37 --- /dev/null +++ b/hash/abc80_cass.xml @@ -0,0 +1,17 @@ + + + + + + ABCDemo + 2015 + Genesis Project + + + + + + + + + \ No newline at end of file diff --git a/hash/abc80.xml b/hash/abc80_flop.xml similarity index 83% rename from hash/abc80.xml rename to hash/abc80_flop.xml index df6571b5c07..eee09a7527e 100644 --- a/hash/abc80.xml +++ b/hash/abc80_flop.xml @@ -1,6 +1,6 @@ - + CP/M BIOS 3.7 @@ -71,4 +71,16 @@ + + ABCDemo + 2015 + Genesis Project + + + + + + + + diff --git a/src/mess/drivers/abc80.c b/src/mess/drivers/abc80.c index f3937b0a964..91bc13bcb5a 100644 --- a/src/mess/drivers/abc80.c +++ b/src/mess/drivers/abc80.c @@ -518,6 +518,7 @@ static MACHINE_CONFIG_START( abc80, abc80_state ) MCFG_CASSETTE_ADD("cassette") MCFG_CASSETTE_DEFAULT_STATE(CASSETTE_STOPPED | CASSETTE_MOTOR_DISABLED | CASSETTE_SPEAKER_MUTED) + MCFG_CASSETTE_INTERFACE("abc80_cass") MCFG_DEVICE_ADD(ABC80_KEYBOARD_TAG, ABC80_KEYBOARD, 0) MCFG_ABC80_KEYBOARD_KEYDOWN_CALLBACK(WRITELINE(abc80_state, keydown_w)) @@ -532,7 +533,8 @@ static MACHINE_CONFIG_START( abc80, abc80_state ) MCFG_RAM_DEFAULT_SIZE("16K") // software list - MCFG_SOFTWARE_LIST_ADD("flop_list", "abc80") + MCFG_SOFTWARE_LIST_ADD("cass_list", "abc80_cass") + MCFG_SOFTWARE_LIST_ADD("flop_list", "abc80_flop") MACHINE_CONFIG_END