From 2c70bf1e92aedce1fc029693760b0dcca58bf6c3 Mon Sep 17 00:00:00 2001
From: Ville Linde <villedevs@gmail.com>
Date: Thu, 14 Apr 2016 00:44:15 +0300
Subject: [PATCH] drcbex64: map F0-F3 to SSE registers (nw)

---
 src/devices/cpu/drcbex64.cpp | 2 +-
 src/devices/cpu/drcuml.cpp   | 3 ---
 2 files changed, 1 insertion(+), 4 deletions(-)

diff --git a/src/devices/cpu/drcbex64.cpp b/src/devices/cpu/drcbex64.cpp
index 096dc2cbf5c..3a5b51b18bd 100644
--- a/src/devices/cpu/drcbex64.cpp
+++ b/src/devices/cpu/drcbex64.cpp
@@ -263,7 +263,7 @@ static const UINT8 int_register_map[REG_I_COUNT] =
 
 static UINT8 float_register_map[REG_F_COUNT] =
 {
-	0
+	REG_XMM6, REG_XMM7, REG_XMM8, REG_XMM9
 };
 
 // condition mapping table
diff --git a/src/devices/cpu/drcuml.cpp b/src/devices/cpu/drcuml.cpp
index 736301ff606..efd3a81614a 100644
--- a/src/devices/cpu/drcuml.cpp
+++ b/src/devices/cpu/drcuml.cpp
@@ -22,9 +22,6 @@
     * Support for FPU exceptions
 
     * New instructions?
-        - FCOPYI, ICOPYF
-            copy raw between float and integer registers
-
         - VALID opcode_desc,handle,param
             checksum/compare code referenced by opcode_desc; if not
             matching, generate exception with handle,param