added NEC uCOM-4 MCU core skeleton

This commit is contained in:
hap 2015-02-07 00:50:04 +01:00
parent aa73e9ccef
commit 2cd878633a
9 changed files with 405 additions and 0 deletions

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@ -3,6 +3,7 @@
/*
American Microsystems, Inc.(AMI) S2000-family 4-bit MCU cores, introduced late 1970s
Overall functionality is similar to (and probably derived from) NEC uCOM-4.
TODO:
- unemulated opcodes (need more testing material)

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@ -1866,6 +1866,25 @@ $(CPUOBJ)/upd7810/upd7810.o: $(CPUSRC)/upd7810/upd7810.c \
$(CPUSRC)/upd7810/upd7810_macros.h
#-------------------------------------------------
# NEC uCOM-4 series
#@src/emu/cpu/ucom4/ucom4.h,CPUS += UCOM4
#-------------------------------------------------
ifneq ($(filter UCOM4,$(CPUS)),)
OBJDIRS += $(CPUOBJ)/ucom4
CPUOBJS += $(CPUOBJ)/ucom4/ucom4.o
DASMOBJS += $(CPUOBJ)/ucom4/ucom4d.o
endif
$(CPUOBJ)/ucom4/ucom4.o: $(CPUSRC)/ucom4/ucom4.h \
$(CPUSRC)/ucom4/ucom4.c \
$(CPUSRC)/ucom4/ucom4op.inc
$(CPUOBJ)/ucom4/ucom4d.o: $(CPUSRC)/ucom4/ucom4.h \
$(CPUSRC)/ucom4/ucom4d.c
#-------------------------------------------------
# Nintendo Minx
#@src/emu/cpu/minx/minx.h,CPUS += MINX

181
src/emu/cpu/ucom4/ucom4.c Normal file
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// license:BSD-3-Clause
// copyright-holders:hap
/*
NEC uCOM-4 MCU family cores
*/
#include "ucom4.h"
#include "debugger.h"
#include "ucom4op.inc"
// uCOM-43 products
const device_type NEC_D553 = &device_creator<upd553_cpu_device>; // 42-pin PMOS, 35 pins for I/O, Open Drain output, 2000x8 ROM, 96x4 RAM
const device_type NEC_D650 = &device_creator<upd650_cpu_device>; // 42-pin CMOS, 35 pins for I/O, push-pull output, 2000x8 ROM, 96x4 RAM
// uCOM-44 products
const device_type NEC_D552 = &device_creator<upd552_cpu_device>; // 42-pin PMOS, 35 pins for I/O, Open Drain output, 1000x8 ROM, 64x4 RAM
// internal memory maps
static ADDRESS_MAP_START(program_1k, AS_PROGRAM, 8, ucom4_cpu_device)
AM_RANGE(0x0000, 0x03ff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START(program_2k, AS_PROGRAM, 8, ucom4_cpu_device)
AM_RANGE(0x0000, 0x07ff) AM_ROM
ADDRESS_MAP_END
static ADDRESS_MAP_START(data_64x4, AS_DATA, 8, ucom4_cpu_device)
AM_RANGE(0x00, 0x3f) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START(data_96x4, AS_DATA, 8, ucom4_cpu_device)
AM_RANGE(0x00, 0x3f) AM_RAM
AM_RANGE(0x40, 0x5f) AM_RAM AM_MIRROR(0x20)
ADDRESS_MAP_END
// device definitions
upd553_cpu_device::upd553_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: ucom4_cpu_device(mconfig, NEC_D553, "uPD553", tag, owner, clock, 3, 11, ADDRESS_MAP_NAME(program_2k), 7, ADDRESS_MAP_NAME(data_96x4), "upd553", __FILE__)
{ }
upd650_cpu_device::upd650_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: ucom4_cpu_device(mconfig, NEC_D650, "uPD650", tag, owner, clock, 3, 11, ADDRESS_MAP_NAME(program_2k), 7, ADDRESS_MAP_NAME(data_96x4), "upd650", __FILE__)
{ }
upd552_cpu_device::upd552_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
: ucom4_cpu_device(mconfig, NEC_D552, "uPD552", tag, owner, clock, 1, 10, ADDRESS_MAP_NAME(program_1k), 6, ADDRESS_MAP_NAME(data_64x4), "upd552", __FILE__)
{ }
// disasm
void ucom4_cpu_device::state_string_export(const device_state_entry &entry, astring &string)
{
switch (entry.index())
{
case STATE_GENFLAGS:
string.printf("%c%c%c%c",
m_inte_f ? 'E':'e',
m_int_f ? 'I':'i',
m_timer_f ? 'T':'t',
m_carry_f ? 'C':'c'
);
break;
default: break;
}
}
offs_t ucom4_cpu_device::disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options)
{
extern CPU_DISASSEMBLE(ucom4);
return CPU_DISASSEMBLE_NAME(ucom4)(this, buffer, pc, oprom, opram, options);
}
//-------------------------------------------------
// device_start - device-specific startup
//-------------------------------------------------
enum
{
UCOM4_PC=1, UCOM4_DPL, UCOM4_DPH,
UCOM4_ACC
};
void ucom4_cpu_device::device_start()
{
m_program = &space(AS_PROGRAM);
m_data = &space(AS_DATA);
m_prgmask = (1 << m_prgwidth) - 1;
m_datamask = (1 << m_datawidth) - 1;
m_read_a.resolve_safe(0);
m_read_b.resolve_safe(0);
m_read_c.resolve_safe(0);
m_read_d.resolve_safe(0);
m_write_c.resolve_safe();
m_write_d.resolve_safe();
m_write_e.resolve_safe();
m_write_f.resolve_safe();
m_write_g.resolve_safe();
m_write_h.resolve_safe();
m_write_i.resolve_safe();
// zerofill
memset(m_stack, 0, sizeof(m_stack));
m_op = 0;
m_prev_op = 0;
m_pc = 0;
m_acc = 0;
m_dpl = 0;
m_dph = 0;
m_carry_f = 0;
m_timer_f = 0;
m_int_f = 0;
m_inte_f = 0;
// register for savestates
save_item(NAME(m_stack));
save_item(NAME(m_op));
save_item(NAME(m_prev_op));
save_item(NAME(m_pc));
save_item(NAME(m_acc));
save_item(NAME(m_dpl));
save_item(NAME(m_dph));
save_item(NAME(m_carry_f));
save_item(NAME(m_timer_f));
save_item(NAME(m_int_f));
save_item(NAME(m_inte_f));
// register state for debugger
state_add(UCOM4_PC, "PC", m_pc).formatstr("%04X");
state_add(UCOM4_DPL, "DPL", m_dpl).formatstr("%01X");
state_add(UCOM4_DPH, "DPH", m_dph).formatstr("%01X");
state_add(UCOM4_ACC, "ACC", m_acc).formatstr("%01X");
state_add(STATE_GENPC, "curpc", m_pc).formatstr("%04X").noshow();
// state_add(STATE_GENFLAGS, "GENFLAGS", m_flags).formatstr("%4s").noshow();
m_icountptr = &m_icount;
}
//-------------------------------------------------
// device_reset - device-specific reset
//-------------------------------------------------
void ucom4_cpu_device::device_reset()
{
m_pc = 0;
m_op = 0;
}
//-------------------------------------------------
// execute
//-------------------------------------------------
void ucom4_cpu_device::execute_run()
{
while (m_icount > 0)
{
m_icount--;
// remember previous opcode
m_prev_op = m_op;
debugger_instruction_hook(this, m_pc);
m_op = m_program->read_byte(m_pc);
m_pc = (m_pc + 1) & m_prgmask;
}
}

175
src/emu/cpu/ucom4/ucom4.h Normal file
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// license:BSD-3-Clause
// copyright-holders:hap
/*
NEC uCOM-4 MCU family cores
*/
#ifndef _UCOM4_H_
#define _UCOM4_H_
#include "emu.h"
// I/O ports setup
#define MCFG_UCOM4_READ_A_CB(_devcb) \
ucom4_cpu_device::set_read_a_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_READ_B_CB(_devcb) \
ucom4_cpu_device::set_read_b_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_READ_C_CB(_devcb) \
ucom4_cpu_device::set_read_c_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_WRITE_C_CB(_devcb) \
ucom4_cpu_device::set_write_c_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_READ_D_CB(_devcb) \
ucom4_cpu_device::set_read_d_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_WRITE_D_CB(_devcb) \
ucom4_cpu_device::set_write_d_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_WRITE_E_CB(_devcb) \
ucom4_cpu_device::set_write_e_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_WRITE_F_CB(_devcb) \
ucom4_cpu_device::set_write_f_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_WRITE_G_CB(_devcb) \
ucom4_cpu_device::set_write_g_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_WRITE_H_CB(_devcb) \
ucom4_cpu_device::set_write_h_callback(*device, DEVCB_##_devcb);
#define MCFG_UCOM4_WRITE_I_CB(_devcb) \
ucom4_cpu_device::set_write_i_callback(*device, DEVCB_##_devcb);
class ucom4_cpu_device : public cpu_device
{
public:
// construction/destruction
ucom4_cpu_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock, int stack_levels, int prgwidth, address_map_constructor program, int datawidth, address_map_constructor data, const char *shortname, const char *source)
: cpu_device(mconfig, type, name, tag, owner, clock, shortname, source)
, m_program_config("program", ENDIANNESS_BIG, 8, prgwidth, 0, program)
, m_data_config("data", ENDIANNESS_BIG, 8, datawidth, 0, data)
, m_prgwidth(prgwidth)
, m_datawidth(datawidth)
, m_stack_levels(stack_levels)
, m_read_a(*this)
, m_read_b(*this)
, m_read_c(*this)
, m_read_d(*this)
, m_write_c(*this)
, m_write_d(*this)
, m_write_e(*this)
, m_write_f(*this)
, m_write_g(*this)
, m_write_h(*this)
, m_write_i(*this)
{ }
// static configuration helpers
template<class _Object> static devcb_base &set_read_a_callback(device_t &device, _Object object) { return downcast<ucom4_cpu_device &>(device).m_read_a.set_callback(object); }
template<class _Object> static devcb_base &set_read_b_callback(device_t &device, _Object object) { return downcast<ucom4_cpu_device &>(device).m_read_b.set_callback(object); }
template<class _Object> static devcb_base &set_read_c_callback(device_t &device, _Object object) { return downcast<ucom4_cpu_device &>(device).m_read_c.set_callback(object); }
template<class _Object> static devcb_base &set_read_d_callback(device_t &device, _Object object) { return downcast<ucom4_cpu_device &>(device).m_read_d.set_callback(object); }
template<class _Object> static devcb_base &set_write_c_callback(device_t &device, _Object object) { return downcast<ucom4_cpu_device &>(device).m_write_c.set_callback(object); }
template<class _Object> static devcb_base &set_write_d_callback(device_t &device, _Object object) { return downcast<ucom4_cpu_device &>(device).m_write_d.set_callback(object); }
template<class _Object> static devcb_base &set_write_e_callback(device_t &device, _Object object) { return downcast<ucom4_cpu_device &>(device).m_write_e.set_callback(object); }
template<class _Object> static devcb_base &set_write_f_callback(device_t &device, _Object object) { return downcast<ucom4_cpu_device &>(device).m_write_f.set_callback(object); }
template<class _Object> static devcb_base &set_write_g_callback(device_t &device, _Object object) { return downcast<ucom4_cpu_device &>(device).m_write_g.set_callback(object); }
template<class _Object> static devcb_base &set_write_h_callback(device_t &device, _Object object) { return downcast<ucom4_cpu_device &>(device).m_write_h.set_callback(object); }
template<class _Object> static devcb_base &set_write_i_callback(device_t &device, _Object object) { return downcast<ucom4_cpu_device &>(device).m_write_i.set_callback(object); }
protected:
// device-level overrides
virtual void device_start();
virtual void device_reset();
// device_execute_interface overrides
virtual UINT32 execute_min_cycles() const { return 1; }
virtual UINT32 execute_max_cycles() const { return 2; }
virtual UINT32 execute_input_lines() const { return 1; }
virtual void execute_run();
// device_memory_interface overrides
virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const { return(spacenum == AS_PROGRAM) ? &m_program_config :((spacenum == AS_DATA) ? &m_data_config : NULL); }
// device_disasm_interface overrides
virtual UINT32 disasm_min_opcode_bytes() const { return 1; }
virtual UINT32 disasm_max_opcode_bytes() const { return 2; }
virtual offs_t disasm_disassemble(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, UINT32 options);
void state_string_export(const device_state_entry &entry, astring &string);
address_space_config m_program_config;
address_space_config m_data_config;
address_space *m_program;
address_space *m_data;
int m_prgwidth;
int m_datawidth;
int m_prgmask;
int m_datamask;
int m_stack_levels; // number of callstack levels
UINT16 m_stack[3]; // max 3
UINT8 m_op;
UINT8 m_prev_op;
int m_icount;
UINT16 m_pc; // program counter
UINT8 m_acc; // 4-bit accumulator
UINT8 m_dpl; // 4-bit data pointer low (RAM x)
UINT8 m_dph; // 1/2/3-bit data pointer high (RAM y)
UINT8 m_carry_f; // carry flag
UINT8 m_timer_f; // timer out flag
UINT8 m_int_f; // interrupt flag
UINT8 m_inte_f; // interrupt enable flag
// i/o handlers
devcb_read8 m_read_a;
devcb_read8 m_read_b;
devcb_read8 m_read_c;
devcb_read8 m_read_d;
devcb_write8 m_write_c;
devcb_write8 m_write_d;
devcb_write8 m_write_e;
devcb_write8 m_write_f;
devcb_write8 m_write_g;
devcb_write8 m_write_h;
devcb_write8 m_write_i;
};
class upd553_cpu_device : public ucom4_cpu_device
{
public:
upd553_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class upd650_cpu_device : public ucom4_cpu_device
{
public:
upd650_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
class upd552_cpu_device : public ucom4_cpu_device
{
public:
upd552_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
};
extern const device_type NEC_D553;
extern const device_type NEC_D650;
extern const device_type NEC_D552;
#endif /* _UCOM4_H_ */

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@ -0,0 +1,24 @@
// license:BSD-3-Clause
// copyright-holders:hap
/*
NEC uCOM-4 MCU family disassembler
*/
#include "emu.h"
#include "debugger.h"
#include "ucom4.h"
CPU_DISASSEMBLE(ucom4)
{
int pos = 0;
// UINT8 op = oprom[pos++];
// UINT8 instr = ucom4_mnemonic[op];
char *dst = buffer;
dst += sprintf(dst, "ABC");
return pos | 0 | DASMFLAG_SUPPORTED;
}

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@ -0,0 +1 @@
// uCOM4 opcode handlers

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@ -151,6 +151,7 @@ CPUS += ALTO2
CPUS += ARC
CPUS += ARCOMPACT
CPUS += AMIS2000
CPUS += UCOM4
#-------------------------------------------------
# specify available sound cores

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@ -135,6 +135,7 @@ CPUS += ALTO2
CPUS += ARC
CPUS += ARCOMPACT
CPUS += AMIS2000
CPUS += UCOM4
#-------------------------------------------------
# specify available sound cores; some of these are

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@ -179,6 +179,7 @@ CPU_DISASSEMBLE( tms9980 );
CPU_DISASSEMBLE( tms9995 );
CPU_DISASSEMBLE( tx0_64kw );
CPU_DISASSEMBLE( tx0_8kw );
CPU_DISASSEMBLE( ucom4 );
CPU_DISASSEMBLE( unsp );
CPU_DISASSEMBLE( upd7725 );
CPU_DISASSEMBLE( upd7801 );
@ -326,6 +327,7 @@ static const dasm_table_entry dasm_table[] =
{ "tms9995", _8bit, 0, CPU_DISASSEMBLE_NAME(tms9995) },
{ "tx0_64kw", _32be, -2, CPU_DISASSEMBLE_NAME(tx0_64kw) },
{ "tx0_8kw", _32be, -2, CPU_DISASSEMBLE_NAME(tx0_8kw) },
{ "ucom4", _8bit, 0, CPU_DISASSEMBLE_NAME(ucom4) },
{ "unsp", _16be, 0, CPU_DISASSEMBLE_NAME(unsp) },
{ "upd7725", _32be, 0, CPU_DISASSEMBLE_NAME(unsp) },
{ "upd7801", _8bit, 0, CPU_DISASSEMBLE_NAME(upd7801) },