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a2bus: Define 7M clock through constant (nw)

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This commit is contained in:
AJR 2017-11-25 13:54:35 -05:00
parent 2bb61a2553
commit 2d0c2b060e
3 changed files with 13 additions and 18 deletions
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3
src/devices/bus/a2bus/a2bus.h
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@ -51,6 +51,9 @@
MCFG_DEVICE_INPUT_DEFAULTS(_def_inp) \
device_a2bus_card_interface::static_set_a2bus_tag(*device, _nbtag, _tag);
// 7M = XTAL_14_31818MHz / 2 or XTAL_28_63636MHz / 4 (for IIgs)
static constexpr uint32_t A2BUS_7M_CLOCK = 7159090;
//**************************************************************************
// TYPE DEFINITIONS
//**************************************************************************

10
src/devices/bus/a2bus/pc_xporter.cpp
View File

@ -114,21 +114,21 @@ ADDRESS_MAP_END
//-------------------------------------------------
MACHINE_CONFIG_MEMBER( a2bus_pcxporter_device::device_add_mconfig )
MCFG_CPU_ADD("v30", V30, XTAL_14_31818MHz/2) // 7.16 MHz as per manual
MCFG_CPU_ADD("v30", V30, A2BUS_7M_CLOCK) // 7.16 MHz as per manual
MCFG_CPU_PROGRAM_MAP(pc_map)
MCFG_CPU_IO_MAP(pc_io)
MCFG_CPU_IRQ_ACKNOWLEDGE_DEVICE("pic8259", pic8259_device, inta_cb)
MCFG_DEVICE_DISABLE()
MCFG_DEVICE_ADD("pit8253", PIT8253, 0)
MCFG_PIT8253_CLK0(XTAL_14_31818MHz/12.0) // heartbeat IRQ
MCFG_PIT8253_CLK0(A2BUS_7M_CLOCK / 6.0) // heartbeat IRQ
MCFG_PIT8253_OUT0_HANDLER(DEVWRITELINE("pic8259", pic8259_device, ir0_w))
MCFG_PIT8253_CLK1(XTAL_14_31818MHz/12.0) // dram refresh
MCFG_PIT8253_CLK1(A2BUS_7M_CLOCK / 6.0) // dram refresh
MCFG_PIT8253_OUT1_HANDLER(WRITELINE(a2bus_pcxporter_device, pc_pit8253_out1_changed))
MCFG_PIT8253_CLK2(XTAL_14_31818MHz/12.0) // pio port c pin 4, and speaker polling enough
MCFG_PIT8253_CLK2(A2BUS_7M_CLOCK / 6.0) // pio port c pin 4, and speaker polling enough
MCFG_PIT8253_OUT2_HANDLER(WRITELINE(a2bus_pcxporter_device, pc_pit8253_out2_changed))
MCFG_DEVICE_ADD( "dma8237", PCXPORT_DMAC, XTAL_14_31818MHz/2 )
MCFG_DEVICE_ADD("dma8237", PCXPORT_DMAC, A2BUS_7M_CLOCK / 2)
MCFG_I8237_OUT_HREQ_CB(WRITELINE(a2bus_pcxporter_device, pc_dma_hrq_changed))
MCFG_I8237_OUT_EOP_CB(WRITELINE(a2bus_pcxporter_device, pc_dma8237_out_eop))
MCFG_I8237_IN_MEMR_CB(READ8(a2bus_pcxporter_device, pc_dma_read_byte))

18
src/devices/bus/a2bus/transwarp.cpp
View File

@ -121,7 +121,7 @@ ioport_constructor a2bus_transwarp_device::device_input_ports() const
//-------------------------------------------------
MACHINE_CONFIG_MEMBER( a2bus_transwarp_device::device_add_mconfig )
MCFG_CPU_ADD(CPU_TAG, M65C02, XTAL_14_31818MHz/4)
MCFG_CPU_ADD(CPU_TAG, M65C02, A2BUS_7M_CLOCK / 2)
MCFG_CPU_PROGRAM_MAP(m65c02_mem)
MACHINE_CONFIG_END
@ -168,13 +168,9 @@ void a2bus_transwarp_device::device_reset()
if (!(m_dsw2->read() & 0x80))
{
if (m_dsw1->read() & 0x80)
{
m_ourcpu->set_unscaled_clock(XTAL_14_31818MHz/8);
}
m_ourcpu->set_unscaled_clock(A2BUS_7M_CLOCK / 4);
else
{
m_ourcpu->set_unscaled_clock(XTAL_14_31818MHz/4);
}
m_ourcpu->set_unscaled_clock(A2BUS_7M_CLOCK / 2);
}
else
{
@ -187,13 +183,9 @@ void a2bus_transwarp_device::device_timer(emu_timer &timer, device_timer_id id,
if (!(m_dsw2->read() & 0x80))
{
if (m_dsw1->read() & 0x80)
{
m_ourcpu->set_unscaled_clock(XTAL_14_31818MHz/8);
}
m_ourcpu->set_unscaled_clock(A2BUS_7M_CLOCK / 4);
else
{
m_ourcpu->set_unscaled_clock(XTAL_14_31818MHz/4);
}
m_ourcpu->set_unscaled_clock(A2BUS_7M_CLOCK / 2);
}
m_timer->adjust(attotime::never);
}