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https://github.com/holub/mame
synced 2025-07-01 08:18:59 +03:00
6532riot: remove use of devcb pointers
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parent
df8aade7a2
commit
2d40112a71
@ -62,9 +62,9 @@ void riot6532_device::update_irqstate()
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according to the DDR
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-------------------------------------------------*/
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uint8_t riot6532_device::apply_ddr(const riot6532_port *port)
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uint8_t riot6532_device::apply_ddr(uint8_t port)
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{
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return (port->m_out & port->m_ddr) | (port->m_in & ~port->m_ddr);
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return (m_out[port] & m_ddr[port]) | (m_in[port] & ~m_ddr[port]);
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}
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@ -75,7 +75,7 @@ uint8_t riot6532_device::apply_ddr(const riot6532_port *port)
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void riot6532_device::update_pa7_state()
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{
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uint8_t data = apply_ddr(&m_port[0]) & 0x80;
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uint8_t data = apply_ddr(0) & 0x80;
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/* if the state changed in the correct direction, set the PA7 flag and update IRQs */
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if ((m_pa7prev ^ data) && (m_pa7dir ^ data) == 0)
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@ -119,7 +119,7 @@ TIMER_CALLBACK_MEMBER(riot6532_device::timer_end)
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assert(m_timerstate != TIMER_IDLE);
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/* if we finished counting, switch to the finishing state */
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if(m_timerstate == TIMER_COUNTING)
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if (m_timerstate == TIMER_COUNTING)
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{
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m_timerstate = TIMER_FINISHING;
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m_timer->adjust(attotime::from_ticks(256, clock()));
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@ -143,15 +143,10 @@ TIMER_CALLBACK_MEMBER(riot6532_device::timer_end)
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***************************************************************************/
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/*-------------------------------------------------
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riot6532_w - master I/O write access
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write - master I/O write access
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-------------------------------------------------*/
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void riot6532_device::write(offs_t offset, uint8_t data)
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{
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reg_w(offset, data);
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}
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void riot6532_device::reg_w(uint8_t offset, uint8_t data)
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{
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/* if A4 == 1 and A2 == 1, we are writing to the timer */
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if ((offset & 0x14) == 0x14)
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@ -203,23 +198,23 @@ void riot6532_device::reg_w(uint8_t offset, uint8_t data)
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else
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{
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/* A1 selects the port */
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riot6532_port *port = &m_port[BIT(offset, 1)];
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uint8_t port = BIT(offset, 1);
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/* if A0 == 1, we are writing to the port's DDR */
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if (offset & 1)
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{
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port->m_ddr = data;
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m_ddr[port] = data;
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}
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/* if A0 == 0, we are writing to the port's output */
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else
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{
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port->m_out = data;
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(*port->m_out_cb)((offs_t)0, data);
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m_out[port] = data;
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m_out_cb[port]((offs_t)0, data);
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}
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/* writes to port A need to update the PA7 state */
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if (port == &m_port[0])
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if (port == 0)
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{
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update_pa7_state();
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}
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@ -228,15 +223,10 @@ void riot6532_device::reg_w(uint8_t offset, uint8_t data)
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/*-------------------------------------------------
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riot6532_r - master I/O read access
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read - master I/O read access
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-------------------------------------------------*/
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uint8_t riot6532_device::read(offs_t offset)
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{
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return reg_r(offset, machine().side_effects_disabled());
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}
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uint8_t riot6532_device::reg_r(uint8_t offset, bool debugger_access)
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{
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uint8_t val;
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@ -245,7 +235,7 @@ uint8_t riot6532_device::reg_r(uint8_t offset, bool debugger_access)
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{
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val = m_irqstate;
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if ( ! debugger_access )
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if (!machine().side_effects_disabled())
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{
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/* implicitly clears the PA7 flag */
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m_irqstate &= ~PA7_FLAG;
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@ -258,7 +248,7 @@ uint8_t riot6532_device::reg_r(uint8_t offset, bool debugger_access)
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{
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val = get_timer();
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if ( ! debugger_access )
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if (!machine().side_effects_disabled())
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{
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/* A3 contains the timer IRQ enable */
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if (offset & 8)
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@ -283,26 +273,26 @@ uint8_t riot6532_device::reg_r(uint8_t offset, bool debugger_access)
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else
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{
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/* A1 selects the port */
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riot6532_port *port = &m_port[BIT(offset, 1)];
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uint8_t port = BIT(offset, 1);
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/* if A0 == 1, we are reading the port's DDR */
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if (offset & 1)
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{
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val = port->m_ddr;
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val = m_ddr[port];
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}
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/* if A0 == 0, we are reading the port as an input */
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else
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{
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/* call the input callback if it exists */
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if (!(*port->m_in_cb).isunset())
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if (!m_in_cb[port].isunset())
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{
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port->m_in = (*port->m_in_cb)(0);
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m_in[port] = m_in_cb[port](0);
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/* changes to port A need to update the PA7 state */
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if (port == &m_port[0])
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if (port == 0)
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{
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if (!debugger_access)
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if (!machine().side_effects_disabled())
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{
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update_pa7_state();
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}
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@ -323,7 +313,7 @@ uint8_t riot6532_device::reg_r(uint8_t offset, bool debugger_access)
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void riot6532_device::porta_in_set(uint8_t data, uint8_t mask)
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{
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m_port[0].m_in = (m_port[0].m_in & ~mask) | (data & mask);
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m_in[0] = (m_in[0] & ~mask) | (data & mask);
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update_pa7_state();
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}
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@ -334,7 +324,7 @@ void riot6532_device::porta_in_set(uint8_t data, uint8_t mask)
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void riot6532_device::portb_in_set(uint8_t data, uint8_t mask)
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{
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m_port[1].m_in = (m_port[1].m_in & ~mask) | (data & mask);
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m_in[1] = (m_in[1] & ~mask) | (data & mask);
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}
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@ -344,7 +334,7 @@ void riot6532_device::portb_in_set(uint8_t data, uint8_t mask)
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uint8_t riot6532_device::porta_in_get()
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{
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return m_port[0].m_in;
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return m_in[0];
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}
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@ -354,27 +344,27 @@ uint8_t riot6532_device::porta_in_get()
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uint8_t riot6532_device::portb_in_get()
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{
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return m_port[1].m_in;
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return m_in[1];
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}
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/*-------------------------------------------------
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porta_in_get - return port A output value
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porta_out_get - return port A output value
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-------------------------------------------------*/
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uint8_t riot6532_device::porta_out_get()
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{
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return m_port[0].m_out;
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return m_out[0];
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}
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/*-------------------------------------------------
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portb_in_get - return port B output value
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portb_out_get - return port B output value
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-------------------------------------------------*/
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uint8_t riot6532_device::portb_out_get()
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{
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return m_port[1].m_out;
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return m_out[1];
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}
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@ -415,10 +405,8 @@ void riot6532_device::pb7_w(int state) { portb_in_set(state ? 0x80 : 0x00, 0x80)
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riot6532_device::riot6532_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) :
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device_t(mconfig, RIOT6532, tag, owner, clock),
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m_in_pa_cb(*this, 0),
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m_out_pa_cb(*this),
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m_in_pb_cb(*this, 0),
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m_out_pb_cb(*this),
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m_in_cb(*this, 0),
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m_out_cb(*this),
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m_irq_cb(*this),
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m_irqstate(0),
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m_irqenable(0),
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@ -429,7 +417,9 @@ riot6532_device::riot6532_device(const machine_config &mconfig, const char *tag,
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m_timerstate(0),
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m_timer(nullptr)
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{
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memset(m_port, 0x00, sizeof(m_port));
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memset(m_in, 0x00, sizeof(m_in));
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memset(m_out, 0x00, sizeof(m_out));
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memset(m_ddr, 0x00, sizeof(m_ddr));
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}
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/*-------------------------------------------------
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@ -438,22 +428,13 @@ riot6532_device::riot6532_device(const machine_config &mconfig, const char *tag,
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void riot6532_device::device_start()
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{
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/* resolve callbacks */
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m_port[0].m_in_cb = &m_in_pa_cb;
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m_port[0].m_out_cb = &m_out_pa_cb;
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m_port[1].m_in_cb = &m_in_pb_cb;
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m_port[1].m_out_cb = &m_out_pb_cb;
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/* allocate timers */
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m_timer = timer_alloc(FUNC(riot6532_device::timer_end), this);
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/* register for save states */
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save_item(NAME(m_port[0].m_in));
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save_item(NAME(m_port[0].m_out));
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save_item(NAME(m_port[0].m_ddr));
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save_item(NAME(m_port[1].m_in));
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save_item(NAME(m_port[1].m_out));
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save_item(NAME(m_port[1].m_ddr));
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save_item(NAME(m_in));
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save_item(NAME(m_out));
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save_item(NAME(m_ddr));
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save_item(NAME(m_irqstate));
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save_item(NAME(m_irqenable));
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@ -475,12 +456,9 @@ void riot6532_device::device_start()
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void riot6532_device::device_reset()
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{
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/* reset I/O states */
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m_port[0].m_in = 0;
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m_port[0].m_out = 0;
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m_port[0].m_ddr = 0;
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m_port[1].m_in = 0;
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m_port[1].m_out = 0;
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m_port[1].m_ddr = 0;
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memset(m_in, 0x00, sizeof(m_in));
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memset(m_out, 0x00, sizeof(m_out));
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memset(m_ddr, 0x00, sizeof(m_ddr));
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/* reset IRQ states */
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m_irqenable = 0;
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@ -12,12 +12,6 @@
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#define __RIOT6532_H__
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/***************************************************************************
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TYPE DEFINITIONS
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***************************************************************************/
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// ======================> riot6532_device
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class riot6532_device : public device_t
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@ -26,18 +20,15 @@ public:
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// construction/destruction
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riot6532_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
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auto in_pa_callback() { return m_in_pa_cb.bind(); }
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auto out_pa_callback() { return m_out_pa_cb.bind(); }
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auto in_pb_callback() { return m_in_pb_cb.bind(); }
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auto out_pb_callback() { return m_out_pb_cb.bind(); }
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auto in_pa_callback() { return m_in_cb[0].bind(); }
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auto out_pa_callback() { return m_out_cb[0].bind(); }
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auto in_pb_callback() { return m_in_cb[1].bind(); }
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auto out_pb_callback() { return m_out_cb[1].bind(); }
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auto irq_callback() { return m_irq_cb.bind(); }
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uint8_t read(offs_t offset);
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void write(offs_t offset, uint8_t data);
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uint8_t reg_r(uint8_t offset, bool debugger_access = false);
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void reg_w(uint8_t offset, uint8_t data);
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void porta_in_set(uint8_t data, uint8_t mask);
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void portb_in_set(uint8_t data, uint8_t mask);
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@ -60,43 +51,32 @@ public:
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uint8_t porta_in_get();
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uint8_t portb_in_get();
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uint8_t porta_out_get();
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uint8_t portb_out_get();
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protected:
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class riot6532_port
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{
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public:
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uint8_t m_in;
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uint8_t m_out;
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uint8_t m_ddr;
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devcb_read8 *m_in_cb;
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devcb_write8 *m_out_cb;
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};
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// device-level overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual void device_post_load() override { }
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virtual void device_clock_changed() override { }
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private:
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TIMER_CALLBACK_MEMBER(timer_end);
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private:
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void update_irqstate();
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uint8_t apply_ddr(const riot6532_port *port);
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uint8_t apply_ddr(uint8_t port);
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void update_pa7_state();
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uint8_t get_timer();
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riot6532_port m_port[2];
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devcb_read8 m_in_pa_cb;
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devcb_write8 m_out_pa_cb;
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devcb_read8 m_in_pb_cb;
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devcb_write8 m_out_pb_cb;
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devcb_read8::array<2> m_in_cb;
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devcb_write8::array<2> m_out_cb;
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devcb_write_line m_irq_cb;
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uint8_t m_in[2];
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uint8_t m_out[2];
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uint8_t m_ddr[2];
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uint8_t m_irqstate;
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uint8_t m_irqenable;
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int m_irq;
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