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(nw) clean up code rot and cancer

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I haven't tested the hh_sm510.cpp changes very well yet - I'll give it
another review soon, and test it some more before the end of the month.
I'm not sure about whether any of the B or BA handlers should be in the
base config methods for G&W.  I've left them there for some
configurations that always have them, but I might rip them out of the
common methods altogether.  It's not like Tiger where all the games use
them.
This commit is contained in:
Vas Crabb 2019-10-08 01:50:18 +11:00
parent eadc0eb471
commit 2d6d158033
12 changed files with 500 additions and 2221 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/devices/bus/isa/aga.cpp
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@ -610,7 +610,7 @@ MC6845_UPDATE_ROW( isa8_aga_device::cga_gfx_1bpp_update_row )
uint8_t const *const videoram = m_videoram.get(); uint8_t const *const videoram = m_videoram.get();
rgb_t const *const palette = m_palette->palette()->entry_list_raw(); rgb_t const *const palette = m_palette->palette()->entry_list_raw();
uint32_t *p = &bitmap.pix32(y); uint32_t *p = &bitmap.pix32(y);
uint8_t const fg = m_cga_color_select & 0x0f; uint8_t const fg = m_cga_color_select & 0x0f;
if (y == 0) logerror("cga_gfx_1bpp_update_row\n"); if (y == 0) logerror("cga_gfx_1bpp_update_row\n");
for (int i = 0; i < x_count; i++) { for (int i = 0; i < x_count; i++) {
@ -826,7 +826,7 @@ void isa8_aga_device::pc_aga_set_mode(mode_t mode)
} }
WRITE8_MEMBER ( isa8_aga_device::pc_aga_videoram_w ) WRITE8_MEMBER( isa8_aga_device::pc_aga_videoram_w )
{ {
switch (m_mode) { switch (m_mode) {
case AGA_COLOR: case AGA_COLOR:
@ -846,7 +846,7 @@ READ8_MEMBER( isa8_aga_device::pc_aga_videoram_r )
switch (m_mode) { switch (m_mode) {
case AGA_COLOR: case AGA_COLOR:
if (offset >= 0x8000) if (offset >= 0x8000)
return m_videoram[offset-0x8000]; return m_videoram[offset - 0x8000];
return 0; return 0;
case AGA_MONO: case AGA_MONO:
return m_videoram[offset]; return m_videoram[offset];
@ -869,7 +869,7 @@ READ8_MEMBER( isa8_aga_pc200_device::pc200_videoram_r )
} }
} }
WRITE8_MEMBER ( isa8_aga_pc200_device::pc200_videoram_w ) WRITE8_MEMBER( isa8_aga_pc200_device::pc200_videoram_w )
{ {
switch (m_mode) { switch (m_mode) {
default: default:
@ -921,7 +921,7 @@ WRITE8_MEMBER( isa8_aga_pc200_device::pc200_cga_w )
} }
} }
READ8_MEMBER ( isa8_aga_pc200_device::pc200_cga_r ) READ8_MEMBER( isa8_aga_pc200_device::pc200_cga_r )
{ {
uint8_t result; uint8_t result;

13
src/devices/cpu/tlcs900/tlcs900.cpp
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@ -1919,16 +1919,12 @@ void tmp95c063_device::device_start()
m_portd_write.resolve_safe(); m_portd_write.resolve_safe();
m_porte_read.resolve_safe(0); m_porte_read.resolve_safe(0);
m_porte_write.resolve_safe(); m_porte_write.resolve_safe();
for (int i = 0; i < 8; i++) for (devcb_read16 &an_read : m_an_read)
{ an_read.resolve_safe(0);
m_an_read[i].resolve_safe(0);
}
} }
void tmp95c063_device::device_reset() void tmp95c063_device::device_reset()
{ {
int i;
m_pc.b.l = RDMEM( 0xFFFF00 ); m_pc.b.l = RDMEM( 0xFFFF00 );
m_pc.b.h = RDMEM( 0xFFFF01 ); m_pc.b.h = RDMEM( 0xFFFF01 );
m_pc.b.h2 = RDMEM( 0xFFFF02 ); m_pc.b.h2 = RDMEM( 0xFFFF02 );
@ -2011,10 +2007,9 @@ void tmp95c063_device::device_reset()
m_reg[TMP95C063_ADREG37H] = 0x00; m_reg[TMP95C063_ADREG37H] = 0x00;
m_reg[TMP95C063_WDMOD] = 0x80; m_reg[TMP95C063_WDMOD] = 0x80;
for ( i = 0; i < TLCS900_NUM_INPUTS; i++ ) for (int i = 0; i < TLCS900_NUM_INPUTS; i++)
{
m_level[i] = CLEAR_LINE; m_level[i] = CLEAR_LINE;
}
m_prefetch_clear = true; m_prefetch_clear = true;
} }

2
src/mame/drivers/gizmondo.cpp
View File

@ -211,7 +211,7 @@ void gizmondo_state::gizmondo(machine_config &config)
m_s3c2440->gpio_port_r_callback().set(FUNC(gizmondo_state::s3c2440_gpio_port_r)); m_s3c2440->gpio_port_r_callback().set(FUNC(gizmondo_state::s3c2440_gpio_port_r));
m_s3c2440->gpio_port_w_callback().set(FUNC(gizmondo_state::s3c2440_gpio_port_w)); m_s3c2440->gpio_port_w_callback().set(FUNC(gizmondo_state::s3c2440_gpio_port_w));
DISKONCHIP_G3(config, "diskonchip", 64); DISKONCHIP_G3(config, "diskonchip").set_size(64);
#if 0 #if 0
QUICKLOAD(config, "quickload", "bin", 0).set_load_callback(FUNC(gizmondo_state::quickload_cb), this); QUICKLOAD(config, "quickload", "bin", 0).set_load_callback(FUNC(gizmondo_state::quickload_cb), this);

2480
src/mame/drivers/hh_sm510.cpp
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File diff suppressed because it is too large Load Diff

46
src/mame/drivers/rainbow.cpp
View File

@ -1152,11 +1152,11 @@ void rainbow_state::machine_reset()
// Verify RAM size matches hardware (DIP switches) // Verify RAM size matches hardware (DIP switches)
#ifdef ASSUME_RAINBOW_A_HARDWARE #ifdef ASSUME_RAINBOW_A_HARDWARE
printf("\n*** RAINBOW A MODEL ASSUMED (64 - 832 K RAM).\n"); logerror("*** RAINBOW A MODEL ASSUMED (64 - 832 K RAM).\n");
if (unmap_start > 0xD0000) if (unmap_start > 0xD0000)
{ {
unmap_start = 0xD0000; // hardware limit 832 K (possibly as low as 256 K) [?] unmap_start = 0xD0000; // hardware limit 832 K (possibly as low as 256 K) [?]
printf("\nWARNING: 896 K is not a valid memory configuration on Rainbow 100 A!\n"); logerror("WARNING: 896 K is not a valid memory configuration on Rainbow 100 A!\n");
} }
uint32_t check = (unmap_start >> 16)-1; // guess. uint32_t check = (unmap_start >> 16)-1; // guess.
@ -1170,11 +1170,11 @@ void rainbow_state::machine_reset()
#endif #endif
#else #else
printf("\n*** RAINBOW B MODEL ASSUMED (128 - 896 K RAM)\n"); logerror("*** RAINBOW B MODEL ASSUMED (128 - 896 K RAM)\n");
if (unmap_start < 0x20000) if (unmap_start < 0x20000)
{ {
unmap_start = 0x20000; // 128 K minimum unmap_start = 0x20000; // 128 K minimum
printf("\nWARNING: 64 K is not a valid memory size on Rainbow 100-B!\n"); logerror("WARNING: 64 K is not a valid memory size on Rainbow 100-B!\n");
} }
uint32_t check = (unmap_start >> 16) - 2; uint32_t check = (unmap_start >> 16) - 2;
@ -1188,11 +1188,11 @@ void rainbow_state::machine_reset()
#endif #endif
#endif #endif
if (check != nvram_location) if (check != nvram_location)
printf("\nNOTE: RAM configuration does not match NVRAM.\nUNMAP_START = %05x NVRAM VALUE = %02x SHOULD BE: %02x\n", unmap_start, nvram_location, check); logerror("NOTE: RAM configuration does not match NVRAM.\nUNMAP_START = %05x NVRAM VALUE = %02x SHOULD BE: %02x\n", unmap_start, nvram_location, check);
if (END_OF_RAM > unmap_start) if (END_OF_RAM > unmap_start)
{ {
logerror("\nUnmapping from %x to %x",unmap_start, END_OF_RAM); logerror("Unmapping from %x to %x\n",unmap_start, END_OF_RAM);
program.unmap_readwrite(unmap_start, END_OF_RAM); program.unmap_readwrite(unmap_start, END_OF_RAM);
} }
@ -1305,11 +1305,11 @@ void rainbow_state::device_timer(emu_timer &timer, device_timer_id tid, int para
if (m_power_good == false) if (m_power_good == false)
{ {
m_power_good = true; m_power_good = true;
printf("\n**** POWER GOOD ****\n"); logerror("**** POWER GOOD ****\n");
} }
else else
{ {
printf("\n**** WATCHDOG: CPU RESET ****\n"); logerror("**** WATCHDOG: CPU RESET ****\n");
m_i8088->reset(); // gives 'ERROR_16 - INTERRUPTS OFF' (indicates hardware failure or software bug). m_i8088->reset(); // gives 'ERROR_16 - INTERRUPTS OFF' (indicates hardware failure or software bug).
} }
break; // case 0 break; // case 0
@ -1712,7 +1712,7 @@ hard_disk_file *rainbow_state::rainbow_hdc_file(int drv)
info->cylinders, RD51_MAX_CYLINDER, info->cylinders, RD51_MAX_CYLINDER,
info->sectors, RD51_SECTORS_PER_TRACK, info->sectors, RD51_SECTORS_PER_TRACK,
info->sectorbytes); info->sectorbytes);
printf("\n <<< === HARD DISK IMAGE REJECTED = (invalid geometry) === >>> \n"); logerror("<<< === HARD DISK IMAGE REJECTED = (invalid geometry) === >>>\n");
return nullptr; return nullptr;
} }
} }
@ -2497,7 +2497,7 @@ WRITE8_MEMBER(rainbow_state::z80_diskcontrol_w)
data = (data & (255 - 3)); // invalid drive = DRIVE 0 ?! data = (data & (255 - 3)); // invalid drive = DRIVE 0 ?!
if (m_present_drive == INVALID_DRIVE) if (m_present_drive == INVALID_DRIVE)
printf("\n**** INVALID DRIVE ****"); logerror("**** INVALID DRIVE ****\n");
else else
data = data | m_present_drive; data = data | m_present_drive;
@ -2678,13 +2678,13 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 +
if ((m_diagnostic & 1) && !(data & 1)) // ZRESET goes LOW... if ((m_diagnostic & 1) && !(data & 1)) // ZRESET goes LOW...
{ {
printf("\nFDC ** RESET ** "); logerror("FDC ** RESET **\n");
m_fdc->reset(); m_fdc->reset();
} }
if (!(m_diagnostic & 1) && (data & 1)) // ZRESET goes HIGH... if (!(m_diagnostic & 1) && (data & 1)) // ZRESET goes HIGH...
{ {
printf("\nFDC RESTORE "); logerror("FDC RESTORE\n");
m_fdc->reset(); // See formatter description p.197 or 5-13 m_fdc->reset(); // See formatter description p.197 or 5-13
} }
@ -2698,10 +2698,10 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 +
{ {
if (m_inp7->read() == 1) if (m_inp7->read() == 1)
{ {
printf("\nHINT: GRAPHICS OPTION ON. TEXT ONLY (DC011/DC012) OUTPUT NOW DISABLED.\n"); logerror("HINT: GRAPHICS OPTION ON. TEXT ONLY (DC011/DC012) OUTPUT NOW DISABLED.\n");
} }
else else
{ printf("\nALARM: GRAPHICS OPTION * SWITCHED OFF * VIA DIP. TEXT OUTPUT STILL ENABLED!\n"); { logerror("ALARM: GRAPHICS OPTION * SWITCHED OFF * VIA DIP. TEXT OUTPUT STILL ENABLED!\n");
m_onboard_video_selected = true; m_onboard_video_selected = true;
} }
logerror("DATA: %x (PC=%x)\n", data, m_i8088->pc()); logerror("DATA: %x (PC=%x)\n", data, m_i8088->pc());
@ -2709,7 +2709,7 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 +
// BIT 3: PARITY (1 enables parity test on memory board. Usually 64K per bank). -> ext_ram_w. // BIT 3: PARITY (1 enables parity test on memory board. Usually 64K per bank). -> ext_ram_w.
if (data & 0x08) if (data & 0x08)
logerror("\n*** PARITY TEST [on RAM EXTENSION] - (bit 3 - diagnostic_w) "); logerror("*** PARITY TEST [on RAM EXTENSION] - (bit 3 - diagnostic_w)\n");
// MISSING BITS (* not vital for normal operation, see diag.disk) - // MISSING BITS (* not vital for normal operation, see diag.disk) -
// * BIT 4: DIAG LOOPBACK (0 at power-up; 1 directs RX50 and DC12 output to printer port) // * BIT 4: DIAG LOOPBACK (0 at power-up; 1 directs RX50 and DC12 output to printer port)
@ -2735,7 +2735,7 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 +
*/ */
if (data & 16) if (data & 16)
{ {
logerror("\nWARNING: UNEMULATED DIAG LOOPBACK (directs RX50 and DC12 output to printer port) **** "); logerror("WARNING: UNEMULATED DIAG LOOPBACK (directs RX50 and DC12 output to printer port) ****\n");
} }
address_space &io = m_i8088->space(AS_IO); address_space &io = m_i8088->space(AS_IO);
@ -2748,7 +2748,7 @@ WRITE8_MEMBER(rainbow_state::diagnostic_w) // 8088 (port 0A WRITTEN). Fig.4-28 +
PRT RCV DATA.......KBD TXD...........PRT RDATA PRT RCV DATA.......KBD TXD...........PRT RDATA
KBD RCV DATA.......PRT TXD...........KBD RXD KBD RCV DATA.......PRT TXD...........KBD RXD
*/ */
logerror("\nWARNING: UNEMULATED PORT LOOPBACK (COMM, PRINTER, KEYBOARD ports) **** "); logerror("WARNING: UNEMULATED PORT LOOPBACK (COMM, PRINTER, KEYBOARD ports) ****\n");
io.unmap_readwrite(0x40, 0x43); // unmap MPSC handlers to prevent CPU crashes ("INTERRUPTS OFF") io.unmap_readwrite(0x40, 0x43); // unmap MPSC handlers to prevent CPU crashes ("INTERRUPTS OFF")
} }
@ -3004,7 +3004,7 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
{ {
m_gdc_color_map_index = 0; // 0...31 (CPU accesses 32 bytes m_gdc_color_map_index = 0; // 0...31 (CPU accesses 32 bytes
printf("\n * COLOR MAP FULLY LOADED *"); logerror("* COLOR MAP FULLY LOADED *\n");
for (int zi = 0; zi < 16; zi++) for (int zi = 0; zi < 16; zi++)
{ {
int g = m_gdc_color_map[zi] & 0x0F; int g = m_gdc_color_map[zi] & 0x0F;
@ -3012,9 +3012,9 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
int b = m_gdc_color_map[zi + 16] & 0x0F; int b = m_gdc_color_map[zi + 16] & 0x0F;
int m = (m_gdc_color_map[zi + 16] & 0xF0) >> 4; int m = (m_gdc_color_map[zi + 16] & 0xF0) >> 4;
printf("\n[%d] %1x %1x %1x %1x (1:1)", zi, r , g , b , m); logerror("[%d] %1x %1x %1x %1x (1:1)\n", zi, r, g, b, m);
} }
printf("\n------------------------------"); logerror("------------------------------\n");
} // if all colors present } // if all colors present
break; break;
} }
@ -3026,7 +3026,7 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
m_gdc_scroll_buffer[m_gdc_scroll_index] = data; // // WRITE TO SCROLL_MAP ( 256 x 8 ) m_gdc_scroll_buffer[m_gdc_scroll_index] = data; // // WRITE TO SCROLL_MAP ( 256 x 8 )
if (m_gdc_scroll_index == 255) if (m_gdc_scroll_index == 255)
printf("\n ---- SCROLL MAP FULLY LOADED ---*"); logerror("---- SCROLL MAP FULLY LOADED ---*\n");
m_gdc_scroll_index++; m_gdc_scroll_index++;
m_gdc_scroll_index &= 0xFF; // 0...255 (CPU accesses 256 bytes) m_gdc_scroll_index &= 0xFF; // 0...255 (CPU accesses 256 bytes)
} }
@ -3070,7 +3070,7 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
if (last_message != 2) if (last_message != 2)
{ {
last_message = 2; last_message = 2;
printf(" * HIGH RESOLUTION * "); logerror("* HIGH RESOLUTION *\n");
} }
} }
else else
@ -3078,7 +3078,7 @@ WRITE8_MEMBER(rainbow_state::GDC_EXTRA_REGISTER_w)
if (last_message != 3) if (last_message != 3)
{ {
last_message = 3; last_message = 3;
printf(" MEDIUM RESOLUTION "); logerror("MEDIUM RESOLUTION\n");
} }
} }

105
src/mame/drivers/rulechan.cpp
View File

@ -163,12 +163,6 @@
*********************************************************************/ *********************************************************************/
#define CPU_CLOCK XTAL(8'000'000) // guess
#define VID_CLOCK XTAL(21'477'272) // guess
#define TMS_CLOCK (CPU_CLOCK / 4) // guess
#define VDP_MEM 0x20000 // 4x 4464 (64K x 4 DRAM)
#include "emu.h" #include "emu.h"
#include "cpu/z80/z80.h" #include "cpu/z80/z80.h"
#include "machine/nvram.h" #include "machine/nvram.h"
@ -179,8 +173,17 @@
#include "sound/ay8910.h" #include "sound/ay8910.h"
#include "screen.h" #include "screen.h"
#include "speaker.h" #include "speaker.h"
//#define VERBOSE 1
#include "logmacro.h"
#include "rulechan.lh" #include "rulechan.lh"
#define CPU_CLOCK XTAL(8'000'000) // guess
#define VID_CLOCK XTAL(21'477'272) // guess
#define TMS_CLOCK (CPU_CLOCK / 4) // guess
#define VDP_MEM 0x20000 // 4x 4464 (64K x 4 DRAM)
#define BIT2 BIT(m_p30,2) #define BIT2 BIT(m_p30,2)
#define BIT3 BIT(m_p30,3) #define BIT3 BIT(m_p30,3)
#define BIT4 BIT(m_p30,4) #define BIT4 BIT(m_p30,4)
@ -212,6 +215,9 @@ public:
void rulechan(machine_config &config); void rulechan(machine_config &config);
void rulechan_init(); void rulechan_init();
protected:
virtual void machine_start() override { m_lamps.resolve(); m_digits.resolve(); }
private: private:
DECLARE_WRITE8_MEMBER(port0_w); DECLARE_WRITE8_MEMBER(port0_w);
DECLARE_READ8_MEMBER(port2_r); DECLARE_READ8_MEMBER(port2_r);
@ -239,7 +245,7 @@ private:
uint8_t m_ballin; uint8_t m_ballin;
uint8_t m_led; uint8_t m_led;
uint8_t m_pass[6]; uint8_t m_pass[6];
uint8_t m_sndsrt[10]= { 0x0a, 0x0e, 0x06, 0x0a, 0x0b, 0x48, 0x0c, 0x00, 0x0d, 0x01 }; static constexpr uint8_t s_sndsrt[10] = { 0x0a, 0x0e, 0x06, 0x0a, 0x0b, 0x48, 0x0c, 0x00, 0x0d, 0x01 };
required_device<v9938_device> m_v9938; required_device<v9938_device> m_v9938;
required_device<cpu_device> m_maincpu; required_device<cpu_device> m_maincpu;
@ -253,11 +259,12 @@ private:
void sound_sort(); void sound_sort();
void sound_off(); void sound_off();
virtual void machine_start() override { m_lamps.resolve(); m_digits.resolve(); }
output_finder<63> m_lamps; output_finder<63> m_lamps;
output_finder<6> m_digits; output_finder<6> m_digits;
}; };
constexpr uint8_t rulechan_state::s_sndsrt[10];
/* BCD to Seven Segment Decoder */ /* BCD to Seven Segment Decoder */
@ -351,9 +358,7 @@ WRITE8_MEMBER(rulechan_state::port0_w)
m_sline = data & 0x07; // Matrix scan line selector. m_sline = data & 0x07; // Matrix scan line selector.
if (m_sline > 5) if (m_sline > 5)
{
m_sline = 0; m_sline = 0;
}
} }
/**************************************** /****************************************
@ -367,18 +372,18 @@ WRITE8_MEMBER(rulechan_state::port31_w)
{ {
m_p31 = data; m_p31 = data;
if(BIT(m_p31, 4)) if (BIT(m_p31, 4))
{ {
m_p30 |= 0x20; m_p30 |= 0x20;
m_ballin = 0; // Drop ball....ball in shooter. m_ballin = 0; // Drop ball....ball in shooter.
} }
if(BIT(m_p31, 7)) // Shoot ball. if (BIT(m_p31, 7)) // Shoot ball.
{ {
m_p30 &= 0xdf; // ball out.... m_p30 &= 0xdf; // ball out....
m_num = machine().rand() % 37; // sort winning number. m_num = machine().rand() % 37; // sort winning number.
//logerror("shooting ball 2d\n", m_num); LOG("shooting ball 2d\n", m_num);
} }
} }
@ -401,17 +406,17 @@ WRITE8_MEMBER(rulechan_state::port32_w)
void rulechan_state::sound_off() void rulechan_state::sound_off()
{ {
m_maincpu->space(AS_IO).write_byte(0x10, 0x07); m_maincpu->space(AS_IO).write_byte(0x10, 0x07);
m_maincpu->space(AS_IO).write_byte(0x11, m_maincpu->space(AS_PROGRAM).read_byte(SND_FLG) | 0x20); m_maincpu->space(AS_IO).write_byte(0x11, m_maincpu->space(AS_PROGRAM).read_byte(SND_FLG) | 0x20);
m_maincpu->space(AS_IO).write_byte(0x10, 0x0e); m_maincpu->space(AS_IO).write_byte(0x10, 0x0e);
} }
void rulechan_state::sound_sort() void rulechan_state::sound_sort()
{ {
for (int i = 0; i < 5; i++) for (int i = 0; i < 5; i++)
{ {
m_maincpu->space(AS_IO).write_byte(0x10, m_sndsrt[(2 * i)]); m_maincpu->space(AS_IO).write_byte(0x10, s_sndsrt[(2 * i)]);
m_maincpu->space(AS_IO).write_byte(0x11, m_sndsrt[(2 * i) + 1]); m_maincpu->space(AS_IO).write_byte(0x11, s_sndsrt[(2 * i) + 1]);
} }
m_maincpu->space(AS_IO).write_byte(0x10, 0x07); m_maincpu->space(AS_IO).write_byte(0x10, 0x07);
m_maincpu->space(AS_IO).write_byte(0x11, m_maincpu->space(AS_PROGRAM).read_byte(SND_FLG) & 0xdf); m_maincpu->space(AS_IO).write_byte(0x11, m_maincpu->space(AS_PROGRAM).read_byte(SND_FLG) & 0xdf);
@ -425,58 +430,58 @@ void rulechan_state::sound_sort()
TIMER_DEVICE_CALLBACK_MEMBER(rulechan_state::wheel_speed) TIMER_DEVICE_CALLBACK_MEMBER(rulechan_state::wheel_speed)
{ {
if(m_step == 0) if (m_step == 0)
{ {
if((BIT4) & (m_updn4 == 0)) if ((BIT4) && (m_updn4 == 0))
{ {
m_p30 &= 0xef; m_p30 &= 0xef;
m_updn4 = 1; m_updn4 = 1;
//logerror("1:port_p30:- Reset bit 4 pulse start -%2x cont_pasos:%2d\n",m_p30, m_step); LOG("1:port_p30:- Reset bit 4 pulse start -%2x cont_pasos:%2d\n", m_p30, m_step);
return; return;
} }
if((!BIT4) & (m_updn4 == 1)) if ((!BIT4) && (m_updn4 == 1))
{ {
m_p30 |= 0x10; m_p30 |= 0x10;
//logerror("2:port_p30:- Set bit 4 -%2x cont_pasos:%2d\n",m_p30, m_step); LOG("2:port_p30:- Set bit 4 -%2x cont_pasos:%2d\n", m_p30, m_step);
return; return;
} }
if((BIT4) & (m_updn4 == 1)) if ((BIT4) && (m_updn4 == 1))
{ {
m_updn4 = 0; m_updn4 = 0;
m_step++; m_step++;
//logerror("3:port_p30:-end mark for reset bit 4 -%2x cont_pasos:%2d\n",m_p30, m_step); LOG("3:port_p30:-end mark for reset bit 4 -%2x cont_pasos:%2d\n", m_p30, m_step);
return; return;
} }
} }
else else
{ {
if(BIT3 & (m_updn3 == 0)) if (BIT3 && (m_updn3 == 0))
{ {
m_p30 &= 0xf7; m_p30 &= 0xf7;
//logerror("4:port_p30:-reset bit 3 -%2x cont_pasos:%2d\n",m_p30, m_step); LOG("4:port_p30:-reset bit 3 -%2x cont_pasos:%2d\n", m_p30, m_step);
return; return;
} }
if(!BIT3 & (m_updn3 == 0)) if (!BIT3 && (m_updn3 == 0))
{ {
if(!BIT2) if (!BIT2)
{ {
m_p30 |= 0x04; m_p30 |= 0x04;
//logerror("5:port_p30:-set bit 2 -%2x cont_pasos:%2d\n",m_p30, m_step); LOG("5:port_p30:-set bit 2 -%2x cont_pasos:%2d\n", m_p30, m_step);
return; return;
} }
else else
{ {
if((m_step - 1 == m_num) & (m_updn2 == 0)) if ((m_step - 1 == m_num) && (m_updn2 == 0))
{ {
if(!BIT5) // ball in pocket?... if (!BIT5) // ball in pocket?...
{ {
m_p30 &= 0xfb; m_p30 &= 0xfb;
m_updn2 = 1; m_updn2 = 1;
@ -491,7 +496,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(rulechan_state::wheel_speed)
m_updn3 = 1; m_updn3 = 1;
} }
if(!BIT3 & (m_updn3 == 1)) if (!BIT3 && (m_updn3 == 1))
{ {
m_p30 |= 0x08; m_p30 |= 0x08;
m_updn3 = 0; m_updn3 = 0;
@ -503,7 +508,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(rulechan_state::wheel_speed)
m_p30 |= 0x1c; m_p30 |= 0x1c;
} }
//logerror("6:port_p30:-set bit 3 -%2x cont_pasos:%2d \n",m_p30, m_step); LOG("6:port_p30:-set bit 3 -%2x cont_pasos:%2d \n", m_p30, m_step);
return; return;
} }
} }
@ -516,38 +521,34 @@ TIMER_DEVICE_CALLBACK_MEMBER(rulechan_state::wheel_speed)
TIMER_DEVICE_CALLBACK_MEMBER(rulechan_state::ball_speed) TIMER_DEVICE_CALLBACK_MEMBER(rulechan_state::ball_speed)
{ {
if(MOTORON) if (MOTORON)
{ {
if(d_spin == 0) if (d_spin == 0)
{ {
m_tspin++; m_tspin++;
d_spin = m_spin; d_spin = m_spin;
if(BALLIN) if (BALLIN)
{ {
m_tspin = 37; // breaking ball once per number step. m_tspin = 37; // breaking ball once per number step.
} }
if(m_tspin == 37) if (m_tspin == 37)
{ {
m_tspin = 0; m_tspin = 0;
m_spin++; m_spin++;
d_spin = m_spin; // breaking ball once per round. d_spin = m_spin; // breaking ball once per round.
} }
if((!BALLIN) | (LEDNOTNUM & BALLIN )) if (!BALLIN || LEDNOTNUM)
{ {
m_led++; m_led++;
if(m_led == 37) if (m_led == 37)
{
m_led = 0; m_led = 0;
}
for (int i = 0; i < 37; i++) for (int i = 0; i < 37; i++)
{
m_lamps[i + 20] = (m_led == i) ? 1 : 0; // update roulette led lamps. m_lamps[i + 20] = (m_led == i) ? 1 : 0; // update roulette led lamps.
}
sound_sort(); sound_sort();
} }
@ -561,32 +562,28 @@ TIMER_DEVICE_CALLBACK_MEMBER(rulechan_state::ball_speed)
else else
{ {
for (int i = 0; i < 37; i++) for (int i = 0; i < 37; i++)
{
m_lamps[i + 20] = (m_num == i) ? 1 : 0; m_lamps[i + 20] = (m_num == i) ? 1 : 0;
}
m_spin=d_spin=m_tspin=m_ballin=0; m_spin = d_spin = m_tspin = m_ballin = 0;
} }
/* END of Ball simulation */ /* END of Ball simulation */
/* if needed, get pass and shows it on layout*/ /* if needed, get pass and shows it on layout*/
m_pass[0] = m_maincpu->space(AS_PROGRAM).read_byte(RAM_PSW); m_pass[0] = m_maincpu->space(AS_PROGRAM).read_byte(RAM_PSW);
if((m_pass[0] <= 0x39) & (m_pass[0] >= 0x30)) if ((m_pass[0] <= 0x39) && (m_pass[0] >= 0x30))
{ {
for(int i = 0; i < 6; i++) for (int i = 0; i < 6; i++)
{ {
m_pass[i]= m_maincpu->space(AS_PROGRAM).read_byte(RAM_PSW + i); m_pass[i] = m_maincpu->space(AS_PROGRAM).read_byte(RAM_PSW + i);
m_lamps[10 + i] = dec_7seg(m_pass[i] - 0x30); m_lamps[10 + i] = dec_7seg(m_pass[i] - 0x30);
} }
} }
else else
{ {
for(int i = 0; i < 6; i++) for (int i = 0; i < 6; i++)
{
m_lamps[10 + i] = dec_7seg(0xff); m_lamps[10 + i] = dec_7seg(0xff);
}
} }
} }

6
src/mame/drivers/rzone.cpp
View File

@ -248,7 +248,7 @@ void rzone_state::rzbatfor(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
SM512(config, m_maincpu); // no external XTAL SM512(config, m_maincpu); // no external XTAL
m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w)); m_maincpu->write_segs().set(FUNC(rzone_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(rzone_state::input_r)); m_maincpu->read_k().set(FUNC(rzone_state::input_r));
m_maincpu->write_s().set(FUNC(rzone_state::t2_write_s)); m_maincpu->write_s().set(FUNC(rzone_state::t2_write_s));
m_maincpu->write_r().set(FUNC(rzone_state::t2_write_r)); m_maincpu->write_r().set(FUNC(rzone_state::t2_write_r));
@ -272,7 +272,7 @@ void rzone_state::rztoshden(machine_config &config)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); SM510(config, m_maincpu);
m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT); m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT);
m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w)); m_maincpu->write_segs().set(FUNC(rzone_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(rzone_state::input_r)); m_maincpu->read_k().set(FUNC(rzone_state::input_r));
m_maincpu->write_s().set(FUNC(rzone_state::t1_write_s)); m_maincpu->write_s().set(FUNC(rzone_state::t1_write_s));
m_maincpu->write_r().set(FUNC(rzone_state::t1_write_r)); m_maincpu->write_r().set(FUNC(rzone_state::t1_write_r));
@ -296,7 +296,7 @@ void rzone_state::rzindy500(machine_config &config)
/* basic machine hardware */ /* basic machine hardware */
SM510(config, m_maincpu); // no external XTAL SM510(config, m_maincpu); // no external XTAL
m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT); // confirmed m_maincpu->set_r_mask_option(sm510_base_device::RMASK_DIRECT); // confirmed
m_maincpu->write_segs().set(FUNC(hh_sm510_state::sm510_lcd_segment_w)); m_maincpu->write_segs().set(FUNC(rzone_state::sm510_lcd_segment_w));
m_maincpu->read_k().set(FUNC(rzone_state::input_r)); m_maincpu->read_k().set(FUNC(rzone_state::input_r));
m_maincpu->write_s().set(FUNC(rzone_state::t1_write_s)); m_maincpu->write_s().set(FUNC(rzone_state::t1_write_s));
m_maincpu->write_r().set(FUNC(rzone_state::t1_write_r)); m_maincpu->write_r().set(FUNC(rzone_state::t1_write_r));

2
src/mame/drivers/sun4.cpp
View File

@ -1850,7 +1850,7 @@ void sun4_state::sun4(machine_config &config)
{ {
/* basic machine hardware */ /* basic machine hardware */
MB86901(config, m_maincpu, 16'670'000); MB86901(config, m_maincpu, 16'670'000);
m_maincpu->add_asi_desc([](sparc_disassembler *dasm) { dasm->add_asi_desc(sun4_asi_desc); }); m_maincpu->add_asi_desc([](sparc_disassembler *dasm) { dasm->add_asi_desc(sun4_asi_desc); });
m_maincpu->set_addrmap(0, &sun4_state::sun4c_debugger_map); m_maincpu->set_addrmap(0, &sun4_state::sun4c_debugger_map);
// TODO: MMU for sun4 hardware // TODO: MMU for sun4 hardware

31
src/mame/includes/hh_sm510.h
View File

@ -28,6 +28,10 @@ public:
m_decay_len(17) m_decay_len(17)
{ } { }
virtual DECLARE_INPUT_CHANGED_MEMBER(input_changed);
virtual DECLARE_INPUT_CHANGED_MEMBER(acl_button);
protected:
// devices // devices
required_device<sm510_base_device> m_maincpu; required_device<sm510_base_device> m_maincpu;
optional_device<speaker_sound_device> m_speaker; optional_device<speaker_sound_device> m_speaker;
@ -46,8 +50,6 @@ public:
u8 read_inputs(int columns, int fixed = -1); u8 read_inputs(int columns, int fixed = -1);
virtual void update_k_line(); virtual void update_k_line();
virtual DECLARE_INPUT_CHANGED_MEMBER(input_changed);
virtual DECLARE_INPUT_CHANGED_MEMBER(acl_button);
virtual DECLARE_WRITE16_MEMBER(sm510_lcd_segment_w); virtual DECLARE_WRITE16_MEMBER(sm510_lcd_segment_w);
virtual DECLARE_WRITE16_MEMBER(sm500_lcd_segment_w); virtual DECLARE_WRITE16_MEMBER(sm500_lcd_segment_w);
virtual DECLARE_READ8_MEMBER(input_r); virtual DECLARE_READ8_MEMBER(input_r);
@ -71,9 +73,32 @@ public:
TIMER_CALLBACK_MEMBER(display_decay_tick); TIMER_CALLBACK_MEMBER(display_decay_tick);
emu_timer *m_display_decay_timer; emu_timer *m_display_decay_timer;
protected:
virtual void machine_start() override; virtual void machine_start() override;
virtual void machine_reset() override; virtual void machine_reset() override;
void common_base(machine_config &config, u16 width, u16 height);
void sm500_base(machine_config &config, u16 width, u16 height);
void sm510_base(machine_config &config, u16 width, u16 height);
void common_sm511(machine_config &config, u16 width, u16 height);
void gnw_sm5a(machine_config &config, u16 width, u16 height);
void gnw_sm5a_matrix(machine_config &config, u16 width, u16 height);
void gnw_kb1013vk12_matrix(machine_config &config, u16 width, u16 height);
void gnw_sm510(machine_config &config, u16 width, u16 height);
void gnw_sm511(machine_config &config, u16 width, u16 height);
void gnw_dualh(machine_config &config, u16 leftwidth, u16 leftheight, u16 rightwidth, u16 rightheight);
void gnw_dualv(machine_config &config, u16 topwidth, u16 topheight, u16 botwidth, u16 botheight);
void gnw_sm510_dualh(machine_config &config, u16 leftwidth, u16 leftheight, u16 rightwidth, u16 rightheight);
void gnw_sm510_dualv(machine_config &config, u16 topwidth, u16 topheight, u16 botwidth, u16 botheight);
void gnw_sm511_dualv(machine_config &config, u16 topwidth, u16 topheight, u16 botwidth, u16 botheight);
void gnw_sm512_dualv(machine_config &config, u16 topwidth, u16 topheight, u16 botwidth, u16 botheight);
void konami_sm510(machine_config &config, u16 width, u16 height);
void tiger_sm510_1bit(machine_config &config, u16 width, u16 height);
void tiger_sm511_1bit(machine_config &config, u16 width, u16 height);
void tiger_sm511_2bit(machine_config &config, u16 width, u16 height);
}; };

15
src/mame/machine/decopincpu.h
View File

@ -111,10 +111,11 @@ private:
class decocpu_type2_device : public decocpu_type1_device class decocpu_type2_device : public decocpu_type1_device
{ {
public: public:
decocpu_type2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const char *cpuregion_tag) template <typename T>
decocpu_type2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpuregion_tag)
: decocpu_type2_device(mconfig, tag, owner, clock) : decocpu_type2_device(mconfig, tag, owner, clock)
{ {
set_cpuregion(cpuregion_tag); set_cpuregion(std::forward<T>(cpuregion_tag));
} }
decocpu_type2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); decocpu_type2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@ -131,10 +132,11 @@ protected:
class decocpu_type3_device : public decocpu_type2_device class decocpu_type3_device : public decocpu_type2_device
{ {
public: public:
decocpu_type3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const char *cpuregion_tag) template <typename T>
decocpu_type3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpuregion_tag)
: decocpu_type3_device(mconfig, tag, owner, clock) : decocpu_type3_device(mconfig, tag, owner, clock)
{ {
set_cpuregion(cpuregion_tag); set_cpuregion(std::forward<T>(cpuregion_tag));
} }
decocpu_type3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); decocpu_type3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
@ -149,10 +151,11 @@ protected:
class decocpu_type3b_device : public decocpu_type3_device class decocpu_type3b_device : public decocpu_type3_device
{ {
public: public:
decocpu_type3b_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, const char *cpuregion_tag) template <typename T>
decocpu_type3b_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpuregion_tag)
: decocpu_type3b_device(mconfig, tag, owner, clock) : decocpu_type3b_device(mconfig, tag, owner, clock)
{ {
set_cpuregion(cpuregion_tag); set_cpuregion(std::forward<T>(cpuregion_tag));
} }
decocpu_type3b_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); decocpu_type3b_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);

9
src/mame/machine/docg3.h
View File

@ -19,14 +19,7 @@
class diskonchip_g3_device : public device_t, public device_nvram_interface class diskonchip_g3_device : public device_t, public device_nvram_interface
{ {
public: public:
// construction/destruction diskonchip_g3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0U);
diskonchip_g3_device(const machine_config &mconfig, const char *tag, device_t *owner, int size)
: diskonchip_g3_device(mconfig, tag, owner, (uint32_t)0)
{
set_size(size);
}
diskonchip_g3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
void set_size(int _size) { m_size = _size; } void set_size(int _size) { m_size = _size; }
protected: protected:

2
src/mame/machine/msx_systemflags.h
View File

@ -16,7 +16,7 @@ class msx_systemflags_device : public device_t
public: public:
template <typename T> template <typename T>
msx_systemflags_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&maincpu_tag, uint8_t initial_value) msx_systemflags_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&maincpu_tag, uint8_t initial_value)
:msx_systemflags_device(mconfig, tag, owner, 0) : msx_systemflags_device(mconfig, tag, owner, 0)
{ {
set_maincpu_tag(std::forward<T>(maincpu_tag)); set_maincpu_tag(std::forward<T>(maincpu_tag));
set_initial_value(initial_value); set_initial_value(initial_value);