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i386: add "to do" comments to to opcodes that effect the cache (nw)

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This commit is contained in:
yz70s 2019-02-10 11:35:01 +01:00
parent b8d642c4b6
commit 2db96447bc
2 changed files with 9 additions and 8 deletions
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4
src/devices/cpu/i386/i486ops.hxx
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@ -44,13 +44,13 @@ void i386_device::i486_cpuid() // Opcode 0x0F A2
void i386_device::i486_invd() // Opcode 0x0f 08
{
// Nothing to do ?
// TODO: manage the cache if present
CYCLES(CYCLES_INVD);
}
void i386_device::i486_wbinvd() // Opcode 0x0f 09
{
// Nothing to do ?
// TODO: manage the cache if present
}
void i386_device::i486_cmpxchg_rm8_r8() // Opcode 0x0f b0

13
src/devices/cpu/i386/pentops.hxx
View File

@ -203,6 +203,7 @@ void i386_device::pentium_prefetch_m8() // Opcode 0x0f 18
{
uint8_t modrm = FETCH();
uint32_t ea = GetEA(modrm,0);
// TODO: manage the cache if present
CYCLES(1+(ea & 1)); // TODO: correct cycle count
}
@ -1045,7 +1046,7 @@ void i386_device::pentium_movnti_m16_r16() // Opcode 0f c3
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
} else {
// since cache is not implemented
// TODO: manage the cache if present
uint32_t ea = GetEA(modrm, 0);
WRITE16(ea,LOAD_RM16(modrm));
CYCLES(1); // TODO: correct cycle count
@ -1059,7 +1060,7 @@ void i386_device::pentium_movnti_m32_r32() // Opcode 0f c3
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
} else {
// since cache is not implemented
// TODO: manage the cache if present
uint32_t ea = GetEA(modrm, 0);
WRITE32(ea,LOAD_RM32(modrm));
CYCLES(1); // TODO: correct cycle count
@ -1116,7 +1117,7 @@ void i386_device::pentium_movntq_m64_r64() // Opcode 0f e7
if( modrm >= 0xc0 ) {
CYCLES(1); // unsupported
} else {
// since cache is not implemented
// TODO: manage the cache if present
uint32_t ea = GetEA(modrm, 0);
WRITEMMX(ea, MMX((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
@ -3317,7 +3318,7 @@ void i386_device::sse_movntps_m128_r128() // Opcode 0f 2b
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
} else {
// since cache is not implemented
// TODO: manage the cache if present
uint32_t ea = GetEA(modrm, 0);
WRITEXMM(ea, XMM((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
@ -5962,7 +5963,7 @@ void i386_device::sse_movntdq_m128_r128() // Opcode 66 0f e7
if( modrm >= 0xc0 ) {
CYCLES(1); // unsupported
} else {
// since cache is not implemented
// TODO: manage the cache if present
uint32_t ea = GetEA(modrm, 0);
WRITEXMM(ea, XMM((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count
@ -6276,7 +6277,7 @@ void i386_device::sse_movntpd_m128_r128() // Opcode 66 0f 2b
// unsupported by cpu
CYCLES(1); // TODO: correct cycle count
} else {
// since cache is not implemented
// TODO: manage the cache if present
uint32_t ea = GetEA(modrm, 0);
WRITEXMM(ea, XMM((modrm >> 3) & 0x7));
CYCLES(1); // TODO: correct cycle count