From 2dbd665dddb96f95afbb0301d3adcb4f74d6fe60 Mon Sep 17 00:00:00 2001 From: angelosa Date: Fri, 18 Apr 2025 18:32:15 +0200 Subject: [PATCH] nec/pc9821.cpp: fix A20 regression --- src/mame/nec/pc9801.cpp | 7 +++- src/mame/nec/pc9801.h | 4 +- src/mame/nec/pc9821.cpp | 80 +++------------------------------------- src/mame/nec/pc98_sdip.h | 6 +++ 4 files changed, 20 insertions(+), 77 deletions(-) diff --git a/src/mame/nec/pc9801.cpp b/src/mame/nec/pc9801.cpp index 69fa7ed8f93..1188b6a8223 100644 --- a/src/mame/nec/pc9801.cpp +++ b/src/mame/nec/pc9801.cpp @@ -792,6 +792,8 @@ void pc9801vm_state::a20_ctrl_w(offs_t offset, uint8_t data) m_gate_a20 = 1; else if(data == 0x03) m_gate_a20 = 0; + else + logerror("CPU port $00f6: unmapped data write %02x\n", data); } m_maincpu->set_input_line(INPUT_LINE_A20, m_gate_a20); } @@ -1242,7 +1244,7 @@ void pc9801us_state::pc9801us_io(address_map &map) if (data == 0xa0 || data == 0xe0) m_sdip->bank_w(BIT(data, 6)); else - logerror("SDIP: I/O $00f6 unrecognized write %02x\n", data); + a20_ctrl_w(3, data); })); // 0x841e ~ 0x8f1e SDIP I/O mapping @@ -1312,7 +1314,7 @@ void pc9801bx_state::pc9801bx2_io(address_map &map) { pc9801us_io(map); // NOP legacy SDIP bank access - map(0x00f6, 0x00f6).lw8(NAME([] (offs_t offset, u8 data) {})); + map(0x00f6, 0x00f6).lw8(NAME([this] (offs_t offset, u8 data) { a20_ctrl_w(3, data); })); map(0x0534, 0x0534).r(FUNC(pc9801bx_state::i486_cpu_mode_r)); map(0x09a8, 0x09a8).rw(FUNC(pc9801bx_state::gdc_31kHz_r), FUNC(pc9801bx_state::gdc_31kHz_w)); map(0x8f1f, 0x8f1f).lw8(NAME([this] (offs_t offset, u8 data) { @@ -1752,6 +1754,7 @@ void pc9801_state::dack3_w(int state) { /*logerror("%02x 3\n",state);*/ set_dma_ u8 pc9801_state::ppi_sys_portb_r() { + // TODO: should be active low for rs232 u8 res = 0; res |= BIT(m_dsw1->read(), 0) << 3; diff --git a/src/mame/nec/pc9801.h b/src/mame/nec/pc9801.h index a09837a39e4..e5ed307dc5f 100644 --- a/src/mame/nec/pc9801.h +++ b/src/mame/nec/pc9801.h @@ -473,8 +473,10 @@ private: void dma_access_ctrl_w(offs_t offset, u8 data); uint8_t a20_ctrl_r(offs_t offset); +protected: + // TODO: map me as a cpu_f0_map void a20_ctrl_w(offs_t offset, uint8_t data); - +private: template u8 fdc_2hd_2dd_ctrl_r(); template void fdc_2hd_2dd_ctrl_w(u8 data); diff --git a/src/mame/nec/pc9821.cpp b/src/mame/nec/pc9821.cpp index 3cf162285ad..58f36d2ee26 100644 --- a/src/mame/nec/pc9821.cpp +++ b/src/mame/nec/pc9821.cpp @@ -479,7 +479,7 @@ void pc9821_state::pc9821_io(address_map &map) map(0x00c8, 0x00cb).m(m_fdc_2hd, FUNC(upd765a_device::map)).umask32(0x00ff00ff); // map(0x00cc, 0x00cc).rw(FUNC(pc9821_state::fdc_2hd_ctrl_r), FUNC(pc9821_state::fdc_2hd_ctrl_w)); // map(0x00d8, 0x00df) AMD98 (sound?) board -// map(0x00f0, 0x00ff).rw(FUNC(pc9821_state::a20_ctrl_r), FUNC(pc9821_state::a20_ctrl_w)).umask32(0x00ff00ff); +// map(0x00f0, 0x00ff).rw(FUNC(pc9821_state::a20_ctrl_r), FUNC(pc9821_state::a20_ctrl_w)).umask32(0x00ff00ff); // map(0x0188, 0x018f).rw(FUNC(pc9821_state::pc9801_opn_r), FUNC(pc9821_state::pc9801_opn_w)); //ym2203 opn / // map(0x018c, 0x018f) YM2203 OPN extended ports / // map(0x0430, 0x0433).rw(FUNC(pc9821_state::ide_ctrl_r), FUNC(pc9821_state::ide_ctrl_w)).umask32(0x00ff00ff); @@ -697,82 +697,13 @@ static INPUT_PORTS_START( pc9821 ) // They may actually be hardwired defaults that should return constant values depending // on machine type. PORT_START("DSW1") - PORT_DIPNAME( 0x01, 0x01, "Display Type" ) - PORT_DIPSETTING( 0x00, "Normal Display (15KHz)" ) - PORT_DIPSETTING( 0x01, "Hi-Res Display (24KHz)" ) - PORT_DIPNAME( 0x02, 0x00, "DSW1" ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, "Monitor Type" ) - PORT_DIPSETTING( 0x04, "RGB" ) - PORT_DIPSETTING( 0x00, "Plasma" ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, "Graphic Function" ) - PORT_DIPSETTING( 0x80, "Basic (8 Colors)" ) - PORT_DIPSETTING( 0x00, "Expanded (16/4096 Colors)" ) + PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_DEVICE_MEMBER("sdip", FUNC(pc98_sdip_device::dsw1_r)) PORT_START("DSW2") - PORT_DIPNAME( 0x01, 0x00, "DSW2" ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, "GDC clock" ) - PORT_DIPSETTING( 0x80, "2.5 MHz" ) - PORT_DIPSETTING( 0x00, "5 MHz" ) + PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_DEVICE_MEMBER("sdip", FUNC(pc98_sdip_device::dsw2_r)) PORT_START("DSW3") - PORT_DIPNAME( 0x01, 0x01, "FDD Fix Mode" ) - PORT_DIPSETTING( 0x00, "Auto-Detection" ) - PORT_DIPSETTING( 0x01, "Fixed" ) - PORT_DIPNAME( 0x02, 0x02, "FDD Density Select" ) - PORT_DIPSETTING( 0x00, "2DD" ) - PORT_DIPSETTING( 0x02, "2HD" ) - PORT_DIPNAME( 0x04, 0x04, "DSW3" ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, "Conventional RAM size" ) - PORT_DIPSETTING( 0x40, "640 KB" ) - PORT_DIPSETTING( 0x00, "512 KB" ) - PORT_DIPNAME( 0x80, 0x00, "CPU Type" ) - PORT_DIPSETTING( 0x80, "V30" ) - PORT_DIPSETTING( 0x00, "I386" ) + PORT_BIT( 0x23, IP_ACTIVE_LOW, IPT_CUSTOM ) //PORT_CUSTOM_DEVICE_MEMBER("sdip", FUNC(pc98_sdip_device::dsw3_r)) // TODO: make a mouse device, not unlike pc9801_epson.cpp PORT_START("MOUSE_X") @@ -1133,7 +1064,8 @@ void pc9821_note_lavie_state::pc9821nw150(machine_config &config) ROM_START( pc9821 ) ROM_REGION16_LE( 0x30000, "ipl", ROMREGION_ERASEFF ) - ROM_LOAD( "itf.rom", 0x10000, 0x08000, CRC(dd4c7bb8) SHA1(cf3aa193df2722899066246bccbed03f2e79a74a) ) + // baddump: has no code for setup mode + ROM_LOAD( "itf.rom", 0x10000, 0x08000, BAD_DUMP CRC(dd4c7bb8) SHA1(cf3aa193df2722899066246bccbed03f2e79a74a) ) ROM_LOAD( "bios.rom", 0x18000, 0x18000, BAD_DUMP CRC(34a19a59) SHA1(2e92346727b0355bc1ec9a7ded1b444a4917f2b9) ) ROM_FILL(0x24c40, 4, 0) // hide the _32_ marker until we have a 32-bit clean IDE bios otherwise windows tries to // make a 32-bit call into 16-bit code diff --git a/src/mame/nec/pc98_sdip.h b/src/mame/nec/pc98_sdip.h index e2eda96fd8d..8d18c8f9ba5 100644 --- a/src/mame/nec/pc98_sdip.h +++ b/src/mame/nec/pc98_sdip.h @@ -19,6 +19,12 @@ public: void write(offs_t offset, u8 data); void bank_w(int state); + // legacy i/f + // TODO: not necessarily linear + ioport_value dsw1_r() { return m_sdip_ram[0]; } + ioport_value dsw2_r() { return m_sdip_ram[1]; } + ioport_value dsw3_r() { return m_sdip_ram[2]; } + protected: virtual void device_start() override ATTR_COLD; virtual void device_reset() override ATTR_COLD;