From 2e11d3dc96433a08b07820c2379ac3820753f4cc Mon Sep 17 00:00:00 2001 From: "R. Belmont" Date: Tue, 21 Sep 2010 02:25:21 +0000 Subject: [PATCH] M68k: Add more conditionals and FGETEXP instruction [R. Belmont] --- src/emu/cpu/m68000/m68kfpu.c | 23 +++++++++++++++++++++++ 1 file changed, 23 insertions(+) diff --git a/src/emu/cpu/m68000/m68kfpu.c b/src/emu/cpu/m68000/m68kfpu.c index aa81e8aaf53..e1afc4186fc 100644 --- a/src/emu/cpu/m68000/m68kfpu.c +++ b/src/emu/cpu/m68000/m68kfpu.c @@ -314,6 +314,18 @@ INLINE int TEST_CONDITION(m68ki_cpu_core *m68k, int condition) case 0x15: case 0x05: return (z || (n && !nan)); // Less Than or Equal + case 0x16: + case 0x06: return !nan && !z; + + case 0x17: + case 0x07: return !nan; + + case 0x18: + case 0x08: return nan; + + case 0x19: + case 0x09: return nan || z; + case 0x1a: case 0x0a: return (nan || !(n || z)); // Not Less Than or Equal @@ -1182,6 +1194,17 @@ static void fpgen_rm_reg(m68ki_cpu_core *m68k, UINT16 w2) m68k->remaining_cycles -= 3; break; } + case 0x1e: // FGETEXP + { + floatx80 temp = source; + INT16 temp2; + + temp2 = source.high; // get the exponent + temp2 -= 0x3fff; // take off the bias + REG_FP[dst] = double_to_fx80((double)temp2); + SET_CONDITION_CODES(m68k, REG_FP[dst]); + m68k->remaining_cycles -= 6; + } case 0x20: // FDIV { REG_FP[dst] = floatx80_div(REG_FP[dst], source);