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(mess) rmnimbus: more refactoring, simplfy and better document the video controller (nw)

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This commit is contained in:
cracyc 2014-07-07 21:35:48 +00:00
parent 9fc9f1a13c
commit 2e1ebbc360
4 changed files with 194 additions and 322 deletions
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2
src/mess/drivers/rmnimbus.c
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@ -82,13 +82,11 @@ INPUT_PORTS_END
static ADDRESS_MAP_START(nimbus_iocpu_mem, AS_PROGRAM, 8, rmnimbus_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x0000, 0x1fff) AM_ROM
//AM_RANGE(0x2000, 0x7fff) AM_RAM
ADDRESS_MAP_END
static ADDRESS_MAP_START( nimbus_iocpu_io , AS_IO, 8, rmnimbus_state )
ADDRESS_MAP_UNMAP_HIGH
AM_RANGE(0x00000, 0x000FF) AM_READWRITE(nimbus_pc8031_iou_r, nimbus_pc8031_iou_w)
//AM_RANGE(0x00010, 0x07fff) AM_RAM
AM_RANGE(0x20000, 0x20004) AM_READWRITE(nimbus_pc8031_port_r, nimbus_pc8031_port_w)
ADDRESS_MAP_END

145
src/mess/includes/rmnimbus.h
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@ -19,97 +19,15 @@
#define MAINCPU_TAG "maincpu"
#define IOCPU_TAG "iocpu"
/* Nimbus specific */
/* External int vectors for chained interupts */
#define EXTERNAL_INT_DISK 0x80
#define EXTERNAL_INT_MSM5205 0x84
#define EXTERNAL_INT_MOUSE_YU 0x88
#define EXTERNAL_INT_MOUSE_YD 0x89
#define EXTERNAL_INT_MOUSE_XL 0x8A
#define EXTERNAL_INT_MOUSE_XR 0x8B
#define EXTERNAL_INT_PC8031_8C 0x8c
#define EXTERNAL_INT_PC8031_8E 0x8E
#define EXTERNAL_INT_PC8031_8F 0x8F
/* Memory controler */
#define RAM_BANK00_TAG "bank0"
#define RAM_BANK01_TAG "bank1"
#define RAM_BANK02_TAG "bank2"
#define RAM_BANK03_TAG "bank3"
#define RAM_BANK04_TAG "bank4"
#define RAM_BANK05_TAG "bank5"
#define RAM_BANK06_TAG "bank6"
#define RAM_BANK07_TAG "bank7"
#define HIBLOCK_BASE_MASK 0x08
#define HIBLOCK_SELECT_MASK 0x10
/* Z80 SIO for keyboard */
#define Z80SIO_TAG "z80sio"
/* Floppy/Fixed drive interface */
#define FDC_TAG "wd2793"
#define NO_DRIVE_SELECTED 0xFF
/* SASI harddisk interface */
#define SCSIBUS_TAG "scsibus"
/* Masks for writes to port 0x400 */
#define FDC_DRIVE0_MASK 0x01
#define FDC_DRIVE1_MASK 0x02
#define FDC_DRIVE2_MASK 0x04
#define FDC_DRIVE3_MASK 0x08
#define FDC_SIDE_MASK 0x10
#define FDC_MOTOR_MASKO 0x20
#define HDC_DRQ_MASK 0x40
#define FDC_DRQ_MASK 0x80
#define FDC_DRIVE_MASK (FDC_DRIVE0_MASK | FDC_DRIVE1_MASK | FDC_DRIVE2_MASK | FDC_DRIVE3_MASK)
#define FDC_SIDE() ((m_nimbus_drives.reg400 & FDC_SIDE_MASK) >> 4)
#define FDC_MOTOR() ((m_nimbus_drives.reg400 & FDC_MOTOR_MASKO) >> 5)
#define FDC_DRIVE() (fdc_driveno(m_nimbus_drives.reg400 & FDC_DRIVE_MASK))
#define HDC_DRQ_ENABLED() ((m_nimbus_drives.reg400 & HDC_DRQ_MASK) ? 1 : 0)
#define FDC_DRQ_ENABLED() ((m_nimbus_drives.reg400 & FDC_DRQ_MASK) ? 1 : 0)
/* 8031/8051 Peripheral controler */
#define IPC_OUT_ADDR 0X01
#define IPC_OUT_READ_PEND 0X02
#define IPC_OUT_BYTE_AVAIL 0X04
#define IPC_IN_ADDR 0X01
#define IPC_IN_BYTE_AVAIL 0X02
#define IPC_IN_READ_PEND 0X04
#define ER59256_TAG "er59256"
/* IO unit */
#define DISK_INT_ENABLE 0x01
#define MSM5205_INT_ENABLE 0x04
#define MOUSE_INT_ENABLE 0x08
#define PC8031_INT_ENABLE 0x10
/* Sound hardware */
#define AY8910_TAG "ay8910"
#define MONO_TAG "mono"
#define MSM5205_TAG "msm5205"
#define Z80SIO_TAG "z80sio"
#define FDC_TAG "wd2793"
#define SCSIBUS_TAG "scsibus"
#define ER59256_TAG "er59256"
#define AY8910_TAG "ay8910"
#define MONO_TAG "mono"
#define MSM5205_TAG "msm5205"
#define VIA_TAG "via6522"
#define CENTRONICS_TAG "centronics"
/* Mouse / Joystick */
@ -118,26 +36,15 @@
#define MOUSEX_TAG "mousex"
#define MOUSEY_TAG "mousey"
enum
{
MOUSE_PHASE_STATIC = 0,
MOUSE_PHASE_POSITIVE,
MOUSE_PHASE_NEGATIVE
};
#define MOUSE_INT_ENABLED(state) (((state)->m_iou_reg092 & MOUSE_INT_ENABLE) ? 1 : 0)
/* Paralell / User port BBC compatible ! */
#define VIA_TAG "via6522"
#define CENTRONICS_TAG "centronics"
#define VIA_INT 0x03
#define LINEAR_ADDR(seg,ofs) ((seg<<4)+ofs)
#define OUTPUT_SEGOFS(mess,seg,ofs) logerror("%s=%04X:%04X [%08X]\n",mess,seg,ofs,((seg<<4)+ofs))
/* Memory controller */
#define RAM_BANK00_TAG "bank0"
#define RAM_BANK01_TAG "bank1"
#define RAM_BANK02_TAG "bank2"
#define RAM_BANK03_TAG "bank3"
#define RAM_BANK04_TAG "bank4"
#define RAM_BANK05_TAG "bank5"
#define RAM_BANK06_TAG "bank6"
#define RAM_BANK07_TAG "bank7"
class rmnimbus_state : public driver_device
{
@ -184,8 +91,8 @@ public:
UINT8 m_last_playmode;
UINT8 m_ay8910_a;
UINT8 m_sio_int_state;
UINT16 m_vidregs[24];
UINT16 m_x, m_y;
UINT16 m_x, m_y, m_yline;
UINT8 m_colours, m_mode, m_op;
UINT32 m_debug_video;
UINT8 m_vector;
UINT8 m_eeprom_bits;
@ -236,18 +143,6 @@ public:
void write_pixel_line(UINT16 x, UINT16 y, UINT16, UINT8 pixels, UINT8 bpp);
void move_pixel_line(UINT16 x, UINT16 y, UINT8 width);
void write_pixel_data(UINT16 x, UINT16 y, UINT16 data);
void write_reg_004();
void write_reg_006();
void write_reg_00A();
void write_reg_00E();
void write_reg_010();
void write_reg_012();
void write_reg_014();
void write_reg_016();
void write_reg_01A();
void write_reg_01C();
void write_reg_01E();
void write_reg_026();
void change_palette(UINT8 bank, UINT16 colours);
void external_int(UINT16 intno, UINT8 vector);
DECLARE_READ8_MEMBER(cascade_callback);

53
src/mess/machine/rmnimbus.c
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@ -64,16 +64,63 @@ chdman createhd -o ST125N.chd -chs 407,4,26 -ss 512
/* Defines, constants, and global variables */
/*-------------------------------------------------------------------------*/
#define LOG_KEYBOARD 0
/* External int vectors for chained interrupts */
#define EXTERNAL_INT_DISK 0x80
#define EXTERNAL_INT_MSM5205 0x84
#define EXTERNAL_INT_MOUSE_YU 0x88
#define EXTERNAL_INT_MOUSE_YD 0x89
#define EXTERNAL_INT_MOUSE_XL 0x8A
#define EXTERNAL_INT_MOUSE_XR 0x8B
#define EXTERNAL_INT_PC8031_8C 0x8c
#define EXTERNAL_INT_PC8031_8E 0x8E
#define EXTERNAL_INT_PC8031_8F 0x8F
#define HDC_DRQ_MASK 0x40
#define FDC_SIDE() ((m_nimbus_drives.reg400 & 0x10) >> 4)
#define FDC_MOTOR() ((m_nimbus_drives.reg400 & 0x20) >> 5)
#define FDC_DRIVE() (fdc_driveno(m_nimbus_drives.reg400 & 0x0f))
#define HDC_DRQ_ENABLED() ((m_nimbus_drives.reg400 & 0x40) ? 1 : 0)
#define FDC_DRQ_ENABLED() ((m_nimbus_drives.reg400 & 0x80) ? 1 : 0)
/* 8031/8051 Peripheral controller */
#define IPC_OUT_ADDR 0X01
#define IPC_OUT_READ_PEND 0X02
#define IPC_OUT_BYTE_AVAIL 0X04
#define IPC_IN_ADDR 0X01
#define IPC_IN_BYTE_AVAIL 0X02
#define IPC_IN_READ_PEND 0X04
/* IO unit */
#define DISK_INT_ENABLE 0x01
#define MSM5205_INT_ENABLE 0x04
#define MOUSE_INT_ENABLE 0x08
#define PC8031_INT_ENABLE 0x10
enum
{
MOUSE_PHASE_STATIC = 0,
MOUSE_PHASE_POSITIVE,
MOUSE_PHASE_NEGATIVE
};
#define MOUSE_INT_ENABLED(state) (((state)->m_iou_reg092 & MOUSE_INT_ENABLE) ? 1 : 0)
#define VIA_INT 0x03
#define LINEAR_ADDR(seg,ofs) ((seg<<4)+ofs)
#define OUTPUT_SEGOFS(mess,seg,ofs) logerror("%s=%04X:%04X [%08X]\n",mess,seg,ofs,((seg<<4)+ofs))
#define LOG_SIO 0
#define LOG_DISK_FDD 0
#define LOG_DISK_HDD 0
#define LOG_DISK 0
#define LOG_PC8031 0
#define LOG_PC8031_186 0
#define LOG_PC8031_PORT 0
#define LOG_IOU 0
#define LOG_SOUND 0
#define LOG_RAM 0
/* Debugging */

316
src/mess/video/rmnimbus.c
View File

@ -29,40 +29,13 @@
#define WIDTH_MASK 0x07
// Offsets of nimbus video registers within register array
#define reg000 0x00
#define reg002 0x01
#define reg004 0x02
#define reg006 0x03
#define reg008 0x04
#define reg00A 0x05
#define reg00C 0x06
#define reg00E 0x07
#define reg010 0x08
#define reg012 0x09
#define reg014 0x0A
#define reg016 0x0B
#define reg018 0x0C
#define reg01A 0x0D
#define reg01C 0x0E
#define reg01E 0x0F
#define reg020 0x10
#define reg022 0x11
#define reg024 0x12
#define reg026 0x13
#define reg028 0x14
#define reg02A 0x15
#define reg02C 0x16
#define reg02E 0x17
#define FG_COLOUR (m_vidregs[reg024]&0x0F)
#define BG_COLOUR ((m_vidregs[reg024]&0xF0)>>4)
#define FG_COLOUR (m_colours&0x0F)
#define BG_COLOUR ((m_colours&0xF0)>>4)
#define SELECT_COL(x,c) (IS_80COL ? ((((x) & 1) ? ((c) << 2) : (c)) & 0xC) : (c))
#define FILL_WORD(c) (((c) << 12) | ((c) << 8) | ((c) << 4) | (c))
#define IS_80COL (m_vidregs[reg026]&0x10)
#define IS_XOR (m_vidregs[reg022]&8)
#define IS_80COL (m_mode&0x10)
#define IS_XOR (m_op&8)
#define DEBUG_TEXT 0x01
#define DEBUG_DB 0x02
@ -72,49 +45,53 @@
static void video_debug(running_machine &machine, int ref, int params, const char *param[]);
/*
I'm not sure which of thes return values on a real machine, so for the time being I'm going
to return the values for all of them, it doesn't seem to hurt !
*/
READ16_MEMBER(rmnimbus_state::nimbus_video_io_r)
{
int pc=space.device().safe_pc();
UINT16 result;
UINT16 result = 0;
switch (offset)
{
case reg000 : result=read_pixel_data(m_vidregs[reg002],m_vidregs[reg00C]); break;
case reg002 : result=m_vidregs[reg002]; break;
case reg004 : result=read_pixel_data(m_vidregs[reg002],++m_vidregs[reg00C]); break;
case reg006 : result=m_vidregs[reg006]; break;
case reg008 : result=m_vidregs[reg008]; break;
case reg00A : result=read_pixel_data(++m_vidregs[reg002],m_vidregs[reg00C]); break;
case reg00C : result=m_vidregs[reg00C]; break;
case reg00E : result=m_vidregs[reg00E]; break;
case 0x00:
case 0x08:
result = read_pixel_data(m_x, m_y);
break;
case 0x02:
case 0x0A:
result = read_pixel_data(m_x, ++m_y);
break;
case 0x05:
case 0x0D:
result = read_pixel_data(++m_x, m_y);
break;
case reg010 : result=read_pixel_data(m_vidregs[reg002],m_vidregs[reg00C]); break;
case reg012 : result=m_vidregs[reg012]; break;
case reg014 : result=m_vidregs[reg014]; break;
case reg016 : result=m_vidregs[reg016]; break;
case reg018 : result=m_vidregs[reg018]; break;
case reg01A : result=read_pixel_data(++m_vidregs[reg002],m_vidregs[reg00C]); break;
case reg01C : result=m_vidregs[reg01C]; break;
case reg01E : result=m_vidregs[reg01E]; break;
case reg020 : result=m_vidregs[reg020]; break;
case reg022 : result=m_vidregs[reg022]; break;
case reg024 : result=m_vidregs[reg024]; break;
case reg026 : result=m_vidregs[reg026]; break;
case reg028 : result=m_screen->vpos() % 0xb; break; //result=m_vidregs[reg028]; break;
case reg02A : result=m_vidregs[reg002]; break;
case reg02C : result=m_vidregs[reg00C]; break;
case reg02E : result=m_vidregs[reg02E]; break;
default : result=0; break;
case 0x10:
result = m_yline;
break;
case 0x11:
result = m_op;
break;
case 0x12:
result = m_colours;
break;
case 0x13:
result = m_mode;
break;
case 0x14:
result = m_screen->vpos() % 0xb; // TODO: verify
break;
case 0x15:
result = m_x;
break;
case 0x16:
result = m_y;
break;
default:
logerror("nimbus: unknown video reg read %02x\n", offset);
break;
}
if(DEBUG_SET(DEBUG_TEXT))
logerror("Nimbus video IOR at %05X from %04X mask=%04X, data=%04X\n",pc,(offset*2),mem_mask,result);
logerror("Nimbus video IOR at %05X from %04X mask=%04X, data=%04X\n",space.device().safe_pc(),(offset*2),mem_mask,result);
return result;
}
@ -160,11 +137,11 @@ UINT16 rmnimbus_state::read_pixel_data(UINT16 x, UINT16 y)
UINT16 result=0;
if(DEBUG_SET(DEBUG_TEXT | DEBUG_PIXEL))
logerror("read_pixel_data(x=%d, y=%d), reg022=%04X\n",x,y,m_vidregs[reg022]);
logerror("read_pixel_data(x=%d, y=%d), reg022=%04X\n",x,y,m_op);
if(IS_80COL)
{
switch (m_vidregs[reg022] & WIDTH_MASK)
switch (m_op & WIDTH_MASK)
{
case 0x00 : break;
@ -189,7 +166,7 @@ UINT16 rmnimbus_state::read_pixel_data(UINT16 x, UINT16 y)
}
else /* 40 Col */
{
switch (m_vidregs[reg022] & WIDTH_MASK)
switch (m_op & WIDTH_MASK)
{
case 0x00 : break;
@ -215,8 +192,7 @@ UINT16 rmnimbus_state::read_pixel_data(UINT16 x, UINT16 y)
}
/*
Write to the video registers, the default action is to write to the array of registers.
If a register also needs some special action call the action function for that register.
Write to the video registers.
Incase anyone wonders about the DEBUG_DB statement, this allows me to log which registers
are being written to and then play them back at the real machine, this has helped greatly
@ -226,12 +202,11 @@ UINT16 rmnimbus_state::read_pixel_data(UINT16 x, UINT16 y)
WRITE16_MEMBER(rmnimbus_state::nimbus_video_io_w)
{
int pc=space.device().safe_pc();
if(offset<reg028)
UINT16 colours = data;
if(offset < 0x14)
{
if(DEBUG_SET(DEBUG_TEXT))
logerror("Nimbus video IOW at %05X write of %04X to %04X mask=%04X\n",pc,data,(offset*2),mem_mask);
logerror("Nimbus video IOW at %05X write of %04X to %04X mask=%04X\n",space.device().safe_pc(),data,(offset*2),mem_mask);
if(DEBUG_SET(DEBUG_DB))
logerror("dw %05X,%05X\n",(offset*2),data);
@ -239,35 +214,75 @@ WRITE16_MEMBER(rmnimbus_state::nimbus_video_io_w)
switch (offset)
{
case reg000 : m_vidregs[reg000]=data; break;
case reg002 : m_vidregs[reg002]=data; break;
case reg004 : m_vidregs[reg004]=data; write_reg_004(); break;
case reg006 : m_vidregs[reg006]=data; write_reg_006(); break;
case reg008 : m_vidregs[reg008]=data; break;
case reg00A : m_vidregs[reg00A]=data; write_reg_00A(); break;
case reg00C : m_vidregs[reg00C]=data; break;
case reg00E : m_vidregs[reg00E]=data; write_reg_00E(); break;
case 0x00:
case 0x08:
break;
case reg010 : m_vidregs[reg010]=data; write_reg_010(); break;
case reg012 : m_vidregs[reg012]=data; write_reg_012(); break;
case reg014 : m_vidregs[reg014]=data; write_reg_014(); break;
case reg016 : m_vidregs[reg016]=data; write_reg_016(); break;
case reg018 : m_vidregs[reg018]=data; break;
case reg01A : m_vidregs[reg01A]=data; write_reg_01A(); break;
case reg01C : m_vidregs[reg01C]=data; write_reg_01C();break;
case reg01E : m_vidregs[reg01E]=data; write_reg_01E();break;
case 0x09:
colours = FILL_WORD(FG_COLOUR);
case 0x01:
m_x = data;
break;
case reg020 : m_vidregs[reg020]=data; break;
case reg022 : m_vidregs[reg022]=data; break;
case reg024 : m_vidregs[reg024]=data; break;
case reg026 : m_vidregs[reg026]=data; write_reg_026(); break;
case reg028 : change_palette(0,data); break;
case reg02A : change_palette(1,data); break;
case reg02C : change_palette(2,data); break;
case reg02E : change_palette(3,data); break;
case 0x02:
case 0x0A:
m_y++;
break;
default : break;
case 0x0B:
colours = FILL_WORD(FG_COLOUR);
case 0x03:
m_x = data;
m_y++;
break;
case 0x05:
case 0x0D:
m_x++;
break;
case 0x0E:
colours = FILL_WORD(FG_COLOUR);
case 0x06:
m_y = data;
break;
case 0x0F:
colours = FILL_WORD(FG_COLOUR);
case 0x07:
m_y = data;
m_x++;
break;
case 0x10:
m_yline = data;
return;
case 0x11:
m_op = data;
return;
case 0x12:
m_colours = data;
return;
case 0x13:
/*
bits 0..3 of reg026 contain the border colour.
bit 5 contains the 40/80 column (320/640 pixel) flag.
*/
m_mode = data;
return;
case 0x14:
case 0x15:
case 0x16:
case 0x17:
change_palette(offset - 0x14, data);
return;
default:
logerror("nimbus: unknown video reg write %02x %04x\n", offset, data);
return;
}
if(offset & 0x08)
write_pixel_data(m_x, m_y, colours);
}
void rmnimbus_state::set_pixel(UINT16 x, UINT16 y, UINT8 colour)
@ -327,7 +342,7 @@ void rmnimbus_state::move_pixel_line(UINT16 x, UINT16 y, UINT8 pixels)
{
if(DEBUG_SET(DEBUG_TEXT | DEBUG_PIXEL))
logerror("x=%d\n",x + i);
m_video_mem.pix16(m_vidregs[reg020], x + i) = m_video_mem.pix16(y, x + i);
m_video_mem.pix16(m_yline, x + i) = m_video_mem.pix16(y, x + i);
}
}
@ -361,11 +376,11 @@ void rmnimbus_state::move_pixel_line(UINT16 x, UINT16 y, UINT8 pixels)
void rmnimbus_state::write_pixel_data(UINT16 x, UINT16 y, UINT16 data)
{
if(DEBUG_SET(DEBUG_TEXT | DEBUG_PIXEL))
logerror("write_pixel_data(x=%d, y=%d, data=%04X), reg022=%04X\n",x,y,data,m_vidregs[reg022]);
logerror("write_pixel_data(x=%d, y=%d, data=%04X), reg022=%04X\n",x,y,data,m_op);
if(IS_80COL)
{
switch (m_vidregs[reg022] & WIDTH_MASK)
switch (m_op & WIDTH_MASK)
{
case 0x00:
write_pixel_line(x,y,data,16,1);
@ -402,7 +417,7 @@ void rmnimbus_state::write_pixel_data(UINT16 x, UINT16 y, UINT16 data)
}
else /* 40 Col */
{
switch (m_vidregs[reg022] & WIDTH_MASK)
switch (m_op & WIDTH_MASK)
{
case 0x00:
write_pixel_line(x,y,data,8,1);
@ -439,90 +454,6 @@ void rmnimbus_state::write_pixel_data(UINT16 x, UINT16 y, UINT16 data)
}
}
void rmnimbus_state::write_reg_004()
{
//m_vidregs[reg002]=0;
m_vidregs[reg00C]++;
}
void rmnimbus_state::write_reg_006()
{
m_vidregs[reg00C]++;
m_vidregs[reg002]=m_vidregs[reg006];
}
void rmnimbus_state::write_reg_00A()
{
m_vidregs[reg002]++;
}
void rmnimbus_state::write_reg_00E()
{
m_vidregs[reg002]++;
m_vidregs[reg00C]=m_vidregs[reg00E];
}
void rmnimbus_state::write_reg_010()
{
write_pixel_data(m_vidregs[reg002],m_vidregs[reg00C],m_vidregs[reg010]);
}
void rmnimbus_state::write_reg_012()
{
// I dunno if this is actually what is happening as the regs seem to be write only....
// doing this however does seem to make some programs (worms from the welcom disk)
// work correctly.
m_vidregs[reg002]=m_vidregs[reg012];
write_pixel_data(m_vidregs[reg012],m_vidregs[reg00C],FILL_WORD(FG_COLOUR));
}
void rmnimbus_state::write_reg_014()
{
write_pixel_data(m_vidregs[reg002],++m_vidregs[reg00C],m_vidregs[reg014]);
}
void rmnimbus_state::write_reg_016()
{
m_vidregs[reg002]=m_vidregs[reg016];
write_pixel_data(m_vidregs[reg002],++m_vidregs[reg00C],FILL_WORD(FG_COLOUR));
}
void rmnimbus_state::write_reg_01A()
{
write_pixel_data(++m_vidregs[reg002],m_vidregs[reg00C],m_vidregs[reg01A]);
}
void rmnimbus_state::write_reg_01C()
{
// I dunno if this is actually what is happening as the regs seem to be write only....
// doing this however does seem to make some programs (welcome from the welcom disk,
// and others using the standard RM box menus) work correctly.
m_vidregs[reg00C]=m_vidregs[reg01C];
write_pixel_data(m_vidregs[reg002],m_vidregs[reg01C],FILL_WORD(FG_COLOUR));
}
void rmnimbus_state::write_reg_01E()
{
m_vidregs[reg00C]=m_vidregs[reg01E];
write_pixel_data(++m_vidregs[reg002],m_vidregs[reg00C],FILL_WORD(FG_COLOUR));
}
/*
bits 0..3 of reg026 contain the border colour.
bit 5 contains the 40/80 column (320/640 pixel) flag.
*/
void rmnimbus_state::write_reg_026()
{
if(DEBUG_SET(DEBUG_TEXT))
logerror("reg 026 write, border_colour=%02X\n",m_vidregs[reg026] & 0x0F);
}
void rmnimbus_state::change_palette(UINT8 bank, UINT16 colours)
{
// loop over changing colours
@ -532,7 +463,7 @@ void rmnimbus_state::change_palette(UINT8 bank, UINT16 colours)
m_palette->set_pen_color(colourno, pal2bit((colours & 2) | i), pal2bit(((colours & 4) >> 1) | i), pal2bit(((colours & 1) << 1) | i));
if(DEBUG_SET(DEBUG_TEXT))
logerror("set colourno[%02X], colour=%02X\n",colourno, colours);
logerror("set colourno[%02X], colour=%02X\n",colourno, colours & 0xf);
colours >>= 4;
}
}
@ -557,8 +488,6 @@ void rmnimbus_state::video_start()
m_screen->register_screen_bitmap(m_video_mem);
save_item(NAME(m_vidregs));
if (machine().debug_flags & DEBUG_FLAG_ENABLED)
{
debug_console_register_command(machine(), "nimbus_vid_debug", CMDFLAG_NONE, 0, 0, 1, video_debug);
@ -567,8 +496,11 @@ void rmnimbus_state::video_start()
void rmnimbus_state::video_reset()
{
// When we reset clear the video registers and video memory.
memset(&m_vidregs,0x00,sizeof(m_vidregs));
m_mode = 0;
m_x = 0;
m_y = 0;
m_op = 0;
m_yline = 0;
}
UINT32 rmnimbus_state::screen_update_nimbus(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)