From 1f10ae9609894aa77aa0f47df3e5c2c15cf7b718 Mon Sep 17 00:00:00 2001 From: David Haywood Date: Wed, 5 Oct 2016 14:35:33 +0100 Subject: [PATCH 01/10] new NOT WORKING Mahjong Senpu [system11. David Haywood] displays the game image, upside down, no palette for now, no inputs for now, no sound for now, going to continue work on it. --- scripts/target/mame/arcade.lua | 1 + src/mame/drivers/mjsenpu.cpp | 176 +++++++++++++++++++++++++++++++++ src/mame/mame.lst | 3 + 3 files changed, 180 insertions(+) create mode 100644 src/mame/drivers/mjsenpu.cpp diff --git a/scripts/target/mame/arcade.lua b/scripts/target/mame/arcade.lua index 83e7050110d..4b3473ab579 100644 --- a/scripts/target/mame/arcade.lua +++ b/scripts/target/mame/arcade.lua @@ -4502,6 +4502,7 @@ files { MAME_DIR .. "src/mame/drivers/midas.cpp", MAME_DIR .. "src/mame/drivers/miniboy7.cpp", MAME_DIR .. "src/mame/drivers/mirax.cpp", + MAME_DIR .. "src/mame/drivers/mjsenpu.cpp", MAME_DIR .. "src/mame/drivers/mole.cpp", MAME_DIR .. "src/mame/drivers/mosaic.cpp", MAME_DIR .. "src/mame/includes/mosaic.h", diff --git a/src/mame/drivers/mjsenpu.cpp b/src/mame/drivers/mjsenpu.cpp new file mode 100644 index 00000000000..758f754cdbc --- /dev/null +++ b/src/mame/drivers/mjsenpu.cpp @@ -0,0 +1,176 @@ +// license:BSD-3-Clause +// copyright-holders:David Haywood +/******************************************************************** + + PCB is marked 'Ver 1.8 B/D-' on 2 of the edges + + Custom chip marked + ORIENTAL SOFT + SPR800F1 + 0011E + +*********************************************************************/ + +#include "emu.h" +#include "cpu/e132xs/e132xs.h" +#include "sound/okim6295.h" +#include "machine/nvram.h" + +class mjsenpu_state : public driver_device +{ +public: + mjsenpu_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_oki(*this, "oki"), + m_vram(*this, "vram"), + m_palette(*this, "palette") + { + } + + /* devices */ + required_device m_maincpu; + required_device m_oki; + + required_shared_ptr m_vram; + + DECLARE_DRIVER_INIT(mjsenpu); + virtual void machine_start() override; + virtual void machine_reset() override; + virtual void video_start() override; + UINT32 screen_update_mjsenpu(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); + + required_device m_palette; +}; + + +static ADDRESS_MAP_START( mjsenpu_32bit_map, AS_PROGRAM, 32, mjsenpu_state ) + AM_RANGE(0x00000000, 0x003fffff) AM_RAM + AM_RANGE(0x40000000, 0x401fffff) AM_ROM AM_REGION("user2",0) // main game rom + + AM_RANGE(0x80000000, 0x8001ffff) AM_RAM AM_SHARE("vram") + + AM_RANGE(0xffc00000, 0xffc000ff) AM_RAM + AM_RANGE(0xffd00000, 0xffd000ff) AM_RAM + + + AM_RANGE(0xffe00000, 0xffe0ffff) AM_RAM + + AM_RANGE(0xfff80000, 0xffffffff) AM_ROM AM_REGION("user1",0) // boot rom +ADDRESS_MAP_END + + +static ADDRESS_MAP_START( mjsenpu_io, AS_IO, 32, mjsenpu_state ) +// AM_RANGE(0x000c, 0x000f) AM_READ(unk_r) +ADDRESS_MAP_END + +static INPUT_PORTS_START( mjsenpu ) +INPUT_PORTS_END + + +void mjsenpu_state::video_start() +{ +} + + + +UINT32 mjsenpu_state::screen_update_mjsenpu(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) +{ + int x,y,count; + int color; + + count = 0; + for (y=0;y < 256;y++) + { + for (x=0;x < 512/4;x++) + { + color = m_vram[count] & 0x000000ff; + bitmap.pix16(y, x*4 + 2) = color; + + color = (m_vram[count] & 0x0000ff00) >> 8; + bitmap.pix16(y, x*4 + 3) = color; + + color = (m_vram[count] & 0x00ff0000) >> 16; + bitmap.pix16(y, x*4 + 0) = color; + + color = (m_vram[count] & 0xff000000) >> 24; + bitmap.pix16(y, x*4 + 1) = color; + + count++; + } + } + return 0; + + return 0; +} + + +void mjsenpu_state::machine_start() +{ +} + +void mjsenpu_state::machine_reset() +{ +} + +/* +following clocks are on the PCB + +22.1184 +27.000 +1.0000000 + +*/ + +static MACHINE_CONFIG_START( mjsenpu, mjsenpu_state ) + + /* basic machine hardware */ + MCFG_CPU_ADD("maincpu", E132XT, 27000000) /* ?? Mhz */ + MCFG_CPU_PROGRAM_MAP(mjsenpu_32bit_map) + MCFG_CPU_IO_MAP(mjsenpu_io) + MCFG_CPU_VBLANK_INT_DRIVER("screen", mjsenpu_state, irq0_line_hold) + +// MCFG_NVRAM_ADD_1FILL("nvram") + + /* video hardware */ + MCFG_SCREEN_ADD("screen", RASTER) + MCFG_SCREEN_REFRESH_RATE(60) + MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) + MCFG_SCREEN_SIZE(512, 256) + MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1) + MCFG_SCREEN_UPDATE_DRIVER(mjsenpu_state, screen_update_mjsenpu) + MCFG_SCREEN_PALETTE("palette") + + MCFG_PALETTE_ADD("palette", 0x1000) + MCFG_PALETTE_FORMAT(BBBBBGGGGGGRRRRR) + + MCFG_SPEAKER_STANDARD_MONO("mono") + + MCFG_OKIM6295_ADD("oki", 1000000, OKIM6295_PIN7_HIGH) /* 1 Mhz? */ + MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 1.00) +MACHINE_CONFIG_END + + +ROM_START( mjsenpu ) + ROM_REGION32_BE( 0x80000, "user1", 0 ) /* Hyperstone CPU Code */ + ROM_LOAD( "U1", 0x000000, 0x080000, CRC(ebfb1079) SHA1(9d676c635d5ee464df5730518399e141ebc515ed) ) + + ROM_REGION32_BE( 0x200000, "user2", 0 ) /* Hyperstone CPU Code */ + ROM_LOAD16_WORD_SWAP( "U13", 0x000000, 0x200000, CRC(a803c5a5) SHA1(61c7386a1bb6224b788de01293697d0e896839a8) ) + + ROM_REGION( 0x080000, "oki", 0 ) + ROM_LOAD( "SU2", 0x000000, 0x080000, CRC(848045d5) SHA1(4d32e1a5bd0937069dd8d50dfd8b63d4a45e40e6) ) +ROM_END + + + + + +DRIVER_INIT_MEMBER(mjsenpu_state,mjsenpu) +{ +} + + + + +GAME( 2002, mjsenpu, 0, mjsenpu, mjsenpu, mjsenpu_state, mjsenpu, ROT0, "Oriental Soft", "Mahjong Senpu", MACHINE_NOT_WORKING ) diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 7c5c38c50c1..33f558dfb9b 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -20316,6 +20316,9 @@ mits680b // @source:mjkjidai.cpp mjkjidai // (c) 1986 Sanritsu +@source:mjsenpu.cpp +mjsenpu + @source:mjsister.cpp mjsister // (c) 1986 Toaplan From 5b013a346c8da407008e36492e6e8b4743ec1113 Mon Sep 17 00:00:00 2001 From: David Haywood Date: Wed, 5 Oct 2016 15:12:30 +0100 Subject: [PATCH 02/10] a 16-bit 556 split access palette (8+8) on a 32-bit bus... ok... --- src/mame/drivers/mjsenpu.cpp | 49 +++++++++++++++++++++++++++++++++--- 1 file changed, 45 insertions(+), 4 deletions(-) diff --git a/src/mame/drivers/mjsenpu.cpp b/src/mame/drivers/mjsenpu.cpp index 758f754cdbc..0ae0c67cde3 100644 --- a/src/mame/drivers/mjsenpu.cpp +++ b/src/mame/drivers/mjsenpu.cpp @@ -33,6 +33,14 @@ public: required_device m_oki; required_shared_ptr m_vram; + UINT8 m_pal[0x200]; + + + DECLARE_READ8_MEMBER(palette_low_r); + DECLARE_READ8_MEMBER(palette_high_r); + DECLARE_WRITE8_MEMBER(palette_low_w); + DECLARE_WRITE8_MEMBER(palette_high_w); + void set_palette(int offset); DECLARE_DRIVER_INIT(mjsenpu); virtual void machine_start() override; @@ -44,14 +52,47 @@ public: }; +READ8_MEMBER(mjsenpu_state::palette_low_r) +{ + return m_pal[(offset * 2) + 0]; +} + + +READ8_MEMBER(mjsenpu_state::palette_high_r) +{ + return m_pal[(offset * 2) + 1]; +} + +void mjsenpu_state::set_palette(int offset) +{ + UINT16 paldata = (m_pal[(offset * 2) + 0] << 8) | (m_pal[(offset * 2) + 1]); + m_palette->set_pen_color(offset, pal5bit(paldata >> 0), pal5bit(paldata >> 5), pal6bit(paldata >> 10)); +} + +WRITE8_MEMBER(mjsenpu_state::palette_low_w) +{ + m_pal[(offset * 2)+0] = data; + set_palette(offset); +} + +WRITE8_MEMBER(mjsenpu_state::palette_high_w) +{ + m_pal[(offset * 2)+1] = data; + set_palette(offset); +} + + + + + static ADDRESS_MAP_START( mjsenpu_32bit_map, AS_PROGRAM, 32, mjsenpu_state ) AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_RANGE(0x40000000, 0x401fffff) AM_ROM AM_REGION("user2",0) // main game rom AM_RANGE(0x80000000, 0x8001ffff) AM_RAM AM_SHARE("vram") - AM_RANGE(0xffc00000, 0xffc000ff) AM_RAM - AM_RANGE(0xffd00000, 0xffd000ff) AM_RAM + AM_RANGE(0xffc00000, 0xffc000ff) AM_READWRITE8(palette_low_r, palette_low_w, 0xffffffff) + AM_RANGE(0xffd00000, 0xffd000ff) AM_READWRITE8(palette_high_r, palette_high_w, 0xffffffff) AM_RANGE(0xffe00000, 0xffe0ffff) AM_RAM @@ -107,6 +148,7 @@ UINT32 mjsenpu_state::screen_update_mjsenpu(screen_device &screen, bitmap_ind16 void mjsenpu_state::machine_start() { + save_item(NAME(m_pal)); } void mjsenpu_state::machine_reset() @@ -141,8 +183,7 @@ static MACHINE_CONFIG_START( mjsenpu, mjsenpu_state ) MCFG_SCREEN_UPDATE_DRIVER(mjsenpu_state, screen_update_mjsenpu) MCFG_SCREEN_PALETTE("palette") - MCFG_PALETTE_ADD("palette", 0x1000) - MCFG_PALETTE_FORMAT(BBBBBGGGGGGRRRRR) + MCFG_PALETTE_ADD("palette", 0x100) MCFG_SPEAKER_STANDARD_MONO("mono") From 73a81eaa39c4e6faa7042da0a101bd1781b219f7 Mon Sep 17 00:00:00 2001 From: David Haywood Date: Wed, 5 Oct 2016 16:12:03 +0100 Subject: [PATCH 03/10] some work on the inputs / sound (nw) --- src/mame/drivers/mjsenpu.cpp | 151 +++++++++++++++++++++++++++++++++-- 1 file changed, 145 insertions(+), 6 deletions(-) diff --git a/src/mame/drivers/mjsenpu.cpp b/src/mame/drivers/mjsenpu.cpp index 0ae0c67cde3..12264f4bde9 100644 --- a/src/mame/drivers/mjsenpu.cpp +++ b/src/mame/drivers/mjsenpu.cpp @@ -41,6 +41,8 @@ public: DECLARE_WRITE8_MEMBER(palette_low_w); DECLARE_WRITE8_MEMBER(palette_high_w); void set_palette(int offset); + + DECLARE_WRITE8_MEMBER(oki_bank_w); DECLARE_DRIVER_INIT(mjsenpu); virtual void machine_start() override; @@ -81,7 +83,11 @@ WRITE8_MEMBER(mjsenpu_state::palette_high_w) set_palette(offset); } - +WRITE8_MEMBER(mjsenpu_state::oki_bank_w) +{ +// or some input muxing? +// printf("oki bank_w %02x\n", data); +} @@ -94,18 +100,151 @@ static ADDRESS_MAP_START( mjsenpu_32bit_map, AS_PROGRAM, 32, mjsenpu_state ) AM_RANGE(0xffc00000, 0xffc000ff) AM_READWRITE8(palette_low_r, palette_low_w, 0xffffffff) AM_RANGE(0xffd00000, 0xffd000ff) AM_READWRITE8(palette_high_r, palette_high_w, 0xffffffff) - - AM_RANGE(0xffe00000, 0xffe0ffff) AM_RAM + AM_RANGE(0xffe00000, 0xffe0ffff) AM_RAM AM_SHARE("nvram") AM_RANGE(0xfff80000, 0xffffffff) AM_ROM AM_REGION("user1",0) // boot rom ADDRESS_MAP_END static ADDRESS_MAP_START( mjsenpu_io, AS_IO, 32, mjsenpu_state ) -// AM_RANGE(0x000c, 0x000f) AM_READ(unk_r) + AM_RANGE(0x4000, 0x4003) AM_READ_PORT("IN0") + AM_RANGE(0x4010, 0x4013) AM_READ_PORT("IN1") + + AM_RANGE(0x4020, 0x4023) AM_WRITE8( oki_bank_w, 0x000000ff) + + AM_RANGE(0x4030, 0x4033) AM_READ_PORT("DSW1") + AM_RANGE(0x4040, 0x4043) AM_READ_PORT("DSW2") + AM_RANGE(0x4050, 0x4053) AM_READ_PORT("DSW3") + +// AM_RANGE(0x4060, 0x4063) AM_WRITE8 ( ) // input mux? + + AM_RANGE(0x4070, 0x4073) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x000000ff) ADDRESS_MAP_END static INPUT_PORTS_START( mjsenpu ) + + PORT_START("IN0") + PORT_DIPNAME( 0x00000001, 0x00000001, "IN0" ) + PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) + PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + + PORT_START("IN1") + PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 ) // or maybe service? + PORT_DIPNAME( 0x00000002, 0x00000002, "IN1" ) + PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + + // the input test mode seems broken in MAME? the first switch controls if the dipswitch shows at all, the 2nd switch displays 0/1 for the first position etc. + // the actual test mode section which shows the effect of the dips works as expected tho. + // maybe a game bug? maybe a core bug? + PORT_START("DSW1") + PORT_DIPNAME( 0x00000003, 0x00000003, "Ratio 1" ) + PORT_DIPSETTING( 0x00000000, "0" ) + PORT_DIPSETTING( 0x00000001, "1" ) + PORT_DIPSETTING( 0x00000002, "2" ) + PORT_DIPSETTING( 0x00000003, "3" ) + PORT_DIPNAME( 0x0000000c, 0x0000000c, "Value 1" ) + PORT_DIPSETTING( 0x00000000, "0" ) + PORT_DIPSETTING( 0x00000004, "1" ) + PORT_DIPSETTING( 0x00000008, "2" ) + PORT_DIPSETTING( 0x0000000c, "3" ) + PORT_DIPNAME( 0x00000030, 0x00000030, "Ratio 2" ) + PORT_DIPSETTING( 0x00000000, "0" ) + PORT_DIPSETTING( 0x00000010, "1" ) + PORT_DIPSETTING( 0x00000020, "2" ) + PORT_DIPSETTING( 0x00000030, "3" ) + PORT_DIPNAME( 0x000000c0, 0x000000c0, "Percentage 1" ) + PORT_DIPSETTING( 0x00000000, "0" ) + PORT_DIPSETTING( 0x00000040, "1" ) + PORT_DIPSETTING( 0x00000080, "2" ) + PORT_DIPSETTING( 0x000000c0, "3" ) + + PORT_START("DSW2") + PORT_DIPNAME( 0x00000003, 0x00000003, "Value 2" ) + PORT_DIPSETTING( 0x00000000, "0" ) + PORT_DIPSETTING( 0x00000001, "1" ) + PORT_DIPSETTING( 0x00000002, "2" ) + PORT_DIPSETTING( 0x00000003, "3" ) + PORT_DIPNAME( 0x00000004, 0x00000004, "Value 3" ) + PORT_DIPSETTING( 0x00000004, "0" ) + PORT_DIPSETTING( 0x00000000, "1" ) + PORT_DIPNAME( 0x00000008, 0x00000008, "Symbol 1" ) + PORT_DIPSETTING( 0x00000008, "0" ) + PORT_DIPSETTING( 0x00000000, "1" ) + PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Flip_Screen ) ) + PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_DIPNAME( 0x000000e0, 0x000000e0, "Percentage 2" ) + PORT_DIPSETTING( 0x00000000, "0" ) + PORT_DIPSETTING( 0x00000020, "1" ) + PORT_DIPSETTING( 0x00000040, "2" ) + PORT_DIPSETTING( 0x00000060, "3" ) + PORT_DIPSETTING( 0x00000080, "4" ) + PORT_DIPSETTING( 0x000000a0, "5" ) + PORT_DIPSETTING( 0x000000c0, "6" ) + PORT_DIPSETTING( 0x000000e0, "7" ) + + PORT_START("DSW3") + PORT_DIPNAME( 0x00000001, 0x00000001, "Value 4" ) + PORT_DIPSETTING( 0x00000001, "0" ) + PORT_DIPSETTING( 0x00000000, "1" ) + PORT_DIPNAME( 0x00000002, 0x00000002, "Symbol 2" ) + PORT_DIPSETTING( 0x00000002, "0" ) + PORT_DIPSETTING( 0x00000000, "1" ) + PORT_DIPNAME( 0x00000004, 0x00000004, "Symbol 3" ) + PORT_DIPSETTING( 0x00000004, "0" ) + PORT_DIPSETTING( 0x00000000, "1" ) + PORT_DIPNAME( 0x00000008, 0x00000008, "Symbol 4" ) + PORT_DIPSETTING( 0x00000008, "0" ) + PORT_DIPSETTING( 0x00000000, "1" ) + PORT_DIPNAME( 0x00000010, 0x00000010, "Symbol 5" ) + PORT_DIPSETTING( 0x00000010, "0" ) + PORT_DIPSETTING( 0x00000000, "1" ) + PORT_DIPNAME( 0x00000060, 0x00000060, "Percentage 3" ) + PORT_DIPSETTING( 0x00000000, "0" ) + PORT_DIPSETTING( 0x00000020, "1" ) + PORT_DIPSETTING( 0x00000040, "2" ) + PORT_DIPSETTING( 0x00000060, "3" ) + PORT_DIPNAME( 0x00000080, 0x00000080, "Symbol 6" ) + PORT_DIPSETTING( 0x00000080, "0" ) + PORT_DIPSETTING( 0x00000000, "1" ) INPUT_PORTS_END @@ -172,14 +311,14 @@ static MACHINE_CONFIG_START( mjsenpu, mjsenpu_state ) MCFG_CPU_IO_MAP(mjsenpu_io) MCFG_CPU_VBLANK_INT_DRIVER("screen", mjsenpu_state, irq0_line_hold) -// MCFG_NVRAM_ADD_1FILL("nvram") + MCFG_NVRAM_ADD_1FILL("nvram") /* video hardware */ MCFG_SCREEN_ADD("screen", RASTER) MCFG_SCREEN_REFRESH_RATE(60) MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0)) MCFG_SCREEN_SIZE(512, 256) - MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-1) + MCFG_SCREEN_VISIBLE_AREA(0, 512-1, 0, 256-16-1) MCFG_SCREEN_UPDATE_DRIVER(mjsenpu_state, screen_update_mjsenpu) MCFG_SCREEN_PALETTE("palette") From 1bdbde7fa88c3e7ef7a3a77fdf4d82cbd33b0949 Mon Sep 17 00:00:00 2001 From: David Haywood Date: Wed, 5 Oct 2016 16:42:02 +0100 Subject: [PATCH 04/10] (nw) --- src/mame/drivers/mjsenpu.cpp | 52 ++++++++++++++++++++++++++++++------ 1 file changed, 44 insertions(+), 8 deletions(-) diff --git a/src/mame/drivers/mjsenpu.cpp b/src/mame/drivers/mjsenpu.cpp index 12264f4bde9..7a05720bbce 100644 --- a/src/mame/drivers/mjsenpu.cpp +++ b/src/mame/drivers/mjsenpu.cpp @@ -23,6 +23,7 @@ public: : driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), m_oki(*this, "oki"), + m_mainram(*this, "mainram"), m_vram(*this, "vram"), m_palette(*this, "palette") { @@ -32,6 +33,7 @@ public: required_device m_maincpu; required_device m_oki; + required_shared_ptr m_mainram; required_shared_ptr m_vram; UINT8 m_pal[0x200]; @@ -43,6 +45,9 @@ public: void set_palette(int offset); DECLARE_WRITE8_MEMBER(oki_bank_w); + DECLARE_WRITE8_MEMBER(mux_w); + + DECLARE_READ32_MEMBER(mjsenpu_speedup_r); DECLARE_DRIVER_INIT(mjsenpu); virtual void machine_start() override; @@ -85,14 +90,18 @@ WRITE8_MEMBER(mjsenpu_state::palette_high_w) WRITE8_MEMBER(mjsenpu_state::oki_bank_w) { -// or some input muxing? -// printf("oki bank_w %02x\n", data); + // or some input muxing? + if (data!=0x80 && data !=0x81) + printf("oki bank_w %02x\n", data); } - +WRITE8_MEMBER(mjsenpu_state::mux_w) +{ +// printf("mux_w %02x\n", data); +} static ADDRESS_MAP_START( mjsenpu_32bit_map, AS_PROGRAM, 32, mjsenpu_state ) - AM_RANGE(0x00000000, 0x003fffff) AM_RAM + AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("mainram") AM_RANGE(0x40000000, 0x401fffff) AM_ROM AM_REGION("user2",0) // main game rom AM_RANGE(0x80000000, 0x8001ffff) AM_RAM AM_SHARE("vram") @@ -116,7 +125,7 @@ static ADDRESS_MAP_START( mjsenpu_io, AS_IO, 32, mjsenpu_state ) AM_RANGE(0x4040, 0x4043) AM_READ_PORT("DSW2") AM_RANGE(0x4050, 0x4053) AM_READ_PORT("DSW3") -// AM_RANGE(0x4060, 0x4063) AM_WRITE8 ( ) // input mux? + AM_RANGE(0x4060, 0x4063) AM_WRITE8( mux_w, 0x000000ff) AM_RANGE(0x4070, 0x4073) AM_DEVREADWRITE8("oki", okim6295_device, read, write, 0x000000ff) ADDRESS_MAP_END @@ -280,8 +289,6 @@ UINT32 mjsenpu_state::screen_update_mjsenpu(screen_device &screen, bitmap_ind16 } } return 0; - - return 0; } @@ -306,7 +313,7 @@ following clocks are on the PCB static MACHINE_CONFIG_START( mjsenpu, mjsenpu_state ) /* basic machine hardware */ - MCFG_CPU_ADD("maincpu", E132XT, 27000000) /* ?? Mhz */ + MCFG_CPU_ADD("maincpu", E132XT, 27000000*2) /* ?? Mhz */ MCFG_CPU_PROGRAM_MAP(mjsenpu_32bit_map) MCFG_CPU_IO_MAP(mjsenpu_io) MCFG_CPU_VBLANK_INT_DRIVER("screen", mjsenpu_state, irq0_line_hold) @@ -344,10 +351,39 @@ ROM_END +READ32_MEMBER(mjsenpu_state::mjsenpu_speedup_r) +{ + int pc = m_maincpu->pc(); + + if (pc == 0xadb8) + { + space.device().execute().spin_until_interrupt(); + } + else + { + // printf("%08x\n", pc); + } + + return m_mainram[0x23468/4]; +} + + DRIVER_INIT_MEMBER(mjsenpu_state,mjsenpu) { +/* +0000ADAE: LDHU.D L42, L38, $0 +0000ADB2: LDW.A 0, L39, $23468 +0000ADB8: ADDI L38, $1 +0000ADBA: STHU.D L42, L38, $0 +0000ADBE: CMPI L39, $0 +0000ADC0: BNE $adae + + (loops for 744256 instructions) +*/ + // not especially effective, might be wrong. + m_maincpu->space(AS_PROGRAM).install_read_handler(0x23468, 0x2346b, read32_delegate(FUNC(mjsenpu_state::mjsenpu_speedup_r), this)); } From a32bbdf009170f8948be30a02fbeb455e59d66f4 Mon Sep 17 00:00:00 2001 From: David Haywood Date: Wed, 5 Oct 2016 16:52:28 +0100 Subject: [PATCH 05/10] figured out 2 of the dipswitches. --- src/mame/drivers/mjsenpu.cpp | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/mame/drivers/mjsenpu.cpp b/src/mame/drivers/mjsenpu.cpp index 7a05720bbce..d3ffc7c22fd 100644 --- a/src/mame/drivers/mjsenpu.cpp +++ b/src/mame/drivers/mjsenpu.cpp @@ -91,7 +91,7 @@ WRITE8_MEMBER(mjsenpu_state::palette_high_w) WRITE8_MEMBER(mjsenpu_state::oki_bank_w) { // or some input muxing? - if (data!=0x80 && data !=0x81) + if (data &~0x93) printf("oki bank_w %02x\n", data); } @@ -214,9 +214,9 @@ static INPUT_PORTS_START( mjsenpu ) PORT_DIPNAME( 0x00000004, 0x00000004, "Value 3" ) PORT_DIPSETTING( 0x00000004, "0" ) PORT_DIPSETTING( 0x00000000, "1" ) - PORT_DIPNAME( 0x00000008, 0x00000008, "Symbol 1" ) - PORT_DIPSETTING( 0x00000008, "0" ) - PORT_DIPSETTING( 0x00000000, "1" ) + PORT_DIPNAME( 0x00000008, 0x00000000, DEF_STR( Demo_Sounds ) ) + PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Flip_Screen ) ) PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) @@ -240,9 +240,9 @@ static INPUT_PORTS_START( mjsenpu ) PORT_DIPNAME( 0x00000004, 0x00000004, "Symbol 3" ) PORT_DIPSETTING( 0x00000004, "0" ) PORT_DIPSETTING( 0x00000000, "1" ) - PORT_DIPNAME( 0x00000008, 0x00000008, "Symbol 4" ) - PORT_DIPSETTING( 0x00000008, "0" ) - PORT_DIPSETTING( 0x00000000, "1" ) + PORT_DIPNAME( 0x00000008, 0x00000008, "Control Type" ) + PORT_DIPSETTING( 0x00000008, "Mahjong Panel" ) + PORT_DIPSETTING( 0x00000000, "Joystick" ) PORT_DIPNAME( 0x00000010, 0x00000010, "Symbol 5" ) PORT_DIPSETTING( 0x00000010, "0" ) PORT_DIPSETTING( 0x00000000, "1" ) From a3a852e0a47aee32c0653c1a2e0274ae9d5912f5 Mon Sep 17 00:00:00 2001 From: David Haywood Date: Wed, 5 Oct 2016 18:14:21 +0100 Subject: [PATCH 06/10] various improvements. if anybody wants to help with the inputs, would be appreciated. test mode seems quite broken, I'm wondering if it's CPU core bugs. --- src/mame/drivers/mjsenpu.cpp | 243 +++++++++++++++++++++++------------ 1 file changed, 160 insertions(+), 83 deletions(-) diff --git a/src/mame/drivers/mjsenpu.cpp b/src/mame/drivers/mjsenpu.cpp index d3ffc7c22fd..d654d52fa87 100644 --- a/src/mame/drivers/mjsenpu.cpp +++ b/src/mame/drivers/mjsenpu.cpp @@ -9,6 +9,13 @@ SPR800F1 0011E + where is the OKI sound bank? the rom contains 2 banks and the + test mode even has checks for 2 banks, but I can't see a bank write. + enter test mode (F2) then press bet (M) a few times to get to the + sound test. + + inputs need finishing off + *********************************************************************/ #include "emu.h" @@ -24,7 +31,7 @@ public: m_maincpu(*this, "maincpu"), m_oki(*this, "oki"), m_mainram(*this, "mainram"), - m_vram(*this, "vram"), + // m_vram(*this, "vram"), m_palette(*this, "palette") { } @@ -34,9 +41,12 @@ public: required_device m_oki; required_shared_ptr m_mainram; - required_shared_ptr m_vram; +// required_shared_ptr m_vram; UINT8 m_pal[0x200]; - + UINT32 m_vram0[0x20000 / 4]; + UINT32 m_vram1[0x20000 / 4]; + UINT8 m_control; + UINT8 m_mux; DECLARE_READ8_MEMBER(palette_low_r); DECLARE_READ8_MEMBER(palette_high_r); @@ -44,11 +54,16 @@ public: DECLARE_WRITE8_MEMBER(palette_high_w); void set_palette(int offset); - DECLARE_WRITE8_MEMBER(oki_bank_w); + DECLARE_WRITE8_MEMBER(control_w); DECLARE_WRITE8_MEMBER(mux_w); + DECLARE_READ32_MEMBER(muxed_inputs_r); + DECLARE_READ32_MEMBER(mjsenpu_speedup_r); + DECLARE_READ32_MEMBER(vram_r); + DECLARE_WRITE32_MEMBER(vram_w); + DECLARE_DRIVER_INIT(mjsenpu); virtual void machine_start() override; virtual void machine_reset() override; @@ -88,38 +103,92 @@ WRITE8_MEMBER(mjsenpu_state::palette_high_w) set_palette(offset); } -WRITE8_MEMBER(mjsenpu_state::oki_bank_w) + +READ32_MEMBER(mjsenpu_state::vram_r) { - // or some input muxing? + if (m_control & 0x01) return m_vram1[offset]; + else return m_vram0[offset]; +} + +WRITE32_MEMBER(mjsenpu_state::vram_w) +{ + if (m_control & 0x01) COMBINE_DATA(&m_vram1[offset]); + else COMBINE_DATA(&m_vram0[offset]); +} + +WRITE8_MEMBER(mjsenpu_state::control_w) +{ + // bit 0 alternates frequently, using as video buffer, but that's a complete guess + + m_control = data; + + + // bit 7 is always set? + + // other bits don't seem to be OKI bank? + if (data &~0x93) - printf("oki bank_w %02x\n", data); + printf("control_w %02x\n", data); } WRITE8_MEMBER(mjsenpu_state::mux_w) { -// printf("mux_w %02x\n", data); + if ((data != 0x80) && + (data != 0x9e) && + (data != 0x9d) && + (data != 0x9b) && + (data != 0x97) && + (data != 0x8f)) + printf("mux_w %02x\n", data); + + m_mux = data; +} + +READ32_MEMBER(mjsenpu_state::muxed_inputs_r) +{ + switch (m_mux) + { + case 0x80: // not read + break; + + case 0x9e: + return ioport("MUX_9E")->read(); + + case 0x9d: + return ioport("MUX_9D")->read(); + + case 0x9b: + return ioport("MUX_9B")->read(); + + case 0x8f: + return ioport("MUX_8F")->read(); + } + + logerror("muxed_inputs_r with %02x\n", m_mux); + + return 0x00000000;// 0xffffffff; } static ADDRESS_MAP_START( mjsenpu_32bit_map, AS_PROGRAM, 32, mjsenpu_state ) AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("mainram") AM_RANGE(0x40000000, 0x401fffff) AM_ROM AM_REGION("user2",0) // main game rom - AM_RANGE(0x80000000, 0x8001ffff) AM_RAM AM_SHARE("vram") + AM_RANGE(0x80000000, 0x8001ffff) AM_READWRITE(vram_r,vram_w) AM_RANGE(0xffc00000, 0xffc000ff) AM_READWRITE8(palette_low_r, palette_low_w, 0xffffffff) AM_RANGE(0xffd00000, 0xffd000ff) AM_READWRITE8(palette_high_r, palette_high_w, 0xffffffff) - AM_RANGE(0xffe00000, 0xffe0ffff) AM_RAM AM_SHARE("nvram") + AM_RANGE(0xffe00000, 0xffe007ff) AM_RAM AM_SHARE("nvram") AM_RANGE(0xfff80000, 0xffffffff) AM_ROM AM_REGION("user1",0) // boot rom ADDRESS_MAP_END static ADDRESS_MAP_START( mjsenpu_io, AS_IO, 32, mjsenpu_state ) - AM_RANGE(0x4000, 0x4003) AM_READ_PORT("IN0") + AM_RANGE(0x4000, 0x4003) AM_READ(muxed_inputs_r) AM_RANGE(0x4010, 0x4013) AM_READ_PORT("IN1") - AM_RANGE(0x4020, 0x4023) AM_WRITE8( oki_bank_w, 0x000000ff) + AM_RANGE(0x4020, 0x4023) AM_WRITE8( control_w, 0x000000ff) AM_RANGE(0x4030, 0x4033) AM_READ_PORT("DSW1") AM_RANGE(0x4040, 0x4043) AM_READ_PORT("DSW2") @@ -132,29 +201,25 @@ ADDRESS_MAP_END static INPUT_PORTS_START( mjsenpu ) - PORT_START("IN0") - PORT_DIPNAME( 0x00000001, 0x00000001, "IN0" ) - PORT_DIPSETTING( 0x00000001, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) - PORT_DIPNAME( 0x00000002, 0x00000002, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00000002, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) - PORT_DIPNAME( 0x00000004, 0x00000004, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00000004, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) - PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) - PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) - PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) - PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) - PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_START("MUX_8F") // in joystick mode? + PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_START1 ) // or button1? seems to have multiple uses + PORT_BIT( 0x00000002, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) + PORT_BIT( 0x00000004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) + PORT_BIT( 0x00000008, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) + PORT_BIT( 0x00000010, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) + PORT_BIT( 0x00000020, IP_ACTIVE_LOW, IPT_BUTTON1 ) + PORT_BIT( 0x00000040, IP_ACTIVE_LOW, IPT_BUTTON2 ) + PORT_BIT( 0x00000080, IP_ACTIVE_LOW, IPT_BUTTON3 ) + PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("MUX_9E") + PORT_BIT( 0xffffffff, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("MUX_9D") + PORT_BIT( 0xffffffff, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("MUX_9B") + PORT_BIT( 0xffffffff, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_START("IN1") PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 ) // or maybe service? @@ -167,53 +232,51 @@ static INPUT_PORTS_START( mjsenpu ) PORT_DIPNAME( 0x00000008, 0x00000008, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) - PORT_DIPNAME( 0x00000010, 0x00000010, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_SERVICE_NO_TOGGLE( 0x00000010, IP_ACTIVE_LOW ) PORT_DIPNAME( 0x00000020, 0x00000020, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x00000020, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) - PORT_DIPNAME( 0x00000040, 0x00000040, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00000040, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) // not on the mahjong panel? used when in Joystick mode PORT_DIPNAME( 0x00000080, 0x00000080, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x00000080, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) + PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNUSED ) // the input test mode seems broken in MAME? the first switch controls if the dipswitch shows at all, the 2nd switch displays 0/1 for the first position etc. // the actual test mode section which shows the effect of the dips works as expected tho. // maybe a game bug? maybe a core bug? PORT_START("DSW1") - PORT_DIPNAME( 0x00000003, 0x00000003, "Ratio 1" ) - PORT_DIPSETTING( 0x00000000, "0" ) - PORT_DIPSETTING( 0x00000001, "1" ) - PORT_DIPSETTING( 0x00000002, "2" ) - PORT_DIPSETTING( 0x00000003, "3" ) + PORT_DIPNAME( 0x00000003, 0x00000003, DEF_STR( Coin_A ) ) + PORT_DIPSETTING( 0x00000000, DEF_STR( 2C_1C ) ) + PORT_DIPSETTING( 0x00000003, DEF_STR( 1C_1C ) ) + PORT_DIPSETTING( 0x00000002, DEF_STR( 1C_2C ) ) + PORT_DIPSETTING( 0x00000001, DEF_STR( 1C_3C ) ) PORT_DIPNAME( 0x0000000c, 0x0000000c, "Value 1" ) - PORT_DIPSETTING( 0x00000000, "0" ) - PORT_DIPSETTING( 0x00000004, "1" ) - PORT_DIPSETTING( 0x00000008, "2" ) - PORT_DIPSETTING( 0x0000000c, "3" ) + PORT_DIPSETTING( 0x00000000, "100" ) + PORT_DIPSETTING( 0x00000004, "50" ) + PORT_DIPSETTING( 0x00000008, "10" ) + PORT_DIPSETTING( 0x0000000c, "5" ) PORT_DIPNAME( 0x00000030, 0x00000030, "Ratio 2" ) - PORT_DIPSETTING( 0x00000000, "0" ) - PORT_DIPSETTING( 0x00000010, "1" ) - PORT_DIPSETTING( 0x00000020, "2" ) - PORT_DIPSETTING( 0x00000030, "3" ) + PORT_DIPSETTING( 0x00000000, "1:10" ) + PORT_DIPSETTING( 0x00000010, "1:5" ) + PORT_DIPSETTING( 0x00000020, "1:2" ) + PORT_DIPSETTING( 0x00000030, "1:1" ) PORT_DIPNAME( 0x000000c0, 0x000000c0, "Percentage 1" ) - PORT_DIPSETTING( 0x00000000, "0" ) - PORT_DIPSETTING( 0x00000040, "1" ) - PORT_DIPSETTING( 0x00000080, "2" ) - PORT_DIPSETTING( 0x000000c0, "3" ) + PORT_DIPSETTING( 0x00000000, "96" ) + PORT_DIPSETTING( 0x00000040, "92" ) + PORT_DIPSETTING( 0x00000080, "88" ) + PORT_DIPSETTING( 0x000000c0, "84" ) + PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("DSW2") PORT_DIPNAME( 0x00000003, 0x00000003, "Value 2" ) - PORT_DIPSETTING( 0x00000000, "0" ) - PORT_DIPSETTING( 0x00000001, "1" ) + PORT_DIPSETTING( 0x00000000, "5" ) + PORT_DIPSETTING( 0x00000001, "3" ) PORT_DIPSETTING( 0x00000002, "2" ) - PORT_DIPSETTING( 0x00000003, "3" ) + PORT_DIPSETTING( 0x00000003, "1" ) PORT_DIPNAME( 0x00000004, 0x00000004, "Value 3" ) - PORT_DIPSETTING( 0x00000004, "0" ) - PORT_DIPSETTING( 0x00000000, "1" ) + PORT_DIPSETTING( 0x00000004, "10" ) + PORT_DIPSETTING( 0x00000000, "20" ) PORT_DIPNAME( 0x00000008, 0x00000000, DEF_STR( Demo_Sounds ) ) PORT_DIPSETTING( 0x00000008, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) @@ -221,39 +284,42 @@ static INPUT_PORTS_START( mjsenpu ) PORT_DIPSETTING( 0x00000010, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) PORT_DIPNAME( 0x000000e0, 0x000000e0, "Percentage 2" ) - PORT_DIPSETTING( 0x00000000, "0" ) - PORT_DIPSETTING( 0x00000020, "1" ) - PORT_DIPSETTING( 0x00000040, "2" ) - PORT_DIPSETTING( 0x00000060, "3" ) - PORT_DIPSETTING( 0x00000080, "4" ) - PORT_DIPSETTING( 0x000000a0, "5" ) - PORT_DIPSETTING( 0x000000c0, "6" ) - PORT_DIPSETTING( 0x000000e0, "7" ) + PORT_DIPSETTING( 0x00000000, "60" ) + PORT_DIPSETTING( 0x00000020, "65" ) + PORT_DIPSETTING( 0x00000040, "70" ) + PORT_DIPSETTING( 0x00000060, "75" ) + PORT_DIPSETTING( 0x00000080, "80" ) + PORT_DIPSETTING( 0x000000a0, "85" ) + PORT_DIPSETTING( 0x000000c0, "90" ) + PORT_DIPSETTING( 0x000000e0, "95" ) + PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_START("DSW3") PORT_DIPNAME( 0x00000001, 0x00000001, "Value 4" ) - PORT_DIPSETTING( 0x00000001, "0" ) - PORT_DIPSETTING( 0x00000000, "1" ) + PORT_DIPSETTING( 0x00000001, "100" ) + PORT_DIPSETTING( 0x00000000, "500" ) PORT_DIPNAME( 0x00000002, 0x00000002, "Symbol 2" ) PORT_DIPSETTING( 0x00000002, "0" ) PORT_DIPSETTING( 0x00000000, "1" ) PORT_DIPNAME( 0x00000004, 0x00000004, "Symbol 3" ) PORT_DIPSETTING( 0x00000004, "0" ) PORT_DIPSETTING( 0x00000000, "1" ) - PORT_DIPNAME( 0x00000008, 0x00000008, "Control Type" ) + PORT_DIPNAME( 0x00000008, 0x00000000, "Control Type" ) PORT_DIPSETTING( 0x00000008, "Mahjong Panel" ) PORT_DIPSETTING( 0x00000000, "Joystick" ) PORT_DIPNAME( 0x00000010, 0x00000010, "Symbol 5" ) PORT_DIPSETTING( 0x00000010, "0" ) PORT_DIPSETTING( 0x00000000, "1" ) PORT_DIPNAME( 0x00000060, 0x00000060, "Percentage 3" ) - PORT_DIPSETTING( 0x00000000, "0" ) - PORT_DIPSETTING( 0x00000020, "1" ) - PORT_DIPSETTING( 0x00000040, "2" ) - PORT_DIPSETTING( 0x00000060, "3" ) + PORT_DIPSETTING( 0x00000000, "92" ) + PORT_DIPSETTING( 0x00000020, "88" ) + PORT_DIPSETTING( 0x00000040, "84" ) + PORT_DIPSETTING( 0x00000060, "80" ) PORT_DIPNAME( 0x00000080, 0x00000080, "Symbol 6" ) PORT_DIPSETTING( 0x00000080, "0" ) PORT_DIPSETTING( 0x00000000, "1" ) + PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNUSED ) + INPUT_PORTS_END @@ -268,21 +334,28 @@ UINT32 mjsenpu_state::screen_update_mjsenpu(screen_device &screen, bitmap_ind16 int x,y,count; int color; + UINT32* vram; + + if (m_control & 0x01) vram = m_vram0; + else vram = m_vram1; + + + count = 0; for (y=0;y < 256;y++) { for (x=0;x < 512/4;x++) { - color = m_vram[count] & 0x000000ff; + color = vram[count] & 0x000000ff; bitmap.pix16(y, x*4 + 2) = color; - color = (m_vram[count] & 0x0000ff00) >> 8; + color = (vram[count] & 0x0000ff00) >> 8; bitmap.pix16(y, x*4 + 3) = color; - color = (m_vram[count] & 0x00ff0000) >> 16; + color = (vram[count] & 0x00ff0000) >> 16; bitmap.pix16(y, x*4 + 0) = color; - color = (m_vram[count] & 0xff000000) >> 24; + color = (vram[count] & 0xff000000) >> 24; bitmap.pix16(y, x*4 + 1) = color; count++; @@ -295,6 +368,10 @@ UINT32 mjsenpu_state::screen_update_mjsenpu(screen_device &screen, bitmap_ind16 void mjsenpu_state::machine_start() { save_item(NAME(m_pal)); + save_item(NAME(m_vram0)); + save_item(NAME(m_vram1)); + save_item(NAME(m_control)); + save_item(NAME(m_mux)); } void mjsenpu_state::machine_reset() @@ -389,4 +466,4 @@ DRIVER_INIT_MEMBER(mjsenpu_state,mjsenpu) -GAME( 2002, mjsenpu, 0, mjsenpu, mjsenpu, mjsenpu_state, mjsenpu, ROT0, "Oriental Soft", "Mahjong Senpu", MACHINE_NOT_WORKING ) +GAME( 2002, mjsenpu, 0, mjsenpu, mjsenpu, mjsenpu_state, mjsenpu, ROT0, "Oriental Soft", "Mahjong Senpu", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) From 34b65e32b2527d5021d7f90a7b7418285d9558e1 Mon Sep 17 00:00:00 2001 From: David Haywood Date: Wed, 5 Oct 2016 18:17:13 +0100 Subject: [PATCH 07/10] checked a box too early (nw) --- src/mame/drivers/mjsenpu.cpp | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/mame/drivers/mjsenpu.cpp b/src/mame/drivers/mjsenpu.cpp index d654d52fa87..4df7ff057e4 100644 --- a/src/mame/drivers/mjsenpu.cpp +++ b/src/mame/drivers/mjsenpu.cpp @@ -160,6 +160,9 @@ READ32_MEMBER(mjsenpu_state::muxed_inputs_r) case 0x9b: return ioport("MUX_9B")->read(); + case 0x97: + return ioport("MUX_97")->read(); + case 0x8f: return ioport("MUX_8F")->read(); } @@ -221,6 +224,10 @@ static INPUT_PORTS_START( mjsenpu ) PORT_START("MUX_9B") PORT_BIT( 0xffffffff, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_START("MUX_97") + PORT_BIT( 0xffffffff, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("IN1") PORT_BIT( 0x00000001, IP_ACTIVE_LOW, IPT_COIN1 ) // or maybe service? PORT_DIPNAME( 0x00000002, 0x00000002, "IN1" ) From 8df6a532e0e352ab62803f80c39b7f64ee8c6058 Mon Sep 17 00:00:00 2001 From: David Haywood Date: Wed, 5 Oct 2016 18:58:33 +0100 Subject: [PATCH 08/10] found oki bank (nw) --- src/mame/drivers/mjsenpu.cpp | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/src/mame/drivers/mjsenpu.cpp b/src/mame/drivers/mjsenpu.cpp index 4df7ff057e4..825453ae0cd 100644 --- a/src/mame/drivers/mjsenpu.cpp +++ b/src/mame/drivers/mjsenpu.cpp @@ -9,11 +9,6 @@ SPR800F1 0011E - where is the OKI sound bank? the rom contains 2 banks and the - test mode even has checks for 2 banks, but I can't see a bank write. - enter test mode (F2) then press bet (M) a few times to get to the - sound test. - inputs need finishing off *********************************************************************/ @@ -118,17 +113,22 @@ WRITE32_MEMBER(mjsenpu_state::vram_w) WRITE8_MEMBER(mjsenpu_state::control_w) { - // bit 0 alternates frequently, using as video buffer, but that's a complete guess - m_control = data; + // bit 0x80 is always set? + // bit 0x40 not used? + // bit 0x20 not used? - // bit 7 is always set? + // bit 0x10 is the M6295 bank, samples <26 are the same in both banks and so bank switch isn't written for them, not even in sound test. + m_oki->set_rom_bank((data&0x10)>>4); - // other bits don't seem to be OKI bank? + // bits 0x08 and 0x04 seem to be hopper/ticket related? different ones get used depending on the dips - if (data &~0x93) - printf("control_w %02x\n", data); + // bit 0x02 could be coin counter? + // bit 0x01 alternates frequently, using as video buffer, but that's a complete guess + +// if (data &~0x9e) +// printf("control_w %02x\n", data); } WRITE8_MEMBER(mjsenpu_state::mux_w) @@ -173,7 +173,7 @@ READ32_MEMBER(mjsenpu_state::muxed_inputs_r) } static ADDRESS_MAP_START( mjsenpu_32bit_map, AS_PROGRAM, 32, mjsenpu_state ) - AM_RANGE(0x00000000, 0x003fffff) AM_RAM AM_SHARE("mainram") + AM_RANGE(0x00000000, 0x001fffff) AM_RAM AM_SHARE("mainram") AM_RANGE(0x40000000, 0x401fffff) AM_ROM AM_REGION("user2",0) // main game rom AM_RANGE(0x80000000, 0x8001ffff) AM_READWRITE(vram_r,vram_w) From c58fb13becb2d7d1126a3df15271d681067dbe7e Mon Sep 17 00:00:00 2001 From: David Haywood Date: Wed, 5 Oct 2016 20:05:46 +0100 Subject: [PATCH 09/10] the test mode on this game is busted even on the PCB (nw) --- src/mame/drivers/mjsenpu.cpp | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/src/mame/drivers/mjsenpu.cpp b/src/mame/drivers/mjsenpu.cpp index 825453ae0cd..f502d6c6159 100644 --- a/src/mame/drivers/mjsenpu.cpp +++ b/src/mame/drivers/mjsenpu.cpp @@ -11,6 +11,35 @@ inputs need finishing off + -- Test Mode Note -- + + The test mode for this game is very buggy, this is not a MAME bug + the same behavior has been observed on the original PCB. + + One example of this is the dipswitch viewer, which should show 3 + rows of 8 1/0 values, one for each switch. ie + + 00000000 + 00000000 + 00000000 + + However.. + + Instead of properly representing each of the dips, the 1st switch in + each bank ends up turning on/off the entire row display (for rows 2/3 + it shifts row 1 by one pixel) + + This then means the 2nd switch changes the digit in the 1st position + so + + 10000000 + + the 8th switch changes the 7th digit so + + 10000010 + + and there's no way at all to change the last digit. + *********************************************************************/ #include "emu.h" From 408b71566f43510d57a5c6f1e1b463c60355488f Mon Sep 17 00:00:00 2001 From: David Haywood Date: Wed, 5 Oct 2016 20:52:26 +0100 Subject: [PATCH 10/10] delete old comment (nw) --- src/mame/drivers/mjsenpu.cpp | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/mame/drivers/mjsenpu.cpp b/src/mame/drivers/mjsenpu.cpp index f502d6c6159..da8c82d1125 100644 --- a/src/mame/drivers/mjsenpu.cpp +++ b/src/mame/drivers/mjsenpu.cpp @@ -278,9 +278,6 @@ static INPUT_PORTS_START( mjsenpu ) PORT_DIPSETTING( 0x00000000, DEF_STR( On ) ) PORT_BIT( 0xffffff00, IP_ACTIVE_LOW, IPT_UNUSED ) - // the input test mode seems broken in MAME? the first switch controls if the dipswitch shows at all, the 2nd switch displays 0/1 for the first position etc. - // the actual test mode section which shows the effect of the dips works as expected tho. - // maybe a game bug? maybe a core bug? PORT_START("DSW1") PORT_DIPNAME( 0x00000003, 0x00000003, DEF_STR( Coin_A ) ) PORT_DIPSETTING( 0x00000000, DEF_STR( 2C_1C ) )