m6805: Eliminate the generic m6805_device type (nw)

This commit is contained in:
AJR 2019-07-12 21:38:22 -04:00
parent 04ae42eee5
commit 2e521ba1dd
5 changed files with 15 additions and 67 deletions

View File

@ -39,7 +39,7 @@ DEFINE_DEVICE_TYPE(COMX_PL80, comx_pl80_device, "comx_pl80", "COMX PL-80")
//-------------------------------------------------
ROM_START( comxpl80 )
ROM_REGION( 0x1000, CX005_TAG, 0 )
ROM_REGION( 0x1000, CX005_TAG, 0 ) // TODO: what is this? (not 6805 code)
ROM_LOAD( "pl80.pt6", 0x0080, 0x0e00, CRC(ae059e5b) SHA1(f25812606b0082d32eb603d0a702a2187089d332) )
ROM_REGION( 0x6000, "gfx1", ROMREGION_ERASEFF ) // Plotter fonts
@ -58,39 +58,16 @@ const tiny_rom_entry *comx_pl80_device::device_rom_region() const
}
//-------------------------------------------------
// ADDRESS_MAP( comxpl80_mem )
//-------------------------------------------------
void comx_pl80_device::comxpl80_mem(address_map &map)
{
/* AM_RANGE(0x000, 0x000) AM_READWRITE(cx005_port_a_r, cx005_port_a_w)
AM_RANGE(0x001, 0x001) AM_READWRITE(cx005_port_b_r, cx005_port_b_w)
AM_RANGE(0x002, 0x002) AM_READWRITE(cx005_port_c_r, cx005_port_c_w)
AM_RANGE(0x003, 0x003) AM_READ(cx005_port_d_digital_r)
AM_RANGE(0x004, 0x004) AM_WRITE(cx005_port_a_ddr_w)
AM_RANGE(0x005, 0x005) AM_WRITE(cx005_port_b_ddr_w)
AM_RANGE(0x006, 0x006) AM_WRITE(cx005_port_c_ddr_w)
AM_RANGE(0x007, 0x007) AM_READ(cx005_port_d_analog_r)
AM_RANGE(0x008, 0x008) AM_READWRITE(cx005_timer_data_r, cx005_timer_data_w)
AM_RANGE(0x008, 0x008) AM_READWRITE(cx005_timer_ctrl_r, cx005_timer_ctrl_w)*/
map(0x00a, 0x01f).noprw(); // Not Used
map(0x020, 0x07f).ram(); // Internal RAM
map(0x080, 0xf7f).rom().region(CX005_TAG, 0); // Internal ROM
map(0xf80, 0xff7).rom().region(CX005_TAG, 0xf00); // Self-Test
map(0xff8, 0xfff).rom().region(CX005_TAG, 0xf78); // Interrupt Vectors
}
//-------------------------------------------------
// device_add_mconfig - add device configuration
//-------------------------------------------------
void comx_pl80_device::device_add_mconfig(machine_config &config)
{
#if 0
m6805_device &cx005(M6805(config, CX005_TAG, 4000000)); // CX005: some kind of MC6805/MC68HC05 clone
cx005.set_addrmap(AS_PROGRAM, &comx_pl80_device::comxpl80_mem);
cx005.set_disable();
#endif
}

View File

@ -11,7 +11,6 @@
#pragma once
#include "cpu/m6805/m6805.h"
#include "bus/centronics/ctronics.h"
@ -68,8 +67,6 @@ private:
DECLARE_WRITE8_MEMBER( pb_w );
DECLARE_WRITE8_MEMBER( pc_w );
DECLARE_READ8_MEMBER( pd_r );
void comxpl80_mem(address_map &map);
};

View File

@ -517,17 +517,6 @@ void m6805_base_device::execute_set_input(int inputnum, int state)
}
m6805_device::m6805_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: m6805_base_device(
mconfig,
tag,
owner,
clock,
M6805,
{ s_hmos_ops, s_hmos_cycles, 12, 0x007f, 0x0060, 0xfffc })
{
}
/****************************************************************************
* M68HC05EG section
****************************************************************************/
@ -667,6 +656,5 @@ void hd63705_device::interrupt_vector()
}
DEFINE_DEVICE_TYPE(M6805, m6805_device, "m6805", "Motorola M6805")
DEFINE_DEVICE_TYPE(M68HC05EG, m68hc05eg_device, "m68hc05eg", "Motorola MC68HC05EG")
DEFINE_DEVICE_TYPE(HD63705, hd63705_device, "hd63705", "Hitachi HD63705")

View File

@ -12,7 +12,6 @@
//**************************************************************************
// device type definition
DECLARE_DEVICE_TYPE(M6805, m6805_device)
DECLARE_DEVICE_TYPE(M68HC05EG, m68hc05eg_device)
DECLARE_DEVICE_TYPE(HD63705, hd63705_device)
@ -302,16 +301,6 @@ protected:
};
// ======================> m6805_device
class m6805_device : public m6805_base_device
{
public:
// construction/destruction
m6805_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
};
// ======================> m68hc05eg_device
class m68hc05eg_device : public m6805_base_device

View File

@ -13,7 +13,7 @@ XC68HC26P = PPI (3 ports), uses 8 addresses.
2014-01-12 Skeleton driver
Memory map:
Memory map for MC68HC705P9:
0000, 0000 PORTA Port A data register
0001, 0001 PORTB Port B data register
0002, 0002 PORTC Port C data register
@ -56,13 +56,12 @@ Memory map:
ToDo:
- Add CMOS family support to M6085 CPU core (different timings, different peripherals)
- Everything
******************************************************************************************************/
#include "emu.h"
#include "cpu/m6805/m6805.h"
#include "cpu/m6805/m68hc05.h"
class m6805evs_state : public driver_device
@ -87,12 +86,8 @@ void m6805evs_state::mem_map(address_map &map)
{
map.unmap_value_high();
// AM_RANGE(0x0000, 0x001f) I/O registers live here
map(0x0020, 0x004f).rom().region("eprom", 0x0020);
map(0x0080, 0x00ff).ram();
map(0x0100, 0x0900).rom().region("eprom", 0x0100);
// AM_RANGE(0x1f00, 0x1fef) bootloader ROM lives here
map(0x1ff8, 0x1fff).rom().region("eprom", 0x1ff0);
//map(0x0800, 0x1fff).rom().region("eprom", 0x0800);
//map(0xfff0, 0xffff).rom().region("eprom", 0xfff0);
}
static INPUT_PORTS_START( m6805evs )
@ -104,16 +99,18 @@ void m6805evs_state::machine_reset()
void m6805evs_state::m6805evs(machine_config &config)
{
/* basic machine hardware */
M6805(config, m_maincpu, XTAL(4'000'000));
// Needs a 13-bits address bus wide version of the cpu
// m_maincpu->set_addrmap(AS_PROGRAM, &m6805evs_state::mem_map);
// FIXME: should this be MC68HC05E0 instead?
// (MC68HC705P9 doesn't use an external EPROM either and is also incompatible)
M68HC05C8(config, m_maincpu, XTAL(4'000'000));
//m_maincpu->set_addrmap(AS_PROGRAM, &m6805evs_state::mem_map);
}
ROM_START(m6805evs)
ROM_REGION(0x2000, "eprom", 0)
ROM_REGION(0x2000, "maincpu", 0)
ROM_LOAD( "evsbug12.bin", 0x0000, 0x2000, CRC(8b581aef) SHA1(eacf425cc8a042085ccc4097cc61570b633b1e38) )
ROM_REGION(0x2000, "mcu", 0)
ROM_LOAD( "mc68hc705p9cp.bin", 0x0000, 0x2000, NO_DUMP)
ROM_END