mirror of
https://github.com/holub/mame
synced 2025-05-25 15:25:33 +03:00
Updated the 8255 PPI device to no longer be legacy. [Harmony]
Non-whatsnew note: I tested iqblock, seems to still work properly. Fun game, by the way, but tough as nails.
This commit is contained in:
parent
2f94dc8966
commit
2eb8a58559
@ -92,96 +92,163 @@
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#include "emu.h"
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#include "8255ppi.h"
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#include "devhelpr.h"
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typedef struct _ppi8255 ppi8255_t;
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//**************************************************************************
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// DEVICE CONFIGURATION
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//**************************************************************************
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struct _ppi8255
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GENERIC_DEVICE_CONFIG_SETUP(ppi8255, "PPI8255")
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//-------------------------------------------------
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// device_config_complete - perform any
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// operations now that the configuration is
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// complete
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//-------------------------------------------------
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void ppi8255_device_config::device_config_complete()
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{
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const ppi8255_interface *intf;
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// inherit a copy of the static data
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const ppi8255_interface *intf = reinterpret_cast<const ppi8255_interface *>(static_config());
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if (intf != NULL)
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{
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*static_cast<ppi8255_interface *>(this) = *intf;
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}
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devcb_resolved_read8 port_read[3];
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devcb_resolved_write8 port_write[3];
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/* mode flags */
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UINT8 group_a_mode;
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UINT8 group_b_mode;
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UINT8 port_a_dir;
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UINT8 port_b_dir;
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UINT8 port_ch_dir;
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UINT8 port_cl_dir;
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/* handshake signals (1=asserted; 0=non-asserted) */
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UINT8 obf_a;
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UINT8 obf_b;
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UINT8 ibf_a;
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UINT8 ibf_b;
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UINT8 inte_a;
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UINT8 inte_b;
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UINT8 inte_1;
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UINT8 inte_2;
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UINT8 in_mask[3]; /* input mask */
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UINT8 out_mask[3]; /* output mask */
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UINT8 read[3]; /* data read from ports */
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UINT8 latch[3]; /* data written to ports */
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UINT8 output[3]; /* actual output data */
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UINT8 control; /* mode control word */
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};
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static void set_mode(running_device *device, int data, int call_handlers);
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static void ppi8255_write_port(running_device *device, int port);
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INLINE ppi8255_t *get_safe_token(running_device *device) {
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assert( device != NULL );
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assert( device->type() == PPI8255 );
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return ( ppi8255_t * ) downcast<legacy_device_base *>(device)->token();
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// or initialize to defaults if none provided
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else
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{
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memset(&m_port_a_read, 0, sizeof(m_port_a_read));
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memset(&m_port_b_read, 0, sizeof(m_port_b_read));
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memset(&m_port_c_read, 0, sizeof(m_port_c_read));
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memset(&m_port_a_write, 0, sizeof(m_port_a_write));
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memset(&m_port_b_write, 0, sizeof(m_port_b_write));
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memset(&m_port_c_write, 0, sizeof(m_port_c_write));
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}
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}
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INLINE void ppi8255_get_handshake_signals(ppi8255_t *ppi8255, int is_read, UINT8 *result)
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//**************************************************************************
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// LIVE DEVICE
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//**************************************************************************
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const device_type PPI8255 = ppi8255_device_config::static_alloc_device_config;
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//-------------------------------------------------
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// ppi8255_device - constructor
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//-------------------------------------------------
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ppi8255_device::ppi8255_device(running_machine &_machine, const ppi8255_device_config &config)
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: device_t(_machine, config),
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m_config(config)
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{
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}
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//-------------------------------------------------
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// device_start - device-specific startup
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//-------------------------------------------------
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void ppi8255_device::device_start()
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{
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devcb_resolve_read8(&m_port_read[0], &m_config.m_port_a_read, this);
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devcb_resolve_read8(&m_port_read[1], &m_config.m_port_b_read, this);
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devcb_resolve_read8(&m_port_read[2], &m_config.m_port_c_read, this);
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devcb_resolve_write8(&m_port_write[0], &m_config.m_port_a_write, this);
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devcb_resolve_write8(&m_port_write[1], &m_config.m_port_b_write, this);
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devcb_resolve_write8(&m_port_write[2], &m_config.m_port_c_write, this);
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/* register for state saving */
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state_save_register_device_item(this, 0, m_group_a_mode);
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state_save_register_device_item(this, 0, m_group_b_mode);
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state_save_register_device_item(this, 0, m_port_a_dir);
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state_save_register_device_item(this, 0, m_port_b_dir);
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state_save_register_device_item(this, 0, m_port_ch_dir);
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state_save_register_device_item(this, 0, m_port_cl_dir);
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state_save_register_device_item(this, 0, m_obf_a);
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state_save_register_device_item(this, 0, m_obf_b);
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state_save_register_device_item(this, 0, m_ibf_a);
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state_save_register_device_item(this, 0, m_ibf_b);
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state_save_register_device_item(this, 0, m_inte_a);
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state_save_register_device_item(this, 0, m_inte_b);
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state_save_register_device_item(this, 0, m_inte_1);
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state_save_register_device_item(this, 0, m_inte_2);
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state_save_register_device_item_array(this, 0, m_in_mask);
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state_save_register_device_item_array(this, 0, m_out_mask);
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state_save_register_device_item_array(this, 0, m_read);
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state_save_register_device_item_array(this, 0, m_latch);
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}
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//-------------------------------------------------
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// device_reset - device-specific reset
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//-------------------------------------------------
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void ppi8255_device::device_reset()
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{
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m_group_a_mode = 0;
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m_group_b_mode = 0;
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m_port_a_dir = 0;
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m_port_b_dir = 0;
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m_port_ch_dir = 0;
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m_port_cl_dir = 0;
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m_obf_a = m_ibf_a = 0;
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m_obf_b = m_ibf_b = 0;
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m_inte_a = m_inte_b = m_inte_1 = m_inte_2 = 0;
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for (int i = 0; i < 3; i++)
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{
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m_in_mask[i] = m_out_mask[i] = m_read[i] = m_latch[i] = m_output[i] = 0;
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}
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set_mode(0x9b, 0); /* Mode 0, all ports set to input */
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}
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void ppi8255_device::ppi8255_get_handshake_signals(int is_read, UINT8 *result)
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{
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UINT8 handshake = 0x00;
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UINT8 mask = 0x00;
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/* group A */
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if (ppi8255->group_a_mode == 1)
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if (m_group_a_mode == 1)
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{
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if (ppi8255->port_a_dir)
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if (m_port_a_dir)
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{
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handshake |= ppi8255->ibf_a ? 0x20 : 0x00;
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handshake |= (ppi8255->ibf_a && ppi8255->inte_a) ? 0x08 : 0x00;
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handshake |= m_ibf_a ? 0x20 : 0x00;
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handshake |= (m_ibf_a && m_inte_a) ? 0x08 : 0x00;
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mask |= 0x28;
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}
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else
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{
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handshake |= ppi8255->obf_a ? 0x00 : 0x80;
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handshake |= (ppi8255->obf_a && ppi8255->inte_a) ? 0x08 : 0x00;
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handshake |= m_obf_a ? 0x00 : 0x80;
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handshake |= (m_obf_a && m_inte_a) ? 0x08 : 0x00;
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mask |= 0x88;
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}
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}
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else if (ppi8255->group_a_mode == 2)
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else if (m_group_a_mode == 2)
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{
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handshake |= ppi8255->obf_a ? 0x00 : 0x80;
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handshake |= ppi8255->ibf_a ? 0x20 : 0x00;
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handshake |= ((ppi8255->obf_a && ppi8255->inte_1) || (ppi8255->ibf_a && ppi8255->inte_2)) ? 0x08 : 0x00;
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handshake |= m_obf_a ? 0x00 : 0x80;
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handshake |= m_ibf_a ? 0x20 : 0x00;
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handshake |= ((m_obf_a && m_inte_1) || (m_ibf_a && m_inte_2)) ? 0x08 : 0x00;
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mask |= 0xA8;
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}
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/* group B */
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if (ppi8255->group_b_mode == 1)
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if (m_group_b_mode == 1)
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{
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if (ppi8255->port_b_dir)
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if (m_port_b_dir)
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{
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handshake |= ppi8255->ibf_b ? 0x02 : 0x00;
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handshake |= (ppi8255->ibf_b && ppi8255->inte_b) ? 0x01 : 0x00;
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handshake |= m_ibf_b ? 0x02 : 0x00;
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handshake |= (m_ibf_b && m_inte_b) ? 0x01 : 0x00;
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mask |= 0x03;
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}
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else
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{
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handshake |= ppi8255->obf_b ? 0x00 : 0x02;
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handshake |= (ppi8255->obf_b && ppi8255->inte_b) ? 0x01 : 0x00;
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handshake |= m_obf_b ? 0x00 : 0x02;
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handshake |= (m_obf_b && m_inte_b) ? 0x01 : 0x00;
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mask |= 0x03;
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}
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}
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@ -192,92 +259,90 @@ INLINE void ppi8255_get_handshake_signals(ppi8255_t *ppi8255, int is_read, UINT8
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static void ppi8255_input(running_device *device, int port, UINT8 data)
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void ppi8255_device::ppi8255_input(int port, UINT8 data)
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{
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ppi8255_t *ppi8255 = get_safe_token(device);
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int changed = 0;
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ppi8255->read[port] = data;
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m_read[port] = data;
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/* port C is special */
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if (port == 2)
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{
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if (((ppi8255->group_a_mode == 1) && (ppi8255->port_a_dir == 0)) || (ppi8255->group_a_mode == 2))
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if (((m_group_a_mode == 1) && (m_port_a_dir == 0)) || (m_group_a_mode == 2))
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{
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/* is !ACKA asserted? */
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if (ppi8255->obf_a && !(data & 0x40))
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if (m_obf_a && !(data & 0x40))
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{
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ppi8255->obf_a = 0;
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m_obf_a = 0;
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changed = 1;
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}
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}
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if (((ppi8255->group_a_mode == 1) && (ppi8255->port_a_dir == 1)) || (ppi8255->group_a_mode == 2))
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if (((m_group_a_mode == 1) && (m_port_a_dir == 1)) || (m_group_a_mode == 2))
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{
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/* is !STBA asserted? */
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if (!ppi8255->ibf_a && !(data & 0x10))
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if (!m_ibf_a && !(data & 0x10))
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{
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ppi8255->ibf_a = 1;
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m_ibf_a = 1;
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changed = 1;
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}
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}
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if ((ppi8255->group_b_mode == 1) && (ppi8255->port_b_dir == 0))
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if ((m_group_b_mode == 1) && (m_port_b_dir == 0))
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{
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/* is !ACKB asserted? */
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if (ppi8255->obf_b && !(data & 0x04))
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if (m_obf_b && !(data & 0x04))
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{
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ppi8255->obf_b = 0;
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m_obf_b = 0;
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changed = 1;
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}
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}
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if ((ppi8255->group_b_mode == 1) && (ppi8255->port_b_dir == 1))
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if ((m_group_b_mode == 1) && (m_port_b_dir == 1))
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{
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/* is !STBB asserted? */
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if (!ppi8255->ibf_b && !(data & 0x04))
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if (!m_ibf_b && !(data & 0x04))
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{
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ppi8255->ibf_b = 1;
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m_ibf_b = 1;
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changed = 1;
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}
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}
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if (changed)
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ppi8255_write_port(device, 2);
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{
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ppi8255_write_port(2);
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}
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}
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}
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static UINT8 ppi8255_read_port(running_device *device, int port)
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UINT8 ppi8255_device::ppi8255_read_port(int port)
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{
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ppi8255_t *ppi8255 = get_safe_token(device);
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UINT8 result = 0x00;
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if (ppi8255->in_mask[port])
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if (m_in_mask[port])
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{
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if (ppi8255->port_read[port].read != NULL)
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ppi8255_input(device, port, devcb_call_read8(&ppi8255->port_read[port], 0));
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result |= ppi8255->read[port] & ppi8255->in_mask[port];
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ppi8255_input(port, devcb_call_read8(&m_port_read[port], 0));
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result |= m_read[port] & m_in_mask[port];
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}
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result |= ppi8255->latch[port] & ppi8255->out_mask[port];
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result |= m_latch[port] & m_out_mask[port];
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switch (port)
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{
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case 0:
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/* clear input buffer full flag */
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ppi8255->ibf_a = 0;
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m_ibf_a = 0;
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break;
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case 1:
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/* clear input buffer full flag */
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ppi8255->ibf_b = 0;
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m_ibf_b = 0;
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break;
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case 2:
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/* read special port 2 signals */
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ppi8255_get_handshake_signals(ppi8255, 1, &result);
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ppi8255_get_handshake_signals(1, &result);
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break;
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}
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@ -286,9 +351,8 @@ static UINT8 ppi8255_read_port(running_device *device, int port)
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READ8_DEVICE_HANDLER( ppi8255_r )
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READ8_DEVICE_HANDLER_TRAMPOLINE(ppi8255, ppi8255_r)
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{
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ppi8255_t *ppi8255 = get_safe_token(device);
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UINT8 result = 0;
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offset %= 4;
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@ -298,11 +362,11 @@ READ8_DEVICE_HANDLER( ppi8255_r )
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case 0: /* Port A read */
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case 1: /* Port B read */
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case 2: /* Port C read */
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result = ppi8255_read_port(device, offset);
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result = ppi8255_read_port(offset);
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break;
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case 3: /* Control word */
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result = ppi8255->control;
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result = m_control;
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break;
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}
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@ -311,29 +375,25 @@ READ8_DEVICE_HANDLER( ppi8255_r )
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static void ppi8255_write_port(running_device *device, int port)
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void ppi8255_device::ppi8255_write_port(int port)
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{
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ppi8255_t *ppi8255 = get_safe_token(device);
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UINT8 write_data;
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write_data = ppi8255->latch[port] & ppi8255->out_mask[port];
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write_data |= 0xFF & ~ppi8255->out_mask[port];
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UINT8 write_data = m_latch[port] & m_out_mask[port];
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write_data |= 0xFF & ~m_out_mask[port];
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/* write out special port 2 signals */
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if (port == 2)
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ppi8255_get_handshake_signals(ppi8255, 0, &write_data);
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{
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ppi8255_get_handshake_signals(0, &write_data);
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}
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ppi8255->output[port] = write_data;
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if (ppi8255->port_write[port].write != NULL)
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devcb_call_write8(&ppi8255->port_write[port], 0, write_data);
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m_output[port] = write_data;
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devcb_call_write8(&m_port_write[port], 0, write_data);
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}
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WRITE8_DEVICE_HANDLER( ppi8255_w )
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WRITE8_DEVICE_HANDLER_TRAMPOLINE(ppi8255, ppi8255_w)
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{
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ppi8255_t *ppi8255 = get_safe_token(device);
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offset %= 4;
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switch( offset )
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@ -341,24 +401,24 @@ WRITE8_DEVICE_HANDLER( ppi8255_w )
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case 0: /* Port A write */
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case 1: /* Port B write */
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case 2: /* Port C write */
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ppi8255->latch[offset] = data;
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ppi8255_write_port(device, offset);
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m_latch[offset] = data;
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ppi8255_write_port(offset);
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switch(offset)
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{
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case 0:
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if (!ppi8255->port_a_dir && (ppi8255->group_a_mode != 0))
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if (!m_port_a_dir && (m_group_a_mode != 0))
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{
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ppi8255->obf_a = 1;
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ppi8255_write_port(device, 2);
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m_obf_a = 1;
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ppi8255_write_port(2);
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}
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break;
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case 1:
|
||||
if (!ppi8255->port_b_dir && (ppi8255->group_b_mode != 0))
|
||||
if (!m_port_b_dir && (m_group_b_mode != 0))
|
||||
{
|
||||
ppi8255->obf_b = 1;
|
||||
ppi8255_write_port(device, 2);
|
||||
m_obf_b = 1;
|
||||
ppi8255_write_port(2);
|
||||
}
|
||||
break;
|
||||
}
|
||||
@ -367,129 +427,134 @@ WRITE8_DEVICE_HANDLER( ppi8255_w )
|
||||
case 3: /* Control word */
|
||||
if (data & 0x80)
|
||||
{
|
||||
set_mode(device, data & 0x7f, 1);
|
||||
set_mode(data & 0x7f, 1);
|
||||
}
|
||||
else
|
||||
{
|
||||
/* bit set/reset */
|
||||
int bit;
|
||||
|
||||
bit = (data >> 1) & 0x07;
|
||||
int bit = (data >> 1) & 0x07;
|
||||
|
||||
if (data & 1)
|
||||
ppi8255->latch[2] |= (1<<bit); /* set bit */
|
||||
{
|
||||
m_latch[2] |= (1 << bit); /* set bit */
|
||||
}
|
||||
else
|
||||
ppi8255->latch[2] &= ~(1<<bit); /* reset bit */
|
||||
|
||||
if (ppi8255->group_b_mode == 1)
|
||||
{
|
||||
if (bit == 2) ppi8255->inte_b = data & 1;
|
||||
m_latch[2] &= ~(1 << bit); /* reset bit */
|
||||
}
|
||||
|
||||
if (ppi8255->group_a_mode == 1)
|
||||
if (m_group_b_mode == 1)
|
||||
{
|
||||
if (bit == 4 && ppi8255->port_a_dir) ppi8255->inte_a = data & 1;
|
||||
if (bit == 6 && !ppi8255->port_a_dir) ppi8255->inte_a = data & 1;
|
||||
if (bit == 2)
|
||||
{
|
||||
m_inte_b = data & 1;
|
||||
}
|
||||
}
|
||||
|
||||
if (ppi8255->group_a_mode == 2)
|
||||
if (m_group_a_mode == 1)
|
||||
{
|
||||
if (bit == 4) ppi8255->inte_2 = data & 1;
|
||||
if (bit == 6) ppi8255->inte_1 = data & 1;
|
||||
if (bit == 4 && m_port_a_dir)
|
||||
{
|
||||
m_inte_a = data & 1;
|
||||
}
|
||||
if (bit == 6 && !m_port_a_dir)
|
||||
{
|
||||
m_inte_a = data & 1;
|
||||
}
|
||||
}
|
||||
|
||||
ppi8255_write_port(device, 2);
|
||||
if (m_group_a_mode == 2)
|
||||
{
|
||||
if (bit == 4)
|
||||
{
|
||||
m_inte_2 = data & 1;
|
||||
}
|
||||
if (bit == 6)
|
||||
{
|
||||
m_inte_1 = data & 1;
|
||||
}
|
||||
}
|
||||
|
||||
ppi8255_write_port(2);
|
||||
}
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void ppi8255_set_port_a_read(running_device *device, const devcb_read8 *config)
|
||||
void ppi8255_device::set_mode(int data, int call_handlers)
|
||||
{
|
||||
ppi8255_t *ppi8255 = get_safe_token(device);
|
||||
devcb_resolve_read8(&ppi8255->port_read[0], config, device);
|
||||
}
|
||||
|
||||
void ppi8255_set_port_b_read(running_device *device, const devcb_read8 *config)
|
||||
{
|
||||
ppi8255_t *ppi8255 = get_safe_token(device);
|
||||
devcb_resolve_read8(&ppi8255->port_read[1], config, device);
|
||||
}
|
||||
|
||||
void ppi8255_set_port_c_read(running_device *device, const devcb_read8 *config)
|
||||
{
|
||||
ppi8255_t *ppi8255 = get_safe_token(device);
|
||||
devcb_resolve_read8(&ppi8255->port_read[2], config, device);
|
||||
}
|
||||
|
||||
|
||||
void ppi8255_set_port_a_write(running_device *device, const devcb_write8 *config)
|
||||
{
|
||||
ppi8255_t *ppi8255 = get_safe_token(device);
|
||||
devcb_resolve_write8(&ppi8255->port_write[0], config, device);
|
||||
}
|
||||
|
||||
void ppi8255_set_port_b_write(running_device *device, const devcb_write8 *config)
|
||||
{
|
||||
ppi8255_t *ppi8255 = get_safe_token(device);
|
||||
devcb_resolve_write8(&ppi8255->port_write[1], config, device);
|
||||
}
|
||||
|
||||
void ppi8255_set_port_c_write(running_device *device, const devcb_write8 *config)
|
||||
{
|
||||
ppi8255_t *ppi8255 = get_safe_token(device);
|
||||
devcb_resolve_write8(&ppi8255->port_write[2], config, device);
|
||||
}
|
||||
|
||||
|
||||
static void set_mode(running_device *device, int data, int call_handlers)
|
||||
{
|
||||
ppi8255_t *ppi8255 = get_safe_token(device);
|
||||
int i;
|
||||
|
||||
/* parse out mode */
|
||||
ppi8255->group_a_mode = (data >> 5) & 3;
|
||||
ppi8255->group_b_mode = (data >> 2) & 1;
|
||||
ppi8255->port_a_dir = (data >> 4) & 1;
|
||||
ppi8255->port_b_dir = (data >> 1) & 1;
|
||||
ppi8255->port_ch_dir = (data >> 3) & 1;
|
||||
ppi8255->port_cl_dir = (data >> 0) & 1;
|
||||
m_group_a_mode = (data >> 5) & 3;
|
||||
m_group_b_mode = (data >> 2) & 1;
|
||||
m_port_a_dir = (data >> 4) & 1;
|
||||
m_port_b_dir = (data >> 1) & 1;
|
||||
m_port_ch_dir = (data >> 3) & 1;
|
||||
m_port_cl_dir = (data >> 0) & 1;
|
||||
|
||||
/* normalize group_a_mode */
|
||||
if (ppi8255->group_a_mode == 3)
|
||||
ppi8255->group_a_mode = 2;
|
||||
if (m_group_a_mode == 3)
|
||||
{
|
||||
m_group_a_mode = 2;
|
||||
}
|
||||
|
||||
/* Port A direction */
|
||||
if (ppi8255->group_a_mode == 2)
|
||||
ppi8255->in_mask[0] = 0xFF, ppi8255->out_mask[0] = 0xFF; /* bidirectional */
|
||||
if (m_group_a_mode == 2)
|
||||
{
|
||||
m_in_mask[0] = 0xFF;
|
||||
m_out_mask[0] = 0xFF; /* bidirectional */
|
||||
}
|
||||
else
|
||||
if (ppi8255->port_a_dir)
|
||||
ppi8255->in_mask[0] = 0xFF, ppi8255->out_mask[0] = 0x00; /* input */
|
||||
{
|
||||
if (m_port_a_dir)
|
||||
{
|
||||
m_in_mask[0] = 0xFF;
|
||||
m_out_mask[0] = 0x00; /* input */
|
||||
}
|
||||
else
|
||||
ppi8255->in_mask[0] = 0x00, ppi8255->out_mask[0] = 0xFF; /* output */
|
||||
{
|
||||
m_in_mask[0] = 0x00;
|
||||
m_out_mask[0] = 0xFF; /* output */
|
||||
}
|
||||
}
|
||||
|
||||
/* Port B direction */
|
||||
if (ppi8255->port_b_dir)
|
||||
ppi8255->in_mask[1] = 0xFF, ppi8255->out_mask[1] = 0x00; /* input */
|
||||
if (m_port_b_dir)
|
||||
{
|
||||
m_in_mask[1] = 0xFF;
|
||||
m_out_mask[1] = 0x00; /* input */
|
||||
}
|
||||
else
|
||||
ppi8255->in_mask[1] = 0x00, ppi8255->out_mask[1] = 0xFF; /* output */
|
||||
{
|
||||
m_in_mask[1] = 0x00;
|
||||
m_out_mask[1] = 0xFF; /* output */
|
||||
}
|
||||
|
||||
/* Port C upper direction */
|
||||
if (ppi8255->port_ch_dir)
|
||||
ppi8255->in_mask[2] = 0xF0, ppi8255->out_mask[2] = 0x00; /* input */
|
||||
if (m_port_ch_dir)
|
||||
{
|
||||
m_in_mask[2] = 0xF0;
|
||||
m_out_mask[2] = 0x00; /* input */
|
||||
}
|
||||
else
|
||||
ppi8255->in_mask[2] = 0x00, ppi8255->out_mask[2] = 0xF0; /* output */
|
||||
{
|
||||
m_in_mask[2] = 0x00;
|
||||
m_out_mask[2] = 0xF0; /* output */
|
||||
}
|
||||
|
||||
/* Port C lower direction */
|
||||
if (ppi8255->port_cl_dir)
|
||||
ppi8255->in_mask[2] |= 0x0F; /* input */
|
||||
if (m_port_cl_dir)
|
||||
{
|
||||
m_in_mask[2] |= 0x0F; /* input */
|
||||
}
|
||||
else
|
||||
ppi8255->out_mask[2] |= 0x0F; /* output */
|
||||
{
|
||||
m_out_mask[2] |= 0x0F; /* output */
|
||||
}
|
||||
|
||||
/* now depending on the group modes, certain Port C lines may be replaced
|
||||
* with varying control signals */
|
||||
switch(ppi8255->group_a_mode)
|
||||
switch(m_group_a_mode)
|
||||
{
|
||||
case 0: /* Group A mode 0 */
|
||||
/* no changes */
|
||||
@ -497,18 +562,18 @@ static void set_mode(running_device *device, int data, int call_handlers)
|
||||
|
||||
case 1: /* Group A mode 1 */
|
||||
/* bits 5-3 are reserved by Group A mode 1 */
|
||||
ppi8255->in_mask[2] &= ~0x38;
|
||||
ppi8255->out_mask[2] &= ~0x38;
|
||||
m_in_mask[2] &= ~0x38;
|
||||
m_out_mask[2] &= ~0x38;
|
||||
break;
|
||||
|
||||
case 2: /* Group A mode 2 */
|
||||
/* bits 7-3 are reserved by Group A mode 2 */
|
||||
ppi8255->in_mask[2] &= ~0xF8;
|
||||
ppi8255->out_mask[2] &= ~0xF8;
|
||||
m_in_mask[2] &= ~0xF8;
|
||||
m_out_mask[2] &= ~0xF8;
|
||||
break;
|
||||
}
|
||||
|
||||
switch(ppi8255->group_b_mode)
|
||||
switch(m_group_b_mode)
|
||||
{
|
||||
case 0: /* Group B mode 0 */
|
||||
/* no changes */
|
||||
@ -516,129 +581,90 @@ static void set_mode(running_device *device, int data, int call_handlers)
|
||||
|
||||
case 1: /* Group B mode 1 */
|
||||
/* bits 2-0 are reserved by Group B mode 1 */
|
||||
ppi8255->in_mask[2] &= ~0x07;
|
||||
ppi8255->out_mask[2] &= ~0x07;
|
||||
m_in_mask[2] &= ~0x07;
|
||||
m_out_mask[2] &= ~0x07;
|
||||
break;
|
||||
}
|
||||
|
||||
/* KT: 25-Dec-99 - 8255 resets latches when mode set */
|
||||
ppi8255->latch[0] = ppi8255->latch[1] = ppi8255->latch[2] = 0;
|
||||
m_latch[0] = m_latch[1] = m_latch[2] = 0;
|
||||
|
||||
if (call_handlers)
|
||||
{
|
||||
for (i = 0; i < 3; i++)
|
||||
ppi8255_write_port(device, i);
|
||||
for (int i = 0; i < 3; i++)
|
||||
{
|
||||
ppi8255_write_port(i);
|
||||
}
|
||||
}
|
||||
|
||||
/* reset flip-flops */
|
||||
ppi8255->obf_a = ppi8255->ibf_a = 0;
|
||||
ppi8255->obf_b = ppi8255->ibf_b = 0;
|
||||
ppi8255->inte_a = ppi8255->inte_b = ppi8255->inte_1 = ppi8255->inte_2 = 0;
|
||||
m_obf_a = m_ibf_a = 0;
|
||||
m_obf_b = m_ibf_b = 0;
|
||||
m_inte_a = m_inte_b = m_inte_1 = m_inte_2 = 0;
|
||||
|
||||
/* store control word */
|
||||
ppi8255->control = data;
|
||||
m_control = data;
|
||||
}
|
||||
|
||||
void ppi8255_set_port_a_read(running_device *device, const devcb_read8 *config)
|
||||
{
|
||||
downcast<ppi8255_device*>(device)->ppi8255_set_port_read(0, config);
|
||||
}
|
||||
|
||||
void ppi8255_set_port_b_read(running_device *device, const devcb_read8 *config)
|
||||
{
|
||||
downcast<ppi8255_device*>(device)->ppi8255_set_port_read(1, config);
|
||||
}
|
||||
|
||||
void ppi8255_set_port_c_read(running_device *device, const devcb_read8 *config)
|
||||
{
|
||||
downcast<ppi8255_device*>(device)->ppi8255_set_port_read(2, config);
|
||||
}
|
||||
|
||||
|
||||
void ppi8255_set_port_a( running_device *device, UINT8 data ) { ppi8255_input(device, 0, data); }
|
||||
void ppi8255_set_port_b( running_device *device, UINT8 data ) { ppi8255_input(device, 1, data); }
|
||||
void ppi8255_set_port_c( running_device *device, UINT8 data ) { ppi8255_input(device, 2, data); }
|
||||
|
||||
UINT8 ppi8255_get_port_a( running_device *device ) {
|
||||
ppi8255_t *ppi8255 = get_safe_token(device);
|
||||
|
||||
return ppi8255->output[0];
|
||||
void ppi8255_set_port_a_write(running_device *device, const devcb_write8 *config)
|
||||
{
|
||||
downcast<ppi8255_device*>(device)->ppi8255_set_port_write(0, config);
|
||||
}
|
||||
|
||||
UINT8 ppi8255_get_port_b( running_device *device ) {
|
||||
ppi8255_t *ppi8255 = get_safe_token(device);
|
||||
|
||||
return ppi8255->output[1];
|
||||
void ppi8255_set_port_b_write(running_device *device, const devcb_write8 *config)
|
||||
{
|
||||
downcast<ppi8255_device*>(device)->ppi8255_set_port_write(1, config);
|
||||
}
|
||||
|
||||
UINT8 ppi8255_get_port_c( running_device *device ) {
|
||||
ppi8255_t *ppi8255 = get_safe_token(device);
|
||||
|
||||
return ppi8255->output[2];
|
||||
void ppi8255_set_port_c_write(running_device *device, const devcb_write8 *config)
|
||||
{
|
||||
downcast<ppi8255_device*>(device)->ppi8255_set_port_write(2, config);
|
||||
}
|
||||
|
||||
|
||||
static DEVICE_START( ppi8255 ) {
|
||||
ppi8255_t *ppi8255 = get_safe_token(device);
|
||||
void ppi8255_set_port_a( running_device *device, UINT8 data )
|
||||
{
|
||||
downcast<ppi8255_device*>(device)->ppi8255_set_port(0, data);
|
||||
}
|
||||
|
||||
ppi8255->intf = (const ppi8255_interface *)device->baseconfig().static_config();
|
||||
void ppi8255_set_port_b( running_device *device, UINT8 data )
|
||||
{
|
||||
downcast<ppi8255_device*>(device)->ppi8255_set_port(1, data);
|
||||
}
|
||||
|
||||
devcb_resolve_read8(&ppi8255->port_read[0], &ppi8255->intf->port_a_read, device);
|
||||
devcb_resolve_read8(&ppi8255->port_read[1], &ppi8255->intf->port_b_read, device);
|
||||
devcb_resolve_read8(&ppi8255->port_read[2], &ppi8255->intf->port_c_read, device);
|
||||
|
||||
devcb_resolve_write8(&ppi8255->port_write[0], &ppi8255->intf->port_a_write, device);
|
||||
devcb_resolve_write8(&ppi8255->port_write[1], &ppi8255->intf->port_b_write, device);
|
||||
devcb_resolve_write8(&ppi8255->port_write[2], &ppi8255->intf->port_c_write, device);
|
||||
|
||||
/* register for state saving */
|
||||
state_save_register_device_item(device, 0, ppi8255->group_a_mode);
|
||||
state_save_register_device_item(device, 0, ppi8255->group_b_mode);
|
||||
state_save_register_device_item(device, 0, ppi8255->port_a_dir);
|
||||
state_save_register_device_item(device, 0, ppi8255->port_b_dir);
|
||||
state_save_register_device_item(device, 0, ppi8255->port_ch_dir);
|
||||
state_save_register_device_item(device, 0, ppi8255->port_cl_dir);
|
||||
state_save_register_device_item(device, 0, ppi8255->obf_a);
|
||||
state_save_register_device_item(device, 0, ppi8255->obf_b);
|
||||
state_save_register_device_item(device, 0, ppi8255->ibf_a);
|
||||
state_save_register_device_item(device, 0, ppi8255->ibf_b);
|
||||
state_save_register_device_item(device, 0, ppi8255->inte_a);
|
||||
state_save_register_device_item(device, 0, ppi8255->inte_b);
|
||||
state_save_register_device_item(device, 0, ppi8255->inte_1);
|
||||
state_save_register_device_item(device, 0, ppi8255->inte_2);
|
||||
state_save_register_device_item_array(device, 0, ppi8255->in_mask);
|
||||
state_save_register_device_item_array(device, 0, ppi8255->out_mask);
|
||||
state_save_register_device_item_array(device, 0, ppi8255->read);
|
||||
state_save_register_device_item_array(device, 0, ppi8255->latch);
|
||||
void ppi8255_set_port_c( running_device *device, UINT8 data )
|
||||
{
|
||||
downcast<ppi8255_device*>(device)->ppi8255_set_port(2, data);
|
||||
}
|
||||
|
||||
|
||||
static DEVICE_RESET( ppi8255 ) {
|
||||
ppi8255_t *ppi8255 = get_safe_token(device);
|
||||
int i;
|
||||
|
||||
ppi8255->group_a_mode = 0;
|
||||
ppi8255->group_b_mode = 0;
|
||||
ppi8255->port_a_dir = 0;
|
||||
ppi8255->port_b_dir = 0;
|
||||
ppi8255->port_ch_dir = 0;
|
||||
ppi8255->port_cl_dir = 0;
|
||||
ppi8255->obf_a = ppi8255->ibf_a = 0;
|
||||
ppi8255->obf_b = ppi8255->ibf_b = 0;
|
||||
ppi8255->inte_a = ppi8255->inte_b = ppi8255->inte_1 = ppi8255->inte_2 = 0;
|
||||
|
||||
for ( i = 0; i < 3; i++ ) {
|
||||
ppi8255->in_mask[i] = ppi8255->out_mask[i] = ppi8255->read[i] = ppi8255->latch[i] = ppi8255->output[i] = 0;
|
||||
}
|
||||
|
||||
set_mode(device, 0x9b, 0); /* Mode 0, all ports set to input */
|
||||
UINT8 ppi8255_get_port_a( running_device *device )
|
||||
{
|
||||
return downcast<ppi8255_device*>(device)->ppi8255_get_port(0);
|
||||
}
|
||||
|
||||
|
||||
DEVICE_GET_INFO(ppi8255) {
|
||||
switch ( state ) {
|
||||
/* --- the following bits of info are returned as 64-bit signed integers --- */
|
||||
case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(ppi8255_t); break;
|
||||
case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = 0; break;
|
||||
|
||||
/* --- the following bits of info are returned as pointers to data or functions --- */
|
||||
case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(ppi8255); break;
|
||||
case DEVINFO_FCT_STOP: /* nothing */ break;
|
||||
case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(ppi8255); break;
|
||||
|
||||
/* --- the following bits of info are returned as NULL-terminated strings --- */
|
||||
case DEVINFO_STR_NAME: strcpy(info->s, "Intel PPI8255"); break;
|
||||
case DEVINFO_STR_FAMILY: strcpy(info->s, "PPI8255"); break;
|
||||
case DEVINFO_STR_VERSION: strcpy(info->s, "1.00"); break;
|
||||
case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
|
||||
case DEVINFO_STR_CREDITS: strcpy(info->s, "Copyright the MAME and MESS Teams"); break;
|
||||
}
|
||||
UINT8 ppi8255_get_port_b( running_device *device )
|
||||
{
|
||||
return downcast<ppi8255_device*>(device)->ppi8255_get_port(1);
|
||||
}
|
||||
|
||||
|
||||
DEFINE_LEGACY_DEVICE(PPI8255, ppi8255);
|
||||
UINT8 ppi8255_get_port_c( running_device *device )
|
||||
{
|
||||
return downcast<ppi8255_device*>(device)->ppi8255_get_port(2);
|
||||
}
|
||||
|
@ -6,30 +6,14 @@
|
||||
|
||||
*********************************************************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef __8255PPI_H_
|
||||
#define __8255PPI_H_
|
||||
|
||||
#include "devlegcy.h"
|
||||
#include "emu.h"
|
||||
|
||||
|
||||
DECLARE_LEGACY_DEVICE(PPI8255, ppi8255);
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
TYPE DEFINITIONS
|
||||
***************************************************************************/
|
||||
|
||||
typedef struct _ppi8255_interface ppi8255_interface;
|
||||
struct _ppi8255_interface
|
||||
{
|
||||
devcb_read8 port_a_read;
|
||||
devcb_read8 port_b_read;
|
||||
devcb_read8 port_c_read;
|
||||
devcb_write8 port_a_write;
|
||||
devcb_write8 port_b_write;
|
||||
devcb_write8 port_c_write;
|
||||
};
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
DEVICE CONFIGURATION MACROS
|
||||
@ -44,11 +28,138 @@ struct _ppi8255_interface
|
||||
MDRV_DEVICE_CONFIG(_intrf)
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
TYPE DEFINITIONS
|
||||
***************************************************************************/
|
||||
|
||||
|
||||
// ======================> ppi8255_interface
|
||||
|
||||
struct ppi8255_interface
|
||||
{
|
||||
devcb_read8 m_port_a_read;
|
||||
devcb_read8 m_port_b_read;
|
||||
devcb_read8 m_port_c_read;
|
||||
devcb_write8 m_port_a_write;
|
||||
devcb_write8 m_port_b_write;
|
||||
devcb_write8 m_port_c_write;
|
||||
};
|
||||
|
||||
|
||||
|
||||
// ======================> ppi8255_device_config
|
||||
|
||||
class ppi8255_device_config : public device_config,
|
||||
public ppi8255_interface
|
||||
{
|
||||
friend class ppi8255_device;
|
||||
|
||||
// construction/destruction
|
||||
ppi8255_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
|
||||
|
||||
public:
|
||||
// allocators
|
||||
static device_config *static_alloc_device_config(const machine_config &mconfig, const char *tag, const device_config *owner, UINT32 clock);
|
||||
virtual device_t *alloc_device(running_machine &machine) const;
|
||||
|
||||
protected:
|
||||
// device_config overrides
|
||||
virtual void device_config_complete();
|
||||
};
|
||||
|
||||
|
||||
|
||||
// ======================> ppi8255_device
|
||||
|
||||
class ppi8255_device : public device_t
|
||||
{
|
||||
friend class ppi8255_device_config;
|
||||
|
||||
// construction/destruction
|
||||
ppi8255_device(running_machine &_machine, const ppi8255_device_config &_config);
|
||||
|
||||
public:
|
||||
|
||||
UINT8 ppi8255_r(UINT32 offset);
|
||||
void ppi8255_w(UINT32 offset, UINT8 data);
|
||||
|
||||
void ppi8255_set_port_read(int which, const devcb_read8 *config) { devcb_resolve_read8(&m_port_read[which], config, this); }
|
||||
void ppi8255_set_port_write(int which, const devcb_write8 *config) { devcb_resolve_write8(&m_port_write[which], config, this); }
|
||||
|
||||
void ppi8255_set_port(int which, UINT8 data) { ppi8255_input(which, data); }
|
||||
UINT8 ppi8255_get_port(int which) { return m_output[which]; }
|
||||
|
||||
void ppi8255_set_port_a(UINT8 data);
|
||||
void ppi8255_set_port_b(UINT8 data);
|
||||
void ppi8255_set_port_c(UINT8 data);
|
||||
|
||||
UINT8 ppi8255_get_port_a();
|
||||
UINT8 ppi8255_get_port_b();
|
||||
UINT8 ppi8255_get_port_c();
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start();
|
||||
virtual void device_reset();
|
||||
virtual void device_post_load() { }
|
||||
virtual void device_clock_changed() { }
|
||||
|
||||
static TIMER_CALLBACK( callback );
|
||||
|
||||
private:
|
||||
|
||||
void ppi8255_get_handshake_signals(int is_read, UINT8 *result);
|
||||
void ppi8255_input(int port, UINT8 data);
|
||||
|
||||
UINT8 ppi8255_read_port(int port);
|
||||
void ppi8255_write_port(int port);
|
||||
|
||||
void set_mode(int data, int call_handlers);
|
||||
|
||||
devcb_resolved_read8 m_port_read[3];
|
||||
devcb_resolved_write8 m_port_write[3];
|
||||
|
||||
/* mode flags */
|
||||
UINT8 m_group_a_mode;
|
||||
UINT8 m_group_b_mode;
|
||||
UINT8 m_port_a_dir;
|
||||
UINT8 m_port_b_dir;
|
||||
UINT8 m_port_ch_dir;
|
||||
UINT8 m_port_cl_dir;
|
||||
|
||||
/* handshake signals (1=asserted; 0=non-asserted) */
|
||||
UINT8 m_obf_a;
|
||||
UINT8 m_obf_b;
|
||||
UINT8 m_ibf_a;
|
||||
UINT8 m_ibf_b;
|
||||
UINT8 m_inte_a;
|
||||
UINT8 m_inte_b;
|
||||
UINT8 m_inte_1;
|
||||
UINT8 m_inte_2;
|
||||
|
||||
UINT8 m_in_mask[3]; /* input mask */
|
||||
UINT8 m_out_mask[3]; /* output mask */
|
||||
UINT8 m_read[3]; /* data read from ports */
|
||||
UINT8 m_latch[3]; /* data written to ports */
|
||||
UINT8 m_output[3]; /* actual output data */
|
||||
UINT8 m_control; /* mode control word */
|
||||
|
||||
const ppi8255_device_config &m_config;
|
||||
};
|
||||
|
||||
|
||||
// device type definition
|
||||
extern const device_type PPI8255;
|
||||
|
||||
|
||||
|
||||
/***************************************************************************
|
||||
PROTOTYPES
|
||||
***************************************************************************/
|
||||
|
||||
READ8_DEVICE_HANDLER( ppi8255_r );
|
||||
WRITE8_DEVICE_HANDLER( ppi8255_w );
|
||||
|
||||
|
||||
void ppi8255_set_port_a_read( running_device *device, const devcb_read8 *config );
|
||||
void ppi8255_set_port_b_read( running_device *device, const devcb_read8 *config );
|
||||
void ppi8255_set_port_c_read( running_device *device, const devcb_read8 *config );
|
||||
|
Loading…
Reference in New Issue
Block a user