Sprinter/mame
2
0
Fork 0
mirror of https://github.com/holub/mame synced 2025-07-01 08:18:59 +03:00
Code Issues Actions Packages Projects Releases Wiki Activity

Updated bfm fruit drivers to use the n68681 device. (nw)

Browse Source
This commit is contained in:
Ivan Vangelista 2013-11-24 10:32:38 +00:00
parent 7b202ee115
commit 2ec6645351
8 changed files with 92 additions and 85 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/emu/machine/68307.c
View File

@ -137,7 +137,7 @@ void m68307_set_port_callbacks(m68307cpu_device *device, m68307_porta_read_callb
device->m_m68307_portb_w = portb_w; device->m_m68307_portb_w = portb_w;
} }
void m68307_set_duart68681(m68307cpu_device* cpudev, device_t* duart68681) void m68307_set_duart68681(m68307cpu_device* cpudev, duartn68681_device *duart68681)
{ {
if (cpudev->m68307SERIAL) if (cpudev->m68307SERIAL)
cpudev->m68307SERIAL->m68307ser_set_duart68681(duart68681); cpudev->m68307SERIAL->m68307ser_set_duart68681(duart68681);

2
src/emu/machine/68307.h
View File

@ -88,7 +88,7 @@ protected:
static const device_type M68307 = &device_creator<m68307cpu_device>; static const device_type M68307 = &device_creator<m68307cpu_device>;
extern void m68307_set_port_callbacks(m68307cpu_device *device, m68307_porta_read_callback porta_r, m68307_porta_write_callback porta_w, m68307_portb_read_callback portb_r, m68307_portb_write_callback portb_w); extern void m68307_set_port_callbacks(m68307cpu_device *device, m68307_porta_read_callback porta_r, m68307_porta_write_callback porta_w, m68307_portb_read_callback portb_r, m68307_portb_write_callback portb_w);
extern void m68307_set_duart68681(m68307cpu_device* cpudev, device_t* duart68681); extern void m68307_set_duart68681(m68307cpu_device* cpudev, duartn68681_device *duart68681);
extern UINT16 m68307_get_cs(m68307cpu_device *device, offs_t address); extern UINT16 m68307_get_cs(m68307cpu_device *device, offs_t address);
extern void m68307_timer0_interrupt(m68307cpu_device *cpudev); extern void m68307_timer0_interrupt(m68307cpu_device *cpudev);
extern void m68307_timer1_interrupt(m68307cpu_device *cpudev); extern void m68307_timer1_interrupt(m68307cpu_device *cpudev);

4
src/emu/machine/68307ser.c
View File

@ -24,7 +24,7 @@ READ8_MEMBER( m68307cpu_device::m68307_internal_serial_r )
// if we're piggybacking on the existing 68681 implementation... // if we're piggybacking on the existing 68681 implementation...
if (serial->m_duart68681) if (serial->m_duart68681)
{ {
if (offset&1) return duart68681_r(serial->m_duart68681, *m68k->program, offset>>1); if (offset&1) return serial->m_duart68681->read(*m68k->program, offset>>1);
} }
else else
{ {
@ -103,7 +103,7 @@ WRITE8_MEMBER( m68307cpu_device::m68307_internal_serial_w )
// if we're piggybacking on the existing 68681 implementation... // if we're piggybacking on the existing 68681 implementation...
if (serial->m_duart68681) if (serial->m_duart68681)
{ {
if (offset&1) duart68681_w(serial->m_duart68681, *m68k->program, offset>>1, data); if (offset&1) serial->m_duart68681->write(*m68k->program, offset>>1, data);
} }
else else
{ {

6
src/emu/machine/68307ser.h
View File

@ -1,5 +1,5 @@
#include "cpu/m68000/m68000.h" #include "cpu/m68000/m68000.h"
#include "machine/68681.h" #include "machine/n68681.h"
#define m68307SER_UMR1_UMR2 (0x01) #define m68307SER_UMR1_UMR2 (0x01)
#define m68307SER_USR_UCSR (0x03) #define m68307SER_USR_UCSR (0x03)
@ -24,10 +24,10 @@ class m68307_serial
void reset(void); void reset(void);
UINT8 m_uivr; UINT8 m_uivr;
void m68307ser_set_duart68681(device_t* duart68681) void m68307ser_set_duart68681(duartn68681_device *duart68681)
{ {
m_duart68681 = duart68681; m_duart68681 = duart68681;
} }
device_t* m_duart68681; duartn68681_device * m_duart68681;
}; };

103
src/mame/drivers/bfm_sc4h.c
View File

@ -213,7 +213,7 @@ READ16_MEMBER(sc4_state::sc4_mem_r)
if ((offset>=base) && (offset<end)) if ((offset>=base) && (offset<end))
{ {
offset-=base; offset-=base;
return duart68681_r(m_duart,space,offset); return m_duart->read(space,offset);
} }
else else
{ {
@ -364,7 +364,7 @@ WRITE16_MEMBER(sc4_state::sc4_mem_w)
if ((offset>=base) && (offset<end)) if ((offset>=base) && (offset<end))
{ {
offset-=base; offset-=base;
duart68681_w(m_duart,space,offset,data&0x00ff); m_duart->write(space,offset,data&0x00ff);
} }
else else
{ {
@ -610,7 +610,7 @@ MACHINE_START_MEMBER(sc4_state,sc4)
bfm_sc4_68307_porta_w, bfm_sc4_68307_porta_w,
bfm_sc4_68307_portb_r, bfm_sc4_68307_portb_r,
bfm_sc4_68307_portb_w ); bfm_sc4_68307_portb_w );
m68307_set_duart68681(m_maincpu,machine().device("m68307_68681")); m68307_set_duart68681(m_maincpu,machine().device<duartn68681_device>("m68307_68681"));
@ -631,58 +631,55 @@ WRITE_LINE_MEMBER(sc4_state::bfm_sc4_irqhandler)
void bfm_sc4_duart_irq_handler(device_t *device, int state, UINT8 vector) WRITE_LINE_MEMBER(sc4_state::bfm_sc4_duart_irq_handler)
{ {
sc4_state *drvstate = device->machine().driver_data<sc4_state>();
// triggers after reel tests on luckb, at the start on dnd... // triggers after reel tests on luckb, at the start on dnd...
// not sure this is right, causes some games to crash // not sure this is right, causes some games to crash
logerror("bfm_sc4_duart_irq_handler\n"); logerror("bfm_sc4_duart_irq_handler\n");
if (state == ASSERT_LINE) if (state == ASSERT_LINE)
{ {
m68307_licr2_interrupt(drvstate->m_maincpu); m68307_licr2_interrupt(m_maincpu);
}
} }
};
void bfm_sc4_duart_tx(device_t *device, int channel, UINT8 data) WRITE_LINE_MEMBER(sc4_state::bfm_sc4_duart_txa)
{ {
logerror("bfm_sc4_duart_tx\n"); logerror("bfm_sc4_duart_tx\n");
};
UINT8 bfm_sc4_duart_input_r(device_t *device)
{
sc4_state *state = device->machine().driver_data<sc4_state>();
// printf("bfm_sc4_duart_input_r\n");
return state->m_optic_pattern;
} }
void bfm_sc4_duart_output_w(device_t *device, UINT8 data)
READ8_MEMBER(sc4_state::bfm_sc4_duart_input_r)
{
// printf("bfm_sc4_duart_input_r\n");
return m_optic_pattern;
}
WRITE8_MEMBER(sc4_state::bfm_sc4_duart_output_w)
{ {
// logerror("bfm_sc4_duart_output_w\n"); // logerror("bfm_sc4_duart_output_w\n");
sc4_state *state = device->machine().driver_data<sc4_state>(); m_reel56_latch = data;
state->m_reel56_latch = data; if ( stepper_update(4, data&0x0f ) ) m_reel_changed |= 0x10;
if ( stepper_update(5, (data>>4)&0x0f) ) m_reel_changed |= 0x20;
if ( stepper_update(4, data&0x0f ) ) state->m_reel_changed |= 0x10; if ( stepper_optic_state(4) ) m_optic_pattern |= 0x10;
if ( stepper_update(5, (data>>4)&0x0f) ) state->m_reel_changed |= 0x20; else m_optic_pattern &= ~0x10;
if ( stepper_optic_state(5) ) m_optic_pattern |= 0x20;
if ( stepper_optic_state(4) ) state->m_optic_pattern |= 0x10; else m_optic_pattern &= ~0x20;
else state->m_optic_pattern &= ~0x10;
if ( stepper_optic_state(5) ) state->m_optic_pattern |= 0x20;
else state->m_optic_pattern &= ~0x20;
awp_draw_reel(4); awp_draw_reel(4);
awp_draw_reel(5); awp_draw_reel(5);
} }
static const duart68681_config bfm_sc4_duart68681_config = static const duartn68681_config bfm_sc4_duart68681_config =
{ {
bfm_sc4_duart_irq_handler, DEVCB_DRIVER_LINE_MEMBER(sc4_state, bfm_sc4_duart_irq_handler),
bfm_sc4_duart_tx, DEVCB_DRIVER_LINE_MEMBER(sc4_state, bfm_sc4_duart_txa),
bfm_sc4_duart_input_r, DEVCB_NULL,
bfm_sc4_duart_output_w, DEVCB_DRIVER_MEMBER(sc4_state, bfm_sc4_duart_input_r),
DEVCB_DRIVER_MEMBER(sc4_state, bfm_sc4_duart_output_w),
// TODO: What are the actual frequencies? // TODO: What are the actual frequencies?
XTAL_16MHz/2/8, /* IP2/RxCB clock */ XTAL_16MHz/2/8, /* IP2/RxCB clock */
XTAL_16MHz/2/16, /* IP3/TxCA clock */ XTAL_16MHz/2/16, /* IP3/TxCA clock */
@ -692,47 +689,45 @@ static const duart68681_config bfm_sc4_duart68681_config =
void m68307_duart_irq_handler(device_t *device, int state, UINT8 vector) WRITE_LINE_MEMBER(sc4_state::m68307_duart_irq_handler)
{ {
sc4_state *drvstate = device->machine().driver_data<sc4_state>();
logerror("m68307_duart_irq_handler\n"); logerror("m68307_duart_irq_handler\n");
if (state == ASSERT_LINE) if (state == ASSERT_LINE)
{ {
m68307_serial_interrupt(drvstate->m_maincpu, vector); m68307_serial_interrupt(m_maincpu, machine().device<duartn68681_device>("m68307_68681")->get_irq_vector());
}
} }
};
void m68307_duart_tx(device_t *device, int channel, UINT8 data) WRITE_LINE_MEMBER(sc4_state::m68307_duart_txa)
{ {
if (channel==0) logerror("m68307_duart_tx %02x\n", state);
{
logerror("m68307_duart_tx %02x\n",data);
} }
else
{
printf("(illegal channel 1) m68307_duart_tx %02x\n",data);
}
};
UINT8 m68307_duart_input_r(device_t *device) WRITE_LINE_MEMBER(sc4_state::m68307_duart_txb)
{
printf("(illegal channel 1) m68307_duart_tx %02x\n", state);
}
READ8_MEMBER(sc4_state::m68307_duart_input_r)
{ {
logerror("m68307_duart_input_r\n"); logerror("m68307_duart_input_r\n");
return 0x00; return 0x00;
} }
void m68307_duart_output_w(device_t *device, UINT8 data) WRITE8_MEMBER(sc4_state::m68307_duart_output_w)
{ {
logerror("m68307_duart_output_w %02x\n", data); logerror("m68307_duart_output_w %02x\n", data);
} }
static const duart68681_config m68307_duart68681_config = static const duartn68681_config m68307_duart68681_config =
{ {
m68307_duart_irq_handler, DEVCB_DRIVER_LINE_MEMBER(sc4_state, m68307_duart_irq_handler),
m68307_duart_tx, DEVCB_DRIVER_LINE_MEMBER(sc4_state, m68307_duart_txa),
m68307_duart_input_r, DEVCB_DRIVER_LINE_MEMBER(sc4_state, m68307_duart_txb),
m68307_duart_output_w DEVCB_DRIVER_MEMBER(sc4_state, m68307_duart_input_r),
DEVCB_DRIVER_MEMBER(sc4_state, m68307_duart_output_w)
}; };
/* default dmd */ /* default dmd */
@ -753,7 +748,7 @@ MACHINE_CONFIG_START( sc4, sc4_state )
MCFG_CPU_PROGRAM_MAP(sc4_map) MCFG_CPU_PROGRAM_MAP(sc4_map)
// internal duart of the 68307... paired in machine start // internal duart of the 68307... paired in machine start
MCFG_DUART68681_ADD("m68307_68681", 16000000/4, m68307_duart68681_config) // ?? Mhz MCFG_DUARTN68681_ADD("m68307_68681", 16000000/4, m68307_duart68681_config) // ?? Mhz
MCFG_MACHINE_START_OVERRIDE(sc4_state, sc4 ) MCFG_MACHINE_START_OVERRIDE(sc4_state, sc4 )
MCFG_MACHINE_RESET_OVERRIDE(sc4_state, sc4 ) MCFG_MACHINE_RESET_OVERRIDE(sc4_state, sc4 )
@ -763,7 +758,7 @@ MACHINE_CONFIG_START( sc4, sc4_state )
MCFG_NVRAM_ADD_1FILL("nvram") MCFG_NVRAM_ADD_1FILL("nvram")
MCFG_DUART68681_ADD("duart68681", 16000000/4, bfm_sc4_duart68681_config) // ?? Mhz MCFG_DUARTN68681_ADD("duart68681", 16000000/4, bfm_sc4_duart68681_config) // ?? Mhz
MCFG_BFMBDA_ADD("vfd0",0) MCFG_BFMBDA_ADD("vfd0",0)

30
src/mame/drivers/bfm_sc5.c
View File

@ -27,7 +27,7 @@ WRITE16_MEMBER( bfm_sc5_state::sc5_duart_w )
if (mem_mask &0xff00) if (mem_mask &0xff00)
{ {
duart68681_w(m_duart,space,offset,(data>>8)&0x00ff); m_duart->write(space,offset,(data>>8)&0x00ff);
} }
else else
{ {
@ -193,37 +193,35 @@ WRITE_LINE_MEMBER(bfm_sc5_state::bfm_sc5_ym_irqhandler)
void bfm_sc5_duart_irq_handler(device_t *device, int state, UINT8 vector) WRITE_LINE_MEMBER(bfm_sc5_state::bfm_sc5_duart_irq_handler)
{ {
printf("bfm_sc5_duart_irq_handler\n"); printf("bfm_sc5_duart_irq_handler\n");
}; }
void bfm_sc5_duart_tx(device_t *device, int channel, UINT8 data) WRITE_LINE_MEMBER(bfm_sc5_state::bfm_sc5_duart_txa)
{ {
logerror("bfm_sc5_duart_tx\n"); logerror("bfm_sc5_duart_tx\n");
}; }
READ8_MEMBER(bfm_sc5_state::bfm_sc5_duart_input_r)
UINT8 bfm_sc5_duart_input_r(device_t *device)
{ {
//bfm_sc5_state *state = device->machine().driver_data<bfm_sc5_state>();
printf("bfm_sc5_duart_input_r\n"); printf("bfm_sc5_duart_input_r\n");
return 0xff; return 0xff;
} }
void bfm_sc5_duart_output_w(device_t *device, UINT8 data) WRITE8_MEMBER(bfm_sc5_state::bfm_sc5_duart_output_w)
{ {
logerror("bfm_sc5_duart_output_w\n"); logerror("bfm_sc5_duart_output_w\n");
} }
static const duart68681_config bfm_sc5_duart68681_config = static const duartn68681_config bfm_sc5_duart68681_config =
{ {
bfm_sc5_duart_irq_handler, DEVCB_DRIVER_LINE_MEMBER(bfm_sc5_state, bfm_sc5_duart_irq_handler),
bfm_sc5_duart_tx, DEVCB_DRIVER_LINE_MEMBER(bfm_sc5_state, bfm_sc5_duart_txa),
bfm_sc5_duart_input_r, DEVCB_NULL,
bfm_sc5_duart_output_w, DEVCB_DRIVER_MEMBER(bfm_sc5_state, bfm_sc5_duart_input_r),
DEVCB_DRIVER_MEMBER(bfm_sc5_state, bfm_sc5_duart_output_w),
// TODO: What are the actual frequencies? // TODO: What are the actual frequencies?
16000000/2/8, /* IP2/RxCB clock */ 16000000/2/8, /* IP2/RxCB clock */
16000000/2/16, /* IP3/TxCA clock */ 16000000/2/16, /* IP3/TxCA clock */
@ -240,7 +238,7 @@ MACHINE_CONFIG_START( bfm_sc5, bfm_sc5_state )
/* sound hardware */ /* sound hardware */
MCFG_SPEAKER_STANDARD_MONO("mono") MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_DUART68681_ADD("duart68681", 16000000/4, bfm_sc5_duart68681_config) // ?? Mhz MCFG_DUARTN68681_ADD("duart68681", 16000000/4, bfm_sc5_duart68681_config) // ?? Mhz
MCFG_BFMBDA_ADD("vfd0",0) MCFG_BFMBDA_ADD("vfd0",0)

15
src/mame/includes/bfm_sc45.h
View File

@ -7,7 +7,7 @@
#include "machine/bfm_bda.h" #include "machine/bfm_bda.h"
#include "sound/ymz280b.h" #include "sound/ymz280b.h"
#include "machine/68681.h" #include "machine/n68681.h"
#include "machine/nvram.h" #include "machine/nvram.h"
#include "machine/68307.h" #include "machine/68307.h"
#include "machine/68340.h" #include "machine/68340.h"
@ -28,7 +28,7 @@ public:
public: public:
required_device<duart68681_device> m_duart; required_device<duartn68681_device> m_duart;
optional_device<bfm_bda_t> m_vfd0; optional_device<bfm_bda_t> m_vfd0;
optional_device<bfmdm01_device> m_dm01; optional_device<bfmdm01_device> m_dm01;
required_device<ymz280b_device> m_ymz; required_device<ymz280b_device> m_ymz;
@ -104,6 +104,17 @@ public:
DECLARE_READ16_MEMBER(sc4_cs1_r); DECLARE_READ16_MEMBER(sc4_cs1_r);
DECLARE_WRITE_LINE_MEMBER(bfm_sc4_duart_irq_handler);
DECLARE_WRITE_LINE_MEMBER(bfm_sc4_duart_txa);
DECLARE_READ8_MEMBER(bfm_sc4_duart_input_r);
DECLARE_WRITE8_MEMBER(bfm_sc4_duart_output_w);
DECLARE_WRITE_LINE_MEMBER(m68307_duart_irq_handler);
DECLARE_WRITE_LINE_MEMBER(m68307_duart_txa);
DECLARE_WRITE_LINE_MEMBER(m68307_duart_txb);
DECLARE_READ8_MEMBER(m68307_duart_input_r);
DECLARE_WRITE8_MEMBER(m68307_duart_output_w);
DECLARE_DRIVER_INIT(sc4); DECLARE_DRIVER_INIT(sc4);
DECLARE_DRIVER_INIT(sc4mbus); DECLARE_DRIVER_INIT(sc4mbus);
DECLARE_DRIVER_INIT(sc4cvani); DECLARE_DRIVER_INIT(sc4cvani);

5
src/mame/includes/bfm_sc5.h
View File

@ -25,5 +25,8 @@ public:
DECLARE_WRITE8_MEMBER( sc5_mux1_w ); DECLARE_WRITE8_MEMBER( sc5_mux1_w );
DECLARE_WRITE8_MEMBER( sc5_mux2_w ); DECLARE_WRITE8_MEMBER( sc5_mux2_w );
DECLARE_WRITE_LINE_MEMBER(bfm_sc5_duart_irq_handler);
DECLARE_WRITE_LINE_MEMBER(bfm_sc5_duart_txa);
DECLARE_READ8_MEMBER(bfm_sc5_duart_input_r);
DECLARE_WRITE8_MEMBER(bfm_sc5_duart_output_w);
}; };