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https://github.com/holub/mame
synced 2025-05-22 13:48:55 +03:00
z80dma: Implemented reset command
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77a3badd32
commit
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@ -109,6 +109,7 @@ struct _z80dma_t
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UINT8 rdy;
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UINT8 rdy;
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UINT8 irq_en;
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UINT8 irq_en;
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UINT8 reset_pointer;
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UINT8 is_read;
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UINT8 is_read;
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UINT8 cur_cycle;
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UINT8 cur_cycle;
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@ -360,6 +361,7 @@ WRITE8_DEVICE_HANDLER( z80dma_w )
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fatalerror("Unimplemented WR6 command %02x", data);
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fatalerror("Unimplemented WR6 command %02x", data);
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break;
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break;
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case 0xA7: /* Initiate read sequence */
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case 0xA7: /* Initiate read sequence */
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LOG(("Initiate Read Sequence\n"));
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cntx->read_cur_follow = cntx->read_num_follow = 0;
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cntx->read_cur_follow = cntx->read_num_follow = 0;
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if(READ_MASK(cntx) & 0x01) { cntx->read_regs_follow[cntx->read_num_follow++] = cntx->status; }
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if(READ_MASK(cntx) & 0x01) { cntx->read_regs_follow[cntx->read_num_follow++] = cntx->status; }
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if(READ_MASK(cntx) & 0x02) { cntx->read_regs_follow[cntx->read_num_follow++] = BLOCKLEN_L(cntx); } //byte counter (low)
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if(READ_MASK(cntx) & 0x02) { cntx->read_regs_follow[cntx->read_num_follow++] = BLOCKLEN_L(cntx); } //byte counter (low)
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@ -371,6 +373,20 @@ WRITE8_DEVICE_HANDLER( z80dma_w )
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break;
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break;
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case 0xC3: /* Reset */
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case 0xC3: /* Reset */
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LOG(("Reset\n"));
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LOG(("Reset\n"));
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cntx->dma_enabled = 0;
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cntx->rdy = 1;
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cntx->irq_en = 0;
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/* Needs six reset commands to reset the DMA */
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{
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UINT8 WRi;
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for(WRi=0;WRi<7;WRi++)
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REG(cntx,WRi,cntx->reset_pointer) = 0;
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cntx->reset_pointer++;
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if(cntx->reset_pointer >= 6) { cntx->reset_pointer = 0; }
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}
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cntx->status = 0x38;
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break;
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break;
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case 0xCF: /* Load */
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case 0xCF: /* Load */
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cntx->addressA = PORTA_ADDRESS(cntx);
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cntx->addressA = PORTA_ADDRESS(cntx);
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@ -380,43 +396,54 @@ WRITE8_DEVICE_HANDLER( z80dma_w )
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LOG(("Load A: %x B: %x N: %x\n", cntx->addressA, cntx->addressB, cntx->count));
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LOG(("Load A: %x B: %x N: %x\n", cntx->addressA, cntx->addressB, cntx->count));
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break;
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break;
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case 0x83: /* Disable dma */
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case 0x83: /* Disable dma */
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LOG(("Disable DMA\n"));
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cntx->dma_enabled = 0;
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cntx->dma_enabled = 0;
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z80dma_rdy_w(device, 0, cntx->rdy);
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z80dma_rdy_w(device, 0, cntx->rdy);
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break;
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break;
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case 0x87: /* Enable dma */
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case 0x87: /* Enable dma */
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LOG(("Enable DMA\n"));
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cntx->dma_enabled = 1;
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cntx->dma_enabled = 1;
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z80dma_rdy_w(device, 0, cntx->rdy);
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z80dma_rdy_w(device, 0, cntx->rdy);
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break;
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break;
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case 0xBB:
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case 0xBB:
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LOG(("Set Read Mask\n"));
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cntx->regs_follow[cntx->num_follow++] = GET_REGNUM(cntx, READ_MASK(cntx));
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cntx->regs_follow[cntx->num_follow++] = GET_REGNUM(cntx, READ_MASK(cntx));
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break;
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break;
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case 0xD3: /* Continue */
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case 0xD3: /* Continue */
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LOG(("Continue\n"));
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cntx->count = 0;
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cntx->count = 0;
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cntx->dma_enabled = 1;
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cntx->dma_enabled = 1;
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//"match not found" & "end of block" status flags zeroed here
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//"match not found" & "end of block" status flags zeroed here
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cntx->status &= ~0x30;
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cntx->status &= ~0x30;
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break;
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break;
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case 0xc7: /* Reset Port A Timing */
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case 0xc7: /* Reset Port A Timing */
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LOG(("Reset Port A Timing\n"));
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PORTA_TIMING(cntx) = 0;
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PORTA_TIMING(cntx) = 0;
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break;
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break;
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case 0xcb: /* Reset Port B Timing */
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case 0xcb: /* Reset Port B Timing */
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LOG(("Reset Port B Timing\n"));
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PORTB_TIMING(cntx) = 0;
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PORTB_TIMING(cntx) = 0;
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break;
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break;
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case 0xB3: /* Force ready */
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case 0xB3: /* Force ready */
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LOG(("Force ready\n"));
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cntx->rdy = (WR5(cntx) & 0x8)>>3;
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cntx->rdy = (WR5(cntx) & 0x8)>>3;
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z80dma_rdy_w(device, 0, cntx->rdy);
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break;
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break;
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case 0xAB: /* Enable interrupts */
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case 0xAB: /* Enable interrupts */
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LOG(("Enable IRQ\n"));
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cntx->irq_en = 1;
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cntx->irq_en = 1;
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break;
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break;
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case 0xAF: /* Disable interrupts */
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case 0xAF: /* Disable interrupts */
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LOG(("Disable IRQ\n"));
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cntx->irq_en = 0;
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cntx->irq_en = 0;
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break;
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break;
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case 0x8B: /* Reinitialize status byte */
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case 0x8B: /* Reinitialize status byte */
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/* FIXME: docs says these two is 1, but behaviour makes me think it's a 0, investigate */
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/* FIXME: docs says these two is 1, but behaviour makes me think it's a 0, investigate */
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LOG(("Reinitialize status byte\n"));
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cntx->status &= ~0x30;
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cntx->status &= ~0x30;
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break;
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break;
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case 0xFB:
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case 0xFB:
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LOG(("Z80DMA undocumented command triggered!\n"));
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LOG(("Z80DMA undocumented command triggered 0x%02X!\n",data));
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break;
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break;
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default:
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default:
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fatalerror("Unknown WR6 command %02x", data);
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fatalerror("Unknown WR6 command %02x", data);
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@ -537,6 +564,7 @@ static DEVICE_RESET( z80dma )
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z80dma->dma_enabled = 0;
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z80dma->dma_enabled = 0;
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z80dma->read_num_follow = z80dma->read_cur_follow = 0;
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z80dma->read_num_follow = z80dma->read_cur_follow = 0;
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z80dma->irq_en = 0;
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z80dma->irq_en = 0;
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z80dma->reset_pointer = 0;
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z80dma_update_status(device);
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z80dma_update_status(device);
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}
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}
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