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tlcs870: Move macros into source file for now to avoid potential naming conflicts (nw)

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This commit is contained in:
AJR 2017-04-12 16:15:14 -04:00
parent 47900ba401
commit 2f47ccd579
2 changed files with 54 additions and 52 deletions
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54
src/devices/cpu/tlcs870/tlcs870.cpp
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@ -18,6 +18,7 @@
#include "debugger.h"
#include "tlcs870.h"
// di, ei, j, and test are just 'alias' opcodes
static const char *const op_names[] = {
"??",
@ -95,6 +96,59 @@ static const char *const reg16p[] = {
#endif
#define IS16BIT 0x80
#define BITPOS 0x40
#define BITPOS_INDIRECT 0x20
#define ABSOLUTE_VAL_8 0x01
#define REG_8BIT 0x02
// special
#define CONDITIONAL 0x03
#define STACKPOINTER (0x04 | IS16BIT) // this is a 16-bit reg
#define CARRYFLAG (0x5 | BITPOS) // also flag as BITPOS since it's a bit operation?
#define MEMVECTOR_16BIT 0x6
#define REGISTERBANK 0x7
#define PROGRAMSTATUSWORD 0x8
#define ABSOLUTE_VAL_16 (ABSOLUTE_VAL_8|IS16BIT)
#define REG_16BIT (REG_8BIT|IS16BIT)
#define ADDR_IN_BASE 0x10
#define ADDR_IN_IMM_X (ADDR_IN_BASE+0x0)
#define ADDR_IN_PC_PLUS_REG_A (ADDR_IN_BASE+0x1)
#define ADDR_IN_DE (ADDR_IN_BASE+0x2)
#define ADDR_IN_HL (ADDR_IN_BASE+0x3)
#define ADDR_IN_HL_PLUS_IMM_D (ADDR_IN_BASE+0x4)
#define ADDR_IN_HL_PLUS_REG_C (ADDR_IN_BASE+0x5)
#define ADDR_IN_HLINC (ADDR_IN_BASE+0x6)
#define ADDR_IN_DECHL (ADDR_IN_BASE+0x7)
#define MODE_MASK 0x1f
#define FLAG_J (0x80)
#define FLAG_Z (0x40)
#define FLAG_C (0x20)
#define FLAG_H (0x10)
#define IS_JF ((m_F & FLAG_J) ? 1 : 0)
#define IS_ZF ((m_F & FLAG_Z) ? 1 : 0)
#define IS_CF ((m_F & FLAG_C) ? 1 : 0)
#define IS_HF ((m_F & FLAG_H) ? 1 : 0)
#define SET_JF (m_F |= FLAG_J)
#define SET_ZF (m_F |= FLAG_Z)
#define SET_CF (m_F |= FLAG_C)
#define SET_HF (m_F |= FLAG_H)
#define CLEAR_JF (m_F &= ~FLAG_J)
#define CLEAR_ZF (m_F &= ~FLAG_Z)
#define CLEAR_CF (m_F &= ~FLAG_C)
#define CLEAR_HF (m_F &= ~FLAG_H)
const device_type TMP87PH40AN = device_creator<tmp87ph40an_device>;

52
src/devices/cpu/tlcs870/tlcs870.h
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@ -89,58 +89,6 @@ protected:
uint32_t m_debugger_temp;
#define IS16BIT 0x80
#define BITPOS 0x40
#define BITPOS_INDIRECT 0x20
#define ABSOLUTE_VAL_8 0x01
#define REG_8BIT 0x02
// special
#define CONDITIONAL 0x03
#define STACKPOINTER (0x04 | IS16BIT) // this is a 16-bit reg
#define CARRYFLAG (0x5 | BITPOS) // also flag as BITPOS since it's a bit operation?
#define MEMVECTOR_16BIT 0x6
#define REGISTERBANK 0x7
#define PROGRAMSTATUSWORD 0x8
#define ABSOLUTE_VAL_16 (ABSOLUTE_VAL_8|IS16BIT)
#define REG_16BIT (REG_8BIT|IS16BIT)
#define ADDR_IN_BASE 0x10
#define ADDR_IN_IMM_X (ADDR_IN_BASE+0x0)
#define ADDR_IN_PC_PLUS_REG_A (ADDR_IN_BASE+0x1)
#define ADDR_IN_DE (ADDR_IN_BASE+0x2)
#define ADDR_IN_HL (ADDR_IN_BASE+0x3)
#define ADDR_IN_HL_PLUS_IMM_D (ADDR_IN_BASE+0x4)
#define ADDR_IN_HL_PLUS_REG_C (ADDR_IN_BASE+0x5)
#define ADDR_IN_HLINC (ADDR_IN_BASE+0x6)
#define ADDR_IN_DECHL (ADDR_IN_BASE+0x7)
#define MODE_MASK 0x1f
#define FLAG_J (0x80)
#define FLAG_Z (0x40)
#define FLAG_C (0x20)
#define FLAG_H (0x10)
#define IS_JF ((m_F & FLAG_J) ? 1 : 0)
#define IS_ZF ((m_F & FLAG_Z) ? 1 : 0)
#define IS_CF ((m_F & FLAG_C) ? 1 : 0)
#define IS_HF ((m_F & FLAG_H) ? 1 : 0)
#define SET_JF (m_F |= FLAG_J)
#define SET_ZF (m_F |= FLAG_Z)
#define SET_CF (m_F |= FLAG_C)
#define SET_HF (m_F |= FLAG_H)
#define CLEAR_JF (m_F &= ~FLAG_J)
#define CLEAR_ZF (m_F &= ~FLAG_Z)
#define CLEAR_CF (m_F &= ~FLAG_C)
#define CLEAR_HF (m_F &= ~FLAG_H)
// device-level overrides
virtual void device_start() override;
virtual void device_reset() override;