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gameboy: fixed serial regresssion (nw)

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This commit is contained in:
Wilbert Pol 2016-10-03 21:45:04 +02:00
parent 9bac2c17a2
commit 2f5f50c60e
2 changed files with 11 additions and 6 deletions
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7
src/mame/includes/gb.h
View File

@ -31,7 +31,6 @@ public:
m_ram(*this, RAM_TAG), m_ram(*this, RAM_TAG),
m_ppu(*this, "ppu") { } m_ppu(*this, "ppu") { }
//gb_state driver_data;
UINT8 m_gb_io[0x10]; UINT8 m_gb_io[0x10];
/* Timer related */ /* Timer related */
@ -91,6 +90,12 @@ public:
optional_device<gb_cart_slot_device> m_cartslot; optional_device<gb_cart_slot_device> m_cartslot;
protected: protected:
enum {
SIO_ENABLED = 0x80,
SIO_FAST_CLOCK = 0x02,
SIO_INTERNAL_CLOCK = 0x01
};
required_device<lr35902_cpu_device> m_maincpu; required_device<lr35902_cpu_device> m_maincpu;
required_device<gameboy_sound_device> m_apu; required_device<gameboy_sound_device> m_apu;
required_memory_region m_region_maincpu; required_memory_region m_region_maincpu;

10
src/mame/machine/gb.cpp
View File

@ -517,7 +517,7 @@ logerror("IF read, serial clock is %04x\n", m_internal_serial_clock);
/* Called when 512 internal cycles are passed */ /* Called when 512 internal cycles are passed */
void gb_state::gb_serial_timer_tick() void gb_state::gb_serial_timer_tick()
{ {
if (SIOCONT & 0x80) if (SIOCONT & SIO_ENABLED)
{ {
if (m_sio_count & 1) if (m_sio_count & 1)
{ {
@ -531,7 +531,7 @@ void gb_state::gb_serial_timer_tick()
/* If all bits done, stop timer and trigger interrupt */ /* If all bits done, stop timer and trigger interrupt */
if (m_sio_count == 0) if (m_sio_count == 0)
{ {
SIOCONT &= 0x7F; SIOCONT &= ~SIO_ENABLED;
m_maincpu->set_input_line(lr35902_cpu_device::SIO_INT, ASSERT_LINE); m_maincpu->set_input_line(lr35902_cpu_device::SIO_INT, ASSERT_LINE);
// Make sure the state is updated during the current timeslice in case it is read. // Make sure the state is updated during the current timeslice in case it is read.
m_maincpu->execute_set_input(lr35902_cpu_device::SIO_INT, ASSERT_LINE); m_maincpu->execute_set_input(lr35902_cpu_device::SIO_INT, ASSERT_LINE);
@ -601,7 +601,7 @@ WRITE8_MEMBER(gb_state::gb_timer_callback)
} }
} }
if ((m_internal_serial_clock ^ old_internal_serial_clock) & m_internal_serial_frequency) if (((m_internal_serial_clock ^ old_internal_serial_clock) & m_internal_serial_frequency) && (SIOCONT & SIO_INTERNAL_CLOCK))
{ {
gb_serial_timer_tick(); gb_serial_timer_tick();
} }
@ -615,8 +615,8 @@ WRITE8_MEMBER(gb_state::gbc_io_w)
// On CGB the internal serial transfer clock is selectable // On CGB the internal serial transfer clock is selectable
if (offset == 0x02) if (offset == 0x02)
{ {
m_internal_serial_frequency = ((data & 0x02) ? 16 : 512) / 2; m_internal_serial_frequency = ((data & SIO_FAST_CLOCK) ? 16 : 512) / 2;
SIOCONT = (SIOCONT & ~0x02) | (data & 0x02); SIOCONT = (SIOCONT & ~SIO_FAST_CLOCK) | (data & SIO_FAST_CLOCK);
} }
} }