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@ -238,7 +238,6 @@ src/emu/cpu/m6800/m6800.h svneol=native#text/plain
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src/emu/cpu/m68000/m68000.h svneol=native#text/plain
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src/emu/cpu/m68000/m68k.h svneol=native#text/plain
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src/emu/cpu/m68000/m68k_in.c svneol=native#text/plain
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src/emu/cpu/m68000/m68kconf.h svneol=native#text/plain
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src/emu/cpu/m68000/m68kcpu.c svneol=native#text/plain
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src/emu/cpu/m68000/m68kcpu.h svneol=native#text/plain
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src/emu/cpu/m68000/m68kdasm.c svneol=native#text/plain
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@ -5,6 +5,36 @@
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#include "cpuintrf.h"
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/* There are 7 levels of interrupt to the 68K.
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* A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
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*/
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#define M68K_IRQ_NONE 0
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#define M68K_IRQ_1 1
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#define M68K_IRQ_2 2
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#define M68K_IRQ_3 3
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#define M68K_IRQ_4 4
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#define M68K_IRQ_5 5
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#define M68K_IRQ_6 6
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#define M68K_IRQ_7 7
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/* Special interrupt acknowledge values.
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* Use these as special returns from the interrupt acknowledge callback
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* (specified later in this header).
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*/
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/* Causes an interrupt autovector (0x18 + interrupt level) to be taken.
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* This happens in a real 68K if VPA or AVEC is asserted during an interrupt
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* acknowledge cycle instead of DTACK.
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*/
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#define M68K_INT_ACK_AUTOVECTOR 0xffffffff
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/* Causes the spurious interrupt vector (0x18) to be taken
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* This happens in a real 68K if BERR is asserted during the interrupt
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* acknowledge cycle (i.e. no devices responded to the acknowledge).
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*/
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#define M68K_INT_ACK_SPURIOUS 0xfffffffe
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enum
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{
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/* NOTE: M68K_SP fetches the current SP, be it USP, ISP, or MSP */
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@ -29,37 +29,6 @@
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/* ======================================================================== */
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/* There are 7 levels of interrupt to the 68K.
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* A transition from < 7 to 7 will cause a non-maskable interrupt (NMI).
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*/
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#define M68K_IRQ_NONE 0
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#define M68K_IRQ_1 1
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#define M68K_IRQ_2 2
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#define M68K_IRQ_3 3
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#define M68K_IRQ_4 4
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#define M68K_IRQ_5 5
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#define M68K_IRQ_6 6
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#define M68K_IRQ_7 7
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/* Special interrupt acknowledge values.
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* Use these as special returns from the interrupt acknowledge callback
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* (specified later in this header).
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*/
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/* Causes an interrupt autovector (0x18 + interrupt level) to be taken.
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* This happens in a real 68K if VPA or AVEC is asserted during an interrupt
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* acknowledge cycle instead of DTACK.
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*/
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#define M68K_INT_ACK_AUTOVECTOR 0xffffffff
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/* Causes the spurious interrupt vector (0x18) to be taken
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* This happens in a real 68K if BERR is asserted during the interrupt
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* acknowledge cycle (i.e. no devices responded to the acknowledge).
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*/
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#define M68K_INT_ACK_SPURIOUS 0xfffffffe
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/* CPU types for use in m68k_set_cpu_type() */
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enum
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{
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@ -570,14 +570,14 @@ static CPU_SET_INFO( m68008 )
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switch (state)
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{
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/* --- the following bits of info are set as 64-bit signed integers --- */
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case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(0, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(1, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 2: set_irq_line(2, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 3: set_irq_line(3, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 4: set_irq_line(4, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 5: set_irq_line(5, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 6: set_irq_line(6, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 7: set_irq_line(7, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(m68k, 0, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 1: set_irq_line(m68k, 1, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 2: set_irq_line(m68k, 2, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 3: set_irq_line(m68k, 3, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 4: set_irq_line(m68k, 4, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 5: set_irq_line(m68k, 5, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 6: set_irq_line(m68k, 6, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 7: set_irq_line(m68k, 7, info->i); break;
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case CPUINFO_INT_PC: m68k_set_reg(m68k, M68K_REG_PC, info->i&0x00ffffff); break;
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case CPUINFO_INT_REGISTER + M68K_PC: m68k_set_reg(m68k, M68K_REG_PC, info->i); break;
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@ -121,7 +121,7 @@ static CPU_INIT( minx )
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}
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static void minx_reset( void )
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static CPU_RESET( minx )
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{
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regs.SP = regs.BA = regs.HL = regs.X = regs.Y = 0;
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regs.U = regs.V = regs.F = regs.E = regs.I = regs.XI = regs.YI = 0;
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@ -132,7 +132,7 @@ static void minx_reset( void )
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}
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static void minx_exit( void )
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static CPU_EXIT( minx )
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{
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}
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@ -159,7 +159,7 @@ INLINE UINT16 rdop16( void )
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#include "minxops.h"
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static int minx_execute( int cycles )
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static CPU_EXECUTE( minx )
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{
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UINT32 oldpc;
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UINT8 op;
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@ -204,18 +204,18 @@ static int minx_execute( int cycles )
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}
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static void minx_burn( int cycles )
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static CPU_BURN( minx )
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{
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minx_icount = 0;
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}
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static void minx_set_context( void *src )
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static CPU_SET_CONTEXT( minx )
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{
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}
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static void minx_get_context( void *dst )
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static CPU_GET_CONTEXT( minx )
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{
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}
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@ -282,7 +282,7 @@ static void minx_set_irq_line( int irqline, int state )
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}
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static void minx_set_info( UINT32 state, cpuinfo *info )
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static CPU_SET_INFO( minx )
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{
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switch( state )
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{
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@ -308,7 +308,7 @@ static void minx_set_info( UINT32 state, cpuinfo *info )
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}
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void minx_get_info( UINT32 state, cpuinfo *info )
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CPU_GET_INFO( minx )
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{
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switch( state )
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{
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@ -356,7 +356,7 @@ void minx_get_info( UINT32 state, cpuinfo *info )
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case CPUINFO_PTR_RESET: info->reset = CPU_RESET_NAME(minx); break;
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case CPUINFO_PTR_EXIT: info->exit = CPU_EXIT_NAME(minx); break;
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case CPUINFO_PTR_EXECUTE: info->execute = CPU_EXECUTE_NAME(minx); break;
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case CPUINFO_PTR_BURN: info->burn = CPU_GET_BURN_NAME(minx); break;
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case CPUINFO_PTR_BURN: info->burn = CPU_BURN_NAME(minx); break;
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case CPUINFO_PTR_DISASSEMBLE: info->disassemble = CPU_DISASSEMBLE_NAME(minx); break;
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case CPUINFO_PTR_INSTRUCTION_COUNTER: info->icount = &minx_icount; break;
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case CPUINFO_STR_NAME: strcpy( info->s = cpuintrf_temp_str(), "Minx" ); break;
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@ -557,7 +557,7 @@ static const struct
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{ CPU_TMS34020, CPU_GET_INFO_NAME(tms34020) },
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#endif
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#if (HAS_TI990_10)
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{ CPU_TI990_10, ti990_CPU_GET_INFO_NAME(10) },
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{ CPU_TI990_10, CPU_GET_INFO_NAME(ti990_10) },
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#endif
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#if (HAS_TMS9900)
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{ CPU_TMS9900, CPU_GET_INFO_NAME(tms9900) },
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