mirror of
https://github.com/holub/mame
synced 2025-04-23 00:39:36 +03:00
vl1: Add a lot of stuff. Need to find where the MIDI data error is coming from though
This commit is contained in:
Olivier Galibert
parent
4db4b8067b
commit
2f69fdfd49
@ -688,7 +688,7 @@ void tmp68301_device::pmr_w(u8 data)
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u16 tmp68301_device::pdr_r()
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{
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if(m_parallel_mode == 0) {
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if(m_parallel_mode == 0 || m_parallel_mode == 1) {
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if(m_pdir == 0xffff)
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return m_pdr;
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return (m_pdr & m_pdir) | (m_parallel_r_cb() & ~m_pdir);
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@ -704,7 +704,7 @@ void tmp68301_device::pdr_w(offs_t, u16 data, u16 mem_mask)
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if(m_pdr == old)
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return;
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// logerror("parallel data %04x\n", m_pdr);
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if(m_parallel_mode == 0) {
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if(m_parallel_mode == 0 || m_parallel_mode == 1) {
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if(m_pdir == 0x0000)
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return;
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m_parallel_w_cb(m_pdr & m_pdir);
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@ -90,7 +90,14 @@ void sh7042_device::adcsr_w(u8 data)
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void sh7042_device::adcr_w(u8 data)
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{
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logerror("adcr_w %02x\n", data);
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static const char *const tg_modes[4] = { "soft", "mtu", "?", "external" };
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static const char *const buf_modes[4] = { "normal", "a->b", "a,b->c,d", "a->b->c->d" };
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logerror("adcr_w speed=%d trigger=%s mode=%s sampling=%s buffering=%s\n",
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BIT(data, 6) ? "high" : "low",
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tg_modes[(data >> 4) & 3],
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BIT(data, 3) ? "scan" : "single",
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BIT(data, 2) ? "simultaneous" : "normal",
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buf_modes[data & 3]);
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m_adcr = data;
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}
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@ -6,13 +6,16 @@
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#include "emu.h"
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#include "dspv.h"
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DEFINE_DEVICE_TYPE(DSPV, dspv_device, "dspv", "Yamaha DSPV audio simulation DSP (YSS217-F/")
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DEFINE_DEVICE_TYPE(DSPV, dspv_device, "dspv", "Yamaha DSPV audio simulation DSP (YSS217-F)")
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dspv_device::dspv_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: cpu_device(mconfig, DSPV, tag, owner, clock),
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device_sound_interface(mconfig, *this),
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m_program_config("program", ENDIANNESS_BIG, 16, 16, -1, address_map_constructor(FUNC(dspv_device::prg_map), this)),
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m_data_config("data", ENDIANNESS_BIG, 16, 14, -1, address_map_constructor(FUNC(dspv_device::data_map), this))
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m_prg1_config("prg1", ENDIANNESS_BIG, 64, 8, -3, address_map_constructor(FUNC(dspv_device::prg1_map), this)),
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m_prg2_config("prg2", ENDIANNESS_BIG, 64, 8, -3, address_map_constructor(FUNC(dspv_device::prg2_map), this)),
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m_data_config("data", ENDIANNESS_BIG, 16, 32, -1, address_map_constructor(FUNC(dspv_device::data_map), this)),
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m_prg1(*this, "prg1"),
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m_prg2(*this, "prg2")
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{
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}
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@ -22,57 +25,74 @@ void dspv_device::map(address_map &map)
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map(0x02, 0x03).r(FUNC(dspv_device::status_r));
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map(0x06, 0x07).w(FUNC(dspv_device::prg_adr_w));
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map(0x20, 0x21).w(FUNC(dspv_device::table_adrh_w));
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map(0x22, 0x23).w(FUNC(dspv_device::table_adrl_w));
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map(0x24, 0x25).w(FUNC(dspv_device::table_data_w));
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map(0x26, 0x27).w(FUNC(dspv_device::table_zero_w));
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map(0x40, 0x7f).w(FUNC(dspv_device::prg_data_w));
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map(0x12, 0x13).lw16(NAME([](u16 data) { }));
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map(0x20, 0x21).w(FUNC(dspv_device::data_adrh_w));
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map(0x22, 0x23).w(FUNC(dspv_device::data_adrl_w));
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map(0x24, 0x25).w(FUNC(dspv_device::data_data_w));
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map(0x26, 0x27).w(FUNC(dspv_device::data_zero_w));
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map(0x38, 0x39).lr16(NAME([]() -> u16 { return 0; }));
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map(0x40, 0x7f).rw(FUNC(dspv_device::prg_data_r), FUNC(dspv_device::prg_data_w));
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}
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void dspv_device::prg_map(address_map &map)
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void dspv_device::prg1_map(address_map &map)
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{
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map(0x0000, 0xffff).ram();
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map(0x00, 0xff).ram().share(m_prg1);
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}
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void dspv_device::prg2_map(address_map &map)
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{
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map(0x00, 0xff).ram().share(m_prg2);
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}
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void dspv_device::data_map(address_map &map)
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{
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map(0x0000, 0x3fff).ram();
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map(0x00000, 0x03fff).ram();
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map(0x1c000, 0x1dfff).ram();
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}
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void dspv_device::table_adrh_w(u16 data)
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void dspv_device::data_adrh_w(u16 data)
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{
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m_table_adr = (m_table_adr & 0x0000ffff) | (data << 16);
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m_data_adr = (m_data_adr & 0x0000ffff) | (data << 16);
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}
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void dspv_device::table_adrl_w(u16 data)
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void dspv_device::data_adrl_w(u16 data)
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{
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m_table_adr = (m_table_adr & 0xffff0000) | data;
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m_data_adr = (m_data_adr & 0xffff0000) | data;
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}
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void dspv_device::table_data_w(u16 data)
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void dspv_device::data_data_w(u16 data)
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{
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if(m_table_adr >= 0x4000)
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logerror("table_adr overflow!\n");
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m_data->write_word(m_table_adr, data);
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m_table_adr++;
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m_data->write_word(m_data_adr, data);
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m_data_adr++;
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}
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void dspv_device::table_zero_w(u16 data)
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void dspv_device::data_zero_w(u16 data)
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{
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if(data)
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logerror("table_zero_w %04x\n", data);
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logerror("data_zero_w %04x\n", data);
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}
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void dspv_device::prg_adr_w(u16 data)
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{
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m_prg_adr = data;
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u32 slot = BIT(data, 13, 3);
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u32 len = BIT(data, 8, 5);
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u32 address = BIT(data, 0, 8);
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if(len == 0)
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len = 0x20;
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auto &prg = slot >= 4 ? m_prg2 : m_prg1;
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u32 shift = (slot & 3)*16;
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u64 mask = ~(u64(0xffff) << shift);
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for(u32 i=0; i != len; i++)
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prg[(i + address) & 0xff] = (prg[(i + address) & 0xff] & mask) | (u64(m_buffer[i]) << shift);
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}
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void dspv_device::prg_data_w(offs_t offset, u16 data)
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{
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u16 adr = m_prg_adr + offset;
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adr = (adr << 3) | (adr >> 13);
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m_program->write_word(adr, data);
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m_buffer[offset] = data;
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}
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u16 dspv_device::prg_data_r(offs_t offset)
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{
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return m_buffer[offset];
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}
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u16 dspv_device::status_r()
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@ -100,7 +120,6 @@ void dspv_device::sound_stream_update(sound_stream &stream, std::vector<read_str
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void dspv_device::device_start()
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{
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m_program = &space(AS_PROGRAM);
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m_data = &space(AS_DATA);
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state_add(STATE_GENPC, "GENPC", m_pc).noshow();
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state_add(STATE_GENPCBASE, "CURPC", m_pc).noshow();
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@ -110,16 +129,16 @@ void dspv_device::device_start()
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save_item(NAME(m_pc));
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save_item(NAME(m_status));
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save_item(NAME(m_table_adr));
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save_item(NAME(m_prg_adr));
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save_item(NAME(m_data_adr));
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save_item(NAME(m_buffer));
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}
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void dspv_device::device_reset()
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{
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m_pc = 0;
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m_status = 0;
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m_table_adr = 0;
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m_prg_adr = 0;
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m_data_adr = 0;
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std::fill(m_buffer.begin(), m_buffer.end(), 0);
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}
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uint32_t dspv_device::execute_min_cycles() const noexcept
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@ -147,7 +166,8 @@ void dspv_device::execute_run()
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device_memory_interface::space_config_vector dspv_device::memory_space_config() const
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{
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return space_config_vector {
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std::make_pair(AS_PROGRAM, &m_program_config),
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std::make_pair(AS_OPCODES, &m_prg1_config),
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std::make_pair(AS_PROGRAM, &m_prg2_config),
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std::make_pair(AS_DATA, &m_data_config)
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};
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}
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@ -32,25 +32,29 @@ protected:
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virtual void sound_stream_update(sound_stream &stream, std::vector<read_stream_view> const &inputs, std::vector<write_stream_view> &outputs) override;
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private:
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address_space_config m_program_config, m_data_config;
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address_space *m_program, *m_data;
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address_space_config m_prg1_config, m_prg2_config, m_data_config;
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address_space *m_data;
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required_shared_ptr<u64> m_prg1, m_prg2;
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std::array<u16, 0x20> m_buffer;
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u32 m_pc;
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int m_icount;
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u32 m_table_adr;
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u16 m_prg_adr;
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u32 m_data_adr;
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u16 m_status;
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// Table ram access
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void table_adrh_w(u16 data);
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void table_adrl_w(u16 data);
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void table_data_w(u16 data);
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void table_zero_w(u16 data);
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// Data ram access
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void data_adrh_w(u16 data);
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void data_adrl_w(u16 data);
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void data_data_w(u16 data);
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void data_zero_w(u16 data);
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// Program ram access
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void prg_adr_w(u16 data);
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void prg_data_w(offs_t offset, u16 data);
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u16 prg_data_r(offs_t offset);
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// Registers
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u16 status_r();
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@ -59,7 +63,8 @@ private:
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u16 snd_r(offs_t offset);
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void snd_w(offs_t offset, u16 data);
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void prg_map(address_map &map);
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void prg1_map(address_map &map);
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void prg2_map(address_map &map);
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void data_map(address_map &map);
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};
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@ -21,9 +21,9 @@ u32 dspv_disassembler::opcode_alignment() const
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offs_t dspv_disassembler::disassemble(std::ostream &stream, offs_t pc, const data_buffer &opcodes, const data_buffer ¶ms)
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{
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u16 opc = opcodes.r16(pc);
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util::stream_format(stream, "dc.w %04x", opc);
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u64 opc = opcodes.r64(pc);
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u64 mode = (params.r64(pc) >> 32) & 7;
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util::stream_format(stream, "%x%016x", mode, opc);
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return 1 | SUPPORTED;
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}
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@ -5,9 +5,6 @@
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// The VL1-m rackable version exists but we don't have the firmware
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// Waiting on tx possible in serial 2, need to implement decent serial
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// in the 68301 to go on
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// https://www.synthxl.com/offwp/yamaha_vl1_m_service_manual.pdf
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// Address decode:
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@ -15,25 +12,40 @@
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// 3210 9876 5432 1098 7654 3210
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// 1... .... 000. .... ..0. .... .w led
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// 1... .... 011. .... ..0. .... .w pks
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// 1... .... 010. .... ..0. .... r. pks
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// 1... .... 011. .... ..0. .... r. adc
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//
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// 1... .... 1000 .... .... .... rw vop
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// 1... .... 1010 .... .... .... rw glcd
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// 1... .... 1000 .... .... .... rw vop (dspv #4)
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// 1... .... 1010 .... .... .... rw lcd
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// 1... .... 1011 .... .... .... rw fdc
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//
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// 0100 0... .... .... .... .... rw raml
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// 0100 1... .... .... .... .... rw ramh
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// 0101 0... .... .... .... .... rw ssel1
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// 0101 1... .... .... .... .... rw ssel2
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//
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// 1... .... 1000 .... .... .... rw dvop
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// 1... .... 1010 .... .... .... rw lcd
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// 1... .... 1011 .... .... .... rw dfdc
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// 0101 0... .... .... .... .... rw ssel1 (top gate array)
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// 0101 1... .... .... .... .... rw ssel2 (bottom gate array)
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// Uses 4 dsp-v which each have two inputs and two outputs. Their
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// stream inputs/outputs are connected thus:
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// #1.2 -> #3.2
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// #2.1 -> #3.1
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// #3.1 -> #4.1
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// #3.2 -> #4.2
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// #4.1 -> dac
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// Uses 3 tmp68301. The main one controls dspv #4. The first subcpu
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// controls dspvs #2 and #3, the second #1, Each subgroup is tucked
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// behind a gate array, selected by ssel1/2.
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// There's also an undumped 63b01 dubbed "pks" which scans the
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// switches and has one 8-bit port and an irq line that goes to the
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// main tmp.
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#include "emu.h"
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#include "cpu/m68000/tmp68301.h"
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#include "imagedev/floppy.h"
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#include "machine/upd765.h"
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#include "sound/dspv.h"
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#include "video/t6963c.h"
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namespace {
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@ -44,29 +56,53 @@ public:
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vl1_state(const machine_config &mconfig, device_type type, const char *tag) :
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driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_lcd(*this, "lcd")
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m_subcpu1(*this, "subcpu1"),
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m_subcpu2(*this, "subcpu2"),
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m_dspv1(*this, "dspv1"),
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m_dspv2(*this, "dspv2"),
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m_dspv3(*this, "dspv3"),
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m_dspv4(*this, "dspv4"),
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m_lcd(*this, "lcd"),
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m_fdc(*this, "fdc"),
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m_mem_s1(*this, "subcpu1_ram"),
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m_mem_s2(*this, "subcpu2_ram")
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{ }
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void vl1(machine_config &config);
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protected:
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virtual void machine_start() override;
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virtual void machine_reset() override;
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private:
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required_device<tmp68301_device> m_maincpu;
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required_device<tmp68301_device> m_maincpu, m_subcpu1, m_subcpu2;
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required_device<dspv_device> m_dspv1, m_dspv2, m_dspv3, m_dspv4;
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required_device<lm24014h_device> m_lcd;
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required_device<hd63266f_device> m_fdc;
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u16 m_led;
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required_shared_ptr<u16> m_mem_s1, m_mem_s2;
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u16 m_led, m_main_ctrl, m_sub1_ctrl, m_sub2_ctrl;
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void maincpu_map(address_map &map);
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void subcpu1_map(address_map &map);
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void subcpu2_map(address_map &map);
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u16 main_r();
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void main_w(u16 data);
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u16 sub1_r();
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void sub1_w(u16 data);
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u16 sub2_r();
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void sub2_w(u16 data);
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void led_w(u16 data);
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static void hd_floppy(device_slot_interface &device);
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};
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void vl1_state::led_w(u16 data)
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{
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u8 activated = (((~m_led) & data) >> 8) & 0xf;
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if(activated) {
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if(activated && 0) {
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if(activated & 1)
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logerror("led.0 %02x\n", data & 0xff);
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if(activated & 2)
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@ -79,23 +115,154 @@ void vl1_state::led_w(u16 data)
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m_led = data;
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}
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// Parallel port:
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// o 0-3: adsel 1-4 | breath controller adc & muxer
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// o 4 : adst |
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// i 5 : eoc |
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// o 7 : inh |
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// o 8-9: bshalt 1-2
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// i a : fdc irq
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// i b : fdc hd out (hd floppy detection)
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// i d-e: re 1-2
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// o f : reclr
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u16 vl1_state::main_r()
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{
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if(0)
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logerror("main_r\n");
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return m_main_ctrl;
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}
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void vl1_state::main_w(u16 data)
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{
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if(0)
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logerror("main_w adsel=%x adst=%d inh=%d bshalt=%d reclr=%d\n",
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BIT(data, 0, 4),
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BIT(data, 4),
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BIT(data, 7),
|
||||
BIT(data, 8, 2),
|
||||
BIT(data, 15));
|
||||
|
||||
m_main_ctrl = data;
|
||||
m_subcpu1->set_input_line(INPUT_LINE_HALT, !BIT(data, 8));
|
||||
m_subcpu2->set_input_line(INPUT_LINE_HALT, !BIT(data, 9));
|
||||
}
|
||||
|
||||
u16 vl1_state::sub1_r()
|
||||
{
|
||||
return m_sub1_ctrl;
|
||||
}
|
||||
|
||||
void vl1_state::sub1_w(u16 data)
|
||||
{
|
||||
if(1)
|
||||
logerror("sub1_w dsp = %d %d\n",
|
||||
BIT(data, 0),
|
||||
BIT(data, 1));
|
||||
|
||||
m_sub1_ctrl = data;
|
||||
m_dspv2->set_input_line(INPUT_LINE_RESET, !BIT(data, 0));
|
||||
m_dspv3->set_input_line(INPUT_LINE_RESET, !BIT(data, 1));
|
||||
}
|
||||
|
||||
u16 vl1_state::sub2_r()
|
||||
{
|
||||
return m_sub2_ctrl;
|
||||
}
|
||||
|
||||
void vl1_state::sub2_w(u16 data)
|
||||
{
|
||||
if(1)
|
||||
logerror("sub2_w dsp = %d\n",
|
||||
BIT(data, 0));
|
||||
|
||||
m_sub2_ctrl = data;
|
||||
m_dspv1->set_input_line(INPUT_LINE_RESET, !BIT(data, 0));
|
||||
}
|
||||
|
||||
void vl1_state::machine_start()
|
||||
{
|
||||
save_item(NAME(m_main_ctrl));
|
||||
save_item(NAME(m_sub1_ctrl));
|
||||
save_item(NAME(m_sub2_ctrl));
|
||||
save_item(NAME(m_led));
|
||||
}
|
||||
|
||||
void vl1_state::machine_reset()
|
||||
{
|
||||
m_led = 0;
|
||||
m_main_ctrl = 0;
|
||||
m_sub1_ctrl = 0;
|
||||
m_sub2_ctrl = 0;
|
||||
|
||||
m_subcpu1->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
||||
m_subcpu2->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
|
||||
m_dspv1->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||
m_dspv2->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||
m_dspv3->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||
m_dspv4->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
|
||||
}
|
||||
|
||||
void vl1_state::maincpu_map(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x0fffff).rom().region("maincpu", 0);
|
||||
map(0x400000, 0x4fffff).ram();
|
||||
map(0x500000, 0x53ffff).ram().share(m_mem_s1);
|
||||
map(0x580000, 0x5bffff).ram().share(m_mem_s2);
|
||||
map(0x800000, 0x800001).w(FUNC(vl1_state::led_w));
|
||||
map(0x804000, 0x804000).lr8(NAME([]() -> u8 { return 0; })); // pks
|
||||
map(0x806000, 0x806000).lr8(NAME([]() -> u8 { return 0; })); // adc
|
||||
map(0x808000, 0x80807f).m(m_dspv4, FUNC(dspv_device::map));
|
||||
map(0x80a000, 0x80a003).rw(m_lcd, FUNC(lm24014h_device::read), FUNC(lm24014h_device::write)).umask16(0x00ff);
|
||||
map(0x80b000, 0x80b003).m(m_fdc, FUNC(hd63266f_device::map)).umask16(0x00ff);
|
||||
}
|
||||
|
||||
void vl1_state::subcpu1_map(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x03ffff).ram().share(m_mem_s1);
|
||||
map(0x040000, 0x04007f).m(m_dspv2, FUNC(dspv_device::map));
|
||||
map(0x050000, 0x05007f).m(m_dspv3, FUNC(dspv_device::map));
|
||||
}
|
||||
|
||||
void vl1_state::subcpu2_map(address_map &map)
|
||||
{
|
||||
map(0x000000, 0x03ffff).ram().share(m_mem_s2);
|
||||
map(0x040000, 0x04007f).m(m_dspv1, FUNC(dspv_device::map));
|
||||
}
|
||||
|
||||
|
||||
void vl1_state::hd_floppy(device_slot_interface &device)
|
||||
{
|
||||
device.option_add("35hd", FLOPPY_35_HD);
|
||||
}
|
||||
|
||||
void vl1_state::vl1(machine_config &config)
|
||||
{
|
||||
TMP68301(config, m_maincpu, 16_MHz_XTAL);
|
||||
m_maincpu->set_addrmap(AS_PROGRAM, &vl1_state::maincpu_map);
|
||||
m_maincpu->parallel_r_cb().set(FUNC(vl1_state::main_r));
|
||||
m_maincpu->parallel_w_cb().set(FUNC(vl1_state::main_w));
|
||||
m_maincpu->tx2_handler().set(m_subcpu1, FUNC(tmp68301_device::rx2_w));
|
||||
m_maincpu->tx2_handler().append(m_subcpu2, FUNC(tmp68301_device::rx2_w));
|
||||
|
||||
TMP68301(config, m_subcpu1, 16_MHz_XTAL);
|
||||
m_subcpu1->set_addrmap(AS_PROGRAM, &vl1_state::subcpu1_map);
|
||||
m_subcpu1->parallel_r_cb().set(FUNC(vl1_state::sub1_r));
|
||||
m_subcpu1->parallel_w_cb().set(FUNC(vl1_state::sub1_w));
|
||||
|
||||
TMP68301(config, m_subcpu2, 16_MHz_XTAL);
|
||||
m_subcpu2->set_addrmap(AS_PROGRAM, &vl1_state::subcpu2_map);
|
||||
m_subcpu2->parallel_r_cb().set(FUNC(vl1_state::sub2_r));
|
||||
m_subcpu2->parallel_w_cb().set(FUNC(vl1_state::sub2_w));
|
||||
|
||||
DSPV(config, m_dspv1, 24.576_MHz_XTAL);
|
||||
DSPV(config, m_dspv2, 24.576_MHz_XTAL);
|
||||
DSPV(config, m_dspv3, 24.576_MHz_XTAL);
|
||||
DSPV(config, m_dspv4, 24.576_MHz_XTAL);
|
||||
|
||||
HD63266F(config, m_fdc, 16_MHz_XTAL);
|
||||
m_fdc->set_ready_line_connected(false);
|
||||
FLOPPY_CONNECTOR(config, "fdc:0", hd_floppy, "35hd", floppy_image_device::default_pc_floppy_formats);
|
||||
|
||||
LM24014H(config, m_lcd);
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user