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https://github.com/holub/mame
synced 2025-05-21 13:18:56 +03:00
Added INT1, INT2, INT3, DRQ0, DRQ1, TMRIN0, TMRIN1 input and TMROUT0, TMROUT1 output lines to the Intel 80186 CPU interface. [Curt Coder]
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Curt Coder
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7db585fdde
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vendored
@ -174,7 +174,7 @@ src/emu/cpu/i86/host.h svneol=native#text/plain
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src/emu/cpu/i86/i286.c svneol=native#text/plain
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src/emu/cpu/i86/i286.h svneol=native#text/plain
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src/emu/cpu/i86/i86.c svneol=native#text/plain
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src/emu/cpu/i86/i86.h -text svneol=native#text/plain
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src/emu/cpu/i86/i86.h svneol=native#text/plain
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src/emu/cpu/i86/i86.txt svneol=native#text/plain
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src/emu/cpu/i86/i86priv.h svneol=native#text/plain
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src/emu/cpu/i86/i86time.c svneol=native#text/plain
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@ -66,6 +66,9 @@ struct _i8086_state
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char seg_prefix; /* prefix segment indicator */
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unsigned ea;
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UINT16 eo; /* HJB 12/13/98 effective offset of the address (before segment is added) */
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devcb_resolved_write_line out_tmrout0_func;
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devcb_resolved_write_line out_tmrout1_func;
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};
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INLINE i8086_state *get_safe_token(running_device *device)
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@ -209,6 +212,22 @@ static CPU_INIT( i8088 )
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cpustate->fetch_xor = 0;
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}
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static CPU_INIT( i80186 )
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{
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i8086_state *cpustate = get_safe_token(device);
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CPU_INIT_CALL(i8086);
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/* resolve callbacks */
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i80186_interface *intf = (i80186_interface *) device->baseconfig().static_config();
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if (intf != NULL)
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{
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devcb_resolve_write_line(&cpustate->out_tmrout0_func, &intf->out_tmrout0_func, device);
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devcb_resolve_write_line(&cpustate->out_tmrout1_func, &intf->out_tmrout1_func, device);
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}
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}
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static CPU_RESET( i8086 )
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{
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i8086_state *cpustate = get_safe_token(device);
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@ -266,6 +285,16 @@ static void set_irq_line(i8086_state *cpustate, int irqline, int state)
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}
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}
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static void set_drq_line(i8086_state *cpustate, int irqline, int state)
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{
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// TODO implement me
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}
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static void set_tmrin_line(i8086_state *cpustate, int irqline, int state)
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{
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// TODO implement me
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}
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/* PJB 03/05 */
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static void set_test_line(i8086_state *cpustate, int state)
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{
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@ -501,7 +530,7 @@ static CPU_SET_INFO( i8086 )
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switch (state)
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{
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/* --- the following bits of info are set as 64-bit signed integers --- */
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case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
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case CPUINFO_INT_INPUT_STATE + 0: set_irq_line(cpustate, 0, info->i); break;
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case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
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case CPUINFO_INT_INPUT_STATE + INPUT_LINE_TEST: set_test_line(cpustate, info->i); break; /* PJB 03/05 */
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}
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@ -563,10 +592,10 @@ CPU_GET_INFO( i8086 )
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/* --- the following bits of info are returned as NULL-terminated strings --- */
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case DEVINFO_STR_NAME: strcpy(info->s, "8086"); break;
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case DEVINFO_STR_FAMILY: strcpy(info->s, "Intel 80x86"); break;
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case DEVINFO_STR_VERSION: strcpy(info->s, "1.4"); break;
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case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
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case DEVINFO_STR_CREDITS: strcpy(info->s, "Real mode i286 emulator v1.4 by Fabrice Frances\n(initial work cpustate->based on David Hedley's pcemu)"); break;
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case DEVINFO_STR_FAMILY: strcpy(info->s, "Intel 80x86"); break;
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case DEVINFO_STR_VERSION: strcpy(info->s, "1.4"); break;
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case DEVINFO_STR_SOURCE_FILE: strcpy(info->s, __FILE__); break;
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case DEVINFO_STR_CREDITS: strcpy(info->s, "Real mode i286 emulator v1.4 by Fabrice Frances\n(initial work cpustate->based on David Hedley's pcemu)"); break;
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}
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}
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@ -598,21 +627,43 @@ CPU_GET_INFO( i8088 )
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* CPU-specific get_info/set_info
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**************************************************************************/
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static CPU_SET_INFO( i80186 )
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{
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i8086_state *cpustate = get_safe_token(device);
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switch (state)
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{
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/* --- the following bits of info are set as 64-bit signed integers --- */
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case CPUINFO_INT_INPUT_STATE + INPUT_LINE_INT0: set_irq_line(cpustate, 0, info->i); break;
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case CPUINFO_INT_INPUT_STATE + INPUT_LINE_INT1: set_irq_line(cpustate, 1, info->i); break;
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case CPUINFO_INT_INPUT_STATE + INPUT_LINE_INT2: set_irq_line(cpustate, 2, info->i); break;
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case CPUINFO_INT_INPUT_STATE + INPUT_LINE_INT3: set_irq_line(cpustate, 3, info->i); break;
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case CPUINFO_INT_INPUT_STATE + INPUT_LINE_DRQ0: set_drq_line(cpustate, 0, info->i); break;
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case CPUINFO_INT_INPUT_STATE + INPUT_LINE_DRQ1: set_drq_line(cpustate, 1, info->i); break;
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case CPUINFO_INT_INPUT_STATE + INPUT_LINE_TMRIN0: set_tmrin_line(cpustate, 0, info->i); break;
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case CPUINFO_INT_INPUT_STATE + INPUT_LINE_TMRIN1: set_tmrin_line(cpustate, 1, info->i); break;
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case CPUINFO_INT_INPUT_STATE + INPUT_LINE_NMI: set_irq_line(cpustate, INPUT_LINE_NMI, info->i); break;
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case CPUINFO_INT_INPUT_STATE + INPUT_LINE_TEST: set_test_line(cpustate, info->i); break; /* PJB 03/05 */
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}
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}
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CPU_GET_INFO( i80186 )
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{
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switch (state)
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{
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/* --- the following bits of info are returned as 64-bit signed integers --- */
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case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
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case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
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case CPUINFO_INT_CLOCK_MULTIPLIER: info->i = 1; break;
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case CPUINFO_INT_CLOCK_DIVIDER: info->i = 2; break;
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/* --- the following bits of info are returned as pointers to data or functions --- */
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case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80186);break;
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case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(i80186); break;
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case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(i80186); break;
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case CPUINFO_FCT_EXECUTE: info->execute = CPU_EXECUTE_NAME(i80186); break;
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/* --- the following bits of info are returned as NULL-terminated strings --- */
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case DEVINFO_STR_NAME: strcpy(info->s, "80186"); break;
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case DEVINFO_STR_NAME: strcpy(info->s, "80186"); break;
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default: CPU_GET_INFO_CALL(i8086); break;
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default: CPU_GET_INFO_CALL(i8086); break;
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}
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}
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@ -1,47 +1,65 @@
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/* ASG 971222 -- rewrote this interface */
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#pragma once
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#ifndef __I86INTF_H__
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#define __I86INTF_H__
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#define INPUT_LINE_TEST 20 /* PJB 03/05 */
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enum
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{
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I8086_IP,
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I8086_AX,
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I8086_CX,
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I8086_DX,
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I8086_BX,
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I8086_SP,
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I8086_BP,
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I8086_SI,
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I8086_DI,
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I8086_AL,
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I8086_CL,
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I8086_DL,
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I8086_BL,
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I8086_AH,
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I8086_CH,
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I8086_DH,
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I8086_BH,
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I8086_FLAGS,
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I8086_ES,
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I8086_CS,
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I8086_SS,
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I8086_DS,
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I8086_VECTOR,
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I8086_GENPC = STATE_GENPC,
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I8086_GENSP = STATE_GENSP,
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I8086_GENPCBASE = STATE_GENPCBASE
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};
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/* Public functions */
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DECLARE_LEGACY_CPU_DEVICE(I8086, i8086);
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DECLARE_LEGACY_CPU_DEVICE(I8088, i8088);
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DECLARE_LEGACY_CPU_DEVICE(I80186, i80186);
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DECLARE_LEGACY_CPU_DEVICE(I80188, i80188);
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#endif /* __I86INTF_H__ */
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/* ASG 971222 -- rewrote this interface */
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#pragma once
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#ifndef __I86INTF_H__
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#define __I86INTF_H__
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#define INPUT_LINE_INT0 INPUT_LINE_IRQ0
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#define INPUT_LINE_INT1 INPUT_LINE_IRQ1
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#define INPUT_LINE_INT2 INPUT_LINE_IRQ2
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#define INPUT_LINE_INT3 INPUT_LINE_IRQ3
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#define INPUT_LINE_TEST 20 /* PJB 03/05 */
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#define INPUT_LINE_DRQ0 21
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#define INPUT_LINE_DRQ1 22
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#define INPUT_LINE_TMRIN0 23
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#define INPUT_LINE_TMRIN1 24
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typedef struct _i80186_interface i80186_interface;
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struct _i80186_interface
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{
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devcb_write_line out_tmrout0_func;
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devcb_write_line out_tmrout1_func;
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};
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#define I80186_INTERFACE(name) const i80186_interface (name) =
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enum
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{
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I8086_IP,
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I8086_AX,
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I8086_CX,
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I8086_DX,
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I8086_BX,
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I8086_SP,
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I8086_BP,
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I8086_SI,
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I8086_DI,
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I8086_AL,
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I8086_CL,
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I8086_DL,
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I8086_BL,
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I8086_AH,
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I8086_CH,
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I8086_DH,
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I8086_BH,
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I8086_FLAGS,
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I8086_ES,
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I8086_CS,
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I8086_SS,
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I8086_DS,
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I8086_VECTOR,
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I8086_GENPC = STATE_GENPC,
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I8086_GENSP = STATE_GENSP,
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I8086_GENPCBASE = STATE_GENPCBASE
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};
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/* Public functions */
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DECLARE_LEGACY_CPU_DEVICE(I8086, i8086);
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DECLARE_LEGACY_CPU_DEVICE(I8088, i8088);
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DECLARE_LEGACY_CPU_DEVICE(I80186, i80186);
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DECLARE_LEGACY_CPU_DEVICE(I80188, i80188);
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#endif /* __I86INTF_H__ */
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