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drivers starting with a and b: finished removing READ/WRITE macros (nw)

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This commit is contained in:
Ivan Vangelista 2020-06-05 18:10:01 +02:00
parent 203841fc89
commit 2fd4687deb
215 changed files with 1838 additions and 1858 deletions
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16
src/devices/bus/lpci/pci.cpp
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@ -104,7 +104,7 @@ pci_bus_device::pci_bus_device(const machine_config &mconfig, const char *tag, d
INLINE FUNCTIONS
***************************************************************************/
READ32_MEMBER( pci_bus_device::read )
uint32_t pci_bus_device::read(offs_t offset, uint32_t mem_mask)
{
uint32_t result = 0xffffffff;
int function, reg;
@ -158,7 +158,7 @@ pci_bus_device *pci_bus_device::pci_search_bustree(int busnum, int devicenum, pc
WRITE32_MEMBER( pci_bus_device::write )
void pci_bus_device::write(offs_t offset, uint32_t data, uint32_t mem_mask)
{
offset %= 2;
@ -206,25 +206,25 @@ WRITE32_MEMBER( pci_bus_device::write )
READ64_MEMBER(pci_bus_device::read_64be)
uint64_t pci_bus_device::read_64be(offs_t offset, uint64_t mem_mask)
{
uint64_t result = 0;
mem_mask = swapendian_int64(mem_mask);
if (ACCESSING_BITS_0_31)
result |= (uint64_t)read(space, offset * 2 + 0, mem_mask >> 0) << 0;
result |= (uint64_t)read(offset * 2 + 0, mem_mask >> 0) << 0;
if (ACCESSING_BITS_32_63)
result |= (uint64_t)read(space, offset * 2 + 1, mem_mask >> 32) << 32;
result |= (uint64_t)read(offset * 2 + 1, mem_mask >> 32) << 32;
return swapendian_int64(result);
}
WRITE64_MEMBER(pci_bus_device::write_64be)
void pci_bus_device::write_64be(offs_t offset, uint64_t data, uint64_t mem_mask)
{
data = swapendian_int64(data);
mem_mask = swapendian_int64(mem_mask);
if (ACCESSING_BITS_0_31)
write(space, offset * 2 + 0, data >> 0, mem_mask >> 0);
write(offset * 2 + 0, data >> 0, mem_mask >> 0);
if (ACCESSING_BITS_32_63)
write(space, offset * 2 + 1, data >> 32, mem_mask >> 32);
write(offset * 2 + 1, data >> 32, mem_mask >> 32);
}

8
src/devices/bus/lpci/pci.h
View File

@ -72,11 +72,11 @@ public:
// construction/destruction
pci_bus_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
DECLARE_READ32_MEMBER( read );
DECLARE_WRITE32_MEMBER( write );
uint32_t read(offs_t offset, uint32_t mem_mask = ~0);
void write(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
DECLARE_READ64_MEMBER( read_64be );
DECLARE_WRITE64_MEMBER( write_64be );
uint64_t read_64be(offs_t offset, uint64_t mem_mask = ~0);
void write_64be(offs_t offset, uint64_t data, uint64_t mem_mask = ~0);
void set_busnum(int busnum) { m_busnum = busnum; }
template <typename T>

6
src/mame/audio/asteroid.cpp
View File

@ -281,7 +281,7 @@ static DISCRETE_SOUND_START(astdelux_discrete)
DISCRETE_SOUND_END
WRITE8_MEMBER(asteroid_state::asteroid_explode_w)
void asteroid_state::asteroid_explode_w(uint8_t data)
{
m_discrete->write(ASTEROID_EXPLODE_DATA,(data&0x3c)>>2); // Volume
/* We will modify the pitch data to send the divider value. */
@ -303,13 +303,13 @@ WRITE8_MEMBER(asteroid_state::asteroid_explode_w)
m_discrete->write(ASTEROID_EXPLODE_PITCH, data);
}
WRITE8_MEMBER(asteroid_state::asteroid_thump_w)
void asteroid_state::asteroid_thump_w(uint8_t data)
{
m_discrete->write(ASTEROID_THUMP_EN, data & 0x10);
m_discrete->write(ASTEROID_THUMP_DATA, data & 0x0f);
}
WRITE8_MEMBER(asteroid_state::asteroid_noise_reset_w)
void asteroid_state::asteroid_noise_reset_w(uint8_t data)
{
m_discrete->write(ASTEROID_NOISE_RESET, 0);
}

8
src/mame/audio/astrof.cpp
View File

@ -33,7 +33,7 @@
#define CHANNEL_FUEL 3
WRITE8_MEMBER(astrof_state::astrof_audio_1_w)
void astrof_state::astrof_audio_1_w(uint8_t data)
{
uint8_t rising_bits = data & ~m_port_1_last;
@ -78,7 +78,7 @@ WRITE8_MEMBER(astrof_state::astrof_audio_1_w)
}
WRITE8_MEMBER(astrof_state::astrof_audio_2_w)
void astrof_state::astrof_audio_2_w(uint8_t data)
{
uint8_t rising_bits = data & ~m_port_2_last;
@ -156,7 +156,7 @@ void astrof_state::astrof_audio(machine_config &config)
*
*************************************/
WRITE8_MEMBER(astrof_state::spfghmk2_audio_w)
void astrof_state::spfghmk2_audio_w(uint8_t data)
{
/* nothing yet */
}
@ -175,7 +175,7 @@ void astrof_state::spfghmk2_audio(machine_config &config)
*
*************************************/
WRITE8_MEMBER(astrof_state::tomahawk_audio_w)
void astrof_state::tomahawk_audio_w(uint8_t data)
{
/* D0 - sonar */

2
src/mame/audio/avalnche.cpp
View File

@ -24,7 +24,7 @@
Avalanche memory audio output handlers
***************************************************************************/
WRITE8_MEMBER(avalnche_state::avalnche_noise_amplitude_w)
void avalnche_state::avalnche_noise_amplitude_w(uint8_t data)
{
m_discrete->write(AVALNCHE_SOUNDLVL_DATA, data & 0x3f);
}

10
src/mame/audio/aztarac.cpp
View File

@ -11,12 +11,12 @@
#include "includes/aztarac.h"
READ16_MEMBER(aztarac_state::sound_r)
uint16_t aztarac_state::sound_r()
{
return m_sound_status & 0x01;
}
WRITE16_MEMBER(aztarac_state::sound_w)
void aztarac_state::sound_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
if (ACCESSING_BITS_0_7)
{
@ -28,19 +28,19 @@ WRITE16_MEMBER(aztarac_state::sound_w)
}
}
READ8_MEMBER(aztarac_state::snd_command_r)
uint8_t aztarac_state::snd_command_r()
{
m_sound_status |= 0x01;
m_sound_status &= ~0x20;
return m_soundlatch->read();
}
READ8_MEMBER(aztarac_state::snd_status_r)
uint8_t aztarac_state::snd_status_r()
{
return m_sound_status & ~0x01;
}
WRITE8_MEMBER(aztarac_state::snd_status_w)
void aztarac_state::snd_status_w(uint8_t data)
{
m_sound_status &= ~0x10;
}

4
src/mame/audio/bsktball.cpp
View File

@ -12,13 +12,13 @@
/***************************************************************************
Sound handlers
***************************************************************************/
WRITE8_MEMBER(bsktball_state::bsktball_bounce_w)
void bsktball_state::bsktball_bounce_w(uint8_t data)
{
m_discrete->write(BSKTBALL_CROWD_DATA, data & 0x0f); // Crowd
m_discrete->write(BSKTBALL_BOUNCE_EN, data & 0x10); // Bounce
}
WRITE8_MEMBER(bsktball_state::bsktball_note_w)
void bsktball_state::bsktball_note_w(uint8_t data)
{
m_discrete->write(BSKTBALL_NOTE_DATA, data); // Note
}

4
src/mame/audio/llander.cpp
View File

@ -83,13 +83,13 @@ static DISCRETE_SOUND_START(llander_discrete)
DISCRETE_OUTPUT(NODE_90, 65534.0/(9.2+9.2+600+1000)) // Take the output from the mixer
DISCRETE_SOUND_END
WRITE8_MEMBER(asteroid_state::llander_snd_reset_w)
void asteroid_state::llander_snd_reset_w(uint8_t data)
{
/* Resets the LFSR that is used for the white noise generator */
m_discrete->write(LLANDER_NOISE_RESET, 0); /* Reset */
}
WRITE8_MEMBER(asteroid_state::llander_sounds_w)
void asteroid_state::llander_sounds_w(uint8_t data)
{
m_discrete->write(LLANDER_THRUST_DATA, data & 0x07); /* Thrust volume */
m_discrete->write(LLANDER_TONE3K_EN, data & 0x10); /* Tone 3KHz enable */

34
src/mame/drivers/abc1600.cpp
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@ -122,7 +122,7 @@ enum
// bus_r -
//-------------------------------------------------
READ8_MEMBER( abc1600_state::bus_r )
uint8_t abc1600_state::bus_r(offs_t offset)
{
uint8_t data = 0;
@ -264,7 +264,7 @@ READ8_MEMBER( abc1600_state::bus_r )
// bus_w -
//-------------------------------------------------
WRITE8_MEMBER( abc1600_state::bus_w )
void abc1600_state::bus_w(offs_t offset, uint8_t data)
{
uint8_t cs = (m_cs7 << 7) | ((offset >> 5) & 0x3f);
@ -360,7 +360,7 @@ WRITE8_MEMBER( abc1600_state::bus_w )
// fw0_w -
//-------------------------------------------------
WRITE8_MEMBER( abc1600_state::fw0_w )
void abc1600_state::fw0_w(uint8_t data)
{
/*
@ -397,7 +397,7 @@ WRITE8_MEMBER( abc1600_state::fw0_w )
// fw1_w -
//-------------------------------------------------
WRITE8_MEMBER( abc1600_state::fw1_w )
void abc1600_state::fw1_w(uint8_t data)
{
/*
@ -428,7 +428,7 @@ WRITE8_MEMBER( abc1600_state::fw1_w )
// spec_contr_reg_w -
//-------------------------------------------------
WRITE8_MEMBER( abc1600_state::spec_contr_reg_w )
void abc1600_state::spec_contr_reg_w(uint8_t data)
{
int state = BIT(data, 3);
@ -602,41 +602,41 @@ void abc1600_state::update_drdy2()
// Z80DART
//-------------------------------------------------
READ8_MEMBER( abc1600_state::dart_r )
uint8_t abc1600_state::dart_r(offs_t offset)
{
return m_dart->ba_cd_r(A2_A1 ^ 0x03);
}
WRITE8_MEMBER( abc1600_state::dart_w )
void abc1600_state::dart_w(offs_t offset, uint8_t data)
{
m_dart->ba_cd_w(A2_A1 ^ 0x03, data);
}
//-------------------------------------------------
// SCC8530_INTERFACE( sc_intf )
// SCC8530
//-------------------------------------------------
READ8_MEMBER( abc1600_state::scc_r )
uint8_t abc1600_state::scc_r(offs_t offset)
{
return m_scc->ab_dc_r(A2_A1);
}
WRITE8_MEMBER( abc1600_state::scc_w )
void abc1600_state::scc_w(offs_t offset, uint8_t data)
{
m_scc->ab_dc_w(A2_A1, data);
}
//-------------------------------------------------
// Z8536_INTERFACE( cio_intf )
// Z8536
//-------------------------------------------------
READ8_MEMBER( abc1600_state::cio_r )
uint8_t abc1600_state::cio_r(offs_t offset)
{
return m_cio->read(A2_A1);
}
WRITE8_MEMBER( abc1600_state::cio_w )
void abc1600_state::cio_w(offs_t offset, uint8_t data)
{
m_cio->write(A2_A1, data);
}
@ -828,17 +828,15 @@ void abc1600_state::machine_start()
void abc1600_state::machine_reset()
{
address_space &program = m_maincpu->space(AS_PROGRAM);
// clear special control register
for (int i = 0; i < 8; i++)
{
spec_contr_reg_w(program, 0, i);
spec_contr_reg_w(i);
}
// clear floppy registers
fw0_w(program, 0, 0);
fw1_w(program, 0, 0);
fw0_w(0);
fw1_w(0);
// clear NMI
m_maincpu->set_input_line(M68K_IRQ_7, CLEAR_LINE);

2
src/mame/drivers/actfancr.cpp
View File

@ -51,7 +51,7 @@ uint8_t actfancr_state::triothep_control_r()
/******************************************************************************/
WRITE8_MEMBER(actfancr_state::buffer_spriteram_w)
void actfancr_state::buffer_spriteram_w(uint8_t data)
{
uint8_t *src = reinterpret_cast<uint8_t *>(memshare("spriteram")->ptr());
// copy to a 16-bit region for our sprite draw code too

24
src/mame/drivers/adam.cpp
View File

@ -347,7 +347,7 @@ enum
// mreq_r - memory request read
//-------------------------------------------------
READ8_MEMBER( adam_state::mreq_r )
uint8_t adam_state::mreq_r(offs_t offset)
{
int bmreq = 0, biorq = 1, eos_enable = 1, boot_rom_cs = 1, aux_decode_1 = 1, aux_rom_cs = 1, cas1 = 1, cas2 = 1, cs1 = 1, cs2 = 1, cs3 = 1, cs4 = 1;
@ -470,7 +470,7 @@ READ8_MEMBER( adam_state::mreq_r )
// mreq_w - memory request write
//-------------------------------------------------
WRITE8_MEMBER( adam_state::mreq_w )
void adam_state::mreq_w(offs_t offset, uint8_t data)
{
int bmreq = 0, biorq = 1, aux_rom_cs = 1, cas1 = 1, cas2 = 1;
@ -526,7 +526,7 @@ WRITE8_MEMBER( adam_state::mreq_w )
// iorq_r - I/O request read
//-------------------------------------------------
READ8_MEMBER( adam_state::iorq_r )
uint8_t adam_state::iorq_r(offs_t offset)
{
int bmreq = 1, biorq = 0, aux_rom_cs = 1, cas1 = 1, cas2 = 1;
@ -535,11 +535,11 @@ READ8_MEMBER( adam_state::iorq_r )
switch ((offset >> 5) & 0x07)
{
case 1:
data = adamnet_r(space, 0);
data = adamnet_r();
break;
case 3:
data = mioc_r(space, 0);
data = mioc_r();
break;
case 5:
@ -569,18 +569,18 @@ READ8_MEMBER( adam_state::iorq_r )
// iorq_w - I/O request write
//-------------------------------------------------
WRITE8_MEMBER( adam_state::iorq_w )
void adam_state::iorq_w(offs_t offset, uint8_t data)
{
int bmreq = 1, biorq = 0, aux_rom_cs = 1, cas1 = 1, cas2 = 1;
switch ((offset >> 5) & 0x07)
{
case 1:
adamnet_w(space, 0, data);
adamnet_w(data);
break;
case 3:
mioc_w(space, 0, data);
mioc_w(data);
break;
case 4:
@ -619,7 +619,7 @@ WRITE8_MEMBER( adam_state::iorq_w )
// mioc_r -
//-------------------------------------------------
READ8_MEMBER( adam_state::mioc_r )
uint8_t adam_state::mioc_r()
{
return m_mioc & 0x0f;
}
@ -629,7 +629,7 @@ READ8_MEMBER( adam_state::mioc_r )
// mioc_w -
//-------------------------------------------------
WRITE8_MEMBER( adam_state::mioc_w )
void adam_state::mioc_w(uint8_t data)
{
/*
@ -659,7 +659,7 @@ WRITE8_MEMBER( adam_state::mioc_w )
// adamnet_r -
//-------------------------------------------------
READ8_MEMBER( adam_state::adamnet_r )
uint8_t adam_state::adamnet_r()
{
return m_an & 0x0f;
}
@ -669,7 +669,7 @@ READ8_MEMBER( adam_state::adamnet_r )
// adamnet_w -
//-------------------------------------------------
WRITE8_MEMBER( adam_state::adamnet_w )
void adam_state::adamnet_w(uint8_t data)
{
/*

8
src/mame/drivers/aeroboto.cpp
View File

@ -36,7 +36,7 @@ Revisions:
#include "speaker.h"
READ8_MEMBER(aeroboto_state::aeroboto_201_r)
uint8_t aeroboto_state::aeroboto_201_r()
{
/* if you keep a button pressed during boot, the game will expect this */
/* serie of values to be returned from 3004, and display "PASS 201" if it is */
@ -60,19 +60,19 @@ WRITE_LINE_MEMBER(aeroboto_state::vblank_irq)
}
}
READ8_MEMBER(aeroboto_state::aeroboto_irq_ack_r)
uint8_t aeroboto_state::aeroboto_irq_ack_r()
{
m_maincpu->set_input_line(0, CLEAR_LINE);
return 0xff;
}
READ8_MEMBER(aeroboto_state::aeroboto_2973_r)
uint8_t aeroboto_state::aeroboto_2973_r()
{
m_mainram[0x02be] = 0;
return 0xff;
}
WRITE8_MEMBER(aeroboto_state::aeroboto_1a2_w)
void aeroboto_state::aeroboto_1a2_w(uint8_t data)
{
m_mainram[0x01a2] = data;
if (data)

24
src/mame/drivers/aerofgt.cpp
View File

@ -75,34 +75,34 @@ Verification still needed for the other PCBs.
#include "speaker.h"
WRITE8_MEMBER(aerofgt_state::karatblzbl_soundlatch_w)
void aerofgt_state::karatblzbl_soundlatch_w(uint8_t data)
{
m_soundlatch->write(data);
m_audiocpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
}
READ8_MEMBER(aerofgt_state::pending_command_r)
uint8_t aerofgt_state::pending_command_r()
{
return m_soundlatch->pending_r();
}
WRITE8_MEMBER(aerofgt_state::aerofgt_sh_bankswitch_w)
void aerofgt_state::aerofgt_sh_bankswitch_w(uint8_t data)
{
m_soundbank->set_entry(data & 0x03);
}
WRITE8_MEMBER(aerofgt_state::spinlbrk_sh_bankswitch_w)
void aerofgt_state::spinlbrk_sh_bankswitch_w(uint8_t data)
{
m_soundbank->set_entry(data & 0x01);
}
WRITE16_MEMBER(aerofgt_state::pspikesb_oki_banking_w)
void aerofgt_state::pspikesb_oki_banking_w(uint16_t data)
{
m_oki->set_rom_bank(data & 3);
}
/*TODO: sound banking. */
WRITE16_MEMBER(aerofgt_state::aerfboo2_okim6295_banking_w)
void aerofgt_state::aerfboo2_okim6295_banking_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
// if(ACCESSING_BITS_8_15)
// {
@ -110,40 +110,40 @@ WRITE16_MEMBER(aerofgt_state::aerfboo2_okim6295_banking_w)
// }
}
WRITE8_MEMBER(aerofgt_state::aerfboot_okim6295_banking_w)
void aerofgt_state::aerfboot_okim6295_banking_w(uint8_t data)
{
/*bit 2 (0x4) set too?*/
if (data & 0x4)
m_okibank->set_entry(data & 0x3);
}
WRITE8_MEMBER(aerofgt_state::karatblzbl_d7759_write_port_0_w)
void aerofgt_state::karatblzbl_d7759_write_port_0_w(uint8_t data)
{
m_upd7759->port_w(data);
m_upd7759->start_w(0);
m_upd7759->start_w(1);
}
WRITE8_MEMBER(aerofgt_state::karatblzbl_d7759_reset_w)
void aerofgt_state::karatblzbl_d7759_reset_w(uint8_t data)
{
m_upd7759->reset_w(BIT(data, 7));
}
template<int Layer>
WRITE16_MEMBER(aerofgt_state::vram_w)
void aerofgt_state::vram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_vram[Layer][offset]);
m_tilemap[Layer]->mark_tile_dirty(offset);
}
template<int Layer>
WRITE16_MEMBER(aerofgt_state::scrollx_w)
void aerofgt_state::scrollx_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_scrollx[Layer]);
}
template<int Layer>
WRITE16_MEMBER(aerofgt_state::scrolly_w)
void aerofgt_state::scrolly_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_scrolly[Layer]);
}

20
src/mame/drivers/airbustr.cpp
View File

@ -229,7 +229,7 @@ Code at 505: waits for bit 1 to go low, writes command, waits for bit
/* Read/Write Handlers */
READ8_MEMBER(airbustr_state::devram_r)
uint8_t airbustr_state::devram_r(address_space &space, offs_t offset)
{
// There's an MCU here, possibly
switch (offset)
@ -262,17 +262,17 @@ READ8_MEMBER(airbustr_state::devram_r)
}
}
WRITE8_MEMBER(airbustr_state::master_nmi_trigger_w)
void airbustr_state::master_nmi_trigger_w(uint8_t data)
{
m_slave->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
}
WRITE8_MEMBER(airbustr_state::master_bankswitch_w)
void airbustr_state::master_bankswitch_w(uint8_t data)
{
m_masterbank->set_entry(data & 0x07);
}
WRITE8_MEMBER(airbustr_state::slave_bankswitch_w)
void airbustr_state::slave_bankswitch_w(uint8_t data)
{
m_slavebank->set_entry(data & 0x07);
@ -285,12 +285,12 @@ WRITE8_MEMBER(airbustr_state::slave_bankswitch_w)
m_pandora->set_clear_bitmap(BIT(data, 5));
}
WRITE8_MEMBER(airbustr_state::sound_bankswitch_w)
void airbustr_state::sound_bankswitch_w(uint8_t data)
{
m_audiobank->set_entry(data & 0x07);
}
READ8_MEMBER(airbustr_state::soundcommand_status_r)
uint8_t airbustr_state::soundcommand_status_r()
{
// bits: 2 <-> ? 1 <-> soundlatch full 0 <-> soundlatch2 empty
return 4 | (m_soundlatch[0]->pending_r() << 1) | !m_soundlatch[1]->pending_r();
@ -298,20 +298,20 @@ READ8_MEMBER(airbustr_state::soundcommand_status_r)
template<int Layer>
WRITE8_MEMBER(airbustr_state::videoram_w)
void airbustr_state::videoram_w(offs_t offset, uint8_t data)
{
m_videoram[Layer][offset] = data;
m_tilemap[Layer]->mark_tile_dirty(offset);
}
template<int Layer>
WRITE8_MEMBER(airbustr_state::colorram_w)
void airbustr_state::colorram_w(offs_t offset, uint8_t data)
{
m_colorram[Layer][offset] = data;
m_tilemap[Layer]->mark_tile_dirty(offset);
}
WRITE8_MEMBER(airbustr_state::coin_counter_w)
void airbustr_state::coin_counter_w(uint8_t data)
{
machine().bookkeeping().coin_counter_w(0, data & 1);
machine().bookkeeping().coin_counter_w(1, data & 2);
@ -699,7 +699,7 @@ ROM_END
void airbustr_state::init_airbustr()
{
m_master->space(AS_PROGRAM).install_read_handler(0xe000, 0xefff, read8_delegate(*this, FUNC(airbustr_state::devram_r))); // protection device lives here
m_master->space(AS_PROGRAM).install_read_handler(0xe000, 0xefff, read8m_delegate(*this, FUNC(airbustr_state::devram_r))); // protection device lives here
}

4
src/mame/drivers/ajax.cpp
View File

@ -136,7 +136,7 @@ INPUT_PORTS_END
0 / 2MBANK
*/
WRITE8_MEMBER(ajax_state::sound_bank_w)
void ajax_state::sound_bank_w(uint8_t data)
{
int bank_A, bank_B;
@ -157,7 +157,7 @@ void ajax_state::volume_callback0(uint8_t data)
m_k007232_1->set_volume(1, 0, (data & 0x0f) * 0x11);
}
WRITE8_MEMBER(ajax_state::k007232_extvol_w)
void ajax_state::k007232_extvol_w(uint8_t data)
{
/* channel A volume (mono) */
m_k007232_2->set_volume(0, (data & 0x0f) * 0x11/2, (data & 0x0f) * 0x11/2);

8
src/mame/drivers/aliens.cpp
View File

@ -20,7 +20,7 @@ Preliminary driver by:
#include "speaker.h"
WRITE8_MEMBER(aliens_state::aliens_coin_counter_w)
void aliens_state::aliens_coin_counter_w(uint8_t data)
{
/* bits 0-1 = coin counters */
machine().bookkeeping().coin_counter_w(0, data & 0x01);
@ -42,7 +42,7 @@ WRITE8_MEMBER(aliens_state::aliens_coin_counter_w)
#endif
}
WRITE8_MEMBER(aliens_state::aliens_sh_irqtrigger_w)
void aliens_state::aliens_sh_irqtrigger_w(uint8_t data)
{
m_soundlatch->write(data);
m_audiocpu->set_input_line(0, HOLD_LINE);
@ -60,7 +60,7 @@ void aliens_state::aliens_snd_bankswitch_w(uint8_t data)
}
READ8_MEMBER(aliens_state::k052109_051960_r)
uint8_t aliens_state::k052109_051960_r(offs_t offset)
{
if (m_k052109->get_rmrd_line() == CLEAR_LINE)
{
@ -75,7 +75,7 @@ READ8_MEMBER(aliens_state::k052109_051960_r)
return m_k052109->read(offset);
}
WRITE8_MEMBER(aliens_state::k052109_051960_w)
void aliens_state::k052109_051960_w(offs_t offset, uint8_t data)
{
if (offset >= 0x3800 && offset < 0x3808)
m_k051960->k051937_w(offset - 0x3800, data);

16
src/mame/drivers/ampoker2.cpp
View File

@ -482,7 +482,7 @@ void ampoker2_state::machine_start()
*/
WRITE8_MEMBER(ampoker2_state::port30_w)
void ampoker2_state::port30_w(uint8_t data)
/*-------------------------------------------------
PORT_30 C000H ;OUTPUT PORT 30H
---------------------------------------------------
@ -496,7 +496,7 @@ WRITE8_MEMBER(ampoker2_state::port30_w)
}
WRITE8_MEMBER(ampoker2_state::port31_w)
void ampoker2_state::port31_w(uint8_t data)
/*-------------------------------------------------
PORT_31 C001H ;OUTPUT PORT 31H
---------------------------------------------------
@ -514,7 +514,7 @@ WRITE8_MEMBER(ampoker2_state::port31_w)
}
WRITE8_MEMBER(ampoker2_state::port32_w)
void ampoker2_state::port32_w(uint8_t data)
/*-------------------------------------------------
PORT_32 C002H ;OUTPUT PORT 32H
---------------------------------------------------
@ -529,7 +529,7 @@ WRITE8_MEMBER(ampoker2_state::port32_w)
}
WRITE8_MEMBER(ampoker2_state::port33_w)
void ampoker2_state::port33_w(uint8_t data)
/*-------------------------------------------------
PORT_33 C003H ;OUTPUT PORT 33H
---------------------------------------------------
@ -543,7 +543,7 @@ WRITE8_MEMBER(ampoker2_state::port33_w)
}
WRITE8_MEMBER(ampoker2_state::port34_w)
void ampoker2_state::port34_w(uint8_t data)
/*-------------------------------------------------
PORT_34 C004H ;OUTPUT PORT 34H
---------------------------------------------------
@ -558,7 +558,7 @@ WRITE8_MEMBER(ampoker2_state::port34_w)
}
WRITE8_MEMBER(ampoker2_state::port35_w)
void ampoker2_state::port35_w(uint8_t data)
/*-------------------------------------------------
PORT_35 C005H ;OUTPUT PORT 35H
---------------------------------------------------
@ -572,7 +572,7 @@ WRITE8_MEMBER(ampoker2_state::port35_w)
}
WRITE8_MEMBER(ampoker2_state::port36_w)
void ampoker2_state::port36_w(uint8_t data)
/*-------------------------------------------------
PORT_36 C006H ;OUTPUT PORT 36H
---------------------------------------------------
@ -590,7 +590,7 @@ WRITE8_MEMBER(ampoker2_state::port36_w)
}
WRITE8_MEMBER(ampoker2_state::watchdog_reset_w)
void ampoker2_state::watchdog_reset_w(uint8_t data)
/*-------------------------------------------------
PORT_37 C007H ;OUTPUT PORT 37H
---------------------------------------------------

6
src/mame/drivers/amspdwy.cpp
View File

@ -54,19 +54,19 @@ uint8_t amspdwy_state::amspdwy_wheel_r( int index )
return m_wheel_return[index] | ioport(portnames[index])->read();
}
READ8_MEMBER(amspdwy_state::amspdwy_wheel_0_r)
uint8_t amspdwy_state::amspdwy_wheel_0_r()
{
// player 1
return amspdwy_wheel_r(0);
}
READ8_MEMBER(amspdwy_state::amspdwy_wheel_1_r)
uint8_t amspdwy_state::amspdwy_wheel_1_r()
{
// player 2
return amspdwy_wheel_r(1);
}
READ8_MEMBER(amspdwy_state::amspdwy_sound_r)
uint8_t amspdwy_state::amspdwy_sound_r()
{
return (m_ym2151->status_r() & ~0x30) | ioport("IN0")->read();
}

8
src/mame/drivers/angelkds.cpp
View File

@ -427,22 +427,22 @@ sound related ?
*/
WRITE8_MEMBER(angelkds_state::angelkds_main_sound_w)
void angelkds_state::angelkds_main_sound_w(offs_t offset, uint8_t data)
{
m_sound[offset] = data;
}
READ8_MEMBER(angelkds_state::angelkds_main_sound_r)
uint8_t angelkds_state::angelkds_main_sound_r(offs_t offset)
{
return m_sound2[offset];
}
WRITE8_MEMBER(angelkds_state::angelkds_sub_sound_w)
void angelkds_state::angelkds_sub_sound_w(offs_t offset, uint8_t data)
{
m_sound2[offset] = data;
}
READ8_MEMBER(angelkds_state::angelkds_sub_sound_r)
uint8_t angelkds_state::angelkds_sub_sound_r(offs_t offset)
{
return m_sound[offset];
}

72
src/mame/drivers/apollo.cpp
View File

@ -206,7 +206,7 @@ uint8_t apollo_get_ram_config_byte(void) {
apollo_instruction_hook
must be called by the CPU core before executing each instruction
***************************************************************************/
READ32_MEMBER(apollo_state::apollo_instruction_hook)
uint32_t apollo_state::apollo_instruction_hook(offs_t offset)
{
static uint16_t idle_counter = 0;
@ -289,7 +289,7 @@ u16 apollo_state::apollo_irq_acknowledge(offs_t offset)
DN3500 Cache Control/Status Register at 0x10200
***************************************************************************/
WRITE8_MEMBER(apollo_state::cache_control_register_w){
void apollo_state::cache_control_register_w(offs_t offset, uint8_t data){
if (apollo_is_dn5500())
{
SLOG1(("Error: writing DN5500 Cache Status Register at offset %02x = %02x", offset, data));
@ -302,7 +302,7 @@ WRITE8_MEMBER(apollo_state::cache_control_register_w){
}
}
READ8_MEMBER(apollo_state::cache_status_register_r){
uint8_t apollo_state::cache_status_register_r(offs_t offset){
uint8_t data = cache_status_register;
if (apollo_is_dn5500()) {
@ -328,13 +328,13 @@ void apollo_set_cache_status_register(device_t *device,uint8_t mask, uint8_t dat
DN3500 Task Alias Register at 0x10300
***************************************************************************/
WRITE8_MEMBER(apollo_state::task_alias_register_w){
void apollo_state::task_alias_register_w(offs_t offset, uint8_t data){
task_alias_register = data;
apollo_set_cache_status_register(this,0x07, data);
SLOG(("writing Task Alias Register at offset %02x = %02x",offset, data));
}
READ8_MEMBER(apollo_state::task_alias_register_r){
uint8_t apollo_state::task_alias_register_r(offs_t offset){
uint8_t data = 0xff;
SLOG(("reading Task Alias Register at offset %02x = %02x", offset, data));
return data;
@ -344,12 +344,12 @@ READ8_MEMBER(apollo_state::task_alias_register_r){
DN3000/DN3500 Latch Page on Parity Error Register at 0x9300/0x11300
***************************************************************************/
WRITE16_MEMBER(apollo_state::latch_page_on_parity_error_register_w){
void apollo_state::latch_page_on_parity_error_register_w(offs_t offset, uint16_t data){
latch_page_on_parity_error_register = data;
SLOG1(("writing Latch Page on Error Parity Register at offset %02x = %04x", offset*2, data));
}
READ16_MEMBER(apollo_state::latch_page_on_parity_error_register_r){
uint16_t apollo_state::latch_page_on_parity_error_register_r(offs_t offset){
uint16_t data = latch_page_on_parity_error_register;
SLOG2(("reading Latch Page on Error Parity Register at offset %02x = %04x", offset*2, data));
return data;
@ -359,12 +359,12 @@ READ16_MEMBER(apollo_state::latch_page_on_parity_error_register_r){
DN3500 Master REQ Register at 0x11600
***************************************************************************/
WRITE8_MEMBER(apollo_state::master_req_register_w){
void apollo_state::master_req_register_w(offs_t offset, uint8_t data){
master_req_register = data;
SLOG2(("writing Master REQ Register at offset %02x = %02x", offset, data));
}
READ8_MEMBER(apollo_state::master_req_register_r){
uint8_t apollo_state::master_req_register_r(offs_t offset){
uint8_t data = 0xff;
SLOG1(("reading Master REQ Register at offset %02x = %02x", offset, data));
return data;
@ -374,7 +374,7 @@ READ8_MEMBER(apollo_state::master_req_register_r){
DN3500 Selective Clear Locations at 0x11600
***************************************************************************/
WRITE16_MEMBER(apollo_state::selective_clear_locations_w){
void apollo_state::selective_clear_locations_w(offs_t offset, uint16_t data){
SLOG2(("writing Selective Clear Locations at offset %02x = %02x", offset*2, data));
switch (offset * 2) {
case 0x00: // Clear All
@ -394,7 +394,7 @@ WRITE16_MEMBER(apollo_state::selective_clear_locations_w){
}
}
READ16_MEMBER(apollo_state::selective_clear_locations_r){
uint16_t apollo_state::selective_clear_locations_r(offs_t offset){
uint16_t data = 0xffff;
SLOG1(("reading Selective Clear Locations at offset %02x = %02x", offset*2, data));
return data;
@ -404,7 +404,7 @@ READ16_MEMBER(apollo_state::selective_clear_locations_r){
DN3000/DN3500 RAM with parity (and null proc loop delay for DomainOS)
***************************************************************************/
READ32_MEMBER(apollo_state::ram_with_parity_r){
uint32_t apollo_state::ram_with_parity_r(offs_t offset, uint32_t mem_mask){
uint32_t data = m_messram_ptr[parity_error_offset+offset];
SLOG2(("memory dword read with parity error at %08x = %08x & %08x parity_byte=%04x",
@ -424,7 +424,7 @@ READ32_MEMBER(apollo_state::ram_with_parity_r){
return data;
}
WRITE32_MEMBER(apollo_state::ram_with_parity_w){
void apollo_state::ram_with_parity_w(offs_t offset, uint32_t data, uint32_t mem_mask){
COMBINE_DATA(m_messram_ptr+offset);
if (apollo_csr_get_control_register() & APOLLO_CSR_CR_FORCE_BAD_PARITY) {
@ -444,7 +444,7 @@ WRITE32_MEMBER(apollo_state::ram_with_parity_w){
// no more than 192 read/write handlers may be used
// see table_assign_handler in memory.c
if (parity_error_handler_install_counter < 40) {
m_maincpu->space(AS_PROGRAM).install_read_handler(ram_base_address+offset*4, ram_base_address+offset*4+3, read32_delegate(*this, FUNC(apollo_state::ram_with_parity_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(ram_base_address+offset*4, ram_base_address+offset*4+3, read32s_delegate(*this, FUNC(apollo_state::ram_with_parity_r)));
parity_error_handler_is_installed = 1;
parity_error_handler_install_counter++;
}
@ -467,7 +467,7 @@ WRITE32_MEMBER(apollo_state::ram_with_parity_w){
DN3000/DN3500 unmapped memory
***************************************************************************/
READ32_MEMBER(apollo_state::apollo_unmapped_r)
uint32_t apollo_state::apollo_unmapped_r(offs_t offset, uint32_t mem_mask)
{
offs_t address = offset * 4;
@ -496,7 +496,7 @@ READ32_MEMBER(apollo_state::apollo_unmapped_r)
return 0xffffffff;
}
WRITE32_MEMBER(apollo_state::apollo_unmapped_w)
void apollo_state::apollo_unmapped_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
SLOG(("unmapped memory dword write to %08x = %08x & %08x", offset * 4, data, mem_mask));
@ -508,7 +508,7 @@ WRITE32_MEMBER(apollo_state::apollo_unmapped_w)
DN3000/DN3500 ROM write
***************************************************************************/
WRITE32_MEMBER(apollo_state::apollo_rom_w)
void apollo_state::apollo_rom_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
offs_t address = offset * 4;
offs_t pc = m_maincpu->pcbase();
@ -524,7 +524,7 @@ WRITE32_MEMBER(apollo_state::apollo_rom_w)
DN3000/DN3500 AT Bus I/O space
***************************************************************************/
READ16_MEMBER(apollo_state::apollo_atbus_io_r)
uint16_t apollo_state::apollo_atbus_io_r(offs_t offset, uint16_t mem_mask)
{
uint32_t isa_addr = (offset & 3) + ((offset & ~0x1ff) >> 7);
@ -536,7 +536,7 @@ READ16_MEMBER(apollo_state::apollo_atbus_io_r)
return data;
}
WRITE16_MEMBER(apollo_state::apollo_atbus_io_w)
void apollo_state::apollo_atbus_io_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
uint32_t isa_addr = (offset & 3) + ((offset & ~0x1ff) >> 7);
@ -550,7 +550,7 @@ WRITE16_MEMBER(apollo_state::apollo_atbus_io_w)
DN3000/DN3500 AT Bus memory space
***************************************************************************/
READ16_MEMBER(apollo_state::apollo_atbus_memory_r)
uint16_t apollo_state::apollo_atbus_memory_r(offs_t offset, uint16_t mem_mask)
{
uint16_t data;
@ -561,7 +561,7 @@ READ16_MEMBER(apollo_state::apollo_atbus_memory_r)
return data;
}
WRITE16_MEMBER(apollo_state::apollo_atbus_memory_w)
void apollo_state::apollo_atbus_memory_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
SLOG2(("apollo_atbus_memory_w at %08x = %04x & %04x", ATBUS_MEMORY_BASE + offset*2, data, mem_mask));
@ -573,7 +573,7 @@ WRITE16_MEMBER(apollo_state::apollo_atbus_memory_w)
DN3000/DN3500 AT Bus unmapped read/write
***************************************************************************/
READ16_MEMBER(apollo_state::apollo_atbus_unmap_io_r)
uint16_t apollo_state::apollo_atbus_unmap_io_r(offs_t offset, uint16_t mem_mask)
{
// ISA bus has 0xff for unmapped addresses
uint16_t data = 0xffff;
@ -582,13 +582,13 @@ READ16_MEMBER(apollo_state::apollo_atbus_unmap_io_r)
return data;
}
WRITE16_MEMBER(apollo_state::apollo_atbus_unmap_io_w)
void apollo_state::apollo_atbus_unmap_io_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
uint32_t isa_addr = (offset & 3) + ((offset & ~0x1ff) >> 7);
SLOG1(("apollo_atbus_unmap_io_w at %08x -> %04x = %04x & %04x", ATBUS_IO_BASE + offset*2, isa_addr*2, data, mem_mask));
}
READ8_MEMBER(apollo_state::apollo_atbus_unmap_r)
uint8_t apollo_state::apollo_atbus_unmap_r(offs_t offset, uint8_t mem_mask)
{
// ISA bus has 0xff for unmapped addresses
uint8_t data = 0xff;
@ -596,7 +596,7 @@ READ8_MEMBER(apollo_state::apollo_atbus_unmap_r)
return data;
}
WRITE8_MEMBER(apollo_state::apollo_atbus_unmap_w)
void apollo_state::apollo_atbus_unmap_w(offs_t offset, uint8_t data, uint8_t mem_mask)
{
SLOG1(("apollo_atbus_unmap_w at %08x = %02x & %02x", ATBUS_MEMORY_BASE + offset, data, mem_mask));
}
@ -606,11 +606,11 @@ WRITE8_MEMBER(apollo_state::apollo_atbus_unmap_w)
Strange: documented but not used
***************************************************************************/
WRITE8_MEMBER(apollo_state::dn5500_memory_present_register_w){
void apollo_state::dn5500_memory_present_register_w(offs_t offset, uint8_t data){
SLOG(("Error: writing DN5500 Memory Present Register at offset %02x = %02x", offset, data));
}
READ8_MEMBER(apollo_state::dn5500_memory_present_register_r){
uint8_t apollo_state::dn5500_memory_present_register_r(offs_t offset){
uint8_t data = DN5500_MEM_PRESENT_BYTE;
SLOG(("reading DN5500 Memory Present Register at offset %02x = %02x", offset, data));
return data;
@ -620,11 +620,11 @@ READ8_MEMBER(apollo_state::dn5500_memory_present_register_r){
DN5500 11500 Registers at 0x11500-0x115ff (undocumented, what does it do?)
***************************************************************************/
WRITE8_MEMBER(apollo_state::dn5500_11500_w){
void apollo_state::dn5500_11500_w(offs_t offset, uint8_t data){
SLOG1(("writing DN5500 11500 at offset %02x = %02x", offset, data));
}
READ8_MEMBER(apollo_state::dn5500_11500_r){
uint8_t apollo_state::dn5500_11500_r(offs_t offset){
uint8_t data = 0xff;
SLOG1(("reading DN5500 11500 at offset %02x = %02x", offset, data));
return data;
@ -634,12 +634,12 @@ READ8_MEMBER(apollo_state::dn5500_11500_r){
DN5500 I/O Protection Map at 0x7000000-0x700FFFF
***************************************************************************/
WRITE8_MEMBER(apollo_state::dn5500_io_protection_map_w){
void apollo_state::dn5500_io_protection_map_w(offs_t offset, uint8_t data){
// TODO
SLOG1(("writing DN5500 I/O Protection Map at offset %02x = %02x", offset, data));
}
READ8_MEMBER(apollo_state::dn5500_io_protection_map_r){
uint8_t apollo_state::dn5500_io_protection_map_r(offs_t offset){
uint8_t data = 0xff;
SLOG1(("reading DN5500 I/O Protection Map at offset %02x = %02x", offset, data));
return data;
@ -650,7 +650,7 @@ READ8_MEMBER(apollo_state::dn5500_io_protection_map_r){
DN3000/DN3500 at f8000000 - ffffffff (used by fpa and/or color7?)
***************************************************************************/
READ32_MEMBER(apollo_state::apollo_f8_r){
uint32_t apollo_state::apollo_f8_r(offs_t offset, uint32_t mem_mask){
offs_t address = 0xf8000000 + offset * 4;
uint32_t data = 0xffffffff;
SLOG2(("unexpected memory dword read from %08x = %08x & %08x",
@ -658,7 +658,7 @@ READ32_MEMBER(apollo_state::apollo_f8_r){
return data;
}
WRITE32_MEMBER(apollo_state::apollo_f8_w){
void apollo_state::apollo_f8_w(offs_t offset, uint32_t data, uint32_t mem_mask){
offs_t address = 0xf8000000 +offset * 4;
SLOG2(("unexpected memory dword write to %08x = %08x & %08x",
@ -916,7 +916,7 @@ void apollo_state::machine_reset()
}
#if 0
m_maincpu->set_instruction_hook(read32_delegate(*this, FUNC(apollo_state::apollo_instruction_hook)));
m_maincpu->set_instruction_hook(read32sm_delegate(*this, FUNC(apollo_state::apollo_instruction_hook)));
#endif
}
@ -954,8 +954,8 @@ void apollo_state::machine_start(){
MACHINE_START_CALL_MEMBER(apollo);
// install nop handlers for unmapped ISA bus addresses
m_isa->install16_device((ATBUS_IO_BASE - 0x40000) >> 7, (ATBUS_IO_END - 0x40000) >> 7, read16_delegate(*this, FUNC(apollo_state::apollo_atbus_unmap_io_r)), write16_delegate(*this, FUNC(apollo_state::apollo_atbus_unmap_io_w)));
m_isa->install_memory(0, ATBUS_MEMORY_END, read8_delegate(*this, FUNC(apollo_state::apollo_atbus_unmap_r)), write8_delegate(*this, FUNC(apollo_state::apollo_atbus_unmap_w)));
m_isa->install16_device((ATBUS_IO_BASE - 0x40000) >> 7, (ATBUS_IO_END - 0x40000) >> 7, read16s_delegate(*this, FUNC(apollo_state::apollo_atbus_unmap_io_r)), write16s_delegate(*this, FUNC(apollo_state::apollo_atbus_unmap_io_w)));
m_isa->install_memory(0, ATBUS_MEMORY_END, read8s_delegate(*this, FUNC(apollo_state::apollo_atbus_unmap_r)), write8s_delegate(*this, FUNC(apollo_state::apollo_atbus_unmap_w)));
}
/***************************************************************************

2
src/mame/drivers/appoooh.cpp
View File

@ -199,7 +199,7 @@ WRITE_LINE_MEMBER(appoooh_state::adpcm_int)
}
/* adpcm address write */
WRITE8_MEMBER(appoooh_state::adpcm_w)
void appoooh_state::adpcm_w(uint8_t data)
{
m_adpcm_address = data << 8;
m_msm->reset_w(0);

18
src/mame/drivers/aquarius.cpp
View File

@ -67,7 +67,7 @@ X-6026 : Roll of paper for the printer
mark cycle. Control must be returned at that time to the cassette routine
in order to maintain data integrity.
*/
READ8_MEMBER(aquarius_state::cassette_r)
uint8_t aquarius_state::cassette_r()
{
return ((m_cassette)->input() < +0.0) ? 0 : 1;
}
@ -78,7 +78,7 @@ READ8_MEMBER(aquarius_state::cassette_r)
will appear on audio output. Sound port is a simple one bit I/O and therefore
it must be toggled at a specific rate under software control.
*/
WRITE8_MEMBER(aquarius_state::cassette_w)
void aquarius_state::cassette_w(uint8_t data)
{
m_speaker->level_w(BIT(data, 0));
m_cassette->output(BIT(data, 0) ? +1.0 : -1.0);
@ -97,7 +97,7 @@ WRITE8_MEMBER(aquarius_state::cassette_w)
+ + +
+++++ +++++++++
*/
READ8_MEMBER(aquarius_state::vsync_r)
uint8_t aquarius_state::vsync_r()
{
return m_screen->vblank() ? 0 : 1;
}
@ -108,7 +108,7 @@ READ8_MEMBER(aquarius_state::vsync_r)
map with the upper 16K. A 1 in this bit indicates swapping. This bit is reset
after power up initialization.
*/
WRITE8_MEMBER(aquarius_state::mapper_w)
void aquarius_state::mapper_w(uint8_t data)
{
}
@ -118,7 +118,7 @@ WRITE8_MEMBER(aquarius_state::mapper_w)
to send status from PRNHASK pin at bit D0. A 1 indicates printer is ready,
0 means not ready.
*/
READ8_MEMBER(aquarius_state::printer_r)
uint8_t aquarius_state::printer_r()
{
return 1; /* ready */
}
@ -130,7 +130,7 @@ READ8_MEMBER(aquarius_state::printer_r)
baudrate is variable. In BASIC this is a 1200 baud printer port for
the 40 column thermal printer.
*/
WRITE8_MEMBER(aquarius_state::printer_w)
void aquarius_state::printer_w(uint8_t data)
{
}
@ -146,7 +146,7 @@ WRITE8_MEMBER(aquarius_state::printer_w)
Therefore the keyboard can be scanned by placing a specific scanning
pattern in (A) or (B) and reading the result returned on rows.
*/
READ8_MEMBER(aquarius_state::keyboard_r)
uint8_t aquarius_state::keyboard_r(offs_t offset)
{
uint8_t result = 0xff;
@ -181,12 +181,12 @@ READ8_MEMBER(aquarius_state::keyboard_r)
routine. For game cartridge the lock pattern is generated from data in the
game cartridge itself.
*/
WRITE8_MEMBER(aquarius_state::scrambler_w)
void aquarius_state::scrambler_w(uint8_t data)
{
m_scrambler = data;
}
READ8_MEMBER(aquarius_state::cartridge_r)
uint8_t aquarius_state::cartridge_r(offs_t offset)
{
uint8_t data = 0;
if (m_cart->exists())

20
src/mame/drivers/arkanoid.cpp
View File

@ -873,13 +873,13 @@ void arkanoid_state::hexa_map(address_map &map)
map(0xe000, 0xe7ff).ram().w(FUNC(arkanoid_state::arkanoid_videoram_w)).share("videoram");
}
READ8_MEMBER(arkanoid_state::hexaa_f000_r)
uint8_t arkanoid_state::hexaa_f000_r()
{
// return m_hexaa_from_sub;
return machine().rand();
}
WRITE8_MEMBER(arkanoid_state::hexaa_f000_w)
void arkanoid_state::hexaa_f000_w(uint8_t data)
{
m_hexaa_from_main = data;
}
@ -904,12 +904,12 @@ void arkanoid_state::hexaa_sub_map(address_map &map)
}
WRITE8_MEMBER(arkanoid_state::hexaa_sub_80_w)
void arkanoid_state::hexaa_sub_80_w(uint8_t data)
{
m_hexaa_from_sub = data;
}
READ8_MEMBER(arkanoid_state::hexaa_sub_90_r)
uint8_t arkanoid_state::hexaa_sub_90_r()
{
return m_hexaa_from_main;
// return machine().rand();
@ -2114,10 +2114,10 @@ ROM_END
void arkanoid_state::arkanoid_bootleg_init()
{
m_maincpu->space(AS_PROGRAM).install_read_handler(0xf000, 0xf000, read8_delegate(*this, FUNC(arkanoid_state::arkanoid_bootleg_f000_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xf002, 0xf002, read8_delegate(*this, FUNC(arkanoid_state::arkanoid_bootleg_f002_r)));
m_maincpu->space(AS_PROGRAM).install_write_handler(0xd018, 0xd018, write8_delegate(*this, FUNC(arkanoid_state::arkanoid_bootleg_d018_w)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xd008, 0xd008, read8_delegate(*this, FUNC(arkanoid_state::arkanoid_bootleg_d008_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xf000, 0xf000, read8smo_delegate(*this, FUNC(arkanoid_state::arkanoid_bootleg_f000_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xf002, 0xf002, read8smo_delegate(*this, FUNC(arkanoid_state::arkanoid_bootleg_f002_r)));
m_maincpu->space(AS_PROGRAM).install_write_handler(0xd018, 0xd018, write8smo_delegate(*this, FUNC(arkanoid_state::arkanoid_bootleg_d018_w)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xd008, 0xd008, read8smo_delegate(*this, FUNC(arkanoid_state::arkanoid_bootleg_d008_r)));
}
void arkanoid_state::init_arkangc()
@ -2195,12 +2195,12 @@ void arkanoid_state::init_tetrsark()
ROM[x] = ROM[x] ^ 0x94;
}
m_maincpu->space(AS_PROGRAM).install_write_handler(0xd008, 0xd008, write8_delegate(*this, FUNC(arkanoid_state::tetrsark_d008_w)));
m_maincpu->space(AS_PROGRAM).install_write_handler(0xd008, 0xd008, write8smo_delegate(*this, FUNC(arkanoid_state::tetrsark_d008_w)));
}
void arkanoid_state::init_tetrsark2()
{
m_maincpu->space(AS_PROGRAM).install_write_handler(0xd008, 0xd008, write8_delegate(*this, FUNC(arkanoid_state::tetrsark_d008_w)));
m_maincpu->space(AS_PROGRAM).install_write_handler(0xd008, 0xd008, write8smo_delegate(*this, FUNC(arkanoid_state::tetrsark_d008_w)));
}

8
src/mame/drivers/artmagic.cpp
View File

@ -98,7 +98,7 @@ void artmagic_state::machine_reset()
*
*************************************/
WRITE16_MEMBER(artmagic_state::control_w)
void artmagic_state::control_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_control[offset]);
@ -133,7 +133,7 @@ void artmagic_state::device_timer(emu_timer &timer, device_timer_id id, int para
}
READ16_MEMBER(artmagic_state::ultennis_hack_r)
uint16_t artmagic_state::ultennis_hack_r()
{
/* IRQ5 points to: jsr (a5); rte */
uint32_t pc = m_maincpu->pc();
@ -377,7 +377,7 @@ READ_LINE_MEMBER(artmagic_state::prot_r)
}
WRITE16_MEMBER(artmagic_state::protection_bit_w)
void artmagic_state::protection_bit_w(offs_t offset, uint16_t data)
{
/* shift in the new bit based on the offset */
m_prot_input[m_prot_input_index] <<= 1;
@ -1157,7 +1157,7 @@ void artmagic_state::init_ultennis()
m_protection_handler = &artmagic_state::ultennis_protection;
/* additional (protection?) hack */
m_maincpu->space(AS_PROGRAM).install_read_handler(0x300000, 0x300001, read16_delegate(*this, FUNC(artmagic_state::ultennis_hack_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0x300000, 0x300001, read16smo_delegate(*this, FUNC(artmagic_state::ultennis_hack_r)));
}

12
src/mame/drivers/asterix.cpp
View File

@ -27,13 +27,13 @@ TODO:
#if 0
READ16_MEMBER(asterix_state::control2_r)
uint16_t asterix_state::control2_r()
{
return m_cur_control2;
}
#endif
WRITE16_MEMBER(asterix_state::control2_w)
void asterix_state::control2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
if (ACCESSING_BITS_0_7)
{
@ -77,13 +77,13 @@ void asterix_state::device_timer(emu_timer &timer, device_timer_id id, int param
}
}
WRITE8_MEMBER(asterix_state::sound_arm_nmi_w)
void asterix_state::sound_arm_nmi_w(uint8_t data)
{
m_audiocpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
timer_set(attotime::from_usec(5), TIMER_NMI);
}
WRITE16_MEMBER(asterix_state::sound_irq_w)
void asterix_state::sound_irq_w(uint16_t data)
{
m_audiocpu->set_input_line(0, HOLD_LINE);
}
@ -92,7 +92,7 @@ WRITE16_MEMBER(asterix_state::sound_irq_w)
// You're not supposed to laugh.
// This emulation is grossly overkill but hey, I'm having fun.
#if 0
WRITE16_MEMBER(asterix_state::protection_w)
void asterix_state::protection_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(m_prot + offset);
@ -130,7 +130,7 @@ WRITE16_MEMBER(asterix_state::protection_w)
}
#endif
WRITE16_MEMBER(asterix_state::protection_w)
void asterix_state::protection_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(m_prot + offset);

6
src/mame/drivers/asteroid.cpp
View File

@ -291,12 +291,12 @@ WRITE_LINE_MEMBER(asteroid_state::coin_counter_right_w)
*
*************************************/
READ8_MEMBER(asteroid_state::earom_read)
uint8_t asteroid_state::earom_read()
{
return m_earom->data();
}
WRITE8_MEMBER(asteroid_state::earom_write)
void asteroid_state::earom_write(offs_t offset, uint8_t data)
{
m_earom->set_address(offset & 0x3f);
m_earom->set_data(data);
@ -1174,7 +1174,7 @@ void asteroid_state::init_asteroidb()
void asteroid_state::init_asterock()
{
m_maincpu->space(AS_PROGRAM).install_read_handler(0x2000, 0x2007, read8_delegate(*this, FUNC(asteroid_state::asterock_IN0_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0x2000, 0x2007, read8sm_delegate(*this, FUNC(asteroid_state::asterock_IN0_r)));
}

28
src/mame/drivers/astrocde.cpp
View File

@ -141,20 +141,20 @@
*
*************************************/
WRITE8_MEMBER(astrocde_state::protected_ram_enable_w)
void astrocde_state::protected_ram_enable_w(uint8_t data)
{
m_ram_write_enable = true;
}
READ8_MEMBER(astrocde_state::protected_ram_r)
uint8_t astrocde_state::protected_ram_r(offs_t offset)
{
m_ram_write_enable = false;
return m_protected_ram ? m_protected_ram[offset] : m_nvram[offset];
}
WRITE8_MEMBER(astrocde_state::protected_ram_w)
void astrocde_state::protected_ram_w(offs_t offset, uint8_t data)
{
if (m_ram_write_enable)
(m_protected_ram ? m_protected_ram : m_nvram)[offset] = data;
@ -169,7 +169,7 @@ WRITE8_MEMBER(astrocde_state::protected_ram_w)
*
*************************************/
WRITE8_MEMBER(seawolf2_state::sound_1_w)// Port 40
void seawolf2_state::sound_1_w(uint8_t data) // Port 40
{
uint8_t rising_bits = data & ~m_port_1_last;
m_port_1_last = data;
@ -183,7 +183,7 @@ WRITE8_MEMBER(seawolf2_state::sound_1_w)// Port 40
}
WRITE8_MEMBER(seawolf2_state::sound_2_w)// Port 41
void seawolf2_state::sound_2_w(uint8_t data) // Port 41
{
uint8_t rising_bits = data & ~m_port_2_last;
m_port_2_last = data;
@ -253,13 +253,13 @@ CUSTOM_INPUT_MEMBER(ebases_state::trackball_r)
}
WRITE8_MEMBER(ebases_state::trackball_select_w)
void ebases_state::trackball_select_w(uint8_t data)
{
m_input_select = data & 3;
}
WRITE8_MEMBER(ebases_state::coin_w)
void ebases_state::coin_w(uint8_t data)
{
machine().bookkeeping().coin_counter_w(0, data & 1);
}
@ -286,7 +286,7 @@ WRITE_LINE_MEMBER(astrocde_state::gorf_sound_switch_w)
*
*************************************/
WRITE8_MEMBER(astrocde_state::demndrgn_banksw_w)
void astrocde_state::demndrgn_banksw_w(uint8_t data)
{
int bank = (data >> 5) & 3;
m_bank4000->set_bank(bank);
@ -304,7 +304,7 @@ CUSTOM_INPUT_MEMBER(demndrgn_state::joystick_r)
}
WRITE8_MEMBER(demndrgn_state::sound_w)
void demndrgn_state::sound_w(uint8_t data)
{
logerror("Trigger sound sample 0x%02x\n",data);
}
@ -318,9 +318,9 @@ WRITE8_MEMBER(demndrgn_state::sound_w)
*************************************/
WRITE8_MEMBER(astrocde_state::profpac_banksw_w)
void astrocde_state::profpac_banksw_w(uint8_t data)
{
demndrgn_banksw_w(space, 0, data);
demndrgn_banksw_w(data);
if (data & 0x80)
{
@ -343,7 +343,7 @@ WRITE8_MEMBER(astrocde_state::profpac_banksw_w)
*
*************************************/
WRITE8_MEMBER(tenpindx_state::lamp_w)
void tenpindx_state::lamp_w(offs_t offset, uint8_t data)
{
/* lamps */
if (offset == 0)
@ -365,14 +365,14 @@ WRITE8_MEMBER(tenpindx_state::lamp_w)
}
WRITE8_MEMBER(tenpindx_state::counter_w)
void tenpindx_state::counter_w(uint8_t data)
{
machine().bookkeeping().coin_counter_w(0, BIT(data, 0));
if (data & 0xfc) osd_printf_debug("tenpindx_counter_w = %02X\n", data);
}
WRITE8_MEMBER(tenpindx_state::lights_w)
void tenpindx_state::lights_w(uint8_t data)
{
/* "flashlights" */
int which = data >> 4;

38
src/mame/drivers/astrof.cpp
View File

@ -81,7 +81,7 @@
*
*************************************/
READ8_MEMBER(astrof_state::irq_clear_r)
uint8_t astrof_state::irq_clear_r()
{
m_maincpu->set_input_line(0, CLEAR_LINE);
@ -270,21 +270,21 @@ void astrof_state::tomahawk_get_pens( pen_t *pens )
}
WRITE8_MEMBER(astrof_state::astrof_videoram_w)
void astrof_state::astrof_videoram_w(offs_t offset, uint8_t data)
{
m_videoram[offset] = data;
m_colorram[offset >> 1] = *m_astrof_color & 0x0e;
}
WRITE8_MEMBER(astrof_state::tomahawk_videoram_w)
void astrof_state::tomahawk_videoram_w(offs_t offset, uint8_t data)
{
m_videoram[offset] = data;
m_colorram[offset >> 1] = (*m_astrof_color & 0x0e) | ((*m_astrof_color & 0x01) << 4);
}
WRITE8_MEMBER(astrof_state::video_control_1_w)
void astrof_state::video_control_1_w(uint8_t data)
{
m_flipscreen = ((data >> 0) & 0x01) & ioport("CAB")->read();
@ -312,7 +312,7 @@ void astrof_state::astrof_set_video_control_2( uint8_t data )
/* D4-D7 - not connected */
}
WRITE8_MEMBER(astrof_state::astrof_video_control_2_w)
void astrof_state::astrof_video_control_2_w(uint8_t data)
{
astrof_set_video_control_2(data);
m_screen->update_partial(m_screen->vpos());
@ -330,7 +330,7 @@ void astrof_state::spfghmk2_set_video_control_2( uint8_t data )
/* D3-D7 - not connected */
}
WRITE8_MEMBER(astrof_state::spfghmk2_video_control_2_w)
void astrof_state::spfghmk2_video_control_2_w(uint8_t data)
{
spfghmk2_set_video_control_2(data);
m_screen->update_partial(m_screen->vpos());
@ -347,7 +347,7 @@ void astrof_state::tomahawk_set_video_control_2( uint8_t data )
m_red_on = (data & 0x08) ? true : false;
}
WRITE8_MEMBER(astrof_state::tomahawk_video_control_2_w)
void astrof_state::tomahawk_video_control_2_w(uint8_t data)
{
tomahawk_set_video_control_2(data);
m_screen->update_partial(m_screen->vpos());
@ -429,28 +429,28 @@ uint32_t astrof_state::screen_update_tomahawk(screen_device &screen, bitmap_rgb3
*
*************************************/
READ8_MEMBER(astrof_state::shoot_r)
uint8_t astrof_state::shoot_r()
{
/* not really sure about this */
return machine().rand() & 8;
}
READ8_MEMBER(astrof_state::abattle_coin_prot_r)
uint8_t astrof_state::abattle_coin_prot_r()
{
m_abattle_count = (m_abattle_count + 1) % 0x0101;
return m_abattle_count ? 0x07 : 0x00;
}
READ8_MEMBER(astrof_state::afire_coin_prot_r)
uint8_t astrof_state::afire_coin_prot_r()
{
m_abattle_count = m_abattle_count ^ 0x01;
return m_abattle_count ? 0x07 : 0x00;
}
READ8_MEMBER(astrof_state::tomahawk_protection_r)
uint8_t astrof_state::tomahawk_protection_r()
{
/* flip the byte */
return bitswap<8>(*m_tomahawk_protection, 0, 1, 2, 3, 4, 5, 6, 7);
@ -1341,8 +1341,8 @@ void astrof_state::init_abattle()
rom[i] = prom[rom[i]];
/* set up protection handlers */
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa003, 0xa003, read8_delegate(*this, FUNC(astrof_state::shoot_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa004, 0xa004, read8_delegate(*this, FUNC(astrof_state::abattle_coin_prot_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa003, 0xa003, read8smo_delegate(*this, FUNC(astrof_state::shoot_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa004, 0xa004, read8smo_delegate(*this, FUNC(astrof_state::abattle_coin_prot_r)));
}
@ -1353,8 +1353,8 @@ void astrof_state::init_afire()
rom[i] = ~rom[i];
/* set up protection handlers */
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa003, 0xa003, read8_delegate(*this, FUNC(astrof_state::shoot_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa004, 0xa004, read8_delegate(*this, FUNC(astrof_state::afire_coin_prot_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa003, 0xa003, read8smo_delegate(*this, FUNC(astrof_state::shoot_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa004, 0xa004, read8smo_delegate(*this, FUNC(astrof_state::afire_coin_prot_r)));
}
@ -1365,15 +1365,15 @@ void astrof_state::init_sstarbtl()
rom[i] = ~rom[i];
/* set up protection handlers */
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa003, 0xa003, read8_delegate(*this, FUNC(astrof_state::shoot_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa004, 0xa004, read8_delegate(*this, FUNC(astrof_state::abattle_coin_prot_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa003, 0xa003, read8smo_delegate(*this, FUNC(astrof_state::shoot_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa004, 0xa004, read8smo_delegate(*this, FUNC(astrof_state::abattle_coin_prot_r)));
}
void astrof_state::init_acombat3()
{
/* set up protection handlers */
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa003, 0xa003, read8_delegate(*this, FUNC(astrof_state::shoot_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa004, 0xa004, read8_delegate(*this, FUNC(astrof_state::abattle_coin_prot_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa003, 0xa003, read8smo_delegate(*this, FUNC(astrof_state::shoot_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xa004, 0xa004, read8smo_delegate(*this, FUNC(astrof_state::abattle_coin_prot_r)));
}

10
src/mame/drivers/atarig1.cpp
View File

@ -48,7 +48,7 @@ void atarig1_state::video_int_ack_w(uint16_t data)
*
*************************************/
WRITE16_MEMBER(atarig1_state::mo_command_w)
void atarig1_state::mo_command_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(m_mo_command);
m_rle->command_write((data == 0 && m_is_pitfight) ? ATARIRLE_COMMAND_CHECKSUM : ATARIRLE_COMMAND_DRAW);
@ -62,14 +62,14 @@ WRITE16_MEMBER(atarig1_state::mo_command_w)
*
*************************************/
WRITE16_MEMBER(atarig1_state::a2d_select_w)
void atarig1_state::a2d_select_w(offs_t offset, uint16_t data)
{
if (m_adc.found())
m_adc->address_offset_start_w(offset, 0);
}
READ16_MEMBER(atarig1_state::a2d_data_r)
uint16_t atarig1_state::a2d_data_r()
{
if (m_adc.found())
return m_adc->data_r() << 8;
@ -113,7 +113,7 @@ void atarig1_state::device_post_load()
}
READ16_MEMBER(atarig1_state::pitfightb_cheap_slapstic_r)
uint16_t atarig1_state::pitfightb_cheap_slapstic_r(offs_t offset)
{
int result = m_bslapstic_base[offset & 0xfff];
@ -143,7 +143,7 @@ READ16_MEMBER(atarig1_state::pitfightb_cheap_slapstic_r)
void atarig1_state::pitfightb_cheap_slapstic_init()
{
/* install a read handler */
m_maincpu->space(AS_PROGRAM).install_read_handler(0x038000, 0x03ffff, read16_delegate(*this, FUNC(atarig1_state::pitfightb_cheap_slapstic_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0x038000, 0x03ffff, read16sm_delegate(*this, FUNC(atarig1_state::pitfightb_cheap_slapstic_r)));
m_bslapstic_base = (uint16_t *)(memregion("maincpu")->base() + 0x38000);
/* allocate memory for a copy of bank 0 */

20
src/mame/drivers/atarig42.cpp
View File

@ -59,14 +59,14 @@ void atarig42_state::machine_start()
*
*************************************/
WRITE8_MEMBER(atarig42_state::a2d_select_w)
void atarig42_state::a2d_select_w(offs_t offset, uint8_t data)
{
if (m_adc.found())
m_adc->address_offset_start_w(offset, 0);
}
READ8_MEMBER(atarig42_state::a2d_data_r)
uint8_t atarig42_state::a2d_data_r(offs_t offset)
{
if (!m_adc.found())
return 0xff;
@ -78,7 +78,7 @@ READ8_MEMBER(atarig42_state::a2d_data_r)
}
WRITE16_MEMBER(atarig42_state::io_latch_w)
void atarig42_state::io_latch_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
/* upper byte */
if (ACCESSING_BITS_8_15)
@ -105,7 +105,7 @@ WRITE16_MEMBER(atarig42_state::io_latch_w)
}
WRITE16_MEMBER(atarig42_state::mo_command_w)
void atarig42_state::mo_command_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(m_mo_command);
m_rle->command_write((data == 0) ? ATARIRLE_COMMAND_CHECKSUM : ATARIRLE_COMMAND_DRAW);
@ -231,7 +231,7 @@ void atarig42_0x200_state::roadriot_sloop_tweak(int offset)
}
READ16_MEMBER(atarig42_0x200_state::roadriot_sloop_data_r)
uint16_t atarig42_0x200_state::roadriot_sloop_data_r(offs_t offset)
{
roadriot_sloop_tweak(offset);
if (offset < 0x78000/2)
@ -241,7 +241,7 @@ READ16_MEMBER(atarig42_0x200_state::roadriot_sloop_data_r)
}
WRITE16_MEMBER(atarig42_0x200_state::roadriot_sloop_data_w)
void atarig42_0x200_state::roadriot_sloop_data_w(offs_t offset, uint16_t data)
{
roadriot_sloop_tweak(offset);
}
@ -288,7 +288,7 @@ void atarig42_0x400_state::guardians_sloop_tweak(int offset)
}
READ16_MEMBER(atarig42_0x400_state::guardians_sloop_data_r)
uint16_t atarig42_0x400_state::guardians_sloop_data_r(offs_t offset)
{
guardians_sloop_tweak(offset);
if (offset < 0x78000/2)
@ -298,7 +298,7 @@ READ16_MEMBER(atarig42_0x400_state::guardians_sloop_data_r)
}
WRITE16_MEMBER(atarig42_0x400_state::guardians_sloop_data_w)
void atarig42_0x400_state::guardians_sloop_data_w(offs_t offset, uint16_t data)
{
guardians_sloop_tweak(offset);
}
@ -825,7 +825,7 @@ void atarig42_0x200_state::init_roadriot()
m_playfield_base = 0x400;
address_space &main = m_maincpu->space(AS_PROGRAM);
main.install_readwrite_handler(0x000000, 0x07ffff, read16_delegate(*this, FUNC(atarig42_0x200_state::roadriot_sloop_data_r)), write16_delegate(*this, FUNC(atarig42_0x200_state::roadriot_sloop_data_w)));
main.install_readwrite_handler(0x000000, 0x07ffff, read16sm_delegate(*this, FUNC(atarig42_0x200_state::roadriot_sloop_data_r)), write16sm_delegate(*this, FUNC(atarig42_0x200_state::roadriot_sloop_data_w)));
m_sloop_base = (uint16_t *)memregion("maincpu")->base();
/*
@ -860,7 +860,7 @@ void atarig42_0x400_state::init_guardian()
*(uint16_t *)&memregion("maincpu")->base()[0x80000] = 0x4E75;
address_space &main = m_maincpu->space(AS_PROGRAM);
main.install_readwrite_handler(0x000000, 0x07ffff, read16_delegate(*this, FUNC(atarig42_0x400_state::guardians_sloop_data_r)), write16_delegate(*this, FUNC(atarig42_0x400_state::guardians_sloop_data_w)));
main.install_readwrite_handler(0x000000, 0x07ffff, read16sm_delegate(*this, FUNC(atarig42_0x400_state::guardians_sloop_data_r)), write16sm_delegate(*this, FUNC(atarig42_0x400_state::guardians_sloop_data_w)));
m_sloop_base = (uint16_t *)memregion("maincpu")->base();
/*

24
src/mame/drivers/atarigt.cpp
View File

@ -137,7 +137,7 @@ void atarigt_state::cage_irq_callback(uint8_t data)
*
*************************************/
READ32_MEMBER(atarigt_state::special_port2_r)
uint32_t atarigt_state::special_port2_r()
{
int temp = m_service_io->read();
temp ^= 0x0001; /* /A2DRDY always high for now */
@ -145,7 +145,7 @@ READ32_MEMBER(atarigt_state::special_port2_r)
}
READ32_MEMBER(atarigt_state::special_port3_r)
uint32_t atarigt_state::special_port3_r()
{
int temp = m_coin_io->read();
if (m_video_int_state) temp ^= 0x0001;
@ -187,7 +187,7 @@ inline void atarigt_state::compute_fake_pots(int *pots)
}
READ8_MEMBER(atarigt_state::analog_port_r)
uint8_t atarigt_state::analog_port_r(offs_t offset)
{
if (!m_adc.found())
return 0xff;
@ -224,7 +224,7 @@ READ8_MEMBER(atarigt_state::analog_port_r)
*
*************************************/
WRITE32_MEMBER(atarigt_state::latch_w)
void atarigt_state::latch_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
/*
D13 = 68.DISA
@ -253,7 +253,7 @@ WRITE32_MEMBER(atarigt_state::latch_w)
}
WRITE32_MEMBER(atarigt_state::mo_command_w)
void atarigt_state::mo_command_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(m_mo_command);
if (ACCESSING_BITS_0_15)
@ -261,7 +261,7 @@ WRITE32_MEMBER(atarigt_state::mo_command_w)
}
WRITE32_MEMBER(atarigt_state::led_w)
void atarigt_state::led_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
// logerror("LED = %08X & %08X\n", data, mem_mask);
}
@ -274,7 +274,7 @@ WRITE32_MEMBER(atarigt_state::led_w)
*
*************************************/
READ32_MEMBER(atarigt_state::sound_data_r)
uint32_t atarigt_state::sound_data_r(offs_t offset, uint32_t mem_mask)
{
uint32_t result = 0;
@ -286,7 +286,7 @@ READ32_MEMBER(atarigt_state::sound_data_r)
}
WRITE32_MEMBER(atarigt_state::sound_data_w)
void atarigt_state::sound_data_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
if (ACCESSING_BITS_0_15)
m_cage->control_w(data);
@ -584,7 +584,7 @@ if (LOG_PROTECTION)
*
*************************************/
READ32_MEMBER(atarigt_state::colorram_protection_r)
uint32_t atarigt_state::colorram_protection_r(address_space &space, offs_t offset, uint32_t mem_mask)
{
offs_t address = 0xd80000 + offset * 4;
uint32_t result32 = 0;
@ -607,7 +607,7 @@ READ32_MEMBER(atarigt_state::colorram_protection_r)
}
WRITE32_MEMBER(atarigt_state::colorram_protection_w)
void atarigt_state::colorram_protection_w(address_space &space, offs_t offset, uint32_t data, uint32_t mem_mask)
{
offs_t address = 0xd80000 + offset * 4;
@ -1325,7 +1325,7 @@ ROM_END
*
*************************************/
WRITE32_MEMBER(atarigt_state::tmek_pf_w)
void atarigt_state::tmek_pf_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
offs_t pc = m_maincpu->pc();
@ -1353,7 +1353,7 @@ void atarigt_state::init_tmek()
m_protection_w = &atarigt_state::tmek_protection_w;
/* temp hack */
m_maincpu->space(AS_PROGRAM).install_write_handler(0xd72000, 0xd75fff, write32_delegate(*this, FUNC(atarigt_state::tmek_pf_w)));
m_maincpu->space(AS_PROGRAM).install_write_handler(0xd72000, 0xd75fff, write32s_delegate(*this, FUNC(atarigt_state::tmek_pf_w)));
}

27
src/mame/drivers/atarigx2.cpp
View File

@ -54,14 +54,14 @@ void atarigx2_state::video_int_ack_w(uint32_t data)
*
*************************************/
READ32_MEMBER(atarigx2_state::special_port2_r)
uint32_t atarigx2_state::special_port2_r()
{
int temp = ioport("SERVICE")->read();
return (temp << 16) | temp;
}
READ32_MEMBER(atarigx2_state::special_port3_r)
uint32_t atarigx2_state::special_port3_r()
{
int temp = ioport("SPECIAL")->read();
return (temp << 16) | temp;
@ -69,7 +69,7 @@ READ32_MEMBER(atarigx2_state::special_port3_r)
READ8_MEMBER(atarigx2_state::a2d_data_r)
uint8_t atarigx2_state::a2d_data_r(offs_t offset)
{
uint8_t result = m_adc->data_r();
if (!machine().side_effects_disabled())
@ -78,7 +78,7 @@ READ8_MEMBER(atarigx2_state::a2d_data_r)
}
WRITE32_MEMBER(atarigx2_state::latch_w)
void atarigx2_state::latch_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
/*
D13 = 68.DISA
@ -106,7 +106,7 @@ WRITE32_MEMBER(atarigx2_state::latch_w)
}
WRITE32_MEMBER(atarigx2_state::mo_command_w)
void atarigx2_state::mo_command_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
COMBINE_DATA(m_mo_command);
if (ACCESSING_BITS_0_15)
@ -123,7 +123,7 @@ WRITE32_MEMBER(atarigx2_state::mo_command_w)
/* Note: Will all eventually be handled in machine/atarixga.cpp */
WRITE32_MEMBER(atarigx2_state::atarigx2_protection_w)
void atarigx2_state::atarigx2_protection_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
{
int pc = m_maincpu->pcbase();
@ -200,7 +200,7 @@ uint32_t ftest4(uint32_t num)
*********************/
READ32_MEMBER(atarigx2_state::atarigx2_protection_r)
uint32_t atarigx2_state::atarigx2_protection_r(offs_t offset, uint32_t mem_mask)
{
static const uint32_t lookup_table[][2] =
{
@ -1168,7 +1168,7 @@ READ32_MEMBER(atarigx2_state::atarigx2_protection_r)
}
READ32_MEMBER( atarigx2_state::rrreveng_prot_r )
uint32_t atarigx2_state::rrreveng_prot_r()
{
return 0;
}
@ -2258,8 +2258,9 @@ void atarigx2_state::init_spclords()
{
m_playfield_base = 0x000;
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xc80f00, 0xc80fff, read32_delegate(downcast<atari_136095_0072_device &>(*m_xga), FUNC(atari_136095_0072_device::polylsb_read)), write32_delegate(downcast<atari_136095_0072_device &>(*m_xga), FUNC(atari_136095_0072_device::polylsb_write)));
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xca0000, 0xca0fff, read32_delegate(*m_xga, FUNC(atari_xga_device::read)), write32_delegate(*m_xga, FUNC(atari_xga_device::write)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xc80f00, 0xc80fff, read32s_delegate(downcast<atari_136095_0072_device &>(*m_xga), FUNC(atari_136095_0072_device::polylsb_read)));
m_maincpu->space(AS_PROGRAM).install_write_handler(0xc80f00, 0xc80fff, write32sm_delegate(downcast<atari_136095_0072_device &>(*m_xga), FUNC(atari_136095_0072_device::polylsb_write)));
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xca0000, 0xca0fff, read32s_delegate(*m_xga, FUNC(atari_xga_device::read)), write32s_delegate(*m_xga, FUNC(atari_xga_device::write)));
}
@ -2288,15 +2289,15 @@ XMEM=68.A23*E.A22*!E.A21*68.A20 = 1101 xxxx = d0
+68.A23*E.A22*!E.A21*!68.A20*68.A19 = 1100 1xxx = c80000-cfffff
+!68.A23*!E.A22*!E.A21 = 000x xxxx = 000000-1fffff
*/
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xca0000, 0xca0fff, read32_delegate(*m_xga, FUNC(atari_xga_device::read)), write32_delegate(*m_xga, FUNC(atari_xga_device::write)));
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xca0000, 0xca0fff, read32s_delegate(*m_xga, FUNC(atari_xga_device::read)), write32s_delegate(*m_xga, FUNC(atari_xga_device::write)));
}
void atarigx2_state::init_rrreveng()
{
m_playfield_base = 0x000;
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xca0000, 0xca0fff, read32_delegate(*this, FUNC(atarigx2_state::atarigx2_protection_r)), write32_delegate(*this, FUNC(atarigx2_state::atarigx2_protection_w)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xca0fc0, 0xca0fc3, read32_delegate(*this, FUNC(atarigx2_state::rrreveng_prot_r)));
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0xca0000, 0xca0fff, read32s_delegate(*this, FUNC(atarigx2_state::atarigx2_protection_r)), write32s_delegate(*this, FUNC(atarigx2_state::atarigx2_protection_w)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xca0fc0, 0xca0fc3, read32smo_delegate(*this, FUNC(atarigx2_state::rrreveng_prot_r)));
}

58
src/mame/drivers/atarist.cpp
View File

@ -242,7 +242,7 @@ void st_state::fdc_dma_transfer()
// fdc_data_r -
//-------------------------------------------------
READ16_MEMBER( st_state::fdc_data_r )
uint16_t st_state::fdc_data_r(offs_t offset)
{
uint8_t data = 0;
@ -274,7 +274,7 @@ READ16_MEMBER( st_state::fdc_data_r )
// fdc_data_w -
//-------------------------------------------------
WRITE16_MEMBER( st_state::fdc_data_w )
void st_state::fdc_data_w(offs_t offset, uint16_t data)
{
if (m_fdc_mode & DMA_MODE_SECTOR_COUNT)
{
@ -316,7 +316,7 @@ WRITE16_MEMBER( st_state::fdc_data_w )
// dma_status_r -
//-------------------------------------------------
READ16_MEMBER( st_state::dma_status_r )
uint16_t st_state::dma_status_r()
{
uint16_t data = 0;
@ -337,7 +337,7 @@ READ16_MEMBER( st_state::dma_status_r )
// dma_mode_w -
//-------------------------------------------------
WRITE16_MEMBER( st_state::dma_mode_w )
void st_state::dma_mode_w(uint16_t data)
{
if (LOG) logerror("DMA Mode %04x\n", data);
@ -360,7 +360,7 @@ WRITE16_MEMBER( st_state::dma_mode_w )
// dma_counter_r -
//-------------------------------------------------
READ8_MEMBER( st_state::dma_counter_r )
uint8_t st_state::dma_counter_r(offs_t offset)
{
uint8_t data = 0;
@ -385,7 +385,7 @@ READ8_MEMBER( st_state::dma_counter_r )
// dma_base_w -
//-------------------------------------------------
WRITE8_MEMBER( st_state::dma_base_w )
void st_state::dma_base_w(offs_t offset, uint8_t data)
{
switch (offset)
{
@ -416,7 +416,7 @@ WRITE8_MEMBER( st_state::dma_base_w )
// mmu_r -
//-------------------------------------------------
READ8_MEMBER( st_state::mmu_r )
uint8_t st_state::mmu_r()
{
return m_mmu;
}
@ -426,7 +426,7 @@ READ8_MEMBER( st_state::mmu_r )
// mmu_w -
//-------------------------------------------------
WRITE8_MEMBER( st_state::mmu_w )
void st_state::mmu_w(uint8_t data)
{
if (LOG) logerror("Memory Configuration Register: %02x\n", data);
@ -434,13 +434,13 @@ WRITE8_MEMBER( st_state::mmu_w )
}
WRITE16_MEMBER( st_state::berr_w )
void st_state::berr_w(uint16_t data)
{
m_maincpu->set_input_line(M68K_LINE_BUSERROR, ASSERT_LINE);
m_maincpu->set_input_line(M68K_LINE_BUSERROR, CLEAR_LINE);
}
READ16_MEMBER( st_state::berr_r )
uint16_t st_state::berr_r()
{
if (!machine().side_effects_disabled())
{
@ -712,14 +712,14 @@ void st_state::ikbd_port4_w(uint8_t data)
// fpu_r -
//-------------------------------------------------
READ16_MEMBER( megast_state::fpu_r )
uint16_t megast_state::fpu_r()
{
// HACK diagnostic cartridge wants to see this value
return 0x0802;
}
WRITE16_MEMBER( megast_state::fpu_w )
void megast_state::fpu_w(uint16_t data)
{
}
@ -845,7 +845,7 @@ void ste_state::device_timer(emu_timer &timer, device_timer_id id, int param, vo
// sound_dma_control_r -
//-------------------------------------------------
READ8_MEMBER( ste_state::sound_dma_control_r )
uint8_t ste_state::sound_dma_control_r()
{
return m_dmasnd_ctrl;
}
@ -855,7 +855,7 @@ READ8_MEMBER( ste_state::sound_dma_control_r )
// sound_dma_base_r -
//-------------------------------------------------
READ8_MEMBER( ste_state::sound_dma_base_r )
uint8_t ste_state::sound_dma_base_r(offs_t offset)
{
uint8_t data = 0;
@ -882,7 +882,7 @@ READ8_MEMBER( ste_state::sound_dma_base_r )
// sound_dma_counter_r -
//-------------------------------------------------
READ8_MEMBER( ste_state::sound_dma_counter_r )
uint8_t ste_state::sound_dma_counter_r(offs_t offset)
{
uint8_t data = 0;
@ -909,7 +909,7 @@ READ8_MEMBER( ste_state::sound_dma_counter_r )
// sound_dma_end_r -
//-------------------------------------------------
READ8_MEMBER( ste_state::sound_dma_end_r )
uint8_t ste_state::sound_dma_end_r(offs_t offset)
{
uint8_t data = 0;
@ -936,7 +936,7 @@ READ8_MEMBER( ste_state::sound_dma_end_r )
// sound_mode_r -
//-------------------------------------------------
READ8_MEMBER( ste_state::sound_mode_r )
uint8_t ste_state::sound_mode_r()
{
return m_dmasnd_mode;
}
@ -946,7 +946,7 @@ READ8_MEMBER( ste_state::sound_mode_r )
// sound_dma_control_w -
//-------------------------------------------------
WRITE8_MEMBER( ste_state::sound_dma_control_w )
void ste_state::sound_dma_control_w(uint8_t data)
{
m_dmasnd_ctrl = data & 0x03;
@ -970,7 +970,7 @@ WRITE8_MEMBER( ste_state::sound_dma_control_w )
// sound_dma_base_w -
//-------------------------------------------------
WRITE8_MEMBER( ste_state::sound_dma_base_w )
void ste_state::sound_dma_base_w(offs_t offset, uint8_t data)
{
switch (offset)
{
@ -996,7 +996,7 @@ WRITE8_MEMBER( ste_state::sound_dma_base_w )
// sound_dma_end_w -
//-------------------------------------------------
WRITE8_MEMBER( ste_state::sound_dma_end_w )
void ste_state::sound_dma_end_w(offs_t offset, uint8_t data)
{
switch (offset)
{
@ -1022,7 +1022,7 @@ WRITE8_MEMBER( ste_state::sound_dma_end_w )
// sound_mode_w -
//-------------------------------------------------
WRITE8_MEMBER( ste_state::sound_mode_w )
void ste_state::sound_mode_w(uint8_t data)
{
m_dmasnd_mode = data & 0x83;
}
@ -1084,7 +1084,7 @@ void ste_state::microwire_tick()
// microwire_data_r -
//-------------------------------------------------
READ16_MEMBER( ste_state::microwire_data_r )
uint16_t ste_state::microwire_data_r()
{
return m_mw_data;
}
@ -1094,7 +1094,7 @@ READ16_MEMBER( ste_state::microwire_data_r )
// microwire_data_w -
//-------------------------------------------------
WRITE16_MEMBER( ste_state::microwire_data_w )
void ste_state::microwire_data_w(uint16_t data)
{
if (!m_microwire_timer->enabled())
{
@ -1108,7 +1108,7 @@ WRITE16_MEMBER( ste_state::microwire_data_w )
// microwire_mask_r -
//-------------------------------------------------
READ16_MEMBER( ste_state::microwire_mask_r )
uint16_t ste_state::microwire_mask_r()
{
return m_mw_mask;
}
@ -1118,7 +1118,7 @@ READ16_MEMBER( ste_state::microwire_mask_r )
// microwire_mask_w -
//-------------------------------------------------
WRITE16_MEMBER( ste_state::microwire_mask_w )
void ste_state::microwire_mask_w(uint16_t data)
{
if (!m_microwire_timer->enabled())
{
@ -1136,7 +1136,7 @@ WRITE16_MEMBER( ste_state::microwire_mask_w )
// cache_r -
//-------------------------------------------------
READ16_MEMBER( megaste_state::cache_r )
uint16_t megaste_state::cache_r()
{
return m_cache;
}
@ -1146,7 +1146,7 @@ READ16_MEMBER( megaste_state::cache_r )
// cache_w -
//-------------------------------------------------
WRITE16_MEMBER( megaste_state::cache_w )
void megaste_state::cache_w(uint16_t data)
{
m_cache = data;
@ -1163,7 +1163,7 @@ WRITE16_MEMBER( megaste_state::cache_w )
// config_r -
//-------------------------------------------------
READ16_MEMBER( stbook_state::config_r )
uint16_t stbook_state::config_r()
{
/*
@ -1196,7 +1196,7 @@ READ16_MEMBER( stbook_state::config_r )
// lcd_control_w -
//-------------------------------------------------
WRITE16_MEMBER( stbook_state::lcd_control_w )
void stbook_state::lcd_control_w(uint16_t data)
{
/*

6
src/mame/drivers/atetris.cpp
View File

@ -85,7 +85,7 @@ TIMER_CALLBACK_MEMBER(atetris_state::interrupt_gen)
}
WRITE8_MEMBER(atetris_state::irq_ack_w)
void atetris_state::irq_ack_w(uint8_t data)
{
m_maincpu->set_input_line(0, CLEAR_LINE);
}
@ -134,7 +134,7 @@ void atetris_state::machine_reset()
*
*************************************/
READ8_MEMBER(atetris_state::slapstic_r)
uint8_t atetris_state::slapstic_r(address_space &space, offs_t offset)
{
int result = m_slapstic_base[0x2000 + offset];
int new_bank = m_slapstic->slapstic_tweak(space, offset) & 1;
@ -156,7 +156,7 @@ READ8_MEMBER(atetris_state::slapstic_r)
*
*************************************/
WRITE8_MEMBER(atetris_state::coincount_w)
void atetris_state::coincount_w(uint8_t data)
{
machine().bookkeeping().coin_counter_w(0, (data >> 5) & 1);
machine().bookkeeping().coin_counter_w(1, (data >> 4) & 1);

22
src/mame/drivers/aussiebyte.cpp
View File

@ -97,7 +97,7 @@ INPUT_PORTS_END
I/O Ports
************************************************************/
WRITE8_MEMBER( aussiebyte_state::port15_w )
void aussiebyte_state::port15_w(uint8_t data)
{
membank("bankr0")->set_entry(m_port15); // point at ram
m_port15 = true;
@ -115,7 +115,7 @@ WRITE8_MEMBER( aussiebyte_state::port15_w )
5 Disable 5.25 inch floppy spindle motors.
6 Unused.
7 Enable write precompensation on WD2797 controller. */
WRITE8_MEMBER( aussiebyte_state::port16_w )
void aussiebyte_state::port16_w(uint8_t data)
{
floppy_image_device *m_floppy = nullptr;
if ((data & 15) == 0)
@ -142,7 +142,7 @@ WRITE8_MEMBER( aussiebyte_state::port16_w )
5 - SIO Ch D
6 - Ext ready 1
7 - Ext ready 2 */
WRITE8_MEMBER( aussiebyte_state::port17_w )
void aussiebyte_state::port17_w(uint8_t data)
{
m_port17 = data & 7;
m_dma->rdy_w(BIT(m_port17_rdy, data));
@ -151,19 +151,19 @@ WRITE8_MEMBER( aussiebyte_state::port17_w )
/* FDC params
2 EXC: WD2797 clock frequency. H = 5.25"; L = 8"
3 WIEN: WD2797 Double density select. */
WRITE8_MEMBER( aussiebyte_state::port18_w )
void aussiebyte_state::port18_w(uint8_t data)
{
m_fdc->set_unscaled_clock(BIT(data, 2) ? 1e6 : 2e6);
m_fdc->dden_w(BIT(data, 3));
}
READ8_MEMBER( aussiebyte_state::port19_r )
uint8_t aussiebyte_state::port19_r()
{
return m_port19;
}
// Memory banking
WRITE8_MEMBER( aussiebyte_state::port1a_w )
void aussiebyte_state::port1a_w(uint8_t data)
{
data &= 7;
switch (data)
@ -208,12 +208,12 @@ WRITE8_MEMBER( aussiebyte_state::port1a_w )
}
// Winchester control
WRITE8_MEMBER( aussiebyte_state::port1b_w )
void aussiebyte_state::port1b_w(uint8_t data)
{
}
// GPEHB control
WRITE8_MEMBER( aussiebyte_state::port1c_w )
void aussiebyte_state::port1c_w(uint8_t data)
{
}
@ -224,7 +224,7 @@ void aussiebyte_state::port20_w(uint8_t data)
m_rtc->hold_w(BIT(data, 0));
}
READ8_MEMBER( aussiebyte_state::port28_r )
uint8_t aussiebyte_state::port28_r()
{
return m_port28;
}
@ -234,7 +234,7 @@ READ8_MEMBER( aussiebyte_state::port28_r )
RTC
************************************************************/
READ8_MEMBER( aussiebyte_state::rtc_r )
uint8_t aussiebyte_state::rtc_r(offs_t offset)
{
m_rtc->read_w(1);
m_rtc->address_w(offset);
@ -243,7 +243,7 @@ READ8_MEMBER( aussiebyte_state::rtc_r )
return data;
}
WRITE8_MEMBER( aussiebyte_state::rtc_w )
void aussiebyte_state::rtc_w(offs_t offset, uint8_t data)
{
m_rtc->address_w(offset);
m_rtc->data_w(data);

2
src/mame/drivers/avalnche.cpp
View File

@ -89,7 +89,7 @@ WRITE_LINE_MEMBER(avalnche_state::video_invert_w)
m_avalance_video_inverted = state;
}
WRITE8_MEMBER(avalnche_state::catch_coin_counter_w)
void avalnche_state::catch_coin_counter_w(uint8_t data)
{
machine().bookkeeping().coin_counter_w(0, data & 1);
machine().bookkeeping().coin_counter_w(1, data & 2);

28
src/mame/drivers/avigo.cpp
View File

@ -186,7 +186,7 @@ void avigo_state::avigo_mem(address_map &map)
}
READ8_MEMBER(avigo_state::key_data_read_r)
uint8_t avigo_state::key_data_read_r()
{
uint8_t data = 0x0f;
@ -217,7 +217,7 @@ READ8_MEMBER(avigo_state::key_data_read_r)
/* set key line(s) to read */
/* bit 0 set for line 0, bit 1 set for line 1, bit 2 set for line 2 */
WRITE8_MEMBER(avigo_state::set_key_line_w)
void avigo_state::set_key_line_w(uint8_t data)
{
/* 5, 101, read back 3 */
m_key_line = data;
@ -225,19 +225,19 @@ WRITE8_MEMBER(avigo_state::set_key_line_w)
m_warm_start = BIT(data, 3);
}
READ8_MEMBER(avigo_state::irq_r)
uint8_t avigo_state::irq_r()
{
return m_irq;
}
WRITE8_MEMBER(avigo_state::irq_w)
void avigo_state::irq_w(uint8_t data)
{
m_irq &= data;
refresh_ints();
}
WRITE8_MEMBER(avigo_state::port2_w)
void avigo_state::port2_w(uint8_t data)
{
/*
bit 4 LCD backlight on/off
@ -250,17 +250,17 @@ WRITE8_MEMBER(avigo_state::port2_w)
m_port2 = data;
}
READ8_MEMBER(avigo_state::bank1_r)
uint8_t avigo_state::bank1_r(offs_t offset)
{
return offset ? m_bank1_h: m_bank1_l;
}
READ8_MEMBER(avigo_state::bank2_r)
uint8_t avigo_state::bank2_r(offs_t offset)
{
return offset ? m_bank2_h: m_bank2_l;
}
WRITE8_MEMBER(avigo_state::bank1_w)
void avigo_state::bank1_w(offs_t offset, uint8_t data)
{
if (offset)
{
@ -276,7 +276,7 @@ WRITE8_MEMBER(avigo_state::bank1_w)
m_bankdev1->set_bank(((m_bank1_h & 0x07) << 8) | m_bank1_l);
}
WRITE8_MEMBER(avigo_state::bank2_w)
void avigo_state::bank2_w(offs_t offset, uint8_t data)
{
if (offset)
{
@ -292,14 +292,14 @@ WRITE8_MEMBER(avigo_state::bank2_w)
m_bankdev2->set_bank(((m_bank2_h & 0x07) << 8) | m_bank2_l);
}
READ8_MEMBER(avigo_state::ad_control_status_r)
uint8_t avigo_state::ad_control_status_r()
{
LOG(("avigo ad control read %02x\n", (int) m_ad_control_status));
return m_ad_control_status;
}
WRITE8_MEMBER(avigo_state::ad_control_status_w)
void avigo_state::ad_control_status_w(uint8_t data)
{
LOG(("avigo ad control w %02x\n",data));
@ -375,7 +375,7 @@ WRITE8_MEMBER(avigo_state::ad_control_status_w)
m_ad_control_status = data | 1;
}
READ8_MEMBER(avigo_state::ad_data_r)
uint8_t avigo_state::ad_data_r()
{
uint8_t data = 0;
@ -477,7 +477,7 @@ READ8_MEMBER(avigo_state::ad_data_r)
}
WRITE8_MEMBER(avigo_state::speaker_w)
void avigo_state::speaker_w(uint8_t data)
{
/* Speaker output state */
m_speaker->level_w(BIT(data, 3));
@ -490,7 +490,7 @@ WRITE8_MEMBER(avigo_state::speaker_w)
/* port 0x029:
port 0x02e */
READ8_MEMBER(avigo_state::port_04_r)
uint8_t avigo_state::port_04_r()
{
/* must be both 0 for it to boot! */
return 0x0ff^((1<<7) | (1<<5));

2
src/mame/drivers/aztarac.cpp
View File

@ -63,7 +63,7 @@ void aztarac_state::nvram_store_w(uint16_t data)
*
*************************************/
READ16_MEMBER(aztarac_state::joystick_r)
uint16_t aztarac_state::joystick_r()
{
return (((ioport("STICKZ")->read() - 0xf) << 8) |
((ioport("STICKY")->read() - 0xf) & 0xff));

2
src/mame/drivers/badlands.cpp
View File

@ -226,7 +226,7 @@ INTERRUPT_GEN_MEMBER(badlands_state::vblank_int)
m_maincpu->set_input_line(M68K_IRQ_1, ASSERT_LINE);
}
WRITE16_MEMBER(badlands_state::video_int_ack_w)
void badlands_state::video_int_ack_w(uint16_t data)
{
m_maincpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
}

10
src/mame/drivers/badlandsbl.cpp
View File

@ -76,23 +76,23 @@ uint32_t badlandsbl_state::screen_update_badlandsbl(screen_device &screen, bitma
}
READ16_MEMBER(badlandsbl_state::badlandsb_unk_r)
uint16_t badlandsbl_state::badlandsb_unk_r()
{
return 0xffff;
}
// TODO: this prolly mimics audio_io_r/_w in original version
READ8_MEMBER(badlandsbl_state::bootleg_shared_r)
uint8_t badlandsbl_state::bootleg_shared_r(offs_t offset)
{
return m_b_sharedram[offset];
}
WRITE8_MEMBER(badlandsbl_state::bootleg_shared_w)
void badlandsbl_state::bootleg_shared_w(offs_t offset, uint8_t data)
{
m_b_sharedram[offset] = data;
}
READ8_MEMBER(badlandsbl_state::sound_response_r)
uint8_t badlandsbl_state::sound_response_r()
{
m_maincpu->set_input_line(2, CLEAR_LINE);
return m_sound_response;
@ -127,7 +127,7 @@ void badlandsbl_state::bootleg_map(address_map &map)
map(0xfff000, 0xffffff).ram();
}
WRITE8_MEMBER(badlandsbl_state::bootleg_main_irq_w)
void badlandsbl_state::bootleg_main_irq_w(uint8_t data)
{
m_maincpu->set_input_line(2, ASSERT_LINE);
m_sound_response = data;

4
src/mame/drivers/bagman.cpp
View File

@ -89,9 +89,9 @@ void squaitsa_state::machine_start()
}
WRITE8_MEMBER(bagman_state::ls259_w)
void bagman_state::ls259_w(offs_t offset, uint8_t data)
{
pal16r6_w(space, offset,data); /*this is just a simulation*/
pal16r6_w(offset, data); /*this is just a simulation*/
if (m_tmslatch.found())
m_tmslatch->write_bit(offset, data & 1);

2
src/mame/drivers/batman.cpp
View File

@ -49,7 +49,7 @@ void batman_state::machine_start()
*
*************************************/
WRITE16_MEMBER(batman_state::latch_w)
void batman_state::latch_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
int oldword = m_latch_data;
COMBINE_DATA(&m_latch_data);

2
src/mame/drivers/battlane.cpp
View File

@ -27,7 +27,7 @@
*
*************************************/
WRITE8_MEMBER(battlane_state::battlane_cpu_command_w)
void battlane_state::battlane_cpu_command_w(uint8_t data)
{
m_cpu_control = data;

4
src/mame/drivers/battlnts.cpp
View File

@ -37,12 +37,12 @@ WRITE_LINE_MEMBER(battlnts_state::vblank_irq)
m_maincpu->set_input_line(HD6309_IRQ_LINE, HOLD_LINE);
}
WRITE8_MEMBER(battlnts_state::battlnts_sh_irqtrigger_w)
void battlnts_state::battlnts_sh_irqtrigger_w(uint8_t data)
{
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
}
WRITE8_MEMBER(battlnts_state::battlnts_bankswitch_w)
void battlnts_state::battlnts_bankswitch_w(uint8_t data)
{
/* bits 6 & 7 = bank number */
m_rombank->set_entry((data & 0xc0) >> 6);

14
src/mame/drivers/bbusters.cpp
View File

@ -249,32 +249,32 @@ void bbusters_state::machine_start()
bbusters_state_base::machine_start();
}
WRITE8_MEMBER(bbusters_state_base::sound_cpu_w)
void bbusters_state_base::sound_cpu_w(uint8_t data)
{
m_soundlatch[0]->write(data&0xff);
m_audiocpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
}
/* Eprom is byte wide, top half of word _must_ be 0xff */
READ16_MEMBER(bbusters_state::eprom_r)
uint16_t bbusters_state::eprom_r(offs_t offset)
{
return (m_eprom_data[offset]&0xff) | 0xff00;
}
WRITE16_MEMBER(bbusters_state::three_gun_output_w)
void bbusters_state::three_gun_output_w(uint16_t data)
{
for (int i = 0; i < 3; i++)
m_gun_recoil[i] = BIT(data, i);
}
template<int Layer>
WRITE16_MEMBER(bbusters_state_base::pf_w)
void bbusters_state_base::pf_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_pf_data[Layer][offset]);
m_pf_tilemap[Layer]->mark_tile_dirty(offset);
}
WRITE8_MEMBER(bbusters_state_base::coin_counter_w)
void bbusters_state_base::coin_counter_w(uint8_t data)
{
machine().bookkeeping().coin_counter_w(0, BIT(data, 0));
machine().bookkeeping().coin_counter_w(1, BIT(data, 1));
@ -312,13 +312,13 @@ void bbusters_state::bbusters_map(address_map &map)
/*******************************************************************************/
WRITE16_MEMBER(mechatt_state::two_gun_output_w)
void mechatt_state::two_gun_output_w(uint16_t data)
{
for (int i = 0; i < 2; i++)
m_gun_recoil[i] = BIT(data, i);
}
READ16_MEMBER(mechatt_state::mechatt_gun_r)
uint16_t mechatt_state::mechatt_gun_r(offs_t offset)
{
int x, y;

8
src/mame/drivers/beathead.cpp
View File

@ -187,7 +187,7 @@ void beathead_state::update_interrupts()
}
WRITE32_MEMBER( beathead_state::interrupt_control_w )
void beathead_state::interrupt_control_w(offs_t offset, uint32_t data)
{
int irq = offset & 3;
int control = (offset >> 2) & 1;
@ -205,7 +205,7 @@ WRITE32_MEMBER( beathead_state::interrupt_control_w )
}
READ32_MEMBER( beathead_state::interrupt_control_r )
uint32_t beathead_state::interrupt_control_r()
{
/* return the enables as a bitfield */
return (m_irq_enable[0]) | (m_irq_enable[1] << 1) | (m_irq_enable[2] << 2);
@ -219,7 +219,7 @@ READ32_MEMBER( beathead_state::interrupt_control_r )
*
*************************************/
WRITE32_MEMBER( beathead_state::sound_reset_w )
void beathead_state::sound_reset_w(offs_t offset, uint32_t data)
{
logerror("Sound reset = %d\n", !offset);
m_jsa->soundcpu().set_input_line(INPUT_LINE_RESET, offset ? CLEAR_LINE : ASSERT_LINE);
@ -233,7 +233,7 @@ WRITE32_MEMBER( beathead_state::sound_reset_w )
*
*************************************/
WRITE32_MEMBER( beathead_state::coin_count_w )
void beathead_state::coin_count_w(offs_t offset, uint32_t data)
{
machine().bookkeeping().coin_counter_w(0, !offset);
}

8
src/mame/drivers/bebox.cpp
View File

@ -28,8 +28,8 @@
#include "formats/pc_dsk.h"
#include "machine/8042kbdc.h"
READ8_MEMBER(bebox_state::at_dma8237_1_r) { return m_dma8237[1]->read(offset / 2); }
WRITE8_MEMBER(bebox_state::at_dma8237_1_w) { m_dma8237[1]->write(offset / 2, data); }
uint8_t bebox_state::at_dma8237_1_r(offs_t offset) { return m_dma8237[1]->read(offset / 2); }
void bebox_state::at_dma8237_1_w(offs_t offset, uint8_t data) { m_dma8237[1]->write(offset / 2, data); }
void bebox_state::main_mem(address_map &map)
{
@ -71,7 +71,7 @@ void bebox_state::main_mem(address_map &map)
// The following is a gross hack to let the BeBox boot ROM identify the processors correctly.
// This needs to be done in a better way if someone comes up with one.
READ64_MEMBER(bebox_state::bb_slave_64be_r)
uint64_t bebox_state::bb_slave_64be_r(offs_t offset, uint64_t mem_mask)
{
// 2e94 is the real address, 2e84 is where the PC appears to be under full DRC
if ((m_ppc[1]->pc() == 0xfff02e94) || (m_ppc[1]->pc() == 0xfff02e84))
@ -79,7 +79,7 @@ READ64_MEMBER(bebox_state::bb_slave_64be_r)
return 0x108000ff; // indicate slave CPU
}
return m_pcibus->read_64be(space, offset, mem_mask);
return m_pcibus->read_64be(offset, mem_mask);
}
void bebox_state::slave_mem(address_map &map)

28
src/mame/drivers/bfm_sc4.cpp
View File

@ -271,7 +271,7 @@ uint8_t sc4_state::read_input_matrix(int row)
return value;
}
READ16_MEMBER(sc4_state::sc4_cs1_r)
uint16_t sc4_state::sc4_cs1_r(offs_t offset, uint16_t mem_mask)
{
int pc = m_maincpu->pc();
@ -321,7 +321,7 @@ READ16_MEMBER(sc4_state::sc4_cs1_r)
return 0x0000;
}
READ16_MEMBER(sc4_state::sc4_mem_r)
uint16_t sc4_state::sc4_mem_r(offs_t offset, uint16_t mem_mask)
{
int pc = m_maincpu->pc();
int cs = m_maincpu->get_cs(offset * 2);
@ -333,7 +333,7 @@ READ16_MEMBER(sc4_state::sc4_mem_r)
switch ( cs )
{
case 1:
return sc4_cs1_r(space,offset,mem_mask);
return sc4_cs1_r(offset);
case 2:
base = 0x800000/2;
@ -452,7 +452,7 @@ void bfm_sc45_state::machine_start()
m_digits.resolve();
}
WRITE8_MEMBER(bfm_sc45_state::mux_output_w)
void bfm_sc45_state::mux_output_w(offs_t offset, uint8_t data)
{
int const off = offset<<3;
@ -460,7 +460,7 @@ WRITE8_MEMBER(bfm_sc45_state::mux_output_w)
m_lamps[off+i] = BIT(data, i);
}
WRITE8_MEMBER(bfm_sc45_state::mux_output2_w)
void bfm_sc45_state::mux_output2_w(offs_t offset, uint8_t data)
{
int const off = offset<<3;
@ -495,7 +495,7 @@ WRITE8_MEMBER(bfm_sc45_state::mux_output2_w)
}
}
WRITE16_MEMBER(sc4_state::sc4_mem_w)
void sc4_state::sc4_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
int pc = m_maincpu->pc();
int cs = m_maincpu->get_cs(offset * 2);
@ -536,7 +536,7 @@ WRITE16_MEMBER(sc4_state::sc4_mem_w)
if (ACCESSING_BITS_0_7)
{ // lamps
mux_output_w(space, (addr & 0x01f0)>>4, data);
mux_output_w((addr & 0x01f0)>>4, data);
}
}
@ -549,7 +549,7 @@ WRITE16_MEMBER(sc4_state::sc4_mem_w)
if (ACCESSING_BITS_0_7)
{ // lamps
mux_output2_w(space, (addr & 0x01f0)>>4, data);
mux_output2_w((addr & 0x01f0)>>4, data);
}
}
else
@ -571,7 +571,7 @@ WRITE16_MEMBER(sc4_state::sc4_mem_w)
break;
case 0x1330:
bfm_sc4_reel4_w(space,0,data&0xf);
bfm_sc4_reel4_w(data&0xf);
//m_meterstatus = (m_meterstatus&0x3f) | ((data & 0x30) << 2);
m_sec->data_w(~data&0x10);
break;
@ -621,7 +621,7 @@ void sc4_state::sc4_map(address_map &map)
READ32_MEMBER(sc4_adder4_state::adder4_mem_r)
uint32_t sc4_adder4_state::adder4_mem_r(offs_t offset, uint32_t mem_mask)
{
int pc = m_adder4cpu->pc();
int cs = m_adder4cpu->get_cs(offset * 4);
@ -644,7 +644,7 @@ READ32_MEMBER(sc4_adder4_state::adder4_mem_r)
return 0x0000;
}
WRITE32_MEMBER(sc4_adder4_state::adder4_mem_w)
void sc4_adder4_state::adder4_mem_w(offs_t offset, uint32_t data, uint32_t mem_mask)
{
int pc = m_adder4cpu->pc();
int cs = m_adder4cpu->get_cs(offset * 4);
@ -749,7 +749,7 @@ void sc4_state::bfm_sc4_68307_porta_w(address_space &space, bool dedicated, uint
}
}
WRITE8_MEMBER( sc4_state::bfm_sc4_reel3_w )
void sc4_state::bfm_sc4_reel3_w(uint8_t data)
{
m_reel3_latch = data;
@ -760,7 +760,7 @@ WRITE8_MEMBER( sc4_state::bfm_sc4_reel3_w )
}
}
WRITE8_MEMBER( sc4_state::bfm_sc4_reel4_w )
void sc4_state::bfm_sc4_reel4_w(uint8_t data)
{
m_reel4_latch = data;
@ -781,7 +781,7 @@ void sc4_state::bfm_sc4_68307_portb_w(address_space &space, bool dedicated, uint
bfm_sc45_write_serial_vfd((data & 0x4000)?1:0, (data & 0x1000)?1:0, !(data & 0x2000)?1:0);
bfm_sc4_reel3_w(space, 0, (data&0x0f00)>>8, 0xff);
bfm_sc4_reel3_w((data&0x0f00)>>8);
}
}

16
src/mame/drivers/bfm_sc5.cpp
View File

@ -147,7 +147,7 @@ PL1 = Compact Flash Slot
WRITE16_MEMBER( bfm_sc5_state::sc5_duart_w )
void bfm_sc5_state::sc5_duart_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
// clearly a duart of some kind, write patterns are the same as SC4 games
// logerror("%s: duart_w %1x %04x %04x\n", machine().describe_context(), offset, data, mem_mask);
@ -163,7 +163,7 @@ WRITE16_MEMBER( bfm_sc5_state::sc5_duart_w )
}
READ8_MEMBER( bfm_sc5_state::sc5_mux1_r )
uint8_t bfm_sc5_state::sc5_mux1_r(offs_t offset)
{
switch (offset)
{
@ -177,11 +177,11 @@ READ8_MEMBER( bfm_sc5_state::sc5_mux1_r )
}
WRITE8_MEMBER( bfm_sc5_state::sc5_mux1_w )
void bfm_sc5_state::sc5_mux1_w(offs_t offset, uint8_t data)
{
if ((offset&0xf)==0)
{
mux_output_w(space, (offset & 0x01f0)>>4, data);
mux_output_w((offset & 0x01f0)>>4, data);
}
else
{
@ -191,11 +191,11 @@ WRITE8_MEMBER( bfm_sc5_state::sc5_mux1_w )
WRITE8_MEMBER( bfm_sc5_state::sc5_mux2_w )
void bfm_sc5_state::sc5_mux2_w(offs_t offset, uint8_t data)
{
if ((offset&0xf)==0)
{
mux_output2_w(space, (offset & 0x01f0)>>4, data);
mux_output2_w((offset & 0x01f0)>>4, data);
}
else
{
@ -281,7 +281,7 @@ void bfm_sc5_state::sc5_map(address_map &map)
INPUT_PORTS_START( bfm_sc5 )
INPUT_PORTS_END
READ8_MEMBER( bfm_sc5_state::sc5_10202F0_r )
uint8_t bfm_sc5_state::sc5_10202F0_r(offs_t offset)
{
switch (offset)
{
@ -296,7 +296,7 @@ READ8_MEMBER( bfm_sc5_state::sc5_10202F0_r )
return 0;
}
WRITE8_MEMBER( bfm_sc5_state::sc5_10202F0_w )
void bfm_sc5_state::sc5_10202F0_w(offs_t offset, uint8_t data)
{
switch (offset)
{

22
src/mame/drivers/bigevglf.cpp
View File

@ -69,7 +69,7 @@ J1100072A
#include "speaker.h"
WRITE8_MEMBER(bigevglf_state::beg_banking_w)
void bigevglf_state::beg_banking_w(uint8_t data)
{
m_beg_bank = data;
@ -79,7 +79,7 @@ WRITE8_MEMBER(bigevglf_state::beg_banking_w)
membank("bank1")->set_entry(m_beg_bank & 0xff); /* empty sockets for IC37-IC44 ROMS */
}
READ8_MEMBER(bigevglf_state::soundstate_r)
uint8_t bigevglf_state::soundstate_r()
{
uint8_t sound_state = m_soundlatch[0]->pending_r() ? 0 : 1;
sound_state |= m_soundlatch[1]->pending_r() ? 2 : 0;
@ -94,27 +94,27 @@ TIMER_CALLBACK_MEMBER(bigevglf_state::deferred_ls74_w)
}
/* do this on a timer to let the CPUs synchronize */
WRITE8_MEMBER(bigevglf_state::beg13_a_clr_w)
void bigevglf_state::beg13_a_clr_w(uint8_t data)
{
machine().scheduler().synchronize(timer_expired_delegate(FUNC(bigevglf_state::deferred_ls74_w),this), (0 << 8) | 0);
}
WRITE8_MEMBER(bigevglf_state::beg13_b_clr_w)
void bigevglf_state::beg13_b_clr_w(uint8_t data)
{
machine().scheduler().synchronize(timer_expired_delegate(FUNC(bigevglf_state::deferred_ls74_w),this), (1 << 8) | 0);
}
WRITE8_MEMBER(bigevglf_state::beg13_a_set_w)
void bigevglf_state::beg13_a_set_w(uint8_t data)
{
machine().scheduler().synchronize(timer_expired_delegate(FUNC(bigevglf_state::deferred_ls74_w),this), (0 << 8) | 1);
}
WRITE8_MEMBER(bigevglf_state::beg13_b_set_w)
void bigevglf_state::beg13_b_set_w(uint8_t data)
{
machine().scheduler().synchronize(timer_expired_delegate(FUNC(bigevglf_state::deferred_ls74_w),this), (1 << 8) | 1);
}
READ8_MEMBER(bigevglf_state::beg_status_r)
uint8_t bigevglf_state::beg_status_r()
{
/* d0 = Q of 74ls74 IC13(partA)
d1 = Q of 74ls74 IC13(partB)
@ -131,21 +131,21 @@ READ8_MEMBER(bigevglf_state::beg_status_r)
}
READ8_MEMBER(bigevglf_state::beg_trackball_x_r)
uint8_t bigevglf_state::beg_trackball_x_r()
{
static const char *const portx_name[2] = { "P1X", "P2X" };
return ioport(portx_name[m_port_select])->read();
}
READ8_MEMBER(bigevglf_state::beg_trackball_y_r)
uint8_t bigevglf_state::beg_trackball_y_r()
{
static const char *const porty_name[2] = { "P1Y", "P2Y" };
return ioport(porty_name[m_port_select])->read();
}
WRITE8_MEMBER(bigevglf_state::beg_port08_w)
void bigevglf_state::beg_port08_w(uint8_t data)
{
m_port_select = (data & 0x04) >> 2;
}
@ -269,7 +269,7 @@ void bigevglf_state::sub_map(address_map &map)
}
READ8_MEMBER(bigevglf_state::sub_cpu_mcu_coin_port_r)
uint8_t bigevglf_state::sub_cpu_mcu_coin_port_r()
{
/*
bit 0 and bit 1 = coin inputs

10
src/mame/drivers/bishi.cpp
View File

@ -93,18 +93,18 @@ Notes:
#include "speaker.h"
READ16_MEMBER(bishi_state::control_r)
uint16_t bishi_state::control_r()
{
return m_cur_control;
}
WRITE16_MEMBER(bishi_state::control_w)
void bishi_state::control_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
// bit 8 = interrupt gate
COMBINE_DATA(&m_cur_control);
}
WRITE16_MEMBER(bishi_state::control2_w)
void bishi_state::control2_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
// bit 12 = part of the banking calculation for the K056832 ROM readback
COMBINE_DATA(&m_cur_control2);
@ -125,12 +125,12 @@ TIMER_DEVICE_CALLBACK_MEMBER(bishi_state::bishi_scanline)
}
/* compensate for a bug in the ram/rom test */
READ16_MEMBER(bishi_state::bishi_mirror_r)
uint16_t bishi_state::bishi_mirror_r(offs_t offset)
{
return m_palette->basemem().read16(offset);
}
READ16_MEMBER(bishi_state::bishi_K056832_rom_r)
uint16_t bishi_state::bishi_K056832_rom_r(offs_t offset)
{
uint16_t ouroffs;

18
src/mame/drivers/bking.cpp
View File

@ -29,50 +29,50 @@ DIP Locations verified for:
#include "speaker.h"
READ8_MEMBER(bking_state::bking_sndnmi_disable_r)
uint8_t bking_state::bking_sndnmi_disable_r()
{
m_soundnmi->in_w<1>(0);
return 0;
}
WRITE8_MEMBER(bking_state::bking_sndnmi_enable_w)
void bking_state::bking_sndnmi_enable_w(uint8_t data)
{
m_soundnmi->in_w<1>(1);
}
WRITE8_MEMBER(bking_state::bking_soundlatch_w)
void bking_state::bking_soundlatch_w(uint8_t data)
{
m_soundlatch->write(bitswap<8>(data, 0, 1, 2, 3, 4, 5, 6, 7));
}
WRITE8_MEMBER(bking_state::bking3_addr_l_w)
void bking_state::bking3_addr_l_w(uint8_t data)
{
m_addr_l = data;
}
WRITE8_MEMBER(bking_state::bking3_addr_h_w)
void bking_state::bking3_addr_h_w(uint8_t data)
{
m_addr_h = data;
}
READ8_MEMBER(bking_state::bking3_extrarom_r)
uint8_t bking_state::bking3_extrarom_r()
{
uint8_t *rom = memregion("user2")->base();
return rom[m_addr_h * 256 + m_addr_l];
}
WRITE8_MEMBER(bking_state::unk_w)
void bking_state::unk_w(uint8_t data)
{
// 0 = finished reading extra rom
// 1 = started reading extra rom
}
READ8_MEMBER(bking_state::bking3_ext_check_r)
uint8_t bking_state::bking3_ext_check_r()
{
return 0x31; //no "bad rom.", no "bad ext."
}
READ8_MEMBER(bking_state::bking3_mcu_status_r)
uint8_t bking_state::bking3_mcu_status_r()
{
// bit 0 = when 1, MCU is ready to receive data from main CPU
// bit 1 = when 1, MCU has sent data to the main CPU

8
src/mame/drivers/bladestl.cpp
View File

@ -57,7 +57,7 @@ TIMER_DEVICE_CALLBACK_MEMBER(bladestl_state::bladestl_scanline)
*
*************************************/
READ8_MEMBER(bladestl_state::trackball_r)
uint8_t bladestl_state::trackball_r(offs_t offset)
{
int curr = m_trackball[offset]->read();
int delta = (curr - m_last_track[offset]) & 0xff;
@ -66,7 +66,7 @@ READ8_MEMBER(bladestl_state::trackball_r)
return (delta & 0x80) | (curr >> 1);
}
WRITE8_MEMBER(bladestl_state::bladestl_bankswitch_w)
void bladestl_state::bladestl_bankswitch_w(uint8_t data)
{
/* bits 0 & 1 = coin counters */
machine().bookkeeping().coin_counter_w(0,data & 0x01);
@ -101,12 +101,12 @@ void bladestl_state::bladestl_port_B_w(uint8_t data)
m_filter1->filter_rc_set_RC(filter_rc_device::LOWPASS, 1000, 2200, 1000, data & 0x01 ? CAP_N(150) : 0); /* YM2203-SSG-A */
}
READ8_MEMBER(bladestl_state::bladestl_speech_busy_r)
uint8_t bladestl_state::bladestl_speech_busy_r()
{
return m_upd7759->busy_r() ? 1 : 0;
}
WRITE8_MEMBER(bladestl_state::bladestl_speech_ctrl_w)
void bladestl_state::bladestl_speech_ctrl_w(uint8_t data)
{
m_upd7759->reset_w(data & 1);
m_upd7759->start_w(data & 2);

8
src/mame/drivers/blktiger.cpp
View File

@ -32,12 +32,12 @@ Protection comms between main cpu and i8751
**************************************************/
READ8_MEMBER(blktiger_state::blktiger_from_mcu_r)
uint8_t blktiger_state::blktiger_from_mcu_r()
{
return m_i8751_latch;
}
WRITE8_MEMBER(blktiger_state::blktiger_to_mcu_w)
void blktiger_state::blktiger_to_mcu_w(uint8_t data)
{
m_mcu->set_input_line(MCS51_INT1_LINE, ASSERT_LINE);
m_z80_latch = data;
@ -58,12 +58,12 @@ void blktiger_state::blktiger_to_main_w(uint8_t data)
WRITE8_MEMBER(blktiger_state::blktiger_bankswitch_w)
void blktiger_state::blktiger_bankswitch_w(uint8_t data)
{
membank("bank1")->set_entry(data & 0x0f);
}
WRITE8_MEMBER(blktiger_state::blktiger_coinlockout_w)
void blktiger_state::blktiger_coinlockout_w(uint8_t data)
{
if (ioport("COIN_LOCKOUT")->read() & 0x01)
{

14
src/mame/drivers/blmbycar.cpp
View File

@ -46,7 +46,7 @@ Check game speed, it depends on a bit we toggle..
/* The top 64k of samples are banked (16 banks total) */
WRITE8_MEMBER(blmbycar_state::okibank_w)
void blmbycar_state::okibank_w(uint8_t data)
{
m_okibank->set_entry(data & 0x0f);
}
@ -61,19 +61,19 @@ WRITE8_MEMBER(blmbycar_state::okibank_w)
/* Preliminary potentiometric wheel support */
WRITE8_MEMBER(blmbycar_state::blmbycar_pot_wheel_reset_w)
void blmbycar_state::blmbycar_pot_wheel_reset_w(uint8_t data)
{
m_pot_wheel = m_pot_wheel_io->read() & 0xff;
}
WRITE8_MEMBER(blmbycar_state::blmbycar_pot_wheel_shift_w)
void blmbycar_state::blmbycar_pot_wheel_shift_w(uint8_t data)
{
if ( ((m_old_val & 0xff) == 0xff) && ((data & 0xff) == 0) )
m_pot_wheel <<= 1;
m_old_val = data;
}
READ16_MEMBER(blmbycar_state::blmbycar_pot_wheel_r)
uint16_t blmbycar_state::blmbycar_pot_wheel_r()
{
return ((m_pot_wheel & 0x80) ? 0x04 : 0) | (machine().rand() & 0x08);
}
@ -81,7 +81,7 @@ READ16_MEMBER(blmbycar_state::blmbycar_pot_wheel_r)
/* Preliminary optical wheel support */
READ16_MEMBER(blmbycar_state::blmbycar_opt_wheel_r)
uint16_t blmbycar_state::blmbycar_opt_wheel_r()
{
return ((m_opt_wheel_io->read() & 0xff) << 8) | 0xff;
}
@ -96,7 +96,7 @@ READ16_MEMBER(blmbycar_state::blmbycar_opt_wheel_r)
***************************************************************************/
template<int Layer>
WRITE16_MEMBER(blmbycar_state::vram_w)
void blmbycar_state::vram_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_vram[Layer][offset]);
m_tilemap[Layer]->mark_tile_dirty(offset / 2);
@ -144,7 +144,7 @@ void blmbycar_state::blmbycar_map(address_map &map)
map(0x70007b, 0x70007b).w(FUNC(blmbycar_state::blmbycar_pot_wheel_shift_w)); //
}
READ16_MEMBER(blmbycar_state::waterball_unk_r)
uint16_t blmbycar_state::waterball_unk_r()
{
m_retvalue ^= 0x0008; // must toggle.. but not vblank?
return m_retvalue;

4
src/mame/drivers/blockout.cpp
View File

@ -79,12 +79,12 @@
#define MAIN_CLOCK XTAL(10'000'000)
#define AUDIO_CLOCK XTAL(3'579'545)
WRITE16_MEMBER(blockout_state::blockout_irq6_ack_w)
void blockout_state::blockout_irq6_ack_w(uint16_t data)
{
m_maincpu->set_input_line(6, CLEAR_LINE);
}
WRITE16_MEMBER(blockout_state::blockout_irq5_ack_w)
void blockout_state::blockout_irq5_ack_w(uint16_t data)
{
m_maincpu->set_input_line(5, CLEAR_LINE);
}

2
src/mame/drivers/bloodbro.cpp
View File

@ -515,7 +515,7 @@ void bloodbro_state::layer_scroll_w(offs_t offset, uint16_t data, uint16_t mem_m
COMBINE_DATA(&m_scrollram[offset]);
}
WRITE16_MEMBER( bloodbro_state::weststry_layer_scroll_w )
void bloodbro_state::weststry_layer_scroll_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_scrollram[offset]);
}

8
src/mame/drivers/blueprnt.cpp
View File

@ -70,12 +70,12 @@ void blueprnt_state::dipsw_w(uint8_t data)
m_dipsw = data;
}
READ8_MEMBER(blueprnt_state::blueprnt_sh_dipsw_r)
uint8_t blueprnt_state::blueprnt_sh_dipsw_r()
{
return m_dipsw;
}
READ8_MEMBER(blueprnt_state::grasspin_sh_dipsw_r)
uint8_t blueprnt_state::grasspin_sh_dipsw_r()
{
// judging from the disasm, it looks like simple protection was added
// d6: small possibility it's for comms? but the fact that there's a Freeze switch on the pcb rules this out
@ -83,13 +83,13 @@ READ8_MEMBER(blueprnt_state::grasspin_sh_dipsw_r)
return (m_dipsw & 0x7f) | 0x80;
}
WRITE8_MEMBER(blueprnt_state::blueprnt_sound_command_w)
void blueprnt_state::blueprnt_sound_command_w(uint8_t data)
{
m_soundlatch->write(data);
m_audiocpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero);
}
WRITE8_MEMBER(blueprnt_state::blueprnt_coin_counter_w)
void blueprnt_state::blueprnt_coin_counter_w(uint8_t data)
{
machine().bookkeeping().coin_counter_w(0, data & 0x01);
machine().bookkeeping().coin_counter_w(1, data & 0x02);

4
src/mame/drivers/bogeyman.cpp
View File

@ -25,12 +25,12 @@
// Sound section is copied from Mysterious Stones driver by Nicola, Mike, Brad
WRITE8_MEMBER(bogeyman_state::ay8910_latch_w)
void bogeyman_state::ay8910_latch_w(uint8_t data)
{
m_psg_latch = data;
}
WRITE8_MEMBER(bogeyman_state::ay8910_control_w)
void bogeyman_state::ay8910_control_w(uint8_t data)
{
// bit 0 is flipscreen
flip_screen_set(data & 0x01);

4
src/mame/drivers/bombjack.cpp
View File

@ -106,7 +106,7 @@ Dip Locations and factory settings verified with manual
#include "speaker.h"
READ8_MEMBER(bombjack_state::soundlatch_read_and_clear)
uint8_t bombjack_state::soundlatch_read_and_clear()
{
// An extra flip-flop is used to clear the LS273 after reading it through a LS245
// (this flip-flop is then cleared in sync with the sound CPU clock)
@ -123,7 +123,7 @@ READ8_MEMBER(bombjack_state::soundlatch_read_and_clear)
*
*************************************/
WRITE8_MEMBER(bombjack_state::irq_mask_w)
void bombjack_state::irq_mask_w(uint8_t data)
{
m_nmi_mask = BIT(data, 0);
if (!m_nmi_mask)

6
src/mame/drivers/boogwing.cpp
View File

@ -96,7 +96,7 @@
#define MAIN_XTAL XTAL(28'000'000)
#define SOUND_XTAL XTAL(32'220'000)
READ16_MEMBER( boogwing_state::boogwing_protection_region_0_104_r )
uint16_t boogwing_state::boogwing_protection_region_0_104_r(offs_t offset)
{
int real_address = 0 + (offset *2);
int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff;
@ -105,7 +105,7 @@ READ16_MEMBER( boogwing_state::boogwing_protection_region_0_104_r )
return data;
}
WRITE16_MEMBER( boogwing_state::boogwing_protection_region_0_104_w )
void boogwing_state::boogwing_protection_region_0_104_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
int real_address = 0 + (offset *2);
int deco146_addr = bitswap<32>(real_address, /* NC */31,30,29,28,27,26,25,24,23,22,21,20,19,18, 13,12,11,/**/ 17,16,15,14, 10,9,8, 7,6,5,4, 3,2,1,0) & 0x7fff;
@ -113,7 +113,7 @@ WRITE16_MEMBER( boogwing_state::boogwing_protection_region_0_104_w )
m_deco104->write_data( deco146_addr, data, mem_mask, cs );
}
WRITE16_MEMBER( boogwing_state::priority_w )
void boogwing_state::priority_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
COMBINE_DATA(&m_priority);
}

30
src/mame/drivers/bottom9.cpp
View File

@ -25,7 +25,7 @@
#include "speaker.h"
READ8_MEMBER(bottom9_state::k052109_051960_r)
uint8_t bottom9_state::k052109_051960_r(offs_t offset)
{
if (m_k052109->get_rmrd_line() == CLEAR_LINE)
{
@ -40,7 +40,7 @@ READ8_MEMBER(bottom9_state::k052109_051960_r)
return m_k052109->read(offset);
}
WRITE8_MEMBER(bottom9_state::k052109_051960_w)
void bottom9_state::k052109_051960_w(offs_t offset, uint8_t data)
{
if (offset >= 0x3800 && offset < 0x3808)
m_k051960->k051937_w(offset - 0x3800, data);
@ -50,10 +50,10 @@ WRITE8_MEMBER(bottom9_state::k052109_051960_w)
m_k051960->k051960_w(offset - 0x3c00, data);
}
READ8_MEMBER(bottom9_state::bottom9_bankedram1_r)
uint8_t bottom9_state::bottom9_bankedram1_r(offs_t offset)
{
if (m_k052109_selected)
return k052109_051960_r(space, offset);
return k052109_051960_r(offset);
else
{
if (m_zoomreadroms)
@ -63,31 +63,31 @@ READ8_MEMBER(bottom9_state::bottom9_bankedram1_r)
}
}
WRITE8_MEMBER(bottom9_state::bottom9_bankedram1_w)
void bottom9_state::bottom9_bankedram1_w(offs_t offset, uint8_t data)
{
if (m_k052109_selected)
k052109_051960_w(space, offset, data);
k052109_051960_w(offset, data);
else
m_k051316->write(offset, data);
}
READ8_MEMBER(bottom9_state::bottom9_bankedram2_r)
uint8_t bottom9_state::bottom9_bankedram2_r(offs_t offset)
{
if (m_k052109_selected)
return k052109_051960_r(space, offset + 0x2000);
return k052109_051960_r(offset + 0x2000);
else
return m_palette->basemem().read8(offset);
}
WRITE8_MEMBER(bottom9_state::bottom9_bankedram2_w)
void bottom9_state::bottom9_bankedram2_w(offs_t offset, uint8_t data)
{
if (m_k052109_selected)
k052109_051960_w(space, offset + 0x2000, data);
k052109_051960_w(offset + 0x2000, data);
else
m_palette->write8(offset, data);
}
WRITE8_MEMBER(bottom9_state::bankswitch_w)
void bottom9_state::bankswitch_w(uint8_t data)
{
int bank;
@ -104,7 +104,7 @@ WRITE8_MEMBER(bottom9_state::bankswitch_w)
membank("bank1")->set_entry(bank);
}
WRITE8_MEMBER(bottom9_state::bottom9_1f90_w)
void bottom9_state::bottom9_1f90_w(uint8_t data)
{
/* bits 0/1 = coin counters */
machine().bookkeeping().coin_counter_w(0, data & 0x01);
@ -123,7 +123,7 @@ WRITE8_MEMBER(bottom9_state::bottom9_1f90_w)
m_k052109_selected = data & 0x20;
}
WRITE8_MEMBER(bottom9_state::bottom9_sh_irqtrigger_w)
void bottom9_state::bottom9_sh_irqtrigger_w(uint8_t data)
{
m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
}
@ -134,12 +134,12 @@ INTERRUPT_GEN_MEMBER(bottom9_state::bottom9_sound_interrupt)
device.execute().pulse_input_line(INPUT_LINE_NMI, attotime::zero);
}
WRITE8_MEMBER(bottom9_state::nmi_enable_w)
void bottom9_state::nmi_enable_w(uint8_t data)
{
m_nmienable = data;
}
WRITE8_MEMBER(bottom9_state::sound_bank_w)
void bottom9_state::sound_bank_w(uint8_t data)
{
int bank_A, bank_B;

4
src/mame/drivers/brkthru.cpp
View File

@ -160,7 +160,7 @@ buttons down after the game has started then pressing F3 to reset the game.
*
*************************************/
WRITE8_MEMBER(brkthru_state::brkthru_1803_w)
void brkthru_state::brkthru_1803_w(uint8_t data)
{
/* bit 0 = NMI enable */
m_nmi_mask = ~data & 1;
@ -171,7 +171,7 @@ WRITE8_MEMBER(brkthru_state::brkthru_1803_w)
/* bit 1 = ? maybe IRQ acknowledge */
}
WRITE8_MEMBER(brkthru_state::darwin_0803_w)
void brkthru_state::darwin_0803_w(uint8_t data)
{
/* bit 0 = NMI enable */
m_nmi_mask = data & 1;

8
src/mame/drivers/btime.cpp
View File

@ -167,7 +167,7 @@ enum
};
WRITE8_MEMBER(btime_state::audio_nmi_enable_w)
void btime_state::audio_nmi_enable_w(uint8_t data)
{
/* for most games, this serves as the NMI enable for the audio CPU; however,
lnc and disco use bit 0 of the first AY-8910's port A instead; many other
@ -380,7 +380,7 @@ INPUT_CHANGED_MEMBER(btime_state::coin_inserted_nmi_lo)
}
READ8_MEMBER(btime_state::zoar_dsw1_read)
uint8_t btime_state::zoar_dsw1_read()
{
return (!m_screen->vblank() << 7) | (ioport("DSW1")->read() & 0x7f);
}
@ -2090,7 +2090,7 @@ ROM_START( sdtennis )
ROM_LOAD( "ao_04.10f", 0x1000, 0x1000, CRC(921952af) SHA1(4e9248f3493a5f4651278f27c11f507571242317) )
ROM_END
READ8_MEMBER(btime_state::wtennis_reset_hack_r)
uint8_t btime_state::wtennis_reset_hack_r()
{
uint8_t *RAM = memregion("maincpu")->base();
@ -2171,7 +2171,7 @@ void btime_state::init_protennb()
void btime_state::init_wtennis()
{
m_maincpu->space(AS_PROGRAM).install_read_handler(0xc15f, 0xc15f, read8_delegate(*this, FUNC(btime_state::wtennis_reset_hack_r)));
m_maincpu->space(AS_PROGRAM).install_read_handler(0xc15f, 0xc15f, read8smo_delegate(*this, FUNC(btime_state::wtennis_reset_hack_r)));
m_audiocpu->space(AS_PROGRAM).install_read_bank(0x0200, 0x0fff, "bank10");
membank("bank10")->set_base(memregion("audiocpu")->base() + 0xe200);

18
src/mame/drivers/btoads.cpp
View File

@ -59,14 +59,14 @@ void btoads_state::device_timer(emu_timer &timer, device_timer_id id, int param,
}
WRITE16_MEMBER( btoads_state::main_sound_w )
void btoads_state::main_sound_w(offs_t offset, uint16_t data, uint16_t mem_mask)
{
if (ACCESSING_BITS_0_7)
synchronize(TIMER_ID_DELAYED_SOUND, data & 0xff);
}
READ16_MEMBER( btoads_state::main_sound_r )
uint16_t btoads_state::main_sound_r()
{
m_sound_to_main_ready = 0;
return m_sound_to_main_data;
@ -92,27 +92,27 @@ READ_LINE_MEMBER( btoads_state::sound_to_main_r )
*
*************************************/
WRITE8_MEMBER( btoads_state::sound_data_w )
void btoads_state::sound_data_w(uint8_t data)
{
m_sound_to_main_data = data;
m_sound_to_main_ready = 1;
}
READ8_MEMBER( btoads_state::sound_data_r )
uint8_t btoads_state::sound_data_r()
{
m_main_to_sound_ready = 0;
return m_main_to_sound_data;
}
READ8_MEMBER( btoads_state::sound_ready_to_send_r )
uint8_t btoads_state::sound_ready_to_send_r()
{
return m_sound_to_main_ready ? 0x00 : 0x80;
}
READ8_MEMBER( btoads_state::sound_data_ready_r )
uint8_t btoads_state::sound_data_ready_r()
{
if (m_audiocpu->pc() == 0xd50 && !m_main_to_sound_ready)
m_audiocpu->spin_until_interrupt();
@ -127,7 +127,7 @@ READ8_MEMBER( btoads_state::sound_data_ready_r )
*
*************************************/
WRITE8_MEMBER( btoads_state::sound_int_state_w )
void btoads_state::sound_int_state_w(uint8_t data)
{
/* top bit controls BSMT2000 reset */
if (!(m_sound_int_state & 0x80) && (data & 0x80))
@ -146,13 +146,13 @@ WRITE8_MEMBER( btoads_state::sound_int_state_w )
*
*************************************/
READ8_MEMBER( btoads_state::bsmt_ready_r )
uint8_t btoads_state::bsmt_ready_r()
{
return m_bsmt->read_status() << 7;
}
WRITE8_MEMBER( btoads_state::bsmt2000_port_w )
void btoads_state::bsmt2000_port_w(offs_t offset, uint8_t data)
{
m_bsmt->write_reg(offset >> 8);
m_bsmt->write_data(((offset & 0xff) << 8) | data);

12
src/mame/drivers/buggychl.cpp
View File

@ -103,12 +103,12 @@ Schematics show the jumper set to the 6mhz setting.
#include "buggychl.lh"
WRITE8_MEMBER(buggychl_state::bankswitch_w)
void buggychl_state::bankswitch_w(uint8_t data)
{
membank("bank1")->set_entry(data & 0x07); // shall we check if data&7 < # banks?
}
WRITE8_MEMBER(buggychl_state::sound_enable_w)
void buggychl_state::sound_enable_w(uint8_t data)
{
// does this really only control the sound irq 'timer' enable state, rather than the entire sound system?
// this would be more in line with the (admittedly incorrect) schematic...
@ -116,7 +116,7 @@ WRITE8_MEMBER(buggychl_state::sound_enable_w)
machine().sound().system_enable(data & 1);
}
READ8_MEMBER(buggychl_state::mcu_status_r)
uint8_t buggychl_state::mcu_status_r()
{
// bit 0 = when 1, MCU is ready to receive data from main CPU
// bit 1 = when 1, MCU has sent data to the main CPU
@ -134,12 +134,12 @@ READ8_MEMBER(buggychl_state::mcu_status_r)
// a cpu read of soundlatch2 sets ic12.1 so /Q is low, so cpu bit 0 and sound bit 1 read as clear
// a sound read of soundlatch clears ic12.2 so /Q is high, so cpu bit 1 and sound bit 0 read as set
// ic12.1 is set and ic12.2 is cleared by /SRESET
READ8_MEMBER(buggychl_state::sound_status_main_r)
uint8_t buggychl_state::sound_status_main_r()
{
return (m_soundlatch2->pending_r() ? 1 : 0) | (m_soundlatch->pending_r() ? 0 : 2);
}
READ8_MEMBER(buggychl_state::sound_status_sound_r)
uint8_t buggychl_state::sound_status_sound_r()
{
return (m_soundlatch2->pending_r() ? 2 : 0) | (m_soundlatch->pending_r() ? 0 : 1);
}
@ -458,7 +458,7 @@ static GFXDECODE_START( gfx_buggychl )
GFXDECODE_END
WRITE8_MEMBER(buggychl_state::ta7630_volbal_msm_w)
void buggychl_state::ta7630_volbal_msm_w(uint8_t data)
{
m_ta7630->set_device_volume(m_msm, data >> 4);
}

38
src/mame/drivers/bullet.cpp
View File

@ -103,7 +103,7 @@ enum
// mreq_r -
//-------------------------------------------------
READ8_MEMBER( bullet_state::mreq_r )
uint8_t bullet_state::mreq_r(offs_t offset)
{
uint8_t data = 0;
@ -131,7 +131,7 @@ READ8_MEMBER( bullet_state::mreq_r )
// mreq_w -
//-------------------------------------------------
WRITE8_MEMBER( bullet_state::mreq_w )
void bullet_state::mreq_w(offs_t offset, uint8_t data)
{
if (offset < 0xc000)
{
@ -148,7 +148,7 @@ WRITE8_MEMBER( bullet_state::mreq_w )
// win_r -
//-------------------------------------------------
READ8_MEMBER( bullet_state::win_r )
uint8_t bullet_state::win_r()
{
return 0;
}
@ -158,7 +158,7 @@ READ8_MEMBER( bullet_state::win_r )
// wstrobe_w -
//-------------------------------------------------
WRITE8_MEMBER( bullet_state::wstrobe_w )
void bullet_state::wstrobe_w(uint8_t data)
{
}
@ -167,7 +167,7 @@ WRITE8_MEMBER( bullet_state::wstrobe_w )
// brom_r -
//-------------------------------------------------
READ8_MEMBER( bullet_state::brom_r )
uint8_t bullet_state::brom_r()
{
m_brom = 1;
@ -179,7 +179,7 @@ READ8_MEMBER( bullet_state::brom_r )
// brom_w -
//-------------------------------------------------
WRITE8_MEMBER( bullet_state::brom_w )
void bullet_state::brom_w(uint8_t data)
{
m_brom = 1;
}
@ -189,7 +189,7 @@ WRITE8_MEMBER( bullet_state::brom_w )
// exdsk_w -
//-------------------------------------------------
WRITE8_MEMBER( bullet_state::exdsk_w )
void bullet_state::exdsk_w(uint8_t data)
{
/*
@ -248,7 +248,7 @@ WRITE8_MEMBER( bullet_state::exdsk_w )
// exdma_w -
//-------------------------------------------------
WRITE8_MEMBER( bullet_state::exdma_w )
void bullet_state::exdma_w(uint8_t data)
{
/*
@ -277,7 +277,7 @@ WRITE8_MEMBER( bullet_state::exdma_w )
// hdcon_w -
//-------------------------------------------------
WRITE8_MEMBER( bullet_state::hdcon_w )
void bullet_state::hdcon_w(uint8_t data)
{
/*
@ -314,7 +314,7 @@ WRITE8_MEMBER( bullet_state::hdcon_w )
// info_r -
//-------------------------------------------------
READ8_MEMBER( bullet_state::info_r )
uint8_t bullet_state::info_r()
{
/*
@ -350,7 +350,7 @@ READ8_MEMBER( bullet_state::info_r )
// segst_w -
//-------------------------------------------------
WRITE8_MEMBER( bullet_state::segst_w )
void bullet_state::segst_w(uint8_t data)
{
m_segst = BIT(data, 0);
}
@ -360,7 +360,7 @@ WRITE8_MEMBER( bullet_state::segst_w )
// mreq_r -
//-------------------------------------------------
READ8_MEMBER( bulletf_state::mreq_r )
uint8_t bulletf_state::mreq_r(offs_t offset)
{
uint8_t data = 0;
@ -395,7 +395,7 @@ READ8_MEMBER( bulletf_state::mreq_r )
// mreq_w -
//-------------------------------------------------
WRITE8_MEMBER( bulletf_state::mreq_w )
void bulletf_state::mreq_w(offs_t offset, uint8_t data)
{
if (offset < 0xc000)
{
@ -419,7 +419,7 @@ WRITE8_MEMBER( bulletf_state::mreq_w )
// xdma0_w -
//-------------------------------------------------
WRITE8_MEMBER( bulletf_state::xdma0_w )
void bulletf_state::xdma0_w(uint8_t data)
{
/*
@ -446,7 +446,7 @@ WRITE8_MEMBER( bulletf_state::xdma0_w )
// xfdc_w -
//-------------------------------------------------
WRITE8_MEMBER( bulletf_state::xfdc_w )
void bulletf_state::xfdc_w(uint8_t data)
{
/*
@ -506,7 +506,7 @@ WRITE8_MEMBER( bulletf_state::xfdc_w )
// mbank_w -
//-------------------------------------------------
WRITE8_MEMBER( bulletf_state::mbank_w )
void bulletf_state::mbank_w(uint8_t data)
{
/*
@ -531,7 +531,7 @@ WRITE8_MEMBER( bulletf_state::mbank_w )
// scsi_r -
//-------------------------------------------------
READ8_MEMBER( bulletf_state::scsi_r )
uint8_t bulletf_state::scsi_r()
{
uint8_t data = m_scsi_data_in->read();
@ -548,7 +548,7 @@ READ8_MEMBER( bulletf_state::scsi_r )
// scsi_w -
//-------------------------------------------------
WRITE8_MEMBER( bulletf_state::scsi_w )
void bulletf_state::scsi_w(uint8_t data)
{
m_scsi_data_out->write(data);
@ -562,7 +562,7 @@ WRITE8_MEMBER( bulletf_state::scsi_w )
// hwsts_r -
//-------------------------------------------------
READ8_MEMBER( bulletf_state::hwsts_r )
uint8_t bulletf_state::hwsts_r()
{
/*

12
src/mame/drivers/busicom.cpp
View File

@ -23,12 +23,12 @@ uint8_t busicom_state::get_bit_selected(uint32_t val,int num)
return 0;
}
READ8_MEMBER(busicom_state::keyboard_r)
uint8_t busicom_state::keyboard_r()
{
return m_input_lines[get_bit_selected(m_keyboard_shifter & 0x3ff, 10)]->read();
}
READ8_MEMBER(busicom_state::printer_r)
uint8_t busicom_state::printer_r()
{
uint8_t retVal = 0;
if (m_drum_index==0) retVal |= 1;
@ -37,7 +37,7 @@ READ8_MEMBER(busicom_state::printer_r)
}
WRITE8_MEMBER(busicom_state::shifter_w)
void busicom_state::shifter_w(uint8_t data)
{
// FIXME: detect edges, maybe make 4003 shifter a device
if (BIT(data,0)) {
@ -50,7 +50,7 @@ WRITE8_MEMBER(busicom_state::shifter_w)
}
}
WRITE8_MEMBER(busicom_state::printer_w)
void busicom_state::printer_w(uint8_t data)
{
int i,j;
if (BIT(data,0)) {
@ -85,7 +85,7 @@ WRITE8_MEMBER(busicom_state::printer_w)
}
}
WRITE8_MEMBER(busicom_state::status_w)
void busicom_state::status_w(uint8_t data)
{
#if 0
uint8_t mem_lamp = BIT(data,0);
@ -95,7 +95,7 @@ WRITE8_MEMBER(busicom_state::status_w)
//logerror("status %c %c %c\n",mem_lamp ? 'M':'x',over_lamp ? 'O':'x',minus_lamp ? '-':'x');
}
WRITE8_MEMBER(busicom_state::printer_ctrl_w)
void busicom_state::printer_ctrl_w(uint8_t data)
{
}

14
src/mame/drivers/bwidow.cpp
View File

@ -258,7 +258,7 @@ Typically, only the high 2 bits are read.
*/
READ8_MEMBER(bwidow_state::spacduel_IN3_r)
uint8_t bwidow_state::spacduel_IN3_r(offs_t offset)
{
int res;
int res1;
@ -314,7 +314,7 @@ READ_LINE_MEMBER(bwidow_state::clock_r)
return (m_maincpu->total_cycles() & 0x100) ? 1 : 0;
}
READ8_MEMBER(bwidow_state::bwidowp_in_r)
uint8_t bwidow_state::bwidowp_in_r()
{
return (m_in4->read() & 0x0f) | ((m_in3->read() & 0x0f) << 4);
}
@ -325,7 +325,7 @@ READ8_MEMBER(bwidow_state::bwidowp_in_r)
*
*************************************/
WRITE8_MEMBER(bwidow_state::bwidow_misc_w)
void bwidow_state::bwidow_misc_w(uint8_t data)
{
/*
0x10 = p1 led
@ -342,7 +342,7 @@ WRITE8_MEMBER(bwidow_state::bwidow_misc_w)
m_lastdata = data;
}
WRITE8_MEMBER(bwidow_state::spacduel_coin_counter_w)
void bwidow_state::spacduel_coin_counter_w(uint8_t data)
{
if (data == m_lastdata) return;
m_leds[0] = BIT(~data, 5); // start lamp
@ -362,12 +362,12 @@ WRITE8_MEMBER(bwidow_state::spacduel_coin_counter_w)
*
*************************************/
READ8_MEMBER(bwidow_state::earom_read)
uint8_t bwidow_state::earom_read()
{
return m_earom->data();
}
WRITE8_MEMBER(bwidow_state::earom_write)
void bwidow_state::earom_write(offs_t offset, uint8_t data)
{
m_earom->set_address(offset & 0x3f);
m_earom->set_data(data);
@ -392,7 +392,7 @@ void bwidow_state::machine_reset()
*
*************************************/
WRITE8_MEMBER(bwidow_state::irq_ack_w)
void bwidow_state::irq_ack_w(uint8_t data)
{
m_maincpu->set_input_line(0, CLEAR_LINE);
}

10
src/mame/drivers/bwing.cpp
View File

@ -48,23 +48,23 @@ INTERRUPT_GEN_MEMBER(bwing_state::bwp3_interrupt)
//****************************************************************************
// Memory and I/O Handlers
WRITE8_MEMBER(bwing_state::bwp3_u8F_w)
void bwing_state::bwp3_u8F_w(uint8_t data)
{
m_bwp3_u8F_d = data; // prepares custom chip for various operations
}
WRITE8_MEMBER(bwing_state::bwp3_nmimask_w)
void bwing_state::bwp3_nmimask_w(uint8_t data)
{
m_bwp3_nmimask = data & 0x80;
}
WRITE8_MEMBER(bwing_state::bwp3_nmiack_w)
void bwing_state::bwp3_nmiack_w(uint8_t data)
{
m_audiocpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
}
WRITE8_MEMBER(bwing_state::bwp1_ctrl_w)
void bwing_state::bwp1_ctrl_w(offs_t offset, uint8_t data)
{
switch (offset)
{
@ -103,7 +103,7 @@ WRITE8_MEMBER(bwing_state::bwp1_ctrl_w)
}
WRITE8_MEMBER(bwing_state::bwp2_ctrl_w)
void bwing_state::bwp2_ctrl_w(offs_t offset, uint8_t data)
{
switch (offset)
{

22
src/mame/includes/abc1600.h
View File

@ -103,17 +103,17 @@ public:
virtual void machine_start() override;
virtual void machine_reset() override;
DECLARE_READ8_MEMBER( bus_r );
DECLARE_WRITE8_MEMBER( bus_w );
DECLARE_READ8_MEMBER( dart_r );
DECLARE_WRITE8_MEMBER( dart_w );
DECLARE_READ8_MEMBER( scc_r );
DECLARE_WRITE8_MEMBER( scc_w );
DECLARE_READ8_MEMBER( cio_r );
DECLARE_WRITE8_MEMBER( cio_w );
DECLARE_WRITE8_MEMBER( fw0_w );
DECLARE_WRITE8_MEMBER( fw1_w );
DECLARE_WRITE8_MEMBER( spec_contr_reg_w );
uint8_t bus_r(offs_t offset);
void bus_w(offs_t offset, uint8_t data);
uint8_t dart_r(offs_t offset);
void dart_w(offs_t offset, uint8_t data);
uint8_t scc_r(offs_t offset);
void scc_w(offs_t offset, uint8_t data);
uint8_t cio_r(offs_t offset);
void cio_w(offs_t offset, uint8_t data);
void fw0_w(uint8_t data);
void fw1_w(uint8_t data);
void spec_contr_reg_w(uint8_t data);
DECLARE_WRITE_LINE_MEMBER( dbrq_w );

2
src/mame/includes/actfancr.h
View File

@ -40,7 +40,7 @@ public:
void triothep_control_select_w(uint8_t data);
uint8_t triothep_control_r();
DECLARE_WRITE8_MEMBER(buffer_spriteram_w);
void buffer_spriteram_w(uint8_t data);
DECLARE_MACHINE_START(triothep);
DECLARE_MACHINE_RESET(triothep);
virtual void video_start() override;

16
src/mame/includes/adam.h
View File

@ -69,15 +69,15 @@ public:
virtual void machine_start() override;
virtual void machine_reset() override;
DECLARE_READ8_MEMBER( mreq_r );
DECLARE_WRITE8_MEMBER( mreq_w );
DECLARE_READ8_MEMBER( iorq_r );
DECLARE_WRITE8_MEMBER( iorq_w );
uint8_t mreq_r(offs_t offset);
void mreq_w(offs_t offset, uint8_t data);
uint8_t iorq_r(offs_t offset);
void iorq_w(offs_t offset, uint8_t data);
DECLARE_READ8_MEMBER( adamnet_r );
DECLARE_WRITE8_MEMBER( adamnet_w );
DECLARE_READ8_MEMBER( mioc_r );
DECLARE_WRITE8_MEMBER( mioc_w );
uint8_t adamnet_r();
void adamnet_w(uint8_t data);
uint8_t mioc_r();
void mioc_w(uint8_t data);
void m6801_p1_w(uint8_t data);
uint8_t m6801_p2_r();

16
src/mame/includes/aeroboto.h
View File

@ -60,14 +60,14 @@ public:
/* misc */
int m_count;
int m_disable_irq;
DECLARE_READ8_MEMBER(aeroboto_201_r);
DECLARE_READ8_MEMBER(aeroboto_irq_ack_r);
DECLARE_READ8_MEMBER(aeroboto_2973_r);
DECLARE_WRITE8_MEMBER(aeroboto_1a2_w);
DECLARE_READ8_MEMBER(aeroboto_in0_r);
DECLARE_WRITE8_MEMBER(aeroboto_3000_w);
DECLARE_WRITE8_MEMBER(aeroboto_videoram_w);
DECLARE_WRITE8_MEMBER(aeroboto_tilecolor_w);
uint8_t aeroboto_201_r();
uint8_t aeroboto_irq_ack_r();
uint8_t aeroboto_2973_r();
void aeroboto_1a2_w(uint8_t data);
uint8_t aeroboto_in0_r();
void aeroboto_3000_w(uint8_t data);
void aeroboto_videoram_w(offs_t offset, uint8_t data);
void aeroboto_tilecolor_w(offs_t offset, uint8_t data);
TILE_GET_INFO_MEMBER(get_tile_info);
virtual void machine_start() override;
virtual void machine_reset() override;

48
src/mame/includes/aerofgt.h
View File

@ -80,30 +80,30 @@ public:
uint32_t spinbrk_tile_callback( uint32_t code );
/* handlers */
DECLARE_WRITE8_MEMBER(karatblzbl_soundlatch_w);
DECLARE_READ8_MEMBER(pending_command_r);
DECLARE_WRITE8_MEMBER(aerofgt_sh_bankswitch_w);
DECLARE_WRITE8_MEMBER(spinlbrk_sh_bankswitch_w);
DECLARE_WRITE8_MEMBER(aerfboot_okim6295_banking_w);
template<int Layer> DECLARE_WRITE16_MEMBER(vram_w);
DECLARE_WRITE8_MEMBER(pspikes_gfxbank_w);
DECLARE_WRITE16_MEMBER(pspikesb_gfxbank_w);
DECLARE_WRITE16_MEMBER(spikes91_lookup_w);
DECLARE_WRITE8_MEMBER(karatblz_gfxbank_w);
DECLARE_WRITE8_MEMBER(spinlbrk_gfxbank_w);
DECLARE_WRITE8_MEMBER(kickball_gfxbank_w);
DECLARE_WRITE16_MEMBER(turbofrc_gfxbank_w);
DECLARE_WRITE16_MEMBER(aerofgt_gfxbank_w);
template<int Layer> DECLARE_WRITE16_MEMBER(scrollx_w);
template<int Layer> DECLARE_WRITE16_MEMBER(scrolly_w);
DECLARE_WRITE8_MEMBER(pspikes_palette_bank_w);
DECLARE_WRITE8_MEMBER(spinlbrk_flip_screen_w);
DECLARE_WRITE8_MEMBER(turbofrc_flip_screen_w);
DECLARE_WRITE16_MEMBER(wbbc97_bitmap_enable_w);
DECLARE_WRITE16_MEMBER(pspikesb_oki_banking_w);
DECLARE_WRITE16_MEMBER(aerfboo2_okim6295_banking_w);
DECLARE_WRITE8_MEMBER(karatblzbl_d7759_write_port_0_w);
DECLARE_WRITE8_MEMBER(karatblzbl_d7759_reset_w);
void karatblzbl_soundlatch_w(uint8_t data);
uint8_t pending_command_r();
void aerofgt_sh_bankswitch_w(uint8_t data);
void spinlbrk_sh_bankswitch_w(uint8_t data);
void aerfboot_okim6295_banking_w(uint8_t data);
template<int Layer> void vram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void pspikes_gfxbank_w(uint8_t data);
void pspikesb_gfxbank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void spikes91_lookup_w(uint16_t data);
void karatblz_gfxbank_w(uint8_t data);
void spinlbrk_gfxbank_w(uint8_t data);
void kickball_gfxbank_w(uint8_t data);
void turbofrc_gfxbank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void aerofgt_gfxbank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
template<int Layer> void scrollx_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
template<int Layer> void scrolly_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void pspikes_palette_bank_w(uint8_t data);
void spinlbrk_flip_screen_w(uint8_t data);
void turbofrc_flip_screen_w(uint8_t data);
void wbbc97_bitmap_enable_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void pspikesb_oki_banking_w(uint16_t data);
void aerfboo2_okim6295_banking_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void karatblzbl_d7759_write_port_0_w(uint8_t data);
void karatblzbl_d7759_reset_w(uint8_t data);
TILE_GET_INFO_MEMBER(get_pspikes_tile_info);
template<int Layer> TILE_GET_INFO_MEMBER(karatblz_tile_info);
template<int Layer> TILE_GET_INFO_MEMBER(spinlbrk_tile_info);

20
src/mame/includes/airbustr.h
View File

@ -67,16 +67,16 @@ public:
required_device<watchdog_timer_device> m_watchdog;
required_device_array<generic_latch_8_device, 2> m_soundlatch;
DECLARE_READ8_MEMBER(devram_r);
DECLARE_WRITE8_MEMBER(master_nmi_trigger_w);
DECLARE_WRITE8_MEMBER(master_bankswitch_w);
DECLARE_WRITE8_MEMBER(slave_bankswitch_w);
DECLARE_WRITE8_MEMBER(sound_bankswitch_w);
DECLARE_READ8_MEMBER(soundcommand_status_r);
DECLARE_WRITE8_MEMBER(coin_counter_w);
template<int Layer> DECLARE_WRITE8_MEMBER(videoram_w);
template<int Layer> DECLARE_WRITE8_MEMBER(colorram_w);
DECLARE_WRITE8_MEMBER(scrollregs_w);
uint8_t devram_r(address_space &space, offs_t offset);
void master_nmi_trigger_w(uint8_t data);
void master_bankswitch_w(uint8_t data);
void slave_bankswitch_w(uint8_t data);
void sound_bankswitch_w(uint8_t data);
uint8_t soundcommand_status_r();
void coin_counter_w(uint8_t data);
template<int Layer> void videoram_w(offs_t offset, uint8_t data);
template<int Layer> void colorram_w(offs_t offset, uint8_t data);
void scrollregs_w(offs_t offset, uint8_t data);
void init_airbustr();
template<int Layer> TILE_GET_INFO_MEMBER(get_tile_info);
virtual void machine_start() override;

14
src/mame/includes/ajax.h
View File

@ -33,13 +33,13 @@ public:
m_lamps(*this, "lamp%u", 0U)
{ }
DECLARE_WRITE8_MEMBER(sound_bank_w);
DECLARE_READ8_MEMBER(ls138_f10_r);
DECLARE_WRITE8_MEMBER(ls138_f10_w);
DECLARE_WRITE8_MEMBER(bankswitch_2_w);
DECLARE_WRITE8_MEMBER(bankswitch_w);
DECLARE_WRITE8_MEMBER(lamps_w);
DECLARE_WRITE8_MEMBER(k007232_extvol_w);
void sound_bank_w(uint8_t data);
uint8_t ls138_f10_r(offs_t offset);
void ls138_f10_w(offs_t offset, uint8_t data);
void bankswitch_2_w(uint8_t data);
void bankswitch_w(uint8_t data);
void lamps_w(uint8_t data);
void k007232_extvol_w(uint8_t data);
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
void volume_callback0(uint8_t data);
void volume_callback1(uint8_t data);

8
src/mame/includes/aliens.h
View File

@ -42,10 +42,10 @@ public:
required_device<generic_latch_8_device> m_soundlatch;
required_memory_bank m_rombank;
DECLARE_WRITE8_MEMBER(aliens_coin_counter_w);
DECLARE_WRITE8_MEMBER(aliens_sh_irqtrigger_w);
DECLARE_READ8_MEMBER(k052109_051960_r);
DECLARE_WRITE8_MEMBER(k052109_051960_w);
void aliens_coin_counter_w(uint8_t data);
void aliens_sh_irqtrigger_w(uint8_t data);
uint8_t k052109_051960_r(offs_t offset);
void k052109_051960_w(offs_t offset, uint8_t data);
void aliens_snd_bankswitch_w(uint8_t data);
virtual void machine_start() override;
virtual void machine_reset() override;

12
src/mame/includes/amiga.h
View File

@ -433,9 +433,9 @@ public:
DECLARE_WRITE_LINE_MEMBER( m68k_reset );
DECLARE_WRITE_LINE_MEMBER( kbreset_w );
DECLARE_READ16_MEMBER( cia_r );
DECLARE_WRITE16_MEMBER( cia_w );
DECLARE_WRITE16_MEMBER( gayle_cia_w );
uint16_t cia_r(offs_t offset, uint16_t mem_mask = ~0);
void cia_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void gayle_cia_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void cia_0_port_a_write(uint8_t data);
DECLARE_WRITE_LINE_MEMBER( cia_0_irq );
uint8_t cia_1_port_a_read();
@ -453,13 +453,13 @@ public:
DECLARE_WRITE_LINE_MEMBER( centronics_perror_w );
DECLARE_WRITE_LINE_MEMBER( centronics_select_w );
DECLARE_READ16_MEMBER( custom_chip_r );
uint16_t custom_chip_r(offs_t offset);
void custom_chip_w(offs_t offset, uint16_t data);
DECLARE_WRITE_LINE_MEMBER( paula_int_w );
DECLARE_READ16_MEMBER( rom_mirror_r );
DECLARE_READ32_MEMBER( rom_mirror32_r );
uint16_t rom_mirror_r(offs_t offset, uint16_t mem_mask = ~0);
uint32_t rom_mirror32_r(offs_t offset, uint32_t mem_mask = ~0);
DECLARE_WRITE_LINE_MEMBER(fdc_dskblk_w);
DECLARE_WRITE_LINE_MEMBER(fdc_dsksyn_w);

18
src/mame/includes/ampoker2.h
View File

@ -31,15 +31,15 @@ protected:
virtual void machine_start() override;
private:
DECLARE_WRITE8_MEMBER(port30_w);
DECLARE_WRITE8_MEMBER(port31_w);
DECLARE_WRITE8_MEMBER(port32_w);
DECLARE_WRITE8_MEMBER(port33_w);
DECLARE_WRITE8_MEMBER(port34_w);
DECLARE_WRITE8_MEMBER(port35_w);
DECLARE_WRITE8_MEMBER(port36_w);
DECLARE_WRITE8_MEMBER(watchdog_reset_w);
DECLARE_WRITE8_MEMBER(videoram_w);
void port30_w(uint8_t data);
void port31_w(uint8_t data);
void port32_w(uint8_t data);
void port33_w(uint8_t data);
void port34_w(uint8_t data);
void port35_w(uint8_t data);
void port36_w(uint8_t data);
void watchdog_reset_w(uint8_t data);
void videoram_w(offs_t offset, uint8_t data);
TILE_GET_INFO_MEMBER(get_bg_tile_info);
TILE_GET_INFO_MEMBER(s2k_get_bg_tile_info);
void ampoker2_palette(palette_device &palette) const;

12
src/mame/includes/amspdwy.h
View File

@ -63,12 +63,12 @@ private:
uint8_t m_wheel_old[2];
uint8_t m_wheel_return[2];
DECLARE_READ8_MEMBER(amspdwy_wheel_0_r);
DECLARE_READ8_MEMBER(amspdwy_wheel_1_r);
DECLARE_WRITE8_MEMBER(amspdwy_flipscreen_w);
DECLARE_WRITE8_MEMBER(amspdwy_videoram_w);
DECLARE_WRITE8_MEMBER(amspdwy_colorram_w);
DECLARE_READ8_MEMBER(amspdwy_sound_r);
uint8_t amspdwy_wheel_0_r();
uint8_t amspdwy_wheel_1_r();
void amspdwy_flipscreen_w(uint8_t data);
void amspdwy_videoram_w(offs_t offset, uint8_t data);
void amspdwy_colorram_w(offs_t offset, uint8_t data);
uint8_t amspdwy_sound_r();
TILE_GET_INFO_MEMBER(get_tile_info);
TILEMAP_MAPPER_MEMBER(tilemap_scan_cols_back);

26
src/mame/includes/angelkds.h
View File

@ -48,19 +48,19 @@ public:
required_device<cpu_device> m_subcpu;
uint8_t angeklds_ff_r() { return 0xff; };
void angelkds_cpu_bank_write(uint8_t data);
DECLARE_WRITE8_MEMBER(angelkds_main_sound_w);
DECLARE_READ8_MEMBER(angelkds_main_sound_r);
DECLARE_WRITE8_MEMBER(angelkds_sub_sound_w);
DECLARE_READ8_MEMBER(angelkds_sub_sound_r);
DECLARE_WRITE8_MEMBER(angelkds_txvideoram_w);
DECLARE_WRITE8_MEMBER(angelkds_txbank_write);
DECLARE_WRITE8_MEMBER(angelkds_bgtopvideoram_w);
DECLARE_WRITE8_MEMBER(angelkds_bgtopbank_write);
DECLARE_WRITE8_MEMBER(angelkds_bgtopscroll_write);
DECLARE_WRITE8_MEMBER(angelkds_bgbotvideoram_w);
DECLARE_WRITE8_MEMBER(angelkds_bgbotbank_write);
DECLARE_WRITE8_MEMBER(angelkds_bgbotscroll_write);
DECLARE_WRITE8_MEMBER(angelkds_layer_ctrl_write);
void angelkds_main_sound_w(offs_t offset, uint8_t data);
uint8_t angelkds_main_sound_r(offs_t offset);
void angelkds_sub_sound_w(offs_t offset, uint8_t data);
uint8_t angelkds_sub_sound_r(offs_t offset);
void angelkds_txvideoram_w(offs_t offset, uint8_t data);
void angelkds_txbank_write(uint8_t data);
void angelkds_bgtopvideoram_w(offs_t offset, uint8_t data);
void angelkds_bgtopbank_write(uint8_t data);
void angelkds_bgtopscroll_write(uint8_t data);
void angelkds_bgbotvideoram_w(offs_t offset, uint8_t data);
void angelkds_bgbotbank_write(uint8_t data);
void angelkds_bgbotscroll_write(uint8_t data);
void angelkds_layer_ctrl_write(uint8_t data);
void init_angelkds();
TILE_GET_INFO_MEMBER(get_tx_tile_info);
TILE_GET_INFO_MEMBER(get_bgtop_tile_info);

110
src/mame/includes/apollo.h
View File

@ -155,53 +155,53 @@ public:
optional_device<apollo_graphics_15i> m_graphics;
optional_device<apollo_kbd_device> m_keyboard;
DECLARE_WRITE16_MEMBER(apollo_csr_status_register_w);
DECLARE_READ16_MEMBER(apollo_csr_status_register_r);
DECLARE_WRITE16_MEMBER(apollo_csr_control_register_w);
DECLARE_READ16_MEMBER(apollo_csr_control_register_r);
DECLARE_WRITE8_MEMBER(apollo_dma_1_w);
DECLARE_READ8_MEMBER(apollo_dma_1_r);
DECLARE_WRITE8_MEMBER(apollo_dma_2_w);
DECLARE_READ8_MEMBER(apollo_dma_2_r);
DECLARE_WRITE8_MEMBER(apollo_dma_page_register_w);
DECLARE_READ8_MEMBER(apollo_dma_page_register_r);
DECLARE_WRITE16_MEMBER(apollo_address_translation_map_w);
DECLARE_READ16_MEMBER(apollo_address_translation_map_r);
void apollo_csr_status_register_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t apollo_csr_status_register_r(offs_t offset, uint16_t mem_mask = ~0);
void apollo_csr_control_register_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t apollo_csr_control_register_r(offs_t offset, uint16_t mem_mask = ~0);
void apollo_dma_1_w(offs_t offset, uint8_t data);
uint8_t apollo_dma_1_r(offs_t offset);
void apollo_dma_2_w(offs_t offset, uint8_t data);
uint8_t apollo_dma_2_r(offs_t offset);
void apollo_dma_page_register_w(offs_t offset, uint8_t data);
uint8_t apollo_dma_page_register_r(offs_t offset);
void apollo_address_translation_map_w(offs_t offset, uint16_t data);
uint16_t apollo_address_translation_map_r(offs_t offset);
uint8_t apollo_dma_read_byte(offs_t offset);
void apollo_dma_write_byte(offs_t offset, uint8_t data);
uint8_t apollo_dma_read_word(offs_t offset);
void apollo_dma_write_word(offs_t offset, uint8_t data);
DECLARE_WRITE8_MEMBER(apollo_rtc_w);
DECLARE_READ8_MEMBER(apollo_rtc_r);
DECLARE_WRITE8_MEMBER(cache_control_register_w);
DECLARE_READ8_MEMBER(cache_status_register_r);
DECLARE_WRITE8_MEMBER(task_alias_register_w);
DECLARE_READ8_MEMBER(task_alias_register_r);
DECLARE_WRITE16_MEMBER(latch_page_on_parity_error_register_w);
DECLARE_READ16_MEMBER(latch_page_on_parity_error_register_r);
DECLARE_WRITE8_MEMBER(master_req_register_w);
DECLARE_READ8_MEMBER(master_req_register_r);
DECLARE_WRITE16_MEMBER(selective_clear_locations_w);
DECLARE_READ16_MEMBER(selective_clear_locations_r);
DECLARE_READ32_MEMBER(ram_with_parity_r);
DECLARE_WRITE32_MEMBER(ram_with_parity_w);
DECLARE_READ32_MEMBER(apollo_unmapped_r);
DECLARE_WRITE32_MEMBER(apollo_unmapped_w);
DECLARE_WRITE32_MEMBER(apollo_rom_w);
DECLARE_READ16_MEMBER(apollo_atbus_io_r);
DECLARE_WRITE16_MEMBER(apollo_atbus_io_w);
DECLARE_READ16_MEMBER(apollo_atbus_memory_r);
DECLARE_WRITE16_MEMBER(apollo_atbus_memory_w);
DECLARE_READ16_MEMBER(apollo_atbus_unmap_io_r);
DECLARE_WRITE16_MEMBER(apollo_atbus_unmap_io_w);
DECLARE_READ8_MEMBER(apollo_atbus_unmap_r);
DECLARE_WRITE8_MEMBER(apollo_atbus_unmap_w);
DECLARE_WRITE8_MEMBER(dn5500_memory_present_register_w);
DECLARE_READ8_MEMBER(dn5500_memory_present_register_r);
DECLARE_WRITE8_MEMBER(dn5500_11500_w);
DECLARE_READ8_MEMBER(dn5500_11500_r);
DECLARE_WRITE8_MEMBER(dn5500_io_protection_map_w);
DECLARE_READ8_MEMBER(dn5500_io_protection_map_r);
void apollo_rtc_w(offs_t offset, uint8_t data);
uint8_t apollo_rtc_r(offs_t offset);
void cache_control_register_w(offs_t offset, uint8_t data);
uint8_t cache_status_register_r(offs_t offset);
void task_alias_register_w(offs_t offset, uint8_t data);
uint8_t task_alias_register_r(offs_t offset);
void latch_page_on_parity_error_register_w(offs_t offset, uint16_t data);
uint16_t latch_page_on_parity_error_register_r(offs_t offset);
void master_req_register_w(offs_t offset, uint8_t data);
uint8_t master_req_register_r(offs_t offset);
void selective_clear_locations_w(offs_t offset, uint16_t data);
uint16_t selective_clear_locations_r(offs_t offset);
uint32_t ram_with_parity_r(offs_t offset, uint32_t mem_mask = ~0);
void ram_with_parity_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t apollo_unmapped_r(offs_t offset, uint32_t mem_mask = ~0);
void apollo_unmapped_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void apollo_rom_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint16_t apollo_atbus_io_r(offs_t offset, uint16_t mem_mask = ~0);
void apollo_atbus_io_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t apollo_atbus_memory_r(offs_t offset, uint16_t mem_mask = ~0);
void apollo_atbus_memory_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t apollo_atbus_unmap_io_r(offs_t offset, uint16_t mem_mask = ~0);
void apollo_atbus_unmap_io_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint8_t apollo_atbus_unmap_r(offs_t offset, uint8_t mem_mask = ~0);
void apollo_atbus_unmap_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0);
void dn5500_memory_present_register_w(offs_t offset, uint8_t data);
uint8_t dn5500_memory_present_register_r(offs_t offset);
void dn5500_11500_w(offs_t offset, uint8_t data);
uint8_t dn5500_11500_r(offs_t offset);
void dn5500_io_protection_map_w(offs_t offset, uint8_t data);
uint8_t dn5500_io_protection_map_r(offs_t offset);
void init_dsp3000();
void init_dsp5500();
void init_dn3500();
@ -384,8 +384,8 @@ public:
virtual const char *custom_instance_name() const noexcept override { return "node_id"; }
virtual const char *custom_brief_instance_name() const noexcept override { return "ni"; }
DECLARE_WRITE16_MEMBER(write);
DECLARE_READ16_MEMBER(read);
void write(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t read(offs_t offset, uint16_t mem_mask = ~0);
void set_node_id_from_disk();
@ -414,22 +414,22 @@ public:
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
// monochrome control
DECLARE_READ8_MEMBER( apollo_mcr_r );
DECLARE_WRITE8_MEMBER( apollo_mcr_w );
uint8_t apollo_mcr_r(offs_t offset);
void apollo_mcr_w(offs_t offset, uint8_t data);
// monochrome and color memory
DECLARE_READ16_MEMBER( apollo_mem_r );
DECLARE_WRITE16_MEMBER( apollo_mem_w );
uint16_t apollo_mem_r(offs_t offset, uint16_t mem_mask = ~0);
void apollo_mem_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
// color control
DECLARE_READ8_MEMBER( apollo_ccr_r );
DECLARE_WRITE8_MEMBER( apollo_ccr_w );
uint8_t apollo_ccr_r(offs_t offset);
void apollo_ccr_w(offs_t offset, uint8_t data);
DECLARE_READ16_MEMBER( apollo_mgm_r );
DECLARE_WRITE16_MEMBER( apollo_mgm_w );
uint16_t apollo_mgm_r(offs_t offset, uint16_t mem_mask = ~0);
void apollo_mgm_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
DECLARE_READ16_MEMBER( apollo_cgm_r );
DECLARE_WRITE16_MEMBER( apollo_cgm_w );
uint16_t apollo_cgm_r(offs_t offset, uint16_t mem_mask = ~0);
void apollo_cgm_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void vblank_state_changed(screen_device &screen, bool vblank_state);

14
src/mame/includes/appoooh.h
View File

@ -33,13 +33,13 @@ public:
void robowrese(machine_config &config);
protected:
DECLARE_WRITE8_MEMBER(adpcm_w);
DECLARE_WRITE8_MEMBER(scroll_w);
DECLARE_WRITE8_MEMBER(fg_videoram_w);
DECLARE_WRITE8_MEMBER(fg_colorram_w);
DECLARE_WRITE8_MEMBER(bg_videoram_w);
DECLARE_WRITE8_MEMBER(bg_colorram_w);
DECLARE_WRITE8_MEMBER(out_w);
void adpcm_w(uint8_t data);
void scroll_w(uint8_t data);
void fg_videoram_w(offs_t offset, uint8_t data);
void fg_colorram_w(offs_t offset, uint8_t data);
void bg_videoram_w(offs_t offset, uint8_t data);
void bg_colorram_w(offs_t offset, uint8_t data);
void out_w(uint8_t data);
TILE_GET_INFO_MEMBER(get_fg_tile_info);
TILE_GET_INFO_MEMBER(get_bg_tile_info);
virtual void machine_start() override;

22
src/mame/includes/aquarius.h
View File

@ -84,17 +84,17 @@ private:
uint8_t m_scrambler;
tilemap_t *m_tilemap;
DECLARE_WRITE8_MEMBER(aquarius_videoram_w);
DECLARE_WRITE8_MEMBER(aquarius_colorram_w);
DECLARE_READ8_MEMBER(cassette_r);
DECLARE_WRITE8_MEMBER(cassette_w);
DECLARE_READ8_MEMBER(vsync_r);
DECLARE_WRITE8_MEMBER(mapper_w);
DECLARE_READ8_MEMBER(printer_r);
DECLARE_WRITE8_MEMBER(printer_w);
DECLARE_READ8_MEMBER(keyboard_r);
DECLARE_WRITE8_MEMBER(scrambler_w);
DECLARE_READ8_MEMBER(cartridge_r);
void aquarius_videoram_w(offs_t offset, uint8_t data);
void aquarius_colorram_w(offs_t offset, uint8_t data);
uint8_t cassette_r();
void cassette_w(uint8_t data);
uint8_t vsync_r();
void mapper_w(uint8_t data);
uint8_t printer_r();
void printer_w(uint8_t data);
uint8_t keyboard_r(offs_t offset);
void scrambler_w(uint8_t data);
uint8_t cartridge_r(offs_t offset);
TILE_GET_INFO_MEMBER(aquarius_gettileinfo);
void aquarius_palette(palette_device &palette) const;
uint32_t screen_update_aquarius(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);

4
src/mame/includes/arabian.h
View File

@ -49,8 +49,8 @@ private:
uint8_t mcu_portk_r();
void mcu_port_o_w(uint8_t data);
void mcu_port_p_w(uint8_t data);
DECLARE_WRITE8_MEMBER(arabian_blitter_w);
DECLARE_WRITE8_MEMBER(arabian_videoram_w);
void arabian_blitter_w(offs_t offset, uint8_t data);
void arabian_videoram_w(offs_t offset, uint8_t data);
void ay8910_porta_w(uint8_t data);
void ay8910_portb_w(uint8_t data);
void arabian_palette(palette_device &palette) const;

18
src/mame/includes/archimds.h
View File

@ -71,13 +71,13 @@ public:
void archimedes_clear_irq_b(int mask);
void archimedes_clear_fiq(int mask);
DECLARE_READ32_MEMBER(aristmk5_drame_memc_logical_r);
DECLARE_READ32_MEMBER(archimedes_memc_logical_r);
DECLARE_WRITE32_MEMBER(archimedes_memc_logical_w);
DECLARE_WRITE32_MEMBER(archimedes_memc_w);
DECLARE_WRITE32_MEMBER(archimedes_memc_page_w);
DECLARE_READ32_MEMBER(archimedes_ioc_r);
DECLARE_WRITE32_MEMBER(archimedes_ioc_w);
uint32_t aristmk5_drame_memc_logical_r(offs_t offset);
uint32_t archimedes_memc_logical_r(offs_t offset);
void archimedes_memc_logical_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void archimedes_memc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void archimedes_memc_page_w(uint32_t data);
uint32_t archimedes_ioc_r(offs_t offset, uint32_t mem_mask = ~0);
void archimedes_ioc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
DECLARE_WRITE_LINE_MEMBER( a310_kart_rx_w );
DECLARE_WRITE_LINE_MEMBER( a310_kart_tx_w );
@ -112,8 +112,8 @@ private:
void latch_timer_cnt(int tmr);
void a310_set_timer(int tmr);
DECLARE_READ32_MEMBER(ioc_ctrl_r);
DECLARE_WRITE32_MEMBER(ioc_ctrl_w);
uint32_t ioc_ctrl_r(offs_t offset);
void ioc_ctrl_w(offs_t offset, uint32_t data);
uint32_t *m_archimedes_memc_physmem;
uint32_t m_memc_pagesize;

26
src/mame/includes/arkanoid.h
View File

@ -66,19 +66,19 @@ public:
required_device<palette_device> m_palette;
DECLARE_READ8_MEMBER(arkanoid_bootleg_f000_r);
DECLARE_READ8_MEMBER(arkanoid_bootleg_f002_r);
DECLARE_WRITE8_MEMBER(arkanoid_bootleg_d018_w);
DECLARE_READ8_MEMBER(arkanoid_bootleg_d008_r);
DECLARE_WRITE8_MEMBER(arkanoid_videoram_w);
DECLARE_WRITE8_MEMBER(arkanoid_d008_w);
DECLARE_WRITE8_MEMBER(tetrsark_d008_w);
DECLARE_WRITE8_MEMBER(brixian_d008_w);
DECLARE_WRITE8_MEMBER(hexa_d008_w);
DECLARE_READ8_MEMBER(hexaa_f000_r);
DECLARE_WRITE8_MEMBER(hexaa_f000_w);
DECLARE_WRITE8_MEMBER(hexaa_sub_80_w);
DECLARE_READ8_MEMBER(hexaa_sub_90_r);
uint8_t arkanoid_bootleg_f000_r();
uint8_t arkanoid_bootleg_f002_r();
void arkanoid_bootleg_d018_w(uint8_t data);
uint8_t arkanoid_bootleg_d008_r();
void arkanoid_videoram_w(offs_t offset, uint8_t data);
void arkanoid_d008_w(uint8_t data);
void tetrsark_d008_w(uint8_t data);
void brixian_d008_w(uint8_t data);
void hexa_d008_w(uint8_t data);
uint8_t hexaa_f000_r();
void hexaa_f000_w(uint8_t data);
void hexaa_sub_80_w(uint8_t data);
uint8_t hexaa_sub_90_r();
DECLARE_CUSTOM_INPUT_MEMBER(arkanoid_semaphore_input_r);
uint8_t input_mux_r();
void init_block2();

10
src/mame/includes/artmagic.h
View File

@ -58,11 +58,11 @@ public:
uint8_t m_blitter_page;
attotime m_blitter_busy_until;
emu_timer * m_irq_off_timer;
DECLARE_WRITE16_MEMBER(control_w);
DECLARE_READ16_MEMBER(ultennis_hack_r);
DECLARE_WRITE16_MEMBER(protection_bit_w);
DECLARE_READ16_MEMBER(blitter_r);
DECLARE_WRITE16_MEMBER(blitter_w);
void control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
uint16_t ultennis_hack_r();
void protection_bit_w(offs_t offset, uint16_t data);
uint16_t blitter_r();
void blitter_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
DECLARE_WRITE_LINE_MEMBER(m68k_gen_int);
TMS340X0_TO_SHIFTREG_CB_MEMBER(to_shiftreg);
TMS340X0_FROM_SHIFTREG_CB_MEMBER(from_shiftreg);

10
src/mame/includes/asterix.h
View File

@ -50,11 +50,11 @@ public:
required_device<k056832_device> m_k056832;
required_device<k05324x_device> m_k053244;
required_device<k053251_device> m_k053251;
DECLARE_WRITE16_MEMBER(control2_w);
DECLARE_WRITE8_MEMBER(sound_arm_nmi_w);
DECLARE_WRITE16_MEMBER(sound_irq_w);
DECLARE_WRITE16_MEMBER(protection_w);
DECLARE_WRITE16_MEMBER(asterix_spritebank_w);
void control2_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void sound_arm_nmi_w(uint8_t data);
void sound_irq_w(uint16_t data);
void protection_w(address_space &space, offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void asterix_spritebank_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void init_asterix();
virtual void machine_start() override;
virtual void machine_reset() override;

22
src/mame/includes/asteroid.h
View File

@ -43,18 +43,18 @@ public:
DECLARE_WRITE_LINE_MEMBER(coin_counter_left_w);
DECLARE_WRITE_LINE_MEMBER(coin_counter_center_w);
DECLARE_WRITE_LINE_MEMBER(coin_counter_right_w);
DECLARE_READ8_MEMBER(asteroid_IN0_r);
DECLARE_READ8_MEMBER(asterock_IN0_r);
DECLARE_READ8_MEMBER(asteroid_IN1_r);
DECLARE_READ8_MEMBER(asteroid_DSW1_r);
DECLARE_WRITE8_MEMBER(asteroid_explode_w);
DECLARE_WRITE8_MEMBER(asteroid_thump_w);
DECLARE_WRITE8_MEMBER(asteroid_noise_reset_w);
DECLARE_WRITE8_MEMBER(llander_snd_reset_w);
DECLARE_WRITE8_MEMBER(llander_sounds_w);
uint8_t asteroid_IN0_r(offs_t offset);
uint8_t asterock_IN0_r(offs_t offset);
uint8_t asteroid_IN1_r(offs_t offset);
uint8_t asteroid_DSW1_r(offs_t offset);
void asteroid_explode_w(uint8_t data);
void asteroid_thump_w(uint8_t data);
void asteroid_noise_reset_w(uint8_t data);
void llander_snd_reset_w(uint8_t data);
void llander_sounds_w(uint8_t data);
DECLARE_READ8_MEMBER(earom_read);
DECLARE_WRITE8_MEMBER(earom_write);
uint8_t earom_read();
void earom_write(offs_t offset, uint8_t data);
void earom_control_w(uint8_t data);
DECLARE_READ_LINE_MEMBER(clock_r);

46
src/mame/includes/astrocde.h
View File

@ -111,25 +111,25 @@ public:
uint8_t m_profpac_writemode;
uint16_t m_profpac_writemask;
uint8_t m_profpac_vw;
DECLARE_WRITE8_MEMBER(protected_ram_enable_w);
DECLARE_READ8_MEMBER(protected_ram_r);
DECLARE_WRITE8_MEMBER(protected_ram_w);
void protected_ram_enable_w(uint8_t data);
uint8_t protected_ram_r(offs_t offset);
void protected_ram_w(offs_t offset, uint8_t data);
uint8_t input_mux_r(offs_t offset);
template<int Coin> DECLARE_WRITE_LINE_MEMBER(coin_counter_w);
template<int Bit> DECLARE_WRITE_LINE_MEMBER(sparkle_w);
DECLARE_WRITE_LINE_MEMBER(gorf_sound_switch_w);
DECLARE_WRITE8_MEMBER(profpac_banksw_w);
DECLARE_WRITE8_MEMBER(demndrgn_banksw_w);
DECLARE_READ8_MEMBER(video_register_r);
DECLARE_WRITE8_MEMBER(video_register_w);
DECLARE_WRITE8_MEMBER(astrocade_funcgen_w);
DECLARE_WRITE8_MEMBER(expand_register_w);
DECLARE_WRITE8_MEMBER(astrocade_pattern_board_w);
DECLARE_WRITE8_MEMBER(profpac_page_select_w);
DECLARE_READ8_MEMBER(profpac_intercept_r);
DECLARE_WRITE8_MEMBER(profpac_screenram_ctrl_w);
DECLARE_READ8_MEMBER(profpac_videoram_r);
DECLARE_WRITE8_MEMBER(profpac_videoram_w);
void profpac_banksw_w(uint8_t data);
void demndrgn_banksw_w(uint8_t data);
uint8_t video_register_r(offs_t offset);
void video_register_w(offs_t offset, uint8_t data);
void astrocade_funcgen_w(address_space &space, offs_t offset, uint8_t data);
void expand_register_w(uint8_t data);
void astrocade_pattern_board_w(offs_t offset, uint8_t data);
void profpac_page_select_w(uint8_t data);
uint8_t profpac_intercept_r();
void profpac_screenram_ctrl_w(offs_t offset, uint8_t data);
uint8_t profpac_videoram_r(offs_t offset);
void profpac_videoram_w(offs_t offset, uint8_t data);
DECLARE_INPUT_CHANGED_MEMBER(spacezap_monitor);
DECLARE_WRITE_LINE_MEMBER(lightpen_trigger_w);
void init_profpac();
@ -197,8 +197,8 @@ public:
void seawolf2(machine_config &config);
private:
DECLARE_WRITE8_MEMBER(sound_1_w);
DECLARE_WRITE8_MEMBER(sound_2_w);
void sound_1_w(uint8_t data);
void sound_2_w(uint8_t data);
void port_map_discrete(address_map &map);
@ -220,8 +220,8 @@ public:
void ebases(machine_config &config);
DECLARE_CUSTOM_INPUT_MEMBER(trackball_r);
private:
DECLARE_WRITE8_MEMBER(trackball_select_w);
DECLARE_WRITE8_MEMBER(coin_w);
void trackball_select_w(uint8_t data);
void coin_w(uint8_t data);
void ebases_map(address_map &map);
void port_map_ebases(address_map &map);
@ -241,7 +241,7 @@ public:
DECLARE_CUSTOM_INPUT_MEMBER(joystick_r);
private:
DECLARE_WRITE_LINE_MEMBER(input_select_w);
DECLARE_WRITE8_MEMBER(sound_w);
void sound_w(uint8_t data);
void port_map_16col_pattern_demndrgn(address_map &map);
@ -259,9 +259,9 @@ public:
void tenpindx(machine_config &config);
private:
DECLARE_WRITE8_MEMBER(lamp_w);
DECLARE_WRITE8_MEMBER(counter_w);
DECLARE_WRITE8_MEMBER(lights_w);
void lamp_w(offs_t offset, uint8_t data);
void counter_w(uint8_t data);
void lights_w(uint8_t data);
virtual void machine_start() override;

30
src/mame/includes/astrof.h
View File

@ -51,24 +51,24 @@ public:
optional_device<samples_device> m_samples; // astrof & abattle
optional_device<sn76477_device> m_sn; // tomahawk
required_device<screen_device> m_screen;
DECLARE_READ8_MEMBER(irq_clear_r);
DECLARE_WRITE8_MEMBER(astrof_videoram_w);
DECLARE_WRITE8_MEMBER(tomahawk_videoram_w);
DECLARE_WRITE8_MEMBER(video_control_1_w);
DECLARE_WRITE8_MEMBER(astrof_video_control_2_w);
DECLARE_WRITE8_MEMBER(spfghmk2_video_control_2_w);
DECLARE_WRITE8_MEMBER(tomahawk_video_control_2_w);
DECLARE_READ8_MEMBER(shoot_r);
DECLARE_READ8_MEMBER(abattle_coin_prot_r);
DECLARE_READ8_MEMBER(afire_coin_prot_r);
DECLARE_READ8_MEMBER(tomahawk_protection_r);
uint8_t irq_clear_r();
void astrof_videoram_w(offs_t offset, uint8_t data);
void tomahawk_videoram_w(offs_t offset, uint8_t data);
void video_control_1_w(uint8_t data);
void astrof_video_control_2_w(uint8_t data);
void spfghmk2_video_control_2_w(uint8_t data);
void tomahawk_video_control_2_w(uint8_t data);
uint8_t shoot_r();
uint8_t abattle_coin_prot_r();
uint8_t afire_coin_prot_r();
uint8_t tomahawk_protection_r();
DECLARE_CUSTOM_INPUT_MEMBER(astrof_p1_controls_r);
DECLARE_CUSTOM_INPUT_MEMBER(astrof_p2_controls_r);
DECLARE_CUSTOM_INPUT_MEMBER(tomahawk_controls_r);
DECLARE_WRITE8_MEMBER(astrof_audio_1_w);
DECLARE_WRITE8_MEMBER(astrof_audio_2_w);
DECLARE_WRITE8_MEMBER(spfghmk2_audio_w);
DECLARE_WRITE8_MEMBER(tomahawk_audio_w);
void astrof_audio_1_w(uint8_t data);
void astrof_audio_2_w(uint8_t data);
void spfghmk2_audio_w(uint8_t data);
void tomahawk_audio_w(uint8_t data);
DECLARE_INPUT_CHANGED_MEMBER(coin_inserted);
DECLARE_INPUT_CHANGED_MEMBER(service_coin_inserted);
void init_afire();

28
src/mame/includes/atarifb.h
View File

@ -42,20 +42,20 @@ public:
m_leds(*this, "led%u", 0U)
{ }
DECLARE_WRITE8_MEMBER(atarifb_out1_w);
DECLARE_WRITE8_MEMBER(atarifb4_out1_w);
DECLARE_WRITE8_MEMBER(abaseb_out1_w);
DECLARE_WRITE8_MEMBER(soccer_out1_w);
DECLARE_WRITE8_MEMBER(atarifb_out2_w);
DECLARE_WRITE8_MEMBER(soccer_out2_w);
DECLARE_WRITE8_MEMBER(atarifb_out3_w);
DECLARE_READ8_MEMBER(atarifb_in0_r);
DECLARE_READ8_MEMBER(atarifb_in2_r);
DECLARE_READ8_MEMBER(atarifb4_in0_r);
DECLARE_READ8_MEMBER(atarifb4_in2_r);
DECLARE_WRITE8_MEMBER(atarifb_alpha1_videoram_w);
DECLARE_WRITE8_MEMBER(atarifb_alpha2_videoram_w);
DECLARE_WRITE8_MEMBER(atarifb_field_videoram_w);
void atarifb_out1_w(uint8_t data);
void atarifb4_out1_w(uint8_t data);
void abaseb_out1_w(uint8_t data);
void soccer_out1_w(uint8_t data);
void atarifb_out2_w(uint8_t data);
void soccer_out2_w(uint8_t data);
void atarifb_out3_w(uint8_t data);
uint8_t atarifb_in0_r();
uint8_t atarifb_in2_r();
uint8_t atarifb4_in0_r();
uint8_t atarifb4_in2_r();
void atarifb_alpha1_videoram_w(offs_t offset, uint8_t data);
void atarifb_alpha2_videoram_w(offs_t offset, uint8_t data);
void atarifb_field_videoram_w(offs_t offset, uint8_t data);
TILE_GET_INFO_MEMBER(alpha1_get_tile_info);
TILE_GET_INFO_MEMBER(alpha2_get_tile_info);
TILE_GET_INFO_MEMBER(field_get_tile_info);

8
src/mame/includes/atarig1.h
View File

@ -56,10 +56,10 @@ public:
virtual void device_post_load() override;
void video_int_ack_w(uint16_t data = 0);
TIMER_DEVICE_CALLBACK_MEMBER(scanline_update);
DECLARE_WRITE16_MEMBER(mo_command_w);
DECLARE_WRITE16_MEMBER(a2d_select_w);
DECLARE_READ16_MEMBER(a2d_data_r);
DECLARE_READ16_MEMBER(pitfightb_cheap_slapstic_r);
void mo_command_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void a2d_select_w(offs_t offset, uint16_t data);
uint16_t a2d_data_r();
uint16_t pitfightb_cheap_slapstic_r(offs_t offset);
void update_bank(int bank);
void init_hydrap();
void init_hydra();

16
src/mame/includes/atarig42.h
View File

@ -37,10 +37,10 @@ protected:
virtual void machine_start() override;
void video_int_ack_w(uint16_t data = 0);
TIMER_DEVICE_CALLBACK_MEMBER(scanline_update);
DECLARE_WRITE8_MEMBER(a2d_select_w);
DECLARE_READ8_MEMBER(a2d_data_r);
DECLARE_WRITE16_MEMBER(io_latch_w);
DECLARE_WRITE16_MEMBER(mo_command_w);
void a2d_select_w(offs_t offset, uint8_t data);
uint8_t a2d_data_r(offs_t offset);
void io_latch_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void mo_command_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
TILE_GET_INFO_MEMBER(get_alpha_tile_info);
TILE_GET_INFO_MEMBER(get_playfield_tile_info);
TILEMAP_MAPPER_MEMBER(atarig42_playfield_scan);
@ -84,8 +84,8 @@ public:
void atarig42_0x200(machine_config &config);
protected:
DECLARE_READ16_MEMBER(roadriot_sloop_data_r);
DECLARE_WRITE16_MEMBER(roadriot_sloop_data_w);
uint16_t roadriot_sloop_data_r(offs_t offset);
void roadriot_sloop_data_w(offs_t offset, uint16_t data);
void roadriot_sloop_tweak(int offset);
};
@ -97,8 +97,8 @@ public:
void atarig42_0x400(machine_config &config);
protected:
DECLARE_READ16_MEMBER(guardians_sloop_data_r);
DECLARE_WRITE16_MEMBER(guardians_sloop_data_w);
uint16_t guardians_sloop_data_r(offs_t offset);
void guardians_sloop_data_w(offs_t offset, uint16_t data);
void guardians_sloop_tweak(int offset);
};

22
src/mame/includes/atarigt.h
View File

@ -82,17 +82,17 @@ public:
void scanline_int_ack_w(uint32_t data = 0);
void video_int_ack_w(uint32_t data = 0);
TIMER_DEVICE_CALLBACK_MEMBER(scanline_update);
DECLARE_READ32_MEMBER(special_port2_r);
DECLARE_READ32_MEMBER(special_port3_r);
DECLARE_READ8_MEMBER(analog_port_r);
DECLARE_WRITE32_MEMBER(latch_w);
DECLARE_WRITE32_MEMBER(mo_command_w);
DECLARE_WRITE32_MEMBER(led_w);
DECLARE_READ32_MEMBER(sound_data_r);
DECLARE_WRITE32_MEMBER(sound_data_w);
DECLARE_READ32_MEMBER(colorram_protection_r);
DECLARE_WRITE32_MEMBER(colorram_protection_w);
DECLARE_WRITE32_MEMBER(tmek_pf_w);
uint32_t special_port2_r();
uint32_t special_port3_r();
uint8_t analog_port_r(offs_t offset);
void latch_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void mo_command_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void led_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t sound_data_r(offs_t offset, uint32_t mem_mask = ~0);
void sound_data_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t colorram_protection_r(address_space &space, offs_t offset, uint32_t mem_mask = ~0);
void colorram_protection_w(address_space &space, offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void tmek_pf_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void cage_irq_callback(uint8_t data);

18
src/mame/includes/atarigx2.h
View File

@ -43,19 +43,19 @@ protected:
virtual void video_start() override;
void video_int_ack_w(uint32_t data = 0);
TIMER_DEVICE_CALLBACK_MEMBER(scanline_update);
DECLARE_READ32_MEMBER(special_port2_r);
DECLARE_READ32_MEMBER(special_port3_r);
DECLARE_READ8_MEMBER(a2d_data_r);
DECLARE_WRITE32_MEMBER(latch_w);
DECLARE_WRITE32_MEMBER(mo_command_w);
DECLARE_WRITE32_MEMBER(atarigx2_protection_w);
DECLARE_READ32_MEMBER(atarigx2_protection_r);
DECLARE_READ32_MEMBER(rrreveng_prot_r);
uint32_t special_port2_r();
uint32_t special_port3_r();
uint8_t a2d_data_r(offs_t offset);
void latch_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void mo_command_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
void atarigx2_protection_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
uint32_t atarigx2_protection_r(offs_t offset, uint32_t mem_mask = ~0);
uint32_t rrreveng_prot_r();
TILE_GET_INFO_MEMBER(get_alpha_tile_info);
TILE_GET_INFO_MEMBER(get_playfield_tile_info);
TILEMAP_MAPPER_MEMBER(atarigx2_playfield_scan);
uint32_t screen_update_atarigx2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
DECLARE_WRITE16_MEMBER( atarigx2_mo_control_w );
void atarigx2_mo_control_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void atarigx2(machine_config &config);
void main_map(address_map &map);

144
src/mame/includes/atarist.h
View File

@ -168,42 +168,42 @@ protected:
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
// video
DECLARE_READ8_MEMBER( shifter_base_r );
DECLARE_READ8_MEMBER( shifter_counter_r );
DECLARE_READ8_MEMBER( shifter_sync_r );
DECLARE_READ16_MEMBER( shifter_palette_r );
DECLARE_READ8_MEMBER( shifter_mode_r );
uint8_t shifter_base_r(offs_t offset);
uint8_t shifter_counter_r(offs_t offset);
uint8_t shifter_sync_r();
uint16_t shifter_palette_r(offs_t offset);
uint8_t shifter_mode_r();
DECLARE_WRITE8_MEMBER( shifter_base_w );
DECLARE_WRITE8_MEMBER( shifter_sync_w );
DECLARE_WRITE16_MEMBER( shifter_palette_w );
DECLARE_WRITE8_MEMBER( shifter_mode_w );
void shifter_base_w(offs_t offset, uint8_t data);
void shifter_sync_w(uint8_t data);
void shifter_palette_w(offs_t offset, uint16_t data);
void shifter_mode_w(uint8_t data);
DECLARE_READ16_MEMBER( blitter_halftone_r );
DECLARE_READ16_MEMBER( blitter_src_inc_x_r );
DECLARE_READ16_MEMBER( blitter_src_inc_y_r );
DECLARE_READ16_MEMBER( blitter_src_r );
DECLARE_READ16_MEMBER( blitter_end_mask_r );
DECLARE_READ16_MEMBER( blitter_dst_inc_x_r );
DECLARE_READ16_MEMBER( blitter_dst_inc_y_r );
DECLARE_READ16_MEMBER( blitter_dst_r );
DECLARE_READ16_MEMBER( blitter_count_x_r );
DECLARE_READ16_MEMBER( blitter_count_y_r );
DECLARE_READ16_MEMBER( blitter_op_r );
DECLARE_READ16_MEMBER( blitter_ctrl_r );
uint16_t blitter_halftone_r(offs_t offset);
uint16_t blitter_src_inc_x_r();
uint16_t blitter_src_inc_y_r();
uint16_t blitter_src_r(offs_t offset);
uint16_t blitter_end_mask_r(offs_t offset);
uint16_t blitter_dst_inc_x_r();
uint16_t blitter_dst_inc_y_r();
uint16_t blitter_dst_r(offs_t offset);
uint16_t blitter_count_x_r();
uint16_t blitter_count_y_r();
uint16_t blitter_op_r(offs_t offset, uint16_t mem_mask = ~0);
uint16_t blitter_ctrl_r(offs_t offset, uint16_t mem_mask = ~0);
DECLARE_WRITE16_MEMBER( blitter_halftone_w );
DECLARE_WRITE16_MEMBER( blitter_src_inc_x_w );
DECLARE_WRITE16_MEMBER( blitter_src_inc_y_w );
DECLARE_WRITE16_MEMBER( blitter_src_w );
DECLARE_WRITE16_MEMBER( blitter_end_mask_w );
DECLARE_WRITE16_MEMBER( blitter_dst_inc_x_w );
DECLARE_WRITE16_MEMBER( blitter_dst_inc_y_w );
DECLARE_WRITE16_MEMBER( blitter_dst_w );
DECLARE_WRITE16_MEMBER( blitter_count_x_w );
DECLARE_WRITE16_MEMBER( blitter_count_y_w );
DECLARE_WRITE16_MEMBER( blitter_op_w );
DECLARE_WRITE16_MEMBER( blitter_ctrl_w );
void blitter_halftone_w(offs_t offset, uint16_t data);
void blitter_src_inc_x_w(uint16_t data);
void blitter_src_inc_y_w(uint16_t data);
void blitter_src_w(offs_t offset, uint16_t data);
void blitter_end_mask_w(offs_t offset, uint16_t data);
void blitter_dst_inc_x_w(uint16_t data);
void blitter_dst_inc_y_w(uint16_t data);
void blitter_dst_w(offs_t offset, uint16_t data);
void blitter_count_x_w(uint16_t data);
void blitter_count_y_w(uint16_t data);
void blitter_op_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void blitter_ctrl_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void mouse_tick();
inline pen_t shift_mode_0();
@ -220,16 +220,16 @@ protected:
void blitter_tick();
// driver
DECLARE_READ16_MEMBER( fdc_data_r );
DECLARE_WRITE16_MEMBER( fdc_data_w );
DECLARE_READ16_MEMBER( dma_status_r );
DECLARE_WRITE16_MEMBER( dma_mode_w );
DECLARE_READ8_MEMBER( dma_counter_r );
DECLARE_WRITE8_MEMBER( dma_base_w );
DECLARE_READ8_MEMBER( mmu_r );
DECLARE_WRITE8_MEMBER( mmu_w );
DECLARE_READ16_MEMBER( berr_r );
DECLARE_WRITE16_MEMBER( berr_w );
uint16_t fdc_data_r(offs_t offset);
void fdc_data_w(offs_t offset, uint16_t data);
uint16_t dma_status_r();
void dma_mode_w(uint16_t data);
uint8_t dma_counter_r(offs_t offset);
void dma_base_w(offs_t offset, uint8_t data);
uint8_t mmu_r();
void mmu_w(uint8_t data);
uint16_t berr_r();
void berr_w(uint16_t data);
uint8_t ikbd_port1_r();
uint8_t ikbd_port2_r();
void ikbd_port2_w(uint8_t data);
@ -353,8 +353,8 @@ public:
: st_state(mconfig, type, tag)
{ }
DECLARE_READ16_MEMBER( fpu_r );
DECLARE_WRITE16_MEMBER( fpu_w );
uint16_t fpu_r();
void fpu_w(uint16_t data);
void megast(machine_config &config);
void megast_map(address_map &map);
};
@ -375,29 +375,29 @@ public:
optional_device<lmc1992_device> m_lmc1992;
DECLARE_READ8_MEMBER( shifter_base_low_r );
DECLARE_WRITE8_MEMBER( shifter_base_low_w );
DECLARE_READ8_MEMBER( shifter_counter_r );
DECLARE_WRITE8_MEMBER( shifter_counter_w );
DECLARE_WRITE16_MEMBER( shifter_palette_w );
DECLARE_READ8_MEMBER( shifter_lineofs_r );
DECLARE_WRITE8_MEMBER( shifter_lineofs_w );
DECLARE_READ8_MEMBER( shifter_pixelofs_r );
DECLARE_WRITE8_MEMBER( shifter_pixelofs_w );
uint8_t shifter_base_low_r();
void shifter_base_low_w(uint8_t data);
uint8_t shifter_counter_r(offs_t offset);
void shifter_counter_w(offs_t offset, uint8_t data);
void shifter_palette_w(offs_t offset, uint16_t data);
uint8_t shifter_lineofs_r();
void shifter_lineofs_w(uint8_t data);
uint8_t shifter_pixelofs_r();
void shifter_pixelofs_w(uint8_t data);
DECLARE_READ8_MEMBER( sound_dma_control_r );
DECLARE_READ8_MEMBER( sound_dma_base_r );
DECLARE_READ8_MEMBER( sound_dma_counter_r );
DECLARE_READ8_MEMBER( sound_dma_end_r );
DECLARE_READ8_MEMBER( sound_mode_r );
DECLARE_WRITE8_MEMBER( sound_dma_control_w );
DECLARE_WRITE8_MEMBER( sound_dma_base_w );
DECLARE_WRITE8_MEMBER( sound_dma_end_w );
DECLARE_WRITE8_MEMBER( sound_mode_w );
DECLARE_READ16_MEMBER( microwire_data_r );
DECLARE_WRITE16_MEMBER( microwire_data_w );
DECLARE_READ16_MEMBER( microwire_mask_r );
DECLARE_WRITE16_MEMBER( microwire_mask_w );
uint8_t sound_dma_control_r();
uint8_t sound_dma_base_r(offs_t offset);
uint8_t sound_dma_counter_r(offs_t offset);
uint8_t sound_dma_end_r(offs_t offset);
uint8_t sound_mode_r();
void sound_dma_control_w(uint8_t data);
void sound_dma_base_w(offs_t offset, uint8_t data);
void sound_dma_end_w(offs_t offset, uint8_t data);
void sound_mode_w(uint8_t data);
uint16_t microwire_data_r();
void microwire_data_w(uint16_t data);
uint16_t microwire_mask_r();
void microwire_mask_w(uint16_t data);
DECLARE_WRITE_LINE_MEMBER( write_monochrome );
@ -450,8 +450,8 @@ public:
: ste_state(mconfig, type, tag)
{ }
DECLARE_READ16_MEMBER( cache_r );
DECLARE_WRITE16_MEMBER( cache_w );
uint16_t cache_r();
void cache_w(uint16_t data);
uint16_t m_cache;
void megaste(machine_config &config);
@ -471,11 +471,11 @@ public:
required_ioport m_sw400;
DECLARE_READ16_MEMBER( config_r );
DECLARE_WRITE16_MEMBER( lcd_control_w );
uint16_t config_r();
void lcd_control_w(uint16_t data);
void psg_pa_w(uint8_t data);
DECLARE_READ8_MEMBER( mfp_gpio_r );
uint8_t mfp_gpio_r();
void stbook_map(address_map &map);
protected:
virtual void machine_start() override;

10
src/mame/includes/atarisy1.h
View File

@ -135,12 +135,12 @@ protected:
virtual void update_timers(int scanline);
void decode_gfx(uint16_t *pflookup, uint16_t *molookup);
int get_bank(uint8_t prom1, uint8_t prom2, int bpp);
DECLARE_READ16_MEMBER( atarisy1_int3state_r );
DECLARE_WRITE16_MEMBER( atarisy1_spriteram_w );
uint16_t atarisy1_int3state_r();
void atarisy1_spriteram_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void bankselect_w(uint8_t data);
DECLARE_WRITE16_MEMBER( atarisy1_xscroll_w );
DECLARE_WRITE16_MEMBER( atarisy1_yscroll_w );
DECLARE_WRITE16_MEMBER( atarisy1_priority_w );
void atarisy1_xscroll_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void atarisy1_yscroll_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
void atarisy1_priority_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
static const atari_motion_objects_config s_mob_config;
void add_adc(machine_config &config);

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