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lk3000: invert rom addressing
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0e6677c070
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@ -287,5 +287,5 @@ ROM_END
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******************************************************************************/
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******************************************************************************/
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// YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS
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// YEAR NAME PARENT CMP MACHINE INPUT STATE INIT COMPANY, FULLNAME, FLAGS
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CONS( 1986, feleg , 0, 0, feleg, feleg, as12_state, empty_init, "Fidelity Electronics", "Elegance Chess Challenger (model 6085)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_TIMING )
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CONS( 1986, feleg, 0, 0, feleg, feleg, as12_state, empty_init, "Fidelity Electronics", "Elegance Chess Challenger (model 6085)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_TIMING )
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CONS( 1985, felega, feleg, 0, felega, felega, as12_state, empty_init, "Fidelity Electronics", "Elegance Chess Challenger (model AS12)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_TIMING )
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CONS( 1985, felega, feleg, 0, felega, felega, as12_state, empty_init, "Fidelity Electronics", "Elegance Chess Challenger (model AS12)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_TIMING )
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@ -154,10 +154,10 @@ u8 lk3000_state::p1_r()
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data |= m_inputs[~m_p4 & 7]->read();
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data |= m_inputs[~m_p4 & 7]->read();
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// read rom data
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// read rom data
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if (m_p5 & 0x20)
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if (~m_p5 & 0x20)
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{
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{
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// P00-P06: A0-A6, P50-P54: A7-A11, P07 selects chip
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// P00-P06: A0-A6, P50-P54: A7-A11, P07 selects chip
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u16 offset = (m_p0 & 0x7f) | (m_p5 << 7 & 0xf80) | (m_p0 << 5 & 0x1000);
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u16 offset = (~m_p0 & 0x7f) | (~m_p5 << 7 & 0xf80) | (~m_p0 << 5 & 0x1000);
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data |= m_cart->read_rom(offset + 0x800);
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data |= m_cart->read_rom(offset + 0x800);
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}
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}
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@ -317,10 +317,10 @@ void lk3000_state::lk3000(machine_config &config)
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psu.write_b().set(FUNC(lk3000_state::p5_w));
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psu.write_b().set(FUNC(lk3000_state::p5_w));
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// video hardware
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// video hardware
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DL1414T(config, m_dl1414[0], u32(0)).update().set(FUNC(lk3000_state::update_display<0>));
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DL1414T(config, m_dl1414[0], 0U).update().set(FUNC(lk3000_state::update_display<0>));
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DL1414T(config, m_dl1414[1], u32(0)).update().set(FUNC(lk3000_state::update_display<1>));
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DL1414T(config, m_dl1414[1], 0U).update().set(FUNC(lk3000_state::update_display<1>));
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DL1414T(config, m_dl1414[2], u32(0)).update().set(FUNC(lk3000_state::update_display<2>));
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DL1414T(config, m_dl1414[2], 0U).update().set(FUNC(lk3000_state::update_display<2>));
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DL1414T(config, m_dl1414[3], u32(0)).update().set(FUNC(lk3000_state::update_display<3>));
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DL1414T(config, m_dl1414[3], 0U).update().set(FUNC(lk3000_state::update_display<3>));
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config.set_default_layout(layout_lk3000);
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config.set_default_layout(layout_lk3000);
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// cartridge
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// cartridge
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@ -30,8 +30,8 @@ Octo (listed differences):
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as 15MHz on the box, but measured ~12MHz (older Octo version is probably ~6MHz?)
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as 15MHz on the box, but measured ~12MHz (older Octo version is probably ~6MHz?)
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- speaker circuit is a bit different, not sure why
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- speaker circuit is a bit different, not sure why
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Note that even though the MCUs are different, internal ROM contents is
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Note that even though the MCUs are different, internal ROM contents was confirmed
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identical for Micro II/III, Presto, Octo.
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to be identical for Micro II/III, Presto, Octo.
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TODO:
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TODO:
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- controls are too sensitive, is there a bug in the CPU core timer emulation?
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- controls are too sensitive, is there a bug in the CPU core timer emulation?
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@ -31,7 +31,7 @@ Older versions had a bug in the opening moves, always playing B5 after D4.
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===============================================================================
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===============================================================================
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Novag Supremo (model 881)
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Novag Supremo (model 881)
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----------------------------
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-------------------------
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Hardware notes:
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Hardware notes:
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- Hitachi HD63A03YP MCU @ 8MHz (2MHz internal)
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- Hitachi HD63A03YP MCU @ 8MHz (2MHz internal)
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