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https://github.com/holub/mame
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Various avt.c progresses
This commit is contained in:
Angelo Salese
parent
1a5858311f
commit
303c6e5dc5
@ -5,6 +5,8 @@
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Driver by Roberto Fresca.
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TODO:
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- needs CTC and daisy chain to make progresses
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Games running on this hardware:
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@ -399,6 +401,7 @@
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************************************************************************************************/
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#define ADDRESS_MAP_MODERN
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#define MASTER_CLOCK XTAL_10MHz /* unknown */
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@ -418,13 +421,42 @@ class avt_state : public driver_device
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{
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public:
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avt_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag) { }
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: driver_device(mconfig, type, tag),
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m_maincpu(*this,"maincpu"),
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m_crtc(*this, "crtc")
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{ }
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DECLARE_WRITE8_MEMBER(avt_6845_address_w);
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DECLARE_WRITE8_MEMBER(avt_6845_data_w);
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DECLARE_READ8_MEMBER( avt_6845_data_r );
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DECLARE_WRITE8_MEMBER(avt_videoram_w);
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DECLARE_WRITE8_MEMBER(avt_colorram_w);
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UINT8 *m_videoram;
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UINT8 *m_colorram;
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tilemap_t *m_bg_tilemap;
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UINT8 m_crtc_vreg[0x100],m_crtc_index;
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required_device<cpu_device> m_maincpu;
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required_device<mc6845_device> m_crtc;
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};
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#define mc6845_h_char_total (state->m_crtc_vreg[0])
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#define mc6845_h_display (state->m_crtc_vreg[1])
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#define mc6845_h_sync_pos (state->m_crtc_vreg[2])
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#define mc6845_sync_width (state->m_crtc_vreg[3])
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#define mc6845_v_char_total (state->m_crtc_vreg[4])
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#define mc6845_v_total_adj (state->m_crtc_vreg[5])
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#define mc6845_v_display (state->m_crtc_vreg[6])
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#define mc6845_v_sync_pos (state->m_crtc_vreg[7])
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#define mc6845_mode_ctrl (state->m_crtc_vreg[8])
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#define mc6845_tile_height (state->m_crtc_vreg[9]+1)
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#define mc6845_cursor_y_start (state->m_crtc_vreg[0x0a])
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#define mc6845_cursor_y_end (state->m_crtc_vreg[0x0b])
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#define mc6845_start_addr (((state->m_crtc_vreg[0x0c]<<8) & 0x3f00) | (state->m_crtc_vreg[0x0d] & 0xff))
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#define mc6845_cursor_addr (((state->m_crtc_vreg[0x0e]<<8) & 0x3f00) | (state->m_crtc_vreg[0x0f] & 0xff))
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#define mc6845_light_pen_addr (((state->m_crtc_vreg[0x10]<<8) & 0x3f00) | (state->m_crtc_vreg[0x11] & 0xff))
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#define mc6845_update_addr (((state->m_crtc_vreg[0x12]<<8) & 0x3f00) | (state->m_crtc_vreg[0x13] & 0xff))
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/*********************************************
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@ -432,19 +464,17 @@ public:
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*********************************************/
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static WRITE8_HANDLER( avt_videoram_w )
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WRITE8_MEMBER( avt_state::avt_videoram_w )
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{
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avt_state *state = space->machine().driver_data<avt_state>();
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state->m_videoram[offset] = data;
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tilemap_mark_tile_dirty(state->m_bg_tilemap, offset);
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m_videoram[offset] = data;
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tilemap_mark_tile_dirty(m_bg_tilemap, offset);
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}
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static WRITE8_HANDLER( avt_colorram_w )
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WRITE8_MEMBER( avt_state::avt_colorram_w )
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{
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avt_state *state = space->machine().driver_data<avt_state>();
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state->m_colorram[offset] = data;
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tilemap_mark_tile_dirty(state->m_bg_tilemap, offset);
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m_colorram[offset] = data;
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tilemap_mark_tile_dirty(m_bg_tilemap, offset);
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}
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@ -457,7 +487,7 @@ static TILE_GET_INFO( get_bg_tile_info )
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---- xxxx seems unused.
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*/
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int attr = state->m_colorram[tile_index];
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int code = state->m_videoram[tile_index];
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int code = state->m_videoram[tile_index] | ((attr & 1) << 8);
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int color = (attr & 0xf0)>>4;
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SET_TILE_INFO( 0, code, color, 0);
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@ -474,7 +504,25 @@ static VIDEO_START( avt )
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static SCREEN_UPDATE( avt )
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{
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avt_state *state = screen->machine().driver_data<avt_state>();
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tilemap_draw(bitmap, cliprect, state->m_bg_tilemap, 0, 0);
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int x,y;
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int count;
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const gfx_element *gfx = screen->machine().gfx[0];
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count = 0;
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for(y=0;y<mc6845_v_display;y++)
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{
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for(x=0;x<mc6845_h_display;x++)
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{
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UINT16 tile = state->m_videoram[count] | ((state->m_colorram[count] & 1) << 8);
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UINT8 color = (state->m_colorram[count] & 0xf0) >> 4;
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drawgfx_opaque(bitmap,cliprect,gfx,tile,color,0,0,x*8,(y*8));
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count++;
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}
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}
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//tilemap_draw(bitmap, cliprect, state->m_bg_tilemap, 0, 0);
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return 0;
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}
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@ -539,32 +587,50 @@ static PALETTE_INIT( avt )
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// popmessage("written : %02X", data);
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//}
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WRITE8_MEMBER( avt_state::avt_6845_address_w )
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{
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m_crtc_index = data;
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m_crtc->address_w(space, offset, data);
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}
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WRITE8_MEMBER( avt_state::avt_6845_data_w )
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{
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m_crtc_vreg[m_crtc_index] = data;
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m_crtc->register_w(space, offset, data);
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}
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READ8_MEMBER( avt_state::avt_6845_data_r )
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{
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//m_crtc_vreg[m_crtc_index] = data;
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return m_crtc->register_r(space, offset);
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}
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/*********************************************
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* Memory Map Information *
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*********************************************/
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/* avtnfl, avtbingo */
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static ADDRESS_MAP_START( avt_map, AS_PROGRAM, 8 )
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static ADDRESS_MAP_START( avt_map, AS_PROGRAM, 8, avt_state )
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AM_RANGE(0x0000, 0x5fff) AM_ROM
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AM_RANGE(0x6000, 0x7fff) AM_RAM
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AM_RANGE(0x8000, 0x9fff) AM_RAM // AM_SHARE("nvram")
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AM_RANGE(0xa000, 0xa7ff) AM_RAM_WRITE(avt_videoram_w) AM_BASE_MEMBER(avt_state, m_videoram)
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AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(avt_colorram_w) AM_BASE_MEMBER(avt_state, m_colorram)
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AM_RANGE(0xa000, 0xa7ff) AM_RAM_WRITE(avt_videoram_w) AM_BASE(m_videoram)
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AM_RANGE(0xc000, 0xc7ff) AM_RAM_WRITE(avt_colorram_w) AM_BASE(m_colorram)
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ADDRESS_MAP_END
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static ADDRESS_MAP_START( avt_portmap, AS_IO, 8 )
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static ADDRESS_MAP_START( avt_portmap, AS_IO, 8, avt_state )
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ADDRESS_MAP_GLOBAL_MASK(0xff)
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// AM_RANGE(0x00, 0x03) unk, maybe IO
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// AM_RANGE(0x00, 0x00) AM_READ_PORT("IN0")
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// AM_RANGE(0x01, 0x01) AM_READ_PORT("IN1")
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AM_RANGE(0x02, 0x02) AM_READ_PORT("DSW1")
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// AM_RANGE(0x08, 0x0b) unk, maybe IO
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// AM_RANGE(0x08, 0x08) AM_READ_PORT("IN2")
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// AM_RANGE(0x09, 0x09) AM_READ_PORT("IN3")
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AM_RANGE(0x21, 0x21) AM_DEVWRITE("aysnd", ay8910_data_w) /* AY8910 data */
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AM_RANGE(0x23, 0x23) AM_DEVWRITE("aysnd", ay8910_address_w) /* AY8910 control */
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AM_RANGE(0x28, 0x28) AM_DEVWRITE_MODERN("crtc", mc6845_device, address_w)
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AM_RANGE(0x29, 0x29) AM_DEVREADWRITE_MODERN("crtc", mc6845_device, register_r, register_w)
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AM_RANGE(0x21, 0x21) AM_DEVWRITE_LEGACY("aysnd", ay8910_data_w) /* AY8910 data */
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AM_RANGE(0x23, 0x23) AM_DEVWRITE_LEGACY("aysnd", ay8910_address_w) /* AY8910 control */
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AM_RANGE(0x28, 0x28) AM_WRITE(avt_6845_address_w)
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AM_RANGE(0x29, 0x29) AM_READWRITE(avt_6845_data_r,avt_6845_data_w)
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ADDRESS_MAP_END
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/* I/O byte R/W
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@ -810,13 +876,21 @@ static const ay8910_interface ay8910_config =
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* Machine Drivers *
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*********************************************/
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/* IM 2 */
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static INTERRUPT_GEN( avt_vblank_irq )
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{
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avt_state *state = device->machine().driver_data<avt_state>();
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device_set_input_line_and_vector(state->m_maincpu, 0, HOLD_LINE, 0x06);
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}
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static MACHINE_CONFIG_START( avt, avt_state )
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/* basic machine hardware */
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MCFG_CPU_ADD("maincpu", Z80, CPU_CLOCK) /* guess */
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MCFG_CPU_PROGRAM_MAP(avt_map)
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MCFG_CPU_IO_MAP(avt_portmap)
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// MCFG_CPU_VBLANK_INT("screen", nmi_line_pulse)
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MCFG_CPU_VBLANK_INT("screen", avt_vblank_irq)
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/* video hardware */
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MCFG_SCREEN_ADD("screen", RASTER)
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