diff --git a/src/mame/drivers/namcos21.cpp b/src/mame/drivers/namcos21.cpp
index c9c134d4faf..88dd54f7697 100644
--- a/src/mame/drivers/namcos21.cpp
+++ b/src/mame/drivers/namcos21.cpp
@@ -1502,6 +1502,7 @@ static ADDRESS_MAP_START( winrun_gpu_map, AS_PROGRAM, 16, namcos21_state )
 	AM_RANGE(0x100000, 0x100001) AM_READWRITE(winrun_gpu_color_r,winrun_gpu_color_w) /* ? */
 	AM_RANGE(0x180000, 0x19ffff) AM_RAM /* work RAM */
 	AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("gpu_intc", namco_c148_device, map)
+	AM_RANGE(0x1c0000, 0x1fffff) AM_DEVICE("gpu_intc", namco_c148_device, map)
 	AM_RANGE(0x200000, 0x20ffff) AM_RAM AM_SHARE("gpu_comram")
 	AM_RANGE(0x400000, 0x40ffff) AM_RAM_DEVWRITE("palette", palette_device, write) AM_SHARE("palette")
 	AM_RANGE(0x410000, 0x41ffff) AM_RAM_DEVWRITE("palette", palette_device, write_ext) AM_SHARE("palette_ext")
@@ -1975,6 +1976,14 @@ static MACHINE_CONFIG_START( driveyes, namcos21_state )
 	MCFG_SOUND_ROUTE(1, "rspeaker", 0.30)
 MACHINE_CONFIG_END
 
+TIMER_DEVICE_CALLBACK_MEMBER(namcos21_state::winrun_gpu_scanline)
+{
+	int scanline = param;
+
+	if(scanline == 240*2) 
+		m_gpu_intc->vblank_irq_trigger();
+		
+}
 
 static MACHINE_CONFIG_START( winrun, namcos21_state )
 	MCFG_CPU_ADD("maincpu", M68000,12288000) /* Master */
@@ -2005,9 +2014,10 @@ static MACHINE_CONFIG_START( winrun, namcos21_state )
 
 	MCFG_CPU_ADD("gpu", M68000,12288000) /* graphics coprocessor */
 	MCFG_CPU_PROGRAM_MAP(winrun_gpu_map)
-	MCFG_CPU_VBLANK_INT_DRIVER("screen", namcos21_state,  namcos2_68k_gpu_vblank)
+	// TODO: Needs a single namco_crtc_device
+	MCFG_TIMER_DRIVER_ADD_SCANLINE("scantimer", namcos21_state, winrun_gpu_scanline, "screen", 0, 1)
 
-	MCFG_NAMCO_C148_ADD("gpu_intc")
+	MCFG_NAMCO_C148_ADD("gpu_intc","gpu",false)
 	
 	MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame */
 
diff --git a/src/mame/includes/namcos21.h b/src/mame/includes/namcos21.h
index bf38b81dac4..aff6bd6902a 100644
--- a/src/mame/includes/namcos21.h
+++ b/src/mame/includes/namcos21.h
@@ -162,6 +162,7 @@ public:
 	DECLARE_WRITE16_MEMBER(winrun_gpu_register_w);
 	DECLARE_WRITE16_MEMBER(winrun_gpu_videoram_w);
 	DECLARE_READ16_MEMBER(winrun_gpu_videoram_r);
+	TIMER_DEVICE_CALLBACK_MEMBER(winrun_gpu_scanline);
 
 	uint8_t m_gearbox_state;
 	DECLARE_CUSTOM_INPUT_MEMBER(driveyes_gearbox_r);
diff --git a/src/mame/machine/namco_c148.cpp b/src/mame/machine/namco_c148.cpp
index 0c7dceb71c1..3910bca83da 100644
--- a/src/mame/machine/namco_c148.cpp
+++ b/src/mame/machine/namco_c148.cpp
@@ -1,15 +1,18 @@
 // license:BSD-3-Clause
-// copyright-holders:<author_name>
+// copyright-holders:Angelo Salese
 /***************************************************************************
 
 	Namco C148 Interrupt Controller
 
+	TODO: 
+	- vblank is likely to be sent by mast
+	
 ***************************************************************************/
 /*
 Interrupt Controller C148          1C0000-1FFFFF  R/W  D00-D02
     ????????                       1C0XXX
     ????????                       1C2XXX
-    ????????                       1C4XXX
+    ????????                       1C4XXX * bit 1: operation mode?
     Master/Slave IRQ level         1C6XXX              D00-D02
     EXIRQ level                    1C8XXX              D00-D02
     POSIRQ level                   1CAXXX              D00-D02
@@ -52,7 +55,8 @@ const device_type NAMCO_C148 = &device_creator<namco_c148_device>;
 //-------------------------------------------------
 
 namco_c148_device::namco_c148_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
-	: device_t(mconfig, NAMCO_C148, "Namco C148 Interrupt Controller", tag, owner, clock, "namco_c148", __FILE__)
+	: device_t(mconfig, NAMCO_C148, "Namco C148 Interrupt Controller", tag, owner, clock, "namco_c148", __FILE__),
+	m_hostcpu_tag(nullptr)
 {
 }
 
@@ -62,15 +66,15 @@ DEVICE_ADDRESS_MAP_START( map, 16, namco_c148_device )
 //	AM_RANGE(0x08000, 0x09fff) // EXIRQ lv
 //	AM_RANGE(0x0a000, 0x0bfff) // POSIRQ lv
 //	AM_RANGE(0x0c000, 0x0dfff) // SCIRQ lv
-//	AM_RANGE(0x0e000, 0x0ffff) // VBlank IRQ lv
+	AM_RANGE(0x0e000, 0x0ffff) AM_READWRITE8(vblank_irq_level_r,vblank_irq_level_w,0x00ff) // VBlank IRQ lv
 
 //	AM_RANGE(0x16000, 0x17fff) // CPUIRQ ack
 //	AM_RANGE(0x18000, 0x19fff) // EXIRQ ack
 //	AM_RANGE(0x1a000, 0x1bfff) // POSIRQ ack
 //	AM_RANGE(0x1c000, 0x1dfff) // SCIRQ ack
-//	AM_RANGE(0x1e000, 0x1ffff) // VBlank IRQ ack
-//	AM_RANGE(0x20000, 0x21fff) // EEPROM ready status
-//	AM_RANGE(0x22000, 0x23fff) // sound CPU reset (*)
+	AM_RANGE(0x1e000, 0x1ffff) AM_READWRITE8(vblank_irq_ack_r, vblank_irq_ack_w, 0x00ff) // VBlank IRQ ack
+//	AM_RANGE(0x20000, 0x21fff) // EEPROM ready status (*)
+	AM_RANGE(0x22000, 0x23fff) AM_WRITE8(ext2_w,0x00ff) // sound CPU reset (*)
 //	AM_RANGE(0x24000, 0x25fff) // slave & i/o reset (*)
 	AM_RANGE(0x26000, 0x27fff) AM_NOP // watchdog
 ADDRESS_MAP_END
@@ -83,6 +87,7 @@ ADDRESS_MAP_END
 
 void namco_c148_device::device_start()
 {
+	m_hostcpu = machine().device<cpu_device>(m_hostcpu_tag);
 }
 
 
@@ -92,9 +97,43 @@ void namco_c148_device::device_start()
 
 void namco_c148_device::device_reset()
 {
+	m_irqlevel.vblank = 0;
 }
 
 //**************************************************************************
 //  READ/WRITE HANDLERS
 //**************************************************************************
 
+READ8_MEMBER( namco_c148_device::vblank_irq_level_r )
+{
+	return m_irqlevel.vblank & 0x7;
+}
+
+WRITE8_MEMBER( namco_c148_device::vblank_irq_level_w )
+{
+	m_irqlevel.vblank = data & 7;
+}
+
+READ8_MEMBER( namco_c148_device::vblank_irq_ack_r )
+{
+	m_hostcpu->set_input_line(m_irqlevel.vblank, CLEAR_LINE);
+	return 0;
+}
+
+WRITE8_MEMBER( namco_c148_device::vblank_irq_ack_w )
+{
+	m_hostcpu->set_input_line(m_irqlevel.vblank, CLEAR_LINE);
+}
+
+WRITE8_MEMBER( namco_c148_device::ext2_w )
+{
+	// TODO: sync flag for GPU in winrun?
+	if(data & 2)
+		m_hostcpu->set_input_line(m_irqlevel.vblank, CLEAR_LINE);
+}
+
+void namco_c148_device::vblank_irq_trigger()
+{
+	m_hostcpu->set_input_line(m_irqlevel.vblank, ASSERT_LINE);
+}
+
diff --git a/src/mame/machine/namco_c148.h b/src/mame/machine/namco_c148.h
index 75e1aab3099..1671a90aff5 100644
--- a/src/mame/machine/namco_c148.h
+++ b/src/mame/machine/namco_c148.h
@@ -1,5 +1,5 @@
 // license:BSD-3-Clause
-// copyright-holders:<author_name>
+// copyright-holders:Angelo Salese
 /***************************************************************************
 
 Template for skeleton device
@@ -17,8 +17,9 @@ Template for skeleton device
 //  INTERFACE CONFIGURATION MACROS
 //**************************************************************************
 
-#define MCFG_NAMCO_C148_ADD(_tag) \
-	MCFG_DEVICE_ADD(_tag, NAMCO_C148, 0)
+#define MCFG_NAMCO_C148_ADD(_tag, _cputag, _cpumaster) \
+	MCFG_DEVICE_ADD(_tag, NAMCO_C148, 0) \
+	namco_c148_device::configure_device(*device, _cputag, _cpumaster);
 
 //**************************************************************************
 //  TYPE DEFINITIONS
@@ -34,13 +35,37 @@ public:
 
 	DECLARE_ADDRESS_MAP(map, 16);
 
+	static void configure_device(device_t &device, const char *tag, bool is_master)
+	{
+		namco_c148_device &dev = downcast<namco_c148_device &>(device);
+		dev.m_hostcpu_tag = tag;
+		dev.m_hostcpu_master = is_master;
+	}
+	
+	DECLARE_READ8_MEMBER( vblank_irq_level_r );
+	DECLARE_WRITE8_MEMBER( vblank_irq_level_w );
+	DECLARE_READ8_MEMBER( vblank_irq_ack_r );
+	DECLARE_WRITE8_MEMBER( vblank_irq_ack_w );
+	DECLARE_WRITE8_MEMBER( ext2_w );
+	void vblank_irq_trigger();
+	//uint8_t posirq_line();
+	
 protected:
 	// device-level overrides
 //  virtual void device_validity_check(validity_checker &valid) const;
 	virtual void device_start() override;
 	virtual void device_reset() override;
 private:
-	// ...
+	cpu_device *m_hostcpu;      	/**< reference to the host cpu */
+	const char *m_hostcpu_tag;		/**< host cpu tag name */
+	bool		m_hostcpu_master;	/**< define if host cpu is master */
+	struct{
+		uint8_t cpuirq;
+		uint8_t exirq;
+		uint8_t sciirq;
+		uint8_t posirq;
+		uint8_t vblank;
+	}m_irqlevel;
 };