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https://github.com/holub/mame
synced 2025-04-21 07:52:35 +03:00
twinkle.cpp: moved a couple of functions into driver class (nw)
This commit is contained in:
Ivan Vangelista
parent
842fbca111
commit
30b8ce6a05
@ -164,7 +164,7 @@ Notes:
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CN7 - 5 pin plug for connection and control of external DVD player for background video
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CN11 - 15 pin DSUB connector
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RCA - Yellow RCA connectors for video (input and/or output?) from external DVD player
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MC141685 - Motorola MC141685 low cost 3CH D/A convertor
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MC141685 - Motorola MC141685 low cost 3CH D/A converter
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AD817 - Analog Devices 18V high speed low power wide supply range amplifier
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AD724JR - Analog Devices 6V 800mW 250MHz RGB to NTSC/PAL encoder
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Bt812KPF - Conexant Systems Inc. Bt812KPF NTSC/PAL to RGB/YCrCb decoder / video codec (QFP160)
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@ -212,7 +212,7 @@ Notes:
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CN4 - 40 pin flat cable connector for HDD data cable
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CN5 - DC power input connector
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CN7 - RCA left/right audio output
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SM5875 - Nippon Precision Circuits SM5875 2-channel D/A convertor (SSOP24)
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SM5875 - Nippon Precision Circuits SM5875 2-channel D/A converter (SSOP24)
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RF5C400 - Ricoh RF5C400 PCM 32Ch, 44.1 kHz Stereo, 3D Effect Spatializer, clock input 16.9344MHz [33.8688/2]
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M65851 - Mitsubishi M65851 single chip karaoke sound processor IC (QFP80)
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HY5117404- Hyundai Semiconductor HY5117404BJ-60 4M x 4-Bit CMOS EDO DRAM
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@ -254,30 +254,17 @@ class twinkle_state : public driver_device
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public:
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twinkle_state(const machine_config &mconfig, device_type type, const char *tag)
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: driver_device(mconfig, type, tag),
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m_maincpu(*this, "maincpu"),
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m_audiocpu(*this, "audiocpu"),
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m_am53cf96(*this, "am53cf96"),
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m_ata(*this, "ata"),
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m_waveram(*this, "rfsnd"),
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m_spu_ata_dma(0),
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m_spu_ata_dmarq(0),
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m_wave_bank(0),
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m_maincpu(*this, "maincpu"),
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m_audiocpu(*this, "audiocpu")
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m_wave_bank(0)
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{
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}
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required_device<am53cf96_device> m_am53cf96;
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required_device<ata_interface_device> m_ata;
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required_shared_ptr<uint16_t> m_waveram;
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uint16_t m_spu_ctrl; // SPU board control register
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uint8_t m_spu_shared[0x400]; // SPU/PSX shared dual-ported RAM
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uint32_t m_spu_ata_dma;
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int m_spu_ata_dmarq;
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uint32_t m_wave_bank;
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int m_io_offset;
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int m_output_last[ 0x100 ];
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uint8_t m_sector_buffer[ 4096 ];
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DECLARE_WRITE8_MEMBER(twinkle_io_w);
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DECLARE_READ8_MEMBER(twinkle_io_r);
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DECLARE_WRITE16_MEMBER(twinkle_output_w);
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@ -298,8 +285,25 @@ public:
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DECLARE_READ16_MEMBER(unk_68k_r);
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DECLARE_WRITE_LINE_MEMBER(spu_ata_irq);
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DECLARE_WRITE_LINE_MEMBER(spu_ata_dmarq);
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void scsi_dma_read( uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size );
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void scsi_dma_write( uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size );
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private:
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required_device<cpu_device> m_maincpu;
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required_device<cpu_device> m_audiocpu;
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required_device<am53cf96_device> m_am53cf96;
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required_device<ata_interface_device> m_ata;
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required_shared_ptr<uint16_t> m_waveram;
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uint16_t m_spu_ctrl; // SPU board control register
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uint8_t m_spu_shared[0x400]; // SPU/PSX shared dual-ported RAM
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uint32_t m_spu_ata_dma;
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int m_spu_ata_dmarq;
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uint32_t m_wave_bank;
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int m_io_offset;
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int m_output_last[ 0x100 ];
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uint8_t m_sector_buffer[ 4096 ];
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int m_serial_shift;
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int m_serial_bits;
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@ -929,16 +933,16 @@ ADDRESS_MAP_END
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/* SCSI */
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static void scsi_dma_read( twinkle_state *state, uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size )
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void twinkle_state::scsi_dma_read( uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size )
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{
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int i;
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int n_this;
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while( n_size > 0 )
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{
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if( n_size > sizeof( state->m_sector_buffer ) / 4 )
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if( n_size > sizeof( m_sector_buffer ) / 4 )
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{
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n_this = sizeof( state->m_sector_buffer ) / 4;
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n_this = sizeof( m_sector_buffer ) / 4;
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}
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else
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{
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@ -947,12 +951,12 @@ static void scsi_dma_read( twinkle_state *state, uint32_t *p_n_psxram, uint32_t
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if( n_this < 2048 / 4 )
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{
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/* non-READ commands */
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state->m_am53cf96->dma_read_data( n_this * 4, state->m_sector_buffer );
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m_am53cf96->dma_read_data( n_this * 4, m_sector_buffer );
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}
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else
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{
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/* assume normal 2048 byte data for now */
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state->m_am53cf96->dma_read_data( 2048, state->m_sector_buffer );
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m_am53cf96->dma_read_data( 2048, m_sector_buffer );
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n_this = 2048 / 4;
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}
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n_size -= n_this;
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@ -961,10 +965,10 @@ static void scsi_dma_read( twinkle_state *state, uint32_t *p_n_psxram, uint32_t
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while( n_this > 0 )
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{
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p_n_psxram[ n_address / 4 ] =
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( state->m_sector_buffer[ i + 0 ] << 0 ) |
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( state->m_sector_buffer[ i + 1 ] << 8 ) |
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( state->m_sector_buffer[ i + 2 ] << 16 ) |
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( state->m_sector_buffer[ i + 3 ] << 24 );
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( m_sector_buffer[ i + 0 ] << 0 ) |
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( m_sector_buffer[ i + 1 ] << 8 ) |
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( m_sector_buffer[ i + 2 ] << 16 ) |
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( m_sector_buffer[ i + 3 ] << 24 );
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n_address += 4;
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i += 4;
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n_this--;
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@ -972,16 +976,16 @@ static void scsi_dma_read( twinkle_state *state, uint32_t *p_n_psxram, uint32_t
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}
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}
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static void scsi_dma_write( twinkle_state *state, uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size )
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void twinkle_state::scsi_dma_write( uint32_t *p_n_psxram, uint32_t n_address, int32_t n_size )
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{
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int i;
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int n_this;
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while( n_size > 0 )
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{
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if( n_size > sizeof( state->m_sector_buffer ) / 4 )
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if( n_size > sizeof( m_sector_buffer ) / 4 )
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{
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n_this = sizeof( state->m_sector_buffer ) / 4;
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n_this = sizeof( m_sector_buffer ) / 4;
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}
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else
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{
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@ -992,16 +996,16 @@ static void scsi_dma_write( twinkle_state *state, uint32_t *p_n_psxram, uint32_t
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i = 0;
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while( n_this > 0 )
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{
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state->m_sector_buffer[ i + 0 ] = ( p_n_psxram[ n_address / 4 ] >> 0 ) & 0xff;
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state->m_sector_buffer[ i + 1 ] = ( p_n_psxram[ n_address / 4 ] >> 8 ) & 0xff;
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state->m_sector_buffer[ i + 2 ] = ( p_n_psxram[ n_address / 4 ] >> 16 ) & 0xff;
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state->m_sector_buffer[ i + 3 ] = ( p_n_psxram[ n_address / 4 ] >> 24 ) & 0xff;
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m_sector_buffer[ i + 0 ] = ( p_n_psxram[ n_address / 4 ] >> 0 ) & 0xff;
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m_sector_buffer[ i + 1 ] = ( p_n_psxram[ n_address / 4 ] >> 8 ) & 0xff;
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m_sector_buffer[ i + 2 ] = ( p_n_psxram[ n_address / 4 ] >> 16 ) & 0xff;
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m_sector_buffer[ i + 3 ] = ( p_n_psxram[ n_address / 4 ] >> 24 ) & 0xff;
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n_address += 4;
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i += 4;
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n_this--;
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}
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state->m_am53cf96->dma_write_data( n_this * 4, state->m_sector_buffer );
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m_am53cf96->dma_write_data( n_this * 4, m_sector_buffer );
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}
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}
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@ -1020,8 +1024,8 @@ static MACHINE_CONFIG_START( twinkle )
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MCFG_RAM_MODIFY("maincpu:ram")
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MCFG_RAM_DEFAULT_SIZE("4M")
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MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psxdma_device::read_delegate(&scsi_dma_read, (twinkle_state *) owner ) )
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MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psxdma_device::write_delegate(&scsi_dma_write, (twinkle_state *) owner ) )
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MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psxdma_device::read_delegate(&twinkle_state::scsi_dma_read, (twinkle_state *) owner ) )
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MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psxdma_device::write_delegate(&twinkle_state::scsi_dma_write, (twinkle_state *) owner ) )
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MCFG_CPU_ADD("audiocpu", M68000, 32000000/2) /* 16.000 MHz */
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MCFG_CPU_PROGRAM_MAP( sound_map )
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