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https://github.com/holub/mame
synced 2025-04-24 17:30:55 +03:00
A round of spelling/typographical fixes to source comments (nw)
This commit is contained in:
Scott Stone
parent
7746690ddf
commit
30cda1d3e5
@ -84,7 +84,7 @@ class device_a2bus_card_interface;
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// ======================> a2bus_device
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class a2bus_device : public device_t
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{
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// multi-card devices need to access m_device_list, so they get friend'ed here.
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// multi-card devices need to access m_device_list, so they get friended here.
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friend class a2bus_mcms2_device;
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public:
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// construction/destruction
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@ -519,7 +519,7 @@ READ8_MEMBER( isa8_mda_device::io_read)
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/*
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When the Hercules changes to graphics mode, the number of pixels per access and
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clock divider should be changed. The currect mc6845 implementation does not
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clock divider should be changed. The correct mc6845 implementation does not
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allow this.
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The divder/pixels per 6845 clock is 9 for text mode and 16 for graphics mode.
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@ -109,7 +109,7 @@ public:
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#define OMTI_STATUS_REQ 0x01 // Request (1 = request transfer of data via data in/out register)
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#define OMTI_STATUS_IO 0x02 // In/Out (1 = direction of transfer is from controller to host)
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#define OMTI_STATUS_CD 0x04 // Command/Data ( 1 = byte transfered is command or status byte)
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#define OMTI_STATUS_CD 0x04 // Command/Data ( 1 = byte transferred is command or status byte)
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#define OMTI_STATUS_BUSY 0x08 // Busy (0 = controller is idle, 1 = controller selected)
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#define OMTI_STATUS_DREQ 0x10 // Data Request (0 = no DMA request, 1 = DMA cycle requested)
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#define OMTI_STATUS_IREQ 0x20 // Interrupt Request (0 = no interrupt, 1 = command complete)
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@ -301,7 +301,7 @@ READ8_MEMBER(nes_disksys_device::read_ex)
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case 0x10:
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// $4030 - disk status 0
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// bit0 - Timer Interrupt (1: an IRQ occurred)
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// bit1 - Byte transfer flag (Set to 1 every time 8 bits have been transfered between
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// bit1 - Byte transfer flag (Set to 1 every time 8 bits have been transferred between
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// the RAM adaptor & disk drive through $4024/$4031; Reset to 0 when $4024,
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// $4031, or $4030 has been serviced)
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// bit4 - CRC control (0: CRC passed; 1: CRC error)
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@ -219,7 +219,7 @@ void scsihle_device::device_timer(emu_timer &timer, device_timer_id tid, int par
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case 2:
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// Some drives, notably the ST225N and ST125N, accept fromat unit commands
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// with flags set indicating that bad block data should be transfered but
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// with flags set indicating that bad block data should be transferred but
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// don't then implemnt a data in phase, this timeout it to catch these !
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if (IS_COMMAND(SCSI_CMD_FORMAT_UNIT) && (data_idx==0))
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{
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@ -7,7 +7,7 @@
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unbuffered 32 KiB. Yet it was a very popular card since it was
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required for any kind of advanced programming beyond the console BASIC.
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As a peripheral box card, it is connected via the 8-bit mutiplexed data bus.
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As a peripheral box card, it is connected via the 8-bit multiplexed data bus.
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Later, modifications of the console became increasingly popular which
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avoided the bus multiplex so that the full 16bit access was possible.
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This helped to noticeably speed up the system.
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@ -9,7 +9,7 @@
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#include "imagedev/harddriv.h"
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/* max disk units per controller: 4 is the protocol limit, but it may be
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overriden if more than one controller is used */
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overridden if more than one controller is used */
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#define MAX_DISK_UNIT 4
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class ti990_hdc_device : public device_t
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@ -5,7 +5,7 @@
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Harmony / Melody cart for the A2600
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The Harmony cart is a 'modern' A2600 cartridge, used for homebrew etc. It has
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an SD slot and can be connected to a PC, roms can be transfered to it with
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an SD slot and can be connected to a PC, roms can be transferred to it with
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software on the PC side. It uses an ARM7TDMI-S LPC2103 @ 70 Mhz to emulate
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the mapper behavior of other cartridges. It has an SD card slot for storing
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game data.
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@ -383,8 +383,8 @@ protected:
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uint8_t m_lp0; /* 8bit loop reg. */
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uint8_t m_lp1; /* 8bit loop reg. */
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uint8_t m_lp2; /* 8bit loop reg. */
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uint8_t m_A; /* 8bit accumerator */
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uint8_t m_B; /* 8bit regiser */
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uint8_t m_A; /* 8bit accumulator */
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uint8_t m_B; /* 8bit register */
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//
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uint8_t m_halt; /* halt input line */
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@ -270,7 +270,7 @@ enum {
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* H[1]' - 4
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*
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* The display_state_machine() is called by the CPU at a rate of pixelclock/24,
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* which happens to be very close to every 7th CPU micrcocycle.
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* which happens to be very close to every 7th CPU microcycle.
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* </PRE>
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*/
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uint8_t* m_disp_a63;
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@ -81,7 +81,7 @@
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#define A2_KEY_FR2 MAKE_KEY(0,002) //!< ADL right function key 2
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#define A2_KEY_FL2 MAKE_KEY(0,001) //!< ADL left function key 1
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#define A2_KEY_FR4 MAKE_KEY(1,001) //!< ADL right funtion key 4
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#define A2_KEY_FR4 MAKE_KEY(1,001) //!< ADL right function key 4
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#define A2_KEY_BW MAKE_KEY(1,000) //!< ADL BW (?)
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#define A2_KEY_FR3 MAKE_KEY(2,002) //!< ADL right function key 3
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@ -102,7 +102,7 @@ struct {
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DECLARE_READ16_MEMBER( kbd_ad_r ); //!< read the keyboard matrix
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void init_kbd(uint16_t bootkey = 0177777); //!< initialize the keyboard hardware, optinally set the boot key
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void init_kbd(uint16_t bootkey = 0177777); //!< initialize the keyboard hardware, optionally set the boot key
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void exit_kbd(); //!< deinitialize the keyboard hardware
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void reset_kbd(); //!< reset the keyboard hardware
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#endif // _A2KBD_H_
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@ -318,7 +318,7 @@ static const int hamming_lut[64] = {
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};
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/**
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* @brief Caluclate a Hamming code after reading or before writing a memory double-word.
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* @brief Calculate a Hamming code after reading or before writing a memory double-word.
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*
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* Hamming code generation is according to the schematics described above.
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*
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@ -75,7 +75,7 @@ inline bool check_mem_load_mar_stall(uint8_t rsel) {
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* 2. REQUIRED
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* 3. SUSPEND
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* 4. SUSPEND
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* 5. whereever <-MD
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* 5. wherever <-MD
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*
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* @return false, if memory can be read without wait cycle
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*/
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@ -109,7 +109,7 @@ DECLARE_WRITE16_MEMBER( mesr_w ); //!< memory error status register write
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DECLARE_READ16_MEMBER ( mecr_r ); //!< memory error control register read
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DECLARE_WRITE16_MEMBER( mecr_w ); //!< memory error control register write
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//! Read or write a memory double-word and caluclate or compare its Hamming code.
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//! Read or write a memory double-word and calculate or compare its Hamming code.
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uint32_t hamming_code(bool write, uint32_t dw_addr, uint32_t dw_data);
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//! Load the memory address register with some value.
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@ -26,7 +26,7 @@
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#define MCFG_AMI_S2000_WRITE_D_CB(_devcb) \
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amis2000_base_device::set_write_d_callback(*device, DEVCB_##_devcb);
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// 13-bit external addressbus coupled as output pins
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// 13-bit external address bus coupled as output pins
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#define MCFG_AMI_S2000_WRITE_A_CB(_devcb) \
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amis2000_base_device::set_write_a_callback(*device, DEVCB_##_devcb);
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@ -225,9 +225,9 @@ field: X address D Function Y address D (part 2)
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n last bits of a word, leaving other bits in memory unaffected.
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The LSBits are transferred first, since this enables to perform bit-per-bit add and
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substract. Otherwise, the CPU would need an additionnal register to store the second
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substract. Otherwise, the CPU would need an additional register to store the second
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operand, and it would be probably slower, since the operation could only
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take place after all the data has been transfered.
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take place after all the data has been transferred.
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Memory operations are synchronous with 2 clocks found on the memory controller:
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* word clock: a pulse on each word boundary (3750rpm*32 -> 2kHz)
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@ -294,7 +294,7 @@ field: X address D Function Y address D (part 2)
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although it appears that this delay is not applied when X is not read (cf cross-track
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B in Booth p. 49).
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However, and here comes the wacky part, analysis of Booth p. 55 shows that
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no additionnal delay is caused by an X instruction having its X operand
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no additional delay is caused by an X instruction having its X operand
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on another track. Maybe, just maybe, this is related to the fact that X does not
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need to take the word count into account, any word in track is as good as any (yet,
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this leaves the question of why this optimization could not be applied to vector
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@ -450,7 +450,7 @@ uint32_t apexc_cpu_device::load_ml(uint32_t address, uint32_t vector)
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{
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int delay;
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/* additionnal delay appears if we switch tracks */
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/* additional delay appears if we switch tracks */
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if (((m_ml & 0x3E0) != (address & 0x3E0)) /*|| vector*/)
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delay = 6; /* if tracks are different, delay to allow for track switching */
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else
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@ -9,7 +9,7 @@
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enum
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{
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APEXC_CR =1, /* control register */
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APEXC_A, /* acumulator */
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APEXC_A, /* accumulator */
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APEXC_R, /* register */
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APEXC_ML, /* memory location */
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APEXC_WS, /* working store */
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@ -1607,7 +1607,7 @@ void f8_cpu_device::device_reset()
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ROMC_00(cS);
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/* initialize the timer shift register
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* this is an 8 bit polynome counter which can be loaded parallel
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* this is an 8 bit polynomial counter which can be loaded parallel
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* with 0xff the outputs never change and thus the timer is disabled.
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* with 0xfe the shifter starts cycling through 255 states until it
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* reaches 0xfe again (and then issues an interrupt).
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@ -79,7 +79,7 @@ private:
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uint8_t m_r[64]; /* scratchpad RAM */
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int m_irq_request;
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/* timer shifter polynome values (will be used for timer interrupts) */
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/* timer shifter polynomial values (will be used for timer interrupts) */
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uint8_t timer_shifter[256];
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uint16_t m_pc; // For the debugger
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@ -231,7 +231,7 @@ static inline int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
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#define CFLAG_SET 0x100
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#define CFLAG_CLEAR 0
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/* Codition code tests */
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/* Condition code tests */
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#define COND_CC() (!(FLAG_C&0x100)) /* Carry Clear */
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#define COND_CS() (FLAG_C&0x100) /* Carry Set */
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#define COND_EQ() (!FLAG_Z) /* Equal */
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@ -96,7 +96,7 @@ protected:
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address_space *m_data;
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address_space *m_io;
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int m_icount;
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int m_pc_pos; // PC possition in ADDR
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int m_pc_pos; // PC position in ADDR
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int m_addr_mask;
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};
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@ -67,7 +67,7 @@ protected:
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void take_interrupt();
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void init_tables(void);
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int m_pc_pos; // PC possition in ADDR
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int m_pc_pos; // PC position in ADDR
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int m_icount;
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// configuration
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@ -28,7 +28,7 @@ a A
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0 0 0 H V Z IE C
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TM 9bit polynominal?
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TM 9bit polynomial?
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pu pv disp flipflops
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@ -212,7 +212,7 @@ static inline int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
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#define CFLAG_SET 0x100
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#define CFLAG_CLEAR 0
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/* Codition code tests */
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/* Condition code tests */
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#define COND_CC() (!(FLAG_C&0x100)) /* Carry Clear */
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#define COND_CS() (FLAG_C&0x100) /* Carry Set */
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#define COND_EQ() (!FLAG_Z) /* Equal */
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@ -1844,7 +1844,7 @@ void mcs51_cpu_device::execute_set_input(int irqline, int state)
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*
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*/
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uint32_t new_state = (m_last_line_state & ~(1 << irqline)) | ((state != CLEAR_LINE) << irqline);
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/* detect 0->1 transistions */
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/* detect 0->1 transitions */
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uint32_t tr_state = (~m_last_line_state) & new_state;
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switch( irqline )
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@ -138,10 +138,10 @@ protected:
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int m_num_interrupts; /* number of interrupts supported */
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int m_recalc_parity; /* recalculate parity before next instruction */
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uint32_t m_last_line_state; /* last state of input lines line */
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int m_t0_cnt; /* number of 0->1 transistions on T0 line */
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int m_t1_cnt; /* number of 0->1 transistions on T1 line */
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int m_t2_cnt; /* number of 0->1 transistions on T2 line */
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int m_t2ex_cnt; /* number of 0->1 transistions on T2EX line */
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int m_t0_cnt; /* number of 0->1 transitions on T0 line */
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int m_t1_cnt; /* number of 0->1 transitions on T1 line */
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int m_t2_cnt; /* number of 0->1 transitions on T2 line */
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int m_t2ex_cnt; /* number of 0->1 transitions on T2EX line */
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int m_cur_irq_prio; /* Holds value of the current IRQ Priority Level; -1 if no irq */
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uint8_t m_irq_active; /* mask which irq levels are serviced */
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uint8_t m_irq_prio[8]; /* interrupt priority */
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@ -252,7 +252,7 @@ void v53_base_device::install_peripheral_io()
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}
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}
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if (m_OPSEL & 0x02) // Interupt Control Unit available
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if (m_OPSEL & 0x02) // Interrupt Control Unit available
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{
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uint16_t base = (m_OPHA << 8) | m_IULA;
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base &= 0xfffe;
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@ -15,7 +15,7 @@
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* mid-instruction sequence break. And it enables us to emulate the control panel fairly
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* accurately.
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*
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* Additionnally, IOT functions have been modified to be external: IOT callback pointers are set
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* Additionally, IOT functions have been modified to be external: IOT callback pointers are set
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* at emulation initiation, and most IOT callback functions are part of the machine emulation.
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*
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*
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@ -425,7 +425,7 @@ offs_t pdp1_device::disasm_disassemble(std::ostream &stream, offs_t pc, const ui
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There are several interrupt lines. With the standard sequence break system, all lines
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are logically or'ed to trigger a single interrupt level. Interrupts can be triggered
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by either a pulse or a level on the interrupt lines. With the optional type 120 sequence
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break system, each of 16 lines triggers is wired to a different priority level: additionnally,
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break system, each of 16 lines triggers is wired to a different priority level: additionally,
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each interrupt line can be masked out, and interrupt can be triggered through software.
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Also, instructions can be interrupted in the middle of execution. This is done by
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@ -837,7 +837,7 @@ void pdp1_device::execute_run()
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{ /* there is a discrepancy: the pdp1 handbook tells that only dio should be used,
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but the lisp tape uses the dac instruction instead */
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/* Yet maintenance manual p. 6-25 states clearly that the data is located
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in IO and transfered to MB, so DAC is likely to be a mistake. */
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in IO and transferred to MB, so DAC is likely to be a mistake. */
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m_rim_step = 2;
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}
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else
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@ -1125,7 +1125,7 @@ void pdp1_device::execute_instruction()
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{ /* maintenance manual 7-14 seems to imply that substract does not test for -0.
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The sim 2.3 source says so explicitely, though they do not give a reference.
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It sounds a bit weird, but the reason is probably that doing so would
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require additionnal logic that does not exist. */
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require additional logic that does not exist. */
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/* overflow is set if the 2 operands have the same sign and the final result has another */
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int ov2; /* 1 if the operands have the same sign*/
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@ -1252,7 +1252,7 @@ void pdp1_device::execute_instruction()
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/* As a side note, the order of -0 detection and overflow checking does not matter,
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because the sum of two positive number cannot give 0777777 (since positive
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numbers are 0377777 at most, their sum is 0777776 at most).
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Additionnally, we cannot have carry set and a result equal to 0777777 (since numbers
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Additionally, we cannot have carry set and a result equal to 0777777 (since numbers
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are 0777777 at most, their sum is 01777776 at most): this is nice, because it makes
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the sequence:
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AC = (AC + (AC >> 18)) & 0777777; // propagate carry around
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@ -133,7 +133,7 @@ private:
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void iXBMX(); //!< Exchange BM and X registers
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void iXAX(); //!< Exchange accumulator and X
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void iXS(); //!< Eychange SA and SB registers
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void iCYS(); //!< Cycle SA register and accumulaor
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void iCYS(); //!< Cycle SA register and accumulator
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void iLB(); //!< Load B indirect
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void iLBL(); //!< Load B long
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void iINCB(); //!< Increment BL
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@ -8,7 +8,7 @@
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// actual port handling is more complex than this
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// which should be considered a temporary solution
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// just used some arbitrary port nubmers
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// just used some arbitrary port numbers
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#define SH3_PORT_A (0x10*8)
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#define SH3_PORT_B (0x11*8)
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#define SH3_PORT_C (0x12*8)
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@ -175,7 +175,7 @@ static inline int MAKE_INT_8(int A) {return (A & 0x80) ? A | ~0xff : A & 0xff;}
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/* ============================ GENERAL MACROS ============================ */
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/* ======================================================================== */
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/* Codition code tests */
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/* Condition code tests */
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#define COND_CC() (!(FLAG_C&0x100)) /* Carry Clear */
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#define COND_CS() (FLAG_C&0x100) /* Carry Set */
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#define COND_EQ() (!FLAG_Z) /* Equal */
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@ -9,7 +9,7 @@ TLCS-900/H instruction set
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enum e_operand
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{
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_A=1, /* currect register set register A */
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_A=1, /* current register set register A */
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_C8, /* current register set byte */
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_C16, /* current register set word */
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_C32, /* current register set long word */
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@ -65,7 +65,7 @@ static const char *const s_mnemonic[] =
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enum e_operand
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{
|
||||
O_NONE,
|
||||
O_A, /* currect register set register A */
|
||||
O_A, /* current register set register A */
|
||||
O_C8, /* current register set byte */
|
||||
O_C16, /* current register set word */
|
||||
O_C32, /* current register set long word */
|
||||
|
||||
@ -902,7 +902,7 @@ WRITE8_MEMBER(tms70c46_device::control_w)
|
||||
// known fast memory areas: internal ROM/RAM, system RAM
|
||||
// known slow memory areas: system ROM, cartridge ROM/RAM
|
||||
|
||||
// d0-d3(all bits?): clock divider when d4 is set and addressbus is in slow memory area
|
||||
// d0-d3(all bits?): clock divider when d4 is set and address bus is in slow memory area
|
||||
// needs to be measured, i just know that $30 is full speed, and $38 is about 4 times slower
|
||||
m_control = data;
|
||||
}
|
||||
|
||||
@ -17,7 +17,7 @@
|
||||
|
||||
tms99000 is the successor to both ti9900 and ti990/10. It supports
|
||||
privileges, and has a coprocessor interface which enables the use of an
|
||||
external memory mapper. Additionnally, it can use a Macrostore ROM to
|
||||
external memory mapper. Additionally, it can use a Macrostore ROM to
|
||||
emulate additional instructions.
|
||||
|
||||
**** This is WORK IN PROGRESS ****
|
||||
|
||||
@ -197,7 +197,7 @@ protected:
|
||||
// full range 0000-fffe for its CRU operations.
|
||||
//
|
||||
// We could realize this via the CRU access as well, but the data bus access
|
||||
// is not that simple to emulate. For the sake of homogenity between the
|
||||
// is not that simple to emulate. For the sake of homogeneity between the
|
||||
// chip emulations we use a dedicated callback.
|
||||
devcb_write8 m_external_operation;
|
||||
|
||||
|
||||
@ -411,7 +411,7 @@ private:
|
||||
// 1 1 1 LREX
|
||||
//
|
||||
// We could realize this via the CRU access as well, but the data bus access
|
||||
// is not that simple to emulate. For the sake of homogenity between the
|
||||
// is not that simple to emulate. For the sake of homogeneity between the
|
||||
// chip emulations we use a dedicated callback.
|
||||
devcb_write8 m_external_operation;
|
||||
|
||||
|
||||
@ -225,7 +225,7 @@ namespace uml
|
||||
OP_MAX
|
||||
};
|
||||
|
||||
// C function callback deinition
|
||||
// C function callback definition
|
||||
typedef void (*c_function)(void *ptr);
|
||||
|
||||
// class describing a global code handle
|
||||
@ -274,7 +274,7 @@ namespace uml
|
||||
uint32_t m_label;
|
||||
};
|
||||
|
||||
// a parameter for a UML instructon is encoded like this
|
||||
// a parameter for a UML instruction is encoded like this
|
||||
class parameter
|
||||
{
|
||||
public:
|
||||
@ -392,7 +392,7 @@ namespace uml
|
||||
parameter_info param[4]; // information about parameters
|
||||
};
|
||||
|
||||
// a single UML instructon is encoded like this
|
||||
// a single UML instruction is encoded like this
|
||||
class instruction
|
||||
{
|
||||
public:
|
||||
|
||||
@ -35,7 +35,7 @@
|
||||
else m_iospace->write_byte(port,value)
|
||||
|
||||
/***************************************************************
|
||||
* MMU calculate the memory managemant lookup table
|
||||
* MMU calculate the memory management lookup table
|
||||
* bb and cb specify a 4K page
|
||||
* If the 4 most significant bits of an 16 bit address are
|
||||
* greater or equal to the bank base, the bank base register
|
||||
@ -126,7 +126,7 @@ uint32_t z180_device::ARG16()
|
||||
}
|
||||
|
||||
/***************************************************************
|
||||
* Calculate the effective addess m_ea of an opcode using
|
||||
* Calculate the effective address m_ea of an opcode using
|
||||
* IX+offset resp. IY+offset addressing.
|
||||
***************************************************************/
|
||||
#define EAX() m_ea = (uint32_t)(uint16_t)(_IX + (int8_t)ARG())
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
KL5C80A12 CPU (KL5C80A12CFP on hng64.c)
|
||||
|
||||
Binary compatible with Z80, significantly faster opcode timings, operating at up to 10Mhz
|
||||
Timers / Counters, Parrallel / Serial ports/ MMU, Interrupt Controller
|
||||
Timers / Counters, Parallel / Serial ports/ MMU, Interrupt Controller
|
||||
|
||||
(is this different enough to need it's own core?)
|
||||
(todo: everything, some code currently lives in machine/hng64_net.c but not much)
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
KL5C80A12 CPU (KL5C80A12CFP on hng64.c)
|
||||
|
||||
Binary compatible with Z80, significantly faster opcode timings, operating at up to 10Mhz
|
||||
Timers / Counters, Parrallel / Serial ports/ MMU, Interrupt Controller
|
||||
Timers / Counters, Parallel / Serial ports/ MMU, Interrupt Controller
|
||||
|
||||
(is this different enough to need it's own core?)
|
||||
(todo: everything, some code currently lives in machine/hng64_net.c but not much)
|
||||
|
||||
@ -6,7 +6,7 @@
|
||||
|
||||
Notes:
|
||||
* get_port_b_z_mask() gives the caller the bitmask that shows
|
||||
which bits are high-impendance when reading port B, and thus
|
||||
which bits are high-impedance when reading port B, and thus
|
||||
neither 0 or 1. get_output_cb2_z() returns the same info
|
||||
for the CB2 pin.
|
||||
* set_port_a_z_mask allows the input callback to indicate
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
// copyright-holders:Joakim Larsson Edstrom
|
||||
/**********************************************************************
|
||||
*
|
||||
* Motorola MC68230 PI/T Parallell Interface and Timer
|
||||
* Motorola MC68230 PI/T Parallel Interface and Timer
|
||||
*
|
||||
* PORT MODES INCLUDE :
|
||||
* - BIT I/O
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
// copyright-holders:Joakim Larsson Edstr??m
|
||||
/**********************************************************************
|
||||
*
|
||||
* Motorola MC68230 PI/T Parallell Interface and Timer
|
||||
* Motorola MC68230 PI/T Parallel Interface and Timer
|
||||
*
|
||||
* _____ _____
|
||||
* D5 1 |* \_/ | 48 D4
|
||||
|
||||
@ -202,7 +202,7 @@ private:
|
||||
|
||||
// Sector addressing scheme for Rev B/H drives used in various commands (Called a DADR in the docs)
|
||||
struct dadr_t {
|
||||
uint8_t address_msn_and_drive;// Most significant nibble: Most signficant nibble of sector address, Least significant nibble: Drive #
|
||||
uint8_t address_msn_and_drive;// Most significant nibble: Most significant nibble of sector address, Least significant nibble: Drive #
|
||||
uint8_t address_lsb; // Least significant byte of sector address
|
||||
uint8_t address_mid; // Middle byte of sector address
|
||||
};
|
||||
|
||||
@ -272,7 +272,7 @@ void cs4031_device::device_start()
|
||||
if (ram_size > 0x100000)
|
||||
m_space->install_ram(0x100000, ram_size - 1, m_ram + 0x100000);
|
||||
|
||||
// install bios rom at cpu inital pc
|
||||
// install bios rom at cpu initial pc
|
||||
m_space->install_rom(0xffff0000, 0xffffffff, m_bios + 0xf0000);
|
||||
|
||||
// install i/o accesses
|
||||
|
||||
@ -4664,7 +4664,7 @@ void hdc92x4_device::dma_address_out(uint8_t addrub, uint8_t addrhb, uint8_t add
|
||||
/*
|
||||
Set/clear INT
|
||||
|
||||
Interupts are generated in the following occasions:
|
||||
Interrupts are generated in the following occasions:
|
||||
- when the DONE bit is set to 1 in the ISR and ST_DONE is set to 1
|
||||
- when the READY_CHANGE bit is set to 1 in the ISR and ST_RDYCHNG is set to 1
|
||||
(ready change: 1->0 or 0->1)
|
||||
|
||||
@ -81,7 +81,7 @@ class hdc92x4_device : public device_t
|
||||
public:
|
||||
hdc92x4_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, uint32_t clock, const char *shortname, const char *source);
|
||||
|
||||
// Accesors from the CPU side
|
||||
// Accessors from the CPU side
|
||||
DECLARE_READ8_MEMBER( read );
|
||||
DECLARE_WRITE8_MEMBER( write );
|
||||
DECLARE_WRITE_LINE_MEMBER( reset );
|
||||
|
||||
@ -151,7 +151,7 @@ extern const device_type MC6854;
|
||||
It passes bytes directly from one end to the other without bothering with
|
||||
the actual bit-encoding, synchronization, and CRC.
|
||||
Once completed, a frame is sent through out_frame. Aborted frames are not
|
||||
transmitted at all. No start flag, stop flag, or crc bits are trasmitted.
|
||||
transmitted at all. No start flag, stop flag, or crc bits are transmitted.
|
||||
send_frame makes a frame available to the CPU through the 6854 (it may
|
||||
fail and return -1 if the 6854 is not ready to accept the frame; even
|
||||
if the frame is accepted and 0 is returned, the CPU may abort it). Ony
|
||||
|
||||
@ -2,7 +2,7 @@
|
||||
// copyright-holders:James Wallace
|
||||
/**********************************************************************
|
||||
|
||||
Rockwell 10937/10957 interface and simlar chips
|
||||
Rockwell 10937/10957 interface and similar chips
|
||||
Emulation by J.Wallace
|
||||
OKI MSC1937 is a clone of this chip, with many others.
|
||||
|
||||
|
||||
@ -526,7 +526,7 @@ void duscc_device::trigger_interrupt(int index, int state)
|
||||
m_int_state[priority_level] |= Z80_DAISY_INT;
|
||||
LOGINT((" - Interrupt Priority Level %d, caused by Source %02x with vector %02x\n",priority_level, source, m_ivrm ));
|
||||
|
||||
// check for interupts
|
||||
// check for interrupts
|
||||
check_interrupts();
|
||||
}
|
||||
|
||||
|
||||
@ -267,7 +267,7 @@ void saturn_state::cd_exec_command( void )
|
||||
break;
|
||||
|
||||
case 0x06: // end data transfer (TODO: needs to be worked on!)
|
||||
// returns # of bytes transfered (24 bits) in
|
||||
// returns # of bytes transferred (24 bits) in
|
||||
// low byte of cr1 (MSB) and cr2 (middle byte, LSB)
|
||||
CDROM_LOG(("%s:CD: End data transfer (%d bytes xfer'd)\n", machine().describe_context(), xferdnum))
|
||||
|
||||
|
||||
@ -168,7 +168,7 @@ void wd7600_device::device_start()
|
||||
//m_space->install_rom(0x000c0000, 0x000cffff, m_bios);
|
||||
m_space->install_rom(0x000c0000, 0x000cffff, m_isa);
|
||||
|
||||
// install BIOS ROM at cpu inital pc
|
||||
// install BIOS ROM at cpu initial pc
|
||||
m_space->install_rom(0x000f0000, 0x000fffff, m_bios + 0x10000);
|
||||
if(m_space->addrmask() == 0xffffffff) // 32-bit address space only
|
||||
m_space->install_rom(0xffff0000, 0xffffffff, m_bios + 0x10000);
|
||||
|
||||
@ -239,11 +239,11 @@ private:
|
||||
//
|
||||
// In the first case, it must first switch to a waiting
|
||||
// sub-state, then return. The waiting sub-state must just
|
||||
// return immediatly when *_continue is called. Eventually the
|
||||
// return immediately when *_continue is called. Eventually the
|
||||
// event handler function will advance the state machine to
|
||||
// another sub-state, and things will continue synchronously.
|
||||
//
|
||||
// On command end it's also supposed to return immediatly.
|
||||
// On command end it's also supposed to return immediately.
|
||||
//
|
||||
// The last option is to switch to the next sub-state, start a
|
||||
// live state with live_start() then return. The next sub-state
|
||||
|
||||
@ -1133,7 +1133,7 @@ void z80scc_channel::tra_complete()
|
||||
{
|
||||
m_uart->trigger_interrupt(m_index, INT_TRANSMIT); // Set TXIP bit
|
||||
}
|
||||
else if(m_rr0 & RR0_TX_BUFFER_EMPTY) // Check TBE bit and interrupt if one or more FIFO slots availble
|
||||
else if(m_rr0 & RR0_TX_BUFFER_EMPTY) // Check TBE bit and interrupt if one or more FIFO slots available
|
||||
{
|
||||
m_uart->trigger_interrupt(m_index, INT_TRANSMIT); // Set TXIP bit
|
||||
}
|
||||
@ -2437,7 +2437,7 @@ void z80scc_channel::data_write(uint8_t data)
|
||||
{
|
||||
m_uart->trigger_interrupt(m_index, INT_TRANSMIT); // Set TXIP bit
|
||||
}
|
||||
else if(m_rr0 & RR0_TX_BUFFER_EMPTY) // Check TBE bit and interrupt if one or more FIFO slots availble
|
||||
else if(m_rr0 & RR0_TX_BUFFER_EMPTY) // Check TBE bit and interrupt if one or more FIFO slots available
|
||||
{
|
||||
m_uart->trigger_interrupt(m_index, INT_TRANSMIT); // Set TXIP bit
|
||||
}
|
||||
|
||||
@ -677,7 +677,7 @@ public:
|
||||
DECLARE_READ8_MEMBER( ba_cd_inv_r );
|
||||
DECLARE_WRITE8_MEMBER( ba_cd_inv_w );
|
||||
|
||||
/* Definitions moved to z80scc.c for enhencements */
|
||||
/* Definitions moved to z80scc.c for enhancements */
|
||||
DECLARE_READ8_MEMBER( da_r ); // { return m_chanA->data_read(); }
|
||||
DECLARE_WRITE8_MEMBER( da_w ); // { m_chanA->data_write(data); }
|
||||
DECLARE_READ8_MEMBER( db_r ); // { return m_chanB->data_read(); }
|
||||
|
||||
@ -3,7 +3,7 @@
|
||||
/* Sega 315-5641 / D77591 / 9442CA010 */
|
||||
|
||||
// this is the PICO sound chip, we are not sure if it's the same as a 7759 or not, it requires FIFO logic
|
||||
// which the 7759 does _not_ have but it is possible that is handled somewhere else on the PICO hardawre.
|
||||
// which the 7759 does _not_ have but it is possible that is handled somewhere else on the PICO hardware.
|
||||
|
||||
#include "upd7759.h"
|
||||
|
||||
|
||||
@ -32,7 +32,7 @@ public:
|
||||
private:
|
||||
sound_stream *m_stream; /* stream number */
|
||||
int m_enable; /* enable beep */
|
||||
int m_frequency; /* set frequency - this can be changed using the appropiate function */
|
||||
int m_frequency; /* set frequency - this can be changed using the appropriate function */
|
||||
int m_incr; /* initial wave state */
|
||||
int16_t m_signal; /* current signal */
|
||||
};
|
||||
|
||||
@ -113,7 +113,7 @@ public:
|
||||
double vInFall; // voltage that triggers the gate input to go low (0V) on fall
|
||||
double vInRise; // voltage that triggers the gate input to go high (vGate) on rise
|
||||
double clamp; // voltage is clamped to -clamp ... vb+clamp if clamp>= 0;
|
||||
int options; // bitmaped options
|
||||
int options; // bitmapped options
|
||||
};
|
||||
enum {
|
||||
IS_TYPE1 = 0x00,
|
||||
|
||||
@ -378,7 +378,7 @@
|
||||
***********************************************************************
|
||||
*
|
||||
* DISCRETE_CONSTANT - Single output, fixed at compile time.
|
||||
* This is usefull as a placeholder for
|
||||
* This is useful as a placeholder for
|
||||
* incomplete circuits.
|
||||
*
|
||||
* .----------.
|
||||
@ -446,7 +446,7 @@
|
||||
* it if needed.
|
||||
* If you need to access a stream from a discrete task, the stream node
|
||||
* must be part of that task. If a given stream is used in two tasks or
|
||||
* a task and the main task, you must declare two stream nodes acccessing the
|
||||
* a task and the main task, you must declare two stream nodes accessing the
|
||||
* same stream input NUM.
|
||||
*
|
||||
* EXAMPLES: see scramble, frogger
|
||||
@ -479,7 +479,7 @@
|
||||
* types above if needed, or use separately with 7492.
|
||||
* DISC_OUT_IS_ENERGY - This will uses the x_time to
|
||||
* anti-alias the count. Might be
|
||||
* usefull if not connected to other
|
||||
* useful if not connected to other
|
||||
* modules.
|
||||
* DISC_OUT_HAS_XTIME - This will generate x_time if
|
||||
* being used with DISC_CLK_IS_FREQ.
|
||||
@ -513,7 +513,7 @@
|
||||
***********************************************************************
|
||||
*
|
||||
* DISCRETE_LFSR_NOISE - Noise waveform generator node, generates
|
||||
* psuedo random digital stream at the requested
|
||||
* pseudo random digital stream at the requested
|
||||
* clock frequency.
|
||||
*
|
||||
* Declaration syntax
|
||||
@ -767,7 +767,7 @@
|
||||
*
|
||||
***********************************************************************
|
||||
*
|
||||
* DISCRETE_TRIANGLEW - Triagular waveform generator, generates
|
||||
* DISCRETE_TRIANGLEW - Triangular waveform generator, generates
|
||||
* equal ramp up/down at chosen frequency
|
||||
*
|
||||
* .------------.
|
||||
@ -1148,7 +1148,7 @@
|
||||
* vInRise voltage that triggers the gate input to go high (vGate) on rise
|
||||
* vInFall voltage that triggers the gate input to go low (0V) on fall
|
||||
* clamp internal diode clamp: [-clamp ... vb+clamp] if clamp>= 0
|
||||
* options bitmaped options
|
||||
* options bitmapped options
|
||||
*
|
||||
* There is a macro DEFAULT_CD40XX_VALUES(_vB) which may be used to initialize the
|
||||
* structure with .... = { 5, DEFAULT_CD40XX_VALUES(5), DISC_OSC_INVERTER_IS_TYPE1}
|
||||
@ -1602,7 +1602,7 @@
|
||||
* DISC_OUT_ACTIVE_HIGH 0x00 - output active high (DEFAULT)
|
||||
*
|
||||
* NOTE: A width of 0 seconds will output a pulse of 1 sample.
|
||||
* This is useful for a guaranteed minimun pulse, regardless
|
||||
* This is useful for a guaranteed minimum pulse, regardless
|
||||
* of the sample rate.
|
||||
*
|
||||
* EXAMPLES: see Polaris
|
||||
@ -1805,7 +1805,7 @@
|
||||
=======================================================================
|
||||
***********************************************************************
|
||||
*
|
||||
* DISCRETE_COMP_ADDER - Selecatable parallel component adder.
|
||||
* DISCRETE_COMP_ADDER - Selectable parallel component adder.
|
||||
* The total netlist out will be the parallel sum of all
|
||||
* components with their corresponding data bit = 1.
|
||||
* Set cDefault to 0 if not used.
|
||||
@ -1906,7 +1906,7 @@
|
||||
*
|
||||
* v_junction table can be set to nullptr if you want all diodes to
|
||||
* default to a 0.5V drop. Otherwise use a
|
||||
* table of doubles to specify juntion voltages.
|
||||
* table of doubles to specify junction voltages.
|
||||
*
|
||||
* EXAMPLES: see dkong
|
||||
*
|
||||
@ -2202,7 +2202,7 @@
|
||||
* When the output of the function is 0, then the connection is held at 0V or gnd.
|
||||
* When the output of the function is 1, then the function is an open circuit.
|
||||
*
|
||||
* DISC_OP_AMP_TRIGGER_FUNCTION_NONE - Not used, cicuit open.
|
||||
* DISC_OP_AMP_TRIGGER_FUNCTION_NONE - Not used, circuit open.
|
||||
* DISC_OP_AMP_TRIGGER_FUNCTION_TRG0 - Gnd when trigger 0 is 0.
|
||||
* DISC_OP_AMP_TRIGGER_FUNCTION_TRG0_INV - Gnd when trigger 0 is 1.
|
||||
* DISC_OP_AMP_TRIGGER_FUNCTION_TRG1 - Gnd when trigger 1 is 0.
|
||||
@ -2773,7 +2773,7 @@
|
||||
* DISCRETE_RCDISC5(NODE_11,NODE_10,10,100,CAP_U(1))
|
||||
*
|
||||
* When enabled by NODE_10, C discharges from 10v as indicated by RC
|
||||
* of 100R & 1uF. If not enabled, the capcitors keeps it load and may
|
||||
* of 100R & 1uF. If not enabled, the capacitors keeps it load and may
|
||||
* still be charged through input1. The switch is assumed to be a CD4066,
|
||||
* thus if not enabled the output will be drawn by R to GND since
|
||||
* the switch is in high impedance mode.
|
||||
@ -3028,8 +3028,8 @@
|
||||
* rate, then the output may change state more then once
|
||||
* during the sample. Using this flag will cause
|
||||
* the output to be the number of falling edges that
|
||||
* happened during the sample. This is usefull to feed
|
||||
* to counter circuits. The Output Type flag is ingnored
|
||||
* happened during the sample. This is useful to feed
|
||||
* to counter circuits. The Output Type flag is ignored
|
||||
* when this flag is used.
|
||||
* DISC_555_OUT_COUNT_R - Same as DISC_555_OUT_COUNT_F but with rising edges.
|
||||
* DISC_555_OUT_ENERGY - Same SQW, but will help reduce aliasing effects.
|
||||
@ -3184,7 +3184,7 @@
|
||||
* v_pos; - B+ voltage of 555
|
||||
* v_cc_source; - Voltage of the Constant Current source
|
||||
* v_out_high; - High output voltage of 555 (Defaults to v_pos - 1.2V)
|
||||
* v_cc_junction; - The voltage drop of the Constant Current source transitor
|
||||
* v_cc_junction; - The voltage drop of the Constant Current source transistor
|
||||
* (0 if Op Amp)
|
||||
* }
|
||||
*
|
||||
@ -3303,7 +3303,7 @@
|
||||
*
|
||||
* Waveform Types:
|
||||
* DISC_566_OUT_SQUARE - Pin 3 Square Wave Output (DEFAULT)
|
||||
* DISC_566_OUT_ENERGY - Pin 3 anti-alaised Square Wave Output
|
||||
* DISC_566_OUT_ENERGY - Pin 3 anti-aliased Square Wave Output
|
||||
* DISC_566_OUT_TRIANGLE - Pin 4 Triangle Wave Output
|
||||
* DISC_566_OUT_LOGIC - Internal Flip/Flop Output
|
||||
* DISC_566_COUNT_F - # of falling edges
|
||||
@ -3636,7 +3636,7 @@ enum
|
||||
|
||||
#define DISC_OP_AMP_FILTER_TYPE_MASK (0xf0 | DISC_OP_AMP_IS_NORTON) // Used only internally.
|
||||
|
||||
/* Sallen-Key filter Opions */
|
||||
/* Sallen-Key filter Options */
|
||||
#define DISC_SALLEN_KEY_LOW_PASS 0x01
|
||||
#define DISC_SALLEN_KEY_HIGH_PASS 0x02
|
||||
|
||||
@ -3700,7 +3700,7 @@ enum
|
||||
#define DISC_566_OUT_AC 0x10
|
||||
|
||||
#define DISC_566_OUT_SQUARE 0x00 /* Squarewave */
|
||||
#define DISC_566_OUT_ENERGY 0x01 /* anti-alaised Squarewave */
|
||||
#define DISC_566_OUT_ENERGY 0x01 /* anti-aliased Squarewave */
|
||||
#define DISC_566_OUT_TRIANGLE 0x02 /* Triangle waveform */
|
||||
#define DISC_566_OUT_LOGIC 0x03 /* 0/1 logic output */
|
||||
#define DISC_566_OUT_COUNT_F 0x04
|
||||
@ -3882,16 +3882,16 @@ struct discrete_schmitt_osc_desc
|
||||
double trshRise; // voltage that triggers the gate input to go high (vGate) on rise
|
||||
double trshFall; // voltage that triggers the gate input to go low (0V) on fall
|
||||
double vGate; // the output high voltage of the gate that gets fedback through rFeedback
|
||||
int options; // bitmaped options
|
||||
int options; // bitmapped options
|
||||
};
|
||||
|
||||
|
||||
struct discrete_comp_adder_table
|
||||
{
|
||||
int type;
|
||||
double cDefault; // Default componet. 0 if not used.
|
||||
double cDefault; // Default component. 0 if not used.
|
||||
int length;
|
||||
double c[DISC_LADDER_MAXRES]; // Componet table
|
||||
double c[DISC_LADDER_MAXRES]; // Component table
|
||||
};
|
||||
|
||||
|
||||
@ -4031,7 +4031,7 @@ struct discrete_555_cc_desc
|
||||
double v_pos; /* B+ voltage of 555 */
|
||||
double v_cc_source; /* Voltage of the Constant Current source */
|
||||
double v_out_high; /* High output voltage of 555 (Defaults to v_pos - 1.2V) */
|
||||
double v_cc_junction; /* The voltage drop of the Constant Current source transitor (0 if Op Amp) */
|
||||
double v_cc_junction; /* The voltage drop of the Constant Current source transistor (0 if Op Amp) */
|
||||
};
|
||||
|
||||
|
||||
|
||||
@ -87,8 +87,8 @@ struct chan_info {
|
||||
uint32_t buf_rptr; // Address to sample cache memory
|
||||
uint16_t buf_count; // Number of samples that have been played
|
||||
uint16_t buf_size; // Number of samples minus one to play
|
||||
uint32_t pci_addr; // PCI Addresss for system memory accesses
|
||||
uint16_t pci_count; // Number of 32 bits transfered
|
||||
uint32_t pci_addr; // PCI Address for system memory accesses
|
||||
uint16_t pci_count; // Number of 32 bits transferred
|
||||
uint16_t pci_size; // Total number of words (32 bits) minus one in system memory
|
||||
};
|
||||
|
||||
|
||||
@ -643,7 +643,7 @@ struct FM_OPN
|
||||
uint32_t eg_cnt; /* global envelope generator counter */
|
||||
uint32_t eg_timer; /* global envelope generator counter works at frequency = chipclock/64/3 */
|
||||
uint32_t eg_timer_add; /* step of eg_timer */
|
||||
uint32_t eg_timer_overflow;/* envelope generator timer overlfows every 3 samples (on real chip) */
|
||||
uint32_t eg_timer_overflow;/* envelope generator timer overflows every 3 samples (on real chip) */
|
||||
|
||||
|
||||
/* there are 2048 FNUMs that can be generated using FNUM/BLK registers
|
||||
@ -2982,7 +2982,7 @@ void * ym2608_init(void *param, device_t *device, int clock, int rate,
|
||||
F2608->deltaT.status_change_which_chip = F2608;
|
||||
F2608->deltaT.status_change_EOS_bit = 0x04; /* status flag: set bit2 on End Of Sample */
|
||||
F2608->deltaT.status_change_BRDY_bit = 0x08; /* status flag: set bit3 on BRDY */
|
||||
F2608->deltaT.status_change_ZERO_bit = 0x10; /* status flag: set bit4 if silence continues for more than 290 miliseconds while recording the ADPCM */
|
||||
F2608->deltaT.status_change_ZERO_bit = 0x10; /* status flag: set bit4 if silence continues for more than 290 milliseconds while recording the ADPCM */
|
||||
|
||||
/* ADPCM Rhythm */
|
||||
F2608->pcmbuf = device->memregion("ym2608")->base();
|
||||
|
||||
@ -25,7 +25,7 @@
|
||||
#define FM_INTERNAL_TIMER 0
|
||||
|
||||
/* --- speedup optimize --- */
|
||||
/* busy flag enulation , The definition of FM_GET_TIME_NOW() is necessary. */
|
||||
/* busy flag emulation , The definition of FM_GET_TIME_NOW() is necessary. */
|
||||
#define FM_BUSY_FLAG_SUPPORT 1
|
||||
|
||||
/* --- external SSG(YM2149/AY-3-8910)emulator interface port */
|
||||
@ -38,7 +38,7 @@ struct ssg_callbacks
|
||||
void (*reset)(void *param);
|
||||
};
|
||||
|
||||
/* --- external callback funstions for realtime update --- */
|
||||
/* --- external callback functions for realtime update --- */
|
||||
|
||||
#if FM_BUSY_FLAG_SUPPORT
|
||||
#define TIME_TYPE attotime
|
||||
|
||||
@ -660,7 +660,7 @@ struct fm2612_FM_OPN
|
||||
uint32_t eg_cnt; /* global envelope generator counter */
|
||||
uint32_t eg_timer; /* global envelope generator counter works at frequency = chipclock/144/3 */
|
||||
uint32_t eg_timer_add; /* step of eg_timer */
|
||||
uint32_t eg_timer_overflow;/* envelope generator timer overlfows every 3 samples (on real chip) */
|
||||
uint32_t eg_timer_overflow;/* envelope generator timer overflows every 3 samples (on real chip) */
|
||||
|
||||
|
||||
/* there are 2048 FNUMs that can be generated using FNUM/BLK registers
|
||||
|
||||
@ -255,7 +255,7 @@ struct FM_OPL
|
||||
uint32_t eg_cnt; /* global envelope generator counter */
|
||||
uint32_t eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
|
||||
uint32_t eg_timer_add; /* step of eg_timer */
|
||||
uint32_t eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
|
||||
uint32_t eg_timer_overflow; /* envelope generator timer overflows every 1 sample (on real chip) */
|
||||
|
||||
uint8_t rhythm; /* Rhythm mode */
|
||||
|
||||
|
||||
@ -59,7 +59,7 @@ public:
|
||||
Note that the eight PCM channels of a K054539 do not have separate
|
||||
volume controls. Considering the global attenuation equation may not
|
||||
be entirely accurate, k054539_set_gain() provides means to control
|
||||
channel gain. It can be called anywhere but preferrably from
|
||||
channel gain. It can be called anywhere but preferably from
|
||||
DRIVER_INIT().
|
||||
|
||||
Parameters:
|
||||
|
||||
@ -27,7 +27,7 @@
|
||||
#define NOISE_LEN 8192
|
||||
|
||||
|
||||
/* finite machine state controling frames */
|
||||
/* finite machine state controlling frames */
|
||||
enum mea8000_state
|
||||
{
|
||||
MEA8000_STOPPED, /* nothing to do, timer disabled */
|
||||
|
||||
@ -58,7 +58,7 @@ public:
|
||||
// if VCLK and reset or data is changed at the same time,
|
||||
// call vclk_w after data_w and reset_w.
|
||||
void vclk_w(int vclk);
|
||||
// option , selected pin seletor
|
||||
// option , selected pin selector
|
||||
void playmode_w(int select);
|
||||
|
||||
void change_clock_w(int32_t clock);
|
||||
|
||||
@ -249,7 +249,7 @@ void msm5232_device::init_tables()
|
||||
|
||||
#if 0
|
||||
{
|
||||
/* rate tables (in miliseconds) */
|
||||
/* rate tables (in milliseconds) */
|
||||
static const int ATBL[8] = { 2,4,8,16, 32,64, 32,64};
|
||||
static const int DTBL[16]= { 40,80,160,320, 640,1280, 640,1280,
|
||||
333,500,1000,2000, 4000,8000, 4000,8000};
|
||||
|
||||
@ -9,7 +9,7 @@
|
||||
Who Wants to Know? (wwtk@mail.com)
|
||||
|
||||
This core is written with the advise and consent of Matthew Conte and is
|
||||
released under the GNU Public License. This core is freely avaiable for
|
||||
released under the GNU Public License. This core is freely available for
|
||||
use in any freeware project, subject to the following terms:
|
||||
|
||||
Any modifications to this code must be duly noted in the source and
|
||||
|
||||
@ -9,7 +9,7 @@
|
||||
Who Wants to Know? (wwtk@mail.com)
|
||||
|
||||
This core is written with the advise and consent of Matthew Conte and is
|
||||
released under the GNU Public License. This core is freely avaiable for
|
||||
released under the GNU Public License. This core is freely available for
|
||||
use in any freeware project, subject to the following terms:
|
||||
|
||||
Any modifications to this code must be duly noted in the source and
|
||||
|
||||
@ -9,7 +9,7 @@
|
||||
Who Wants to Know? (wwtk@mail.com)
|
||||
|
||||
This core is written with the advise and consent of Matthew Conte and is
|
||||
released under the GNU Public License. This core is freely avaiable for
|
||||
released under the GNU Public License. This core is freely available for
|
||||
use in any freeware project, subject to the following terms:
|
||||
|
||||
Any modifications to this code must be duly noted in the source and
|
||||
|
||||
@ -7,7 +7,7 @@
|
||||
* Based on original info found in Ron Fries' Pokey emulator,
|
||||
* with additions by Brad Oliver, Eric Smith and Juergen Buchmueller,
|
||||
* paddle (a/d conversion) details from the Atari 400/800 Hardware Manual.
|
||||
* Polynome algorithms according to info supplied by Perry McFarlane.
|
||||
* Polynomial algorithms according to info supplied by Perry McFarlane.
|
||||
*
|
||||
* 4.6:
|
||||
* [1] http://ploguechipsounds.blogspot.de/2009/10/how-i-recorded-and-decoded-pokeys.html
|
||||
@ -28,7 +28,7 @@
|
||||
* new RNG give this expected result now, bits #0-7 of the 9 bit poly.
|
||||
* - reading the RNG returns the shift register contents ^ 0xff.
|
||||
* That way resetting the Pokey with SKCTL (which resets the
|
||||
* polynome shifters to 0) returns the expected 0xff value.
|
||||
* polynomial shifters to 0) returns the expected 0xff value.
|
||||
* 4.4:
|
||||
* - reversed sample values to make OFF channels produce a zero signal.
|
||||
* actually de-reversed them; don't remember that I reversed them ;-/
|
||||
|
||||
@ -7,7 +7,7 @@
|
||||
* Based on original info found in Ron Fries' Pokey emulator,
|
||||
* with additions by Brad Oliver, Eric Smith and Juergen Buchmueller.
|
||||
* paddle (a/d conversion) details from the Atari 400/800 Hardware Manual.
|
||||
* Polynome algorithms according to info supplied by Perry McFarlane.
|
||||
* Polynomial algorithms according to info supplied by Perry McFarlane.
|
||||
*
|
||||
*****************************************************************************/
|
||||
|
||||
|
||||
@ -120,7 +120,7 @@ private:
|
||||
|
||||
// input pins
|
||||
bool m_bStart;
|
||||
uint8_t m_uWord; // 6 bit word noumber to be spoken
|
||||
uint8_t m_uWord; // 6 bit word number to be spoken
|
||||
|
||||
// emulator variables
|
||||
// statistics
|
||||
|
||||
@ -61,7 +61,7 @@ struct saa1099_noise
|
||||
/* vars to simulate the noise generator output */
|
||||
double counter;
|
||||
double freq;
|
||||
int level; /* noise polynomal shifter */
|
||||
int level; /* noise polynomial shifter */
|
||||
};
|
||||
|
||||
|
||||
|
||||
@ -124,7 +124,7 @@ private:
|
||||
int m_counter[12]; // tone frequency counter
|
||||
int m_frequency[12]; // tone frequency
|
||||
int m_output; // output signal bits
|
||||
int m_enable; // mask which harmoics
|
||||
int m_enable; // mask which harmonics
|
||||
|
||||
int m_tune_num; // tune currently playing
|
||||
int m_tune_ofs; // note currently playing
|
||||
|
||||
@ -16,7 +16,7 @@
|
||||
#define TMS5110_CMD_RESET (0) /* 0 0 0 x | 1 */
|
||||
#define TMS5110_CMD_LOAD_ADDRESS (2) /* 0 0 1 x | 2 */
|
||||
#define TMS5110_CMD_OUTPUT (4) /* 0 1 0 x | 3 */
|
||||
#define TMS5110_CMD_SPKSLOW (6) /* 0 1 1 x | 1 | Note: this command is undocumented on the datasheets, it only appears on the patents. It might not actually work properly on some of the real chips as manufactured. Acts the same as CMD_SPEAK, but makes the interpolator take three A cycles whereever it would normally only take one, effectively making speech of any given word take twice as long as normal. */
|
||||
#define TMS5110_CMD_SPKSLOW (6) /* 0 1 1 x | 1 | Note: this command is undocumented on the datasheets, it only appears on the patents. It might not actually work properly on some of the real chips as manufactured. Acts the same as CMD_SPEAK, but makes the interpolator take three A cycles wherever it would normally only take one, effectively making speech of any given word take twice as long as normal. */
|
||||
#define TMS5110_CMD_READ_BIT (8) /* 1 0 0 x | 1 */
|
||||
#define TMS5110_CMD_SPEAK (10) /* 1 0 1 x | 1 */
|
||||
#define TMS5110_CMD_READ_BRANCH (12) /* 1 1 0 x | 1 */
|
||||
|
||||
@ -60,7 +60,7 @@ private:
|
||||
uint8_t m_parameter;
|
||||
uint8_t m_phase;
|
||||
|
||||
/* state of option paramter */
|
||||
/* state of option parameter */
|
||||
int m_frame_size;
|
||||
int m_pitch_offset;
|
||||
uint8_t m_interp_step;
|
||||
|
||||
@ -187,7 +187,7 @@ private:
|
||||
uint32_t eg_cnt; /* global envelope generator counter */
|
||||
uint32_t eg_timer; /* global envelope generator counter works at frequency = chipclock/64/3 */
|
||||
uint32_t eg_timer_add; /* step of eg_timer */
|
||||
uint32_t eg_timer_overflow; /* envelope generator timer overlfows every 3 samples (on real chip) */
|
||||
uint32_t eg_timer_overflow; /* envelope generator timer overflows every 3 samples (on real chip) */
|
||||
|
||||
uint32_t lfo_phase; /* accumulated LFO phase (0 to 255) */
|
||||
uint32_t lfo_timer; /* LFO timer */
|
||||
|
||||
@ -130,7 +130,7 @@ private:
|
||||
uint32_t eg_cnt; /* global envelope generator counter */
|
||||
uint32_t eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
|
||||
uint32_t eg_timer_add; /* step of eg_timer */
|
||||
uint32_t eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
|
||||
uint32_t eg_timer_overflow; /* envelope generator timer overflows every 1 sample (on real chip) */
|
||||
|
||||
uint8_t rhythm; /* Rhythm mode */
|
||||
|
||||
|
||||
@ -15,7 +15,7 @@ typedef void (*STATUS_CHANGE_HANDLER)(void *chip, uint8_t status_bits);
|
||||
|
||||
|
||||
/* DELTA-T (adpcm type B) struct */
|
||||
struct YM_DELTAT { /* AT: rearranged and tigntened structure */
|
||||
struct YM_DELTAT { /* AT: rearranged and tightened structure */
|
||||
uint8_t *memory;
|
||||
int32_t *output_pointer;/* pointer of output pointers */
|
||||
int32_t *pan; /* pan : &output_pointer[pan] */
|
||||
@ -27,7 +27,7 @@ struct YM_DELTAT { /* AT: rearranged and tigntened structure */
|
||||
uint32_t memory_size;
|
||||
int output_range;
|
||||
uint32_t now_addr; /* current address */
|
||||
uint32_t now_step; /* currect step */
|
||||
uint32_t now_step; /* correct step */
|
||||
uint32_t step; /* step */
|
||||
uint32_t start; /* start address */
|
||||
uint32_t limit; /* limit address */
|
||||
@ -62,7 +62,7 @@ struct YM_DELTAT { /* AT: rearranged and tigntened structure */
|
||||
void * status_change_which_chip; /* this chip id */
|
||||
uint8_t status_change_EOS_bit; /* 1 on End Of Sample (record/playback/cycle time of AD/DA converting has passed)*/
|
||||
uint8_t status_change_BRDY_bit; /* 1 after recording 2 datas (2x4bits) or after reading/writing 1 data */
|
||||
uint8_t status_change_ZERO_bit; /* 1 if silence lasts for more than 290 miliseconds on ADPCM recording */
|
||||
uint8_t status_change_ZERO_bit; /* 1 if silence lasts for more than 290 milliseconds on ADPCM recording */
|
||||
|
||||
/* neither Y8950 nor YM2608 can generate IRQ when PCMBSY bit changes, so instead of above,
|
||||
** the statusflag gets ORed with PCM_BSY (below) (on each read of statusflag of Y8950 and YM2608)
|
||||
|
||||
@ -228,7 +228,7 @@ struct OPL3
|
||||
uint32_t eg_cnt; /* global envelope generator counter */
|
||||
uint32_t eg_timer; /* global envelope generator counter works at frequency = chipclock/288 (288=8*36) */
|
||||
uint32_t eg_timer_add; /* step of eg_timer */
|
||||
uint32_t eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
|
||||
uint32_t eg_timer_overflow; /* envelope generator timer overflows every 1 sample (on real chip) */
|
||||
|
||||
uint32_t fn_tab[1024]; /* fnumber->increment counter */
|
||||
|
||||
|
||||
@ -100,7 +100,7 @@ public:
|
||||
void set_hpixels_per_column(int hpixels_per_column);
|
||||
|
||||
/* updates the screen -- this will call begin_update(), */
|
||||
/* followed by update_row() reapeatedly and after all row */
|
||||
/* followed by update_row() repeatedly and after all row */
|
||||
/* updating is complete, end_update() */
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
|
||||
@ -99,9 +99,9 @@ private:
|
||||
uint8_t m_blink; //cursor status
|
||||
uint8_t m_last_dial[40]; //last chars dial (for determinate the zoom position)
|
||||
uint8_t m_latchc0; //background color latch
|
||||
uint8_t m_latchm; //hided atribute latch
|
||||
uint8_t m_latchi; //insert atribute latch
|
||||
uint8_t m_latchu; //underline atribute latch
|
||||
uint8_t m_latchm; //hided attribute latch
|
||||
uint8_t m_latchi; //insert attribute latch
|
||||
uint8_t m_latchu; //underline attribute latch
|
||||
|
||||
bitmap_rgb32 m_screen_out;
|
||||
|
||||
|
||||
@ -139,7 +139,7 @@ protected:
|
||||
} sprite[10];
|
||||
uint8_t sprite_delay_cycles;
|
||||
// other internal data
|
||||
bool starting; // Inital fetches when (re)starting the rendering engine.
|
||||
bool starting; // Initial fetches when (re)starting the rendering engine.
|
||||
uint8_t sequence_counter;
|
||||
bool drawing;
|
||||
bool start_drawing;
|
||||
|
||||
@ -202,7 +202,7 @@ protected:
|
||||
}
|
||||
};
|
||||
|
||||
// artficater internal class
|
||||
// artificator internal class
|
||||
class artifacter
|
||||
{
|
||||
public:
|
||||
@ -522,7 +522,7 @@ public:
|
||||
static void set_black_and_white(device_t &device, bool bw) { downcast<mc6847_base_device &>(device).m_black_and_white = bw; }
|
||||
|
||||
/* updates the screen -- this will call begin_update(),
|
||||
followed by update_row() reapeatedly and after all row
|
||||
followed by update_row() repeatedly and after all row
|
||||
updating is complete, end_update() */
|
||||
uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
|
||||
|
||||
|
||||
@ -39,7 +39,7 @@ public:
|
||||
sparse_dirty_bitmap(int granularity = 3);
|
||||
sparse_dirty_bitmap(int width, int height, int granularity = 3);
|
||||
|
||||
// dirtying operations - partially interecting tiles are dirtied
|
||||
// dirtying operations - partially intersecting tiles are dirtied
|
||||
void dirty(const rectangle &rect) { dirty(rect.left(), rect.right(), rect.top(), rect.bottom()); }
|
||||
void dirty(int32_t left, int32_t right, int32_t top, int32_t bottom);
|
||||
void dirty_all() { dirty(0, m_width - 1, 0, m_height - 1); }
|
||||
|
||||
@ -487,7 +487,7 @@ uint8_t tms34061_device::read(address_space &space, int col, int row, int func)
|
||||
result = xypixel_r(space, col);
|
||||
break;
|
||||
|
||||
/* funtion 3 maps to direct access */
|
||||
/* function 3 maps to direct access */
|
||||
case 3:
|
||||
offs = ((row << m_rowshift) | col) & m_vrammask;
|
||||
result = m_vram[offs];
|
||||
|
||||
@ -32,7 +32,7 @@ struct vic3_sprite
|
||||
|
||||
/* buffer for currently painted line */
|
||||
int paintedline[8];
|
||||
uint8_t bitmap[8][SPRITE_BASE_X_SIZE * 2 / 8 + 1 /*for simplier sprite collision detection*/];
|
||||
uint8_t bitmap[8][SPRITE_BASE_X_SIZE * 2 / 8 + 1 /*for simpler sprite collision detection*/];
|
||||
};
|
||||
|
||||
|
||||
|
||||
@ -215,13 +215,13 @@ public:
|
||||
return addr;
|
||||
}
|
||||
|
||||
// Convert 0xRRRRCCCC to frame buffer addresss
|
||||
// Convert 0xRRRRCCCC to frame buffer address
|
||||
//inline uint32_t frame_addr_from_expanded_addr(uint32_t addr)
|
||||
//{
|
||||
// return (((addr & 0x3ff0000) >> (16 - 9 + 1)) | (addr & 0x1ff)) << 1;
|
||||
//}
|
||||
|
||||
// Convert Physical 0xRRRRCCCC to frame buffer addresss
|
||||
// Convert Physical 0xRRRRCCCC to frame buffer address
|
||||
// Based on address reg 51 (no scaling)
|
||||
inline uint32_t frame_addr_from_phys_addr(uint32_t physAddr)
|
||||
{
|
||||
|
||||
@ -5,7 +5,7 @@
|
||||
* Object auto-discovery helpers
|
||||
* \defgroup devfind
|
||||
* \{
|
||||
* Object auto-disovery helpers
|
||||
* Object auto-discovery helpers
|
||||
*/
|
||||
|
||||
#ifndef __EMU_H__
|
||||
@ -134,14 +134,14 @@ class finder_base
|
||||
public:
|
||||
/// \brief Destructor
|
||||
///
|
||||
/// Destruction via base class pointer and dynmaic type behaviour
|
||||
/// Destruction via base class pointer and dynamic type behaviour
|
||||
/// are allowed.
|
||||
virtual ~finder_base();
|
||||
|
||||
/// \brief Get next registered object discovery helper
|
||||
///
|
||||
/// Implementation of basic single-linked list behaviour.
|
||||
/// \return Pointer to the next registerd object discovery helper,
|
||||
/// \return Pointer to the next registered object discovery helper,
|
||||
/// or nullptr if this is the last.
|
||||
finder_base *next() const { return m_next; }
|
||||
|
||||
@ -203,7 +203,7 @@ protected:
|
||||
/// \param [in] required Whether warning message should be printed
|
||||
/// if a region with matching tag of incorrect width/length is
|
||||
/// found.
|
||||
/// \return Base pointer of the memeroy region if a matching region
|
||||
/// \return Base pointer of the memory region if a matching region
|
||||
/// is found, or nullptr otherwise.
|
||||
void *find_memregion(u8 width, size_t &length, bool required) const;
|
||||
|
||||
@ -343,7 +343,7 @@ protected:
|
||||
/// \brief Pointer to target object
|
||||
///
|
||||
/// Pointer to target object, or nullptr if resolution has not been
|
||||
/// attempted or the seach failed. Concrete derived classes must
|
||||
/// attempted or the search failed. Concrete derived classes must
|
||||
/// set this in their implementation of the findit member function.
|
||||
ObjectClass *m_target;
|
||||
};
|
||||
|
||||
@ -323,7 +323,7 @@ void device_t::set_machine(running_machine &machine)
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// findit - seach for all objects in auto finder
|
||||
// findit - search for all objects in auto finder
|
||||
// list and return status
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -564,7 +564,7 @@ ioport_constructor device_t::device_input_ports() const
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_reset - actually handle resetting of
|
||||
// a device; designed to be overriden by the
|
||||
// a device; designed to be overridden by the
|
||||
// actual device implementation
|
||||
//-------------------------------------------------
|
||||
|
||||
@ -577,7 +577,7 @@ void device_t::device_reset()
|
||||
//-------------------------------------------------
|
||||
// device_reset_after_children - hook to do
|
||||
// reset logic that must happen after the children
|
||||
// are reset; designed to be overriden by the
|
||||
// are reset; designed to be overridden by the
|
||||
// actual device implementation
|
||||
//-------------------------------------------------
|
||||
|
||||
|
||||
@ -23,7 +23,7 @@ public:
|
||||
enum
|
||||
{
|
||||
/* receive is waiting for start bit. The transition from high-low indicates
|
||||
start of start bit. This is used to synchronise with the data being transfered */
|
||||
start of start bit. This is used to synchronise with the data being transferred */
|
||||
RECEIVE_REGISTER_WAITING_FOR_START_BIT = 0x01,
|
||||
|
||||
/* receive is synchronised with data, data bits will be clocked in */
|
||||
|
||||
@ -354,7 +354,7 @@ void copybitmap_trans(bitmap_rgb32 &dest, const bitmap_rgb32 &src, int flipx, in
|
||||
/*
|
||||
Copy a bitmap onto another with scroll and wraparound.
|
||||
These functions support multiple independently scrolling rows/columns.
|
||||
"rows" is the number of indepentently scrolling rows. "rowscroll" is an
|
||||
"rows" is the number of independently scrolling rows. "rowscroll" is an
|
||||
array of integers telling how much to scroll each row. Same thing for
|
||||
"numcols" and "colscroll".
|
||||
If the bitmap cannot scroll in one direction, set numrows or columns to 0.
|
||||
|
||||
@ -41,10 +41,10 @@ constexpr u32 MACHINE_MECHANICAL = 0x00020000; // contains mech
|
||||
constexpr u32 MACHINE_TYPE_ARCADE = 0x00040000; // arcade machine (coin operated machines)
|
||||
constexpr u32 MACHINE_TYPE_CONSOLE = 0x00080000; // console system
|
||||
constexpr u32 MACHINE_TYPE_COMPUTER = 0x00100000; // any kind of computer including home computers, minis, calcs,...
|
||||
constexpr u32 MACHINE_TYPE_OTHER = 0x00200000; // any other emulated system that doesn't fit above (ex. clock, satelite receiver,...)
|
||||
constexpr u32 MACHINE_TYPE_OTHER = 0x00200000; // any other emulated system that doesn't fit above (ex. clock, satellite receiver,...)
|
||||
constexpr u32 MACHINE_IMPERFECT_KEYBOARD = 0x00400000; // keyboard is known to be wrong
|
||||
constexpr u32 MACHINE_CLICKABLE_ARTWORK = 0x00800000; // marking that artwork is clickable and require mouse cursor
|
||||
constexpr u32 MACHINE_IS_INCOMPLETE = 0x01000000; // any official game/system with blantantly incomplete HW or SW should be marked with this
|
||||
constexpr u32 MACHINE_IS_INCOMPLETE = 0x01000000; // any official game/system with blatantly incomplete HW or SW should be marked with this
|
||||
constexpr u32 MACHINE_NODEVICE_MICROPHONE = 0x02000000; // any game/system that has unemulated recording voice device peripheral
|
||||
constexpr u32 MACHINE_NODEVICE_CAMERA = 0x04000000; // any game/system that has unemulated capturing image device peripheral
|
||||
constexpr u32 MACHINE_NODEVICE_PRINTER = 0x08000000; // any game/system that has unemulated grabbing of screen content device
|
||||
|
||||
@ -174,7 +174,7 @@ private:
|
||||
bool m_reg_allowed; // are registrations allowed?
|
||||
int m_illegal_regs; // number of illegal registrations
|
||||
|
||||
std::vector<std::unique_ptr<state_entry>> m_entry_list; // list of reigstered entries
|
||||
std::vector<std::unique_ptr<state_entry>> m_entry_list; // list of registered entries
|
||||
std::vector<std::unique_ptr<state_callback>> m_presave_list; // list of pre-save functions
|
||||
std::vector<std::unique_ptr<state_callback>> m_postload_list; // list of post-load functions
|
||||
};
|
||||
|
||||
@ -208,7 +208,7 @@ private:
|
||||
|
||||
// ----- Helpers -----
|
||||
|
||||
// parses a software identifier (e.g. - 'apple2e:agentusa:flop1') into its consituent parts (returns false if cannot parse)
|
||||
// parses a software identifier (e.g. - 'apple2e:agentusa:flop1') into its constituent parts (returns false if cannot parse)
|
||||
bool software_name_parse(const std::string &identifier, std::string *list_name = nullptr, std::string *software_name = nullptr, std::string *part_name = nullptr);
|
||||
|
||||
#endif // __SOFTLIST_H_
|
||||
|
||||
@ -678,7 +678,7 @@ stream_sample_t *sound_stream::generate_resampled_data(stream_input &input, u32
|
||||
stream_sample_t *source = &output.m_buffer[basesample - input_stream.m_output_base_sampindex];
|
||||
|
||||
// determine the current fraction of a sample, expressed as a fraction of FRAC_ONE
|
||||
// (Note: this formula is valid as long as input_stream.m_attoseconds_per_sample signficantly exceeds FRAC_ONE > attoseconds = 4.2E-12 s)
|
||||
// (Note: this formula is valid as long as input_stream.m_attoseconds_per_sample significantly exceeds FRAC_ONE > attoseconds = 4.2E-12 s)
|
||||
u32 basefrac = (basetime - basesample * input_stream.m_attoseconds_per_sample) / ((input_stream.m_attoseconds_per_sample + FRAC_ONE - 1) >> FRAC_BITS);
|
||||
assert(basefrac < FRAC_ONE);
|
||||
|
||||
|
||||
@ -696,7 +696,7 @@ class tilemap_manager
|
||||
friend class tilemap_t;
|
||||
|
||||
public:
|
||||
// construction/destuction
|
||||
// construction/destruction
|
||||
tilemap_manager(running_machine &machine);
|
||||
~tilemap_manager();
|
||||
|
||||
|
||||
@ -50,7 +50,7 @@
|
||||
#define RES_NET_VCC_CUSTOM 0x0008
|
||||
#define RES_NET_VCC_MASK 0x0008
|
||||
|
||||
/* VBias prebuils - per channel but may be specified globally as default */
|
||||
/* VBias prebuilds - per channel but may be specified globally as default */
|
||||
|
||||
#define RES_NET_VBIAS_USE_GLOBAL 0x0000
|
||||
#define RES_NET_VBIAS_5V 0x0010
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue
Block a user