From 30efff8c13c60751781e43122c36fb34e2e6b198 Mon Sep 17 00:00:00 2001 From: Roberto Fresca Date: Sun, 2 Sep 2018 02:14:29 +0200 Subject: [PATCH] Lucky Ball 96: Changes to the memory map and banking after an exhaustive hardware analysis. [Grull Osgo] --- src/mame/drivers/luckybal.cpp | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/src/mame/drivers/luckybal.cpp b/src/mame/drivers/luckybal.cpp index c63a8e5f30c..5527821d3db 100644 --- a/src/mame/drivers/luckybal.cpp +++ b/src/mame/drivers/luckybal.cpp @@ -262,7 +262,7 @@ *********************************************************************/ -#define CPU_CLOCK XTAL(12'000'000) +#define CPU_CLOCK XTAL(12'000'000) // 12MHz. from schematics. #define MCU_CLOCK XTAL(8'000'000) #define VID_CLOCK XTAL(21'477'272) @@ -340,10 +340,7 @@ private: void luckybal_state::main_map(address_map &map) { - map(0x0000, 0x57ff).rom(); - map(0x6000, 0x7fff).bankr("bank1"); // Banked ROM. - map(0x8000, 0x9fff).bankr("bank1"); // Banked ROM. - map(0xa000, 0xbfff).bankr("bank1"); // Banked ROM. + map(0x0000, 0xbfff).rom(); map(0xc000, 0xdfff).bankr("bank1"); // Banked ROM. map(0xe000, 0xffff).ram().share("nvram"); // 6264 SRAM }