Start adding save state support to atlantis driver. (nw)

This commit is contained in:
Ted Green 2017-05-03 14:02:24 -06:00
parent 7c72a2f441
commit 31146b1c9a
7 changed files with 78 additions and 24 deletions

View File

@ -95,6 +95,11 @@ void ide_pci_device::device_start()
intr_pin = 0x1;
intr_line = 0xe;
// Save states
save_item(NAME(pci_bar));
save_item(NAME(m_config_data));
}
void ide_pci_device::device_reset()

View File

@ -102,6 +102,9 @@ void pci_device::device_start()
expansion_rom = nullptr;
expansion_rom_size = 0;
expansion_rom_base = 0;
save_item(NAME(intr_line));
save_item(NAME(intr_pin));
}
void pci_device::device_reset()

View File

@ -72,6 +72,17 @@ void pci9050_device::device_start()
m_user_input_handler.resolve();
m_user_output_handler.resolve();
// Save states
save_item(NAME(m_lasrr));
save_item(NAME(m_lasba));
save_item(NAME(m_lasbrd));
save_item(NAME(m_csbase));
save_item(NAME(m_eromrr));
save_item(NAME(m_eromba));
save_item(NAME(m_erombrd));
save_item(NAME(m_intcsr));
save_item(NAME(m_cntrl));
}
void pci9050_device::device_reset()

View File

@ -31,7 +31,7 @@ ADDRESS_MAP_END
vrc4373_device::vrc4373_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
: pci_host_device(mconfig, VRC4373, "NEC VRC4373 System Controller", tag, owner, clock, "vrc4373", __FILE__),
m_cpu_space(nullptr), m_cpu(nullptr), cpu_tag(nullptr), m_irq_num(-1),
m_cpu_space(nullptr), m_cpu(nullptr), cpu_tag(nullptr), m_irq_num(-1), m_ram_size(0x0), m_simm0_size(0x0),
m_mem_config("memory_space", ENDIANNESS_LITTLE, 32, 32),
m_io_config("io_space", ENDIANNESS_LITTLE, 32, 32), m_pci1_laddr(0), m_pci2_laddr(0), m_pci_io_laddr(0), m_target1_laddr(0), m_target2_laddr(0),
m_romRegion(*this, "rom")
@ -80,6 +80,19 @@ void vrc4373_device::device_start()
m_dma_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(vrc4373_device::dma_transfer), this));
// Leave the timer disabled.
m_dma_timer->adjust(attotime::never, 0, DMA_TIMER_PERIOD);
// Save states
// m_ram
save_pointer(NAME(m_ram.data()), m_ram_size / 4);
// m_simm
save_pointer(NAME(m_simm[0].data()), m_simm0_size / 4);
save_item(NAME(m_cpu_regs));
save_item(NAME(m_pci1_laddr));
save_item(NAME(m_pci2_laddr));
save_item(NAME(m_pci_io_laddr));
save_item(NAME(m_target1_laddr));
save_item(NAME(m_target2_laddr));
machine().save().register_postload(save_prepost_delegate(FUNC(vrc4373_device::map_cpu_space), this));
}
void vrc4373_device::device_reset()
@ -118,6 +131,7 @@ void vrc4373_device::map_cpu_space()
m_cpu->add_fastram(winStart, winEnd, false, m_ram.data());
if (LOG_NILE)
logerror("map_cpu_space ram_size=%08X ram_base=%08X\n", winSize, winStart);
//printf("map_cpu_space ram_size=%08X bytes ram_base=%08X\n", winSize, winStart);
}
// Map SIMMs
@ -137,6 +151,7 @@ void vrc4373_device::map_cpu_space()
m_cpu->add_fastram(winStart, winEnd, false, m_simm[simIndex].data());
if (LOG_NILE)
logerror("map_cpu_space simm_size[%i]=%08X simm_base=%08X\n", simIndex, winSize, winStart);
//printf("map_cpu_space simm_size[%i]=%08X bytes simm_base=%08X\n", simIndex, winSize, winStart);
}
}

View File

@ -12,6 +12,12 @@
MCFG_PCI_HOST_ADD(_tag, VRC4373, 0x005B1033, 0x00, 0x00000000) \
downcast<vrc4373_device *>(device)->set_cpu_tag(_cpu_tag);
#define MCFG_VRC4373_SET_RAM(_size) \
downcast<vrc4373_device *>(device)->set_ram_size(_size);
#define MCFG_VRC4373_SET_SIMM0(_size) \
downcast<vrc4373_device *>(device)->set_simm0_size(_size);
#define VRC4373_PAGESHIFT 12
/* NILE 3 registers 0x000-0x0ff */
@ -73,6 +79,8 @@ public:
uint64_t io_window_start, uint64_t io_window_end, uint64_t io_offset, address_space *io_space) override;
void set_cpu_tag(const char *tag);
void set_ram_size(const int size) { m_ram_size = size; };
void set_simm0_size(const int size) { m_simm0_size = size; };
virtual DECLARE_ADDRESS_MAP(config_map, 32) override;
@ -110,6 +118,8 @@ private:
mips3_device *m_cpu;
const char *cpu_tag;
int m_irq_num;
int m_ram_size;
int m_simm0_size;
address_space_config m_mem_config, m_io_config;

View File

@ -86,6 +86,7 @@ void zeus2_device::device_start()
//machine().add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(&zeus2_device::exit_handler2, this));
int_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(zeus2_device::int_timer_callback), this));
vblank_timer = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(zeus2_device::display_irq), this));
//printf("%s\n", machine().system().name);
@ -101,27 +102,40 @@ void zeus2_device::device_start()
}
/* save states */
save_pointer(NAME(waveram), WAVERAM0_WIDTH * WAVERAM0_HEIGHT * 2);
save_pointer(NAME(m_frameColor.get()), WAVERAM1_WIDTH * WAVERAM1_HEIGHT * 2);
save_pointer(NAME(m_frameDepth.get()), WAVERAM1_WIDTH * WAVERAM1_HEIGHT * 2);
save_pointer(NAME(m_zeusbase), 0x80);
save_pointer(NAME(m_renderRegs), 0x50);
save_pointer(NAME(m_pal_table), 0x100);
save_item(NAME(zeus_fifo));
save_item(NAME(zeus_fifo_words));
save_item(NAME(m_atlantis));
save_item(NAME(m_zeusbase));
save_item(NAME(m_renderRegs));
// poly
save_item(NAME(zeus_cliprect.min_x));
save_item(NAME(zeus_cliprect.max_x));
save_item(NAME(zeus_cliprect.min_y));
save_item(NAME(zeus_cliprect.max_y));
save_item(NAME(m_palSize));
save_item(NAME(zeus_matrix));
save_item(NAME(zeus_trans));
save_item(NAME(zeus_light));
save_item(NAME(zeus_texbase));
save_item(NAME(zeus_quad_size));
save_item(NAME(m_useZOffset));
save_pointer(NAME(waveram), WAVERAM0_WIDTH * WAVERAM0_HEIGHT * 8 / 4);
save_pointer(NAME(m_frameColor.get()), WAVERAM1_WIDTH * WAVERAM1_HEIGHT * 2);
save_pointer(NAME(m_frameDepth.get()), WAVERAM1_WIDTH * WAVERAM1_HEIGHT * 2);
save_item(NAME(m_pal_table));
// m_ucode
save_item(NAME(m_curUCodeSrc));
save_item(NAME(m_curPalTableSrc));
save_item(NAME(m_texmodeReg));
// int_timer
// vblank_timer
// yoffs
// texel_width
// zbase
save_item(NAME(m_system));
save_item(NAME(zeus_fifo));
save_item(NAME(zeus_fifo_words));
save_item(NAME(m_fill_color));
save_item(NAME(m_fill_depth));
save_item(NAME(m_yScale));
save_item(NAME(m_system));
}
void zeus2_device::device_reset()

View File

@ -114,7 +114,6 @@ public:
DECLARE_DRIVER_INIT(mwskins);
virtual void machine_start() override;
virtual void machine_reset() override;
uint32_t screen_update_mwskins(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
required_device<mips3_device> m_maincpu;
required_device<screen_device> m_screen;
optional_device<palette_device> m_palette;
@ -127,7 +126,6 @@ public:
required_device<nvram_device> m_rtc;
uint8_t m_rtc_data[0x8000];
uint32_t m_last_offset;
READ8_MEMBER(cmos_r);
WRITE8_MEMBER(cmos_w);
DECLARE_WRITE32_MEMBER(cmos_protect_w);
@ -197,16 +195,14 @@ READ32_MEMBER(atlantis_state::board_ctrl_r)
// ???
data = 0x1;
case CTRL_STATUS:
if (m_last_offset != (newOffset | 0x40000))
if (LOG_IRQ)
logerror("%s:board_ctrl_r read from CTRL_STATUS offset %04X = %08X & %08X bus offset = %08X\n", machine().describe_context(), newOffset, data, mem_mask, offset);
if (LOG_IRQ)
logerror("%s:board_ctrl_r read from CTRL_STATUS offset %04X = %08X & %08X bus offset = %08X\n", machine().describe_context(), newOffset, data, mem_mask, offset);
break;
default:
if (LOG_IRQ)
logerror("%s:board_ctrl_r read from offset %04X = %08X & %08X bus offset = %08X\n", machine().describe_context(), newOffset, data, mem_mask, offset);
break;
}
m_last_offset = newOffset | 0x40000;
return data;
}
@ -617,14 +613,6 @@ WRITE16_MEMBER(atlantis_state::a2d_data_w)
}
/*************************************
* Video refresh
*************************************/
uint32_t atlantis_state::screen_update_mwskins(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
{
return 0;
}
/*************************************
* Machine start
*************************************/
@ -636,8 +624,15 @@ void atlantis_state::machine_start()
m_maincpu->mips3drc_set_options(MIPS3DRC_FASTEST_OPTIONS);
// Save states
save_item(NAME(m_cmos_write_enabled));
save_item(NAME(m_serial_count));
save_item(NAME(m_status_leds));
save_item(NAME(m_user_io_state));
save_item(NAME(m_irq_state));
save_item(NAME(board_ctrl));
save_item(NAME(m_port_data));
save_item(NAME(m_a2d_data));
}
@ -806,6 +801,7 @@ static MACHINE_CONFIG_START( mwskins, atlantis_state )
MCFG_PCI_ROOT_ADD( ":pci")
MCFG_VRC4373_ADD( PCI_ID_NILE, ":maincpu")
MCFG_VRC4373_SET_RAM(0x00800000)
MCFG_PCI9050_ADD( PCI_ID_9050)
MCFG_PCI9050_SET_MAP(0, map0)
MCFG_PCI9050_SET_MAP(1, map1)