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srcclean (nw)

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This commit is contained in:
Curt Coder 2012-10-07 09:12:56 +00:00
parent 1f1557407c
commit 31387945c8
143 changed files with 1160 additions and 1160 deletions
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4
hash/a2600.xml
View File

@ -355,7 +355,7 @@ Info from Atariage and Atarimania
</part>
</software>
<software name="decathln">
<software name="decathln">
<description>The Activision Decathlon</description>
<year>1983</year>
<publisher>Activision</publisher>
@ -597,7 +597,7 @@ Info from Atariage and Atarimania
</part>
</software>
<software name="abwerniee" cloneof="abwernie">
<software name="abwerniee" cloneof="abwernie">
<!-- controller not emulated -->
<description>Alpha Beam with Ernie (PAL)</description>
<year>1983</year>

16
hash/cbm2_cart.xml
View File

@ -6,7 +6,7 @@
<description>Calc Result</description>
<year>1983</year>
<publisher>Handic Software</publisher>
<part name="cart" interface="cbm2_cart">
<dataarea name="bank3" size="0x2000">
<rom name="calc_result-bx700.bin" size="0x2000" crc="4775ebb3" sha1="5c6928a9cd8a3ce6a1d11221292b832295d6543e" offset="0" />
@ -24,7 +24,7 @@
<description>ProfiText</description>
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="cart" interface="cbm2_cart">
<dataarea name="bank1" size="0x2000">
<rom name="profitext.bin" size="0x2000" crc="ac622a2b" sha1="a02fcd187b7493a08379bbaef3d4296a083d30c8" offset="0" />
@ -36,7 +36,7 @@
<description>Demo 1</description>
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="cart" interface="cbm2_cart">
<dataarea name="bank1" size="0x2000">
<rom name="cbm610-cart1-red-left.bin" size="0x2000" crc="be426f3d" sha1="da6f1099fd09165f8ee454e2e517cfc523deb8b7" offset="0" />
@ -52,7 +52,7 @@
<description>Demo 2</description>
<year>198?</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="cart" interface="cbm2_cart">
<dataarea name="bank1" size="0x2000">
<rom name="cbm610-cart2-white-left.bin" size="0x2000" crc="aeb6881c" sha1="4bdabbd7d6d642f916b5a91155396c98fce591a3" offset="0" />
@ -68,7 +68,7 @@
<description>Moni610</description>
<year>2008</year>
<publisher>Ullrich von Bassewitz</publisher>
<part name="cart" interface="cbm2_cart">
<dataarea name="bank1" size="0x2000">
<rom name="moni.bin" size="0x2000" crc="43b08d1f" sha1="9c0c24907e85674348dd58e81e6da64e157e9d0f" offset="0" />
@ -80,7 +80,7 @@
<description>VT52 Emulator</description>
<year>1986</year>
<publisher>&lt;unknown&gt;</publisher>
<part name="cart" interface="cbm2_cart">
<dataarea name="bank2" size="0x2000">
<rom name="vt52emu.bin" size="0x2000" crc="b3b6173a" sha1="dd4a412a1a6ce4272b02d731364dd6dc96a4570b" offset="0" />
@ -92,7 +92,7 @@
<description>High Resolution Graphics</description>
<year>198?</year>
<publisher>Commodore</publisher>
<part name="cart" interface="cbm2_cart">
<feature name="slot" value="graphic" />
@ -106,7 +106,7 @@
<description>Word Result</description>
<year>198?</year>
<publisher>Handic Software</publisher>
<part name="cart" interface="cbm2_cart">
<dataarea name="bank1" size="0x1000">
<!-- this is the Commodore 64 character generator ROM, used as a copy protection dongle -->

4
hash/cbm2_flop.xml
View File

@ -1,7 +1,7 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="cbm2_flop" description="Commodore CBM-II diskettes">
<software name="burnin">
<description>Factory Burn In Diagnostics for B Series</description>
<year>1983</year>
@ -13,7 +13,7 @@
</dataarea>
</part>
</software>
<software name="termv2">
<description>Terminal Version 2.0 for B Series</description>
<year>1983</year>

2
hash/p500_flop.xml
View File

@ -1,7 +1,7 @@
<?xml version="1.0"?>
<!DOCTYPE softwarelist SYSTEM "softwarelist.dtd">
<softwarelist name="p500_flop" description="Commodore P500 diskettes">
<software name="burnin">
<description>Factory Burn In Diagnostics for P500</description>
<year>1983</year>

2
hash/pc8801_flop.xml
View File

@ -54516,7 +54516,7 @@ ExtractDisk [02]"DATA_DISK " -> "ncs music art v.2_02.d88"
</software>
<!-- AKA PC-8001_Game_Pack_vol.3
<!-- AKA PC-8001_Game_Pack_vol.3
BUGFIRE
CHECK POINT
EUROPE(?) (タイトル不明、ヨーロッパ戦線的なゲームです)

4
hash/pc98.xml
View File

@ -16,8 +16,8 @@
<!--
PC-9821Xw System Restore startup disk
this is a System Restore startup disk for PC-9821Xw
but not a Windows install source(need more disk?)
this is a System Restore startup disk for PC-9821Xw
but not a Windows install source(need more disk?)
only have some part of Windows file and a Video driver(CLGD?).
-->

2
src/emu/clifront.c
View File

@ -1283,7 +1283,7 @@ void cli_frontend::listsoftware(const char *gamename)
/*-------------------------------------------------
verifysoftware - verify roms from the software
verifysoftware - verify roms from the software
list of the specified driver(s)
-------------------------------------------------*/
void cli_frontend::verifysoftware(const char *gamename)

4
src/emu/cpu/tms0980/tms0980.c
View File

@ -269,7 +269,7 @@ struct tms0980_state
const tms0980_config *config;
address_space *program;
address_space *data;
devcb_resolved_read8 m_read_k;
devcb_resolved_write16 m_write_o;
devcb_resolved_write16 m_write_r;
@ -509,7 +509,7 @@ static void cpu_init_tms_common( legacy_cpu_device *device, const UINT32* decode
cpustate->program = &device->space( AS_PROGRAM );
cpustate->data = &device->space( AS_PROGRAM );
cpustate->m_read_k.resolve(cpustate->config->read_k, *device);
cpustate->m_write_o.resolve(cpustate->config->write_o, *device);
cpustate->m_write_r.resolve(cpustate->config->write_r, *device);

6
src/emu/devdelegate.c
View File

@ -42,8 +42,8 @@
//-------------------------------------------------
// bound_object - use the device name to locate
// a device relative to the given search root;
// fatal error if not found
// a device relative to the given search root;
// fatal error if not found
//-------------------------------------------------
delegate_late_bind &device_delegate_helper::bound_object(device_t &search_root)
@ -57,7 +57,7 @@ delegate_late_bind &device_delegate_helper::bound_object(device_t &search_root)
//-------------------------------------------------
// safe_tag - return a tag string or (unknown) if
// the object is not valid
// the object is not valid
//-------------------------------------------------
const char *device_delegate_helper::safe_tag(device_t *object)

2
src/emu/devdelegate.h
View File

@ -57,7 +57,7 @@ class device_delegate_helper
protected:
// constructor
device_delegate_helper(const char *devname) : m_device_name(devname) { }
// internal helpers
delegate_late_bind &bound_object(device_t &search_root);
static const char *safe_tag(device_t *object);

2
src/emu/device.h
View File

@ -987,7 +987,7 @@ inline device_t *device_t::siblingdevice(const char *tag) const
// query relative to the parent, if we have one
if (m_owner != NULL)
return m_owner->subdevice(tag);
// otherwise, it's NULL unless the tag is absolute
return (tag[0] == ':') ? subdevice(tag) : NULL;
}

2
src/emu/driver.c
View File

@ -42,7 +42,7 @@
//**************************************************************************
// ADDRESS_MAPS
// ADDRESS_MAPS
//**************************************************************************
// default address map

4
src/emu/driver.h
View File

@ -166,7 +166,7 @@ typedef void (*legacy_callback_func)(running_machine &machine);
// ======================> driver_device
// base class for machine driver-specific devices
class driver_device : public device_t,
class driver_device : public device_t,
public device_memory_interface
{
public:
@ -204,7 +204,7 @@ public:
// dummy driver_init callbacks
void init_0() { }
// memory helpers
address_space &generic_space() const { return space(AS_PROGRAM); }

4
src/emu/machine/53c810.c
View File

@ -393,7 +393,7 @@ void lsi53c810_device::dma_exec()
UINT8 lsi53c810_device::lsi53c810_reg_r( int offset )
{
// logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, space.device().safe_pc());
// logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, space.device().safe_pc());
switch(offset)
{
case 0x00: /* SCNTL0 */
@ -476,7 +476,7 @@ UINT8 lsi53c810_device::lsi53c810_reg_r( int offset )
void lsi53c810_device::lsi53c810_reg_w(int offset, UINT8 data)
{
// logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, space.device().safe_pc());
// logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, space.device().safe_pc());
switch(offset)
{
case 0x00: /* SCNTL0 */

2
src/emu/machine/ds75160a.h
View File

@ -81,7 +81,7 @@ private:
devcb_resolved_write8 m_out_bus_func;
UINT8 m_data;
int m_te;
int m_pe;
};

2
src/emu/machine/ds75161a.c
View File

@ -95,7 +95,7 @@ void ds75161a_device::device_start()
m_in_eoi_func.resolve(m_in_eoi_cb, *this);
m_in_atn_func.resolve(m_in_atn_cb, *this);
m_in_srq_func.resolve(m_in_srq_cb, *this);
m_out_ren_func.resolve(m_out_ren_cb, *this);
m_out_ifc_func.resolve(m_out_ifc_cb, *this);
m_out_ndac_func.resolve(m_out_ndac_cb, *this);

2
src/emu/machine/ds75161a.h
View File

@ -91,7 +91,7 @@ public:
DECLARE_READ_LINE_MEMBER( eoi_r );
DECLARE_READ_LINE_MEMBER( atn_r );
DECLARE_READ_LINE_MEMBER( srq_r );
DECLARE_WRITE_LINE_MEMBER( ren_w );
DECLARE_WRITE_LINE_MEMBER( ifc_w );
DECLARE_WRITE_LINE_MEMBER( ndac_w );

116
src/emu/machine/mos6526.c
View File

@ -9,17 +9,17 @@
/*
TODO:
TODO:
- pass Lorenz test suite 2.15
- ICR01
- IMR
- CIA1TA/TB
- CIA2TA/TB
- pass VICE cia tests
- 8520 read/write
- 5710 read/write
- optimize
- pass Lorenz test suite 2.15
- ICR01
- IMR
- CIA1TA/TB
- CIA2TA/TB
- pass VICE cia tests
- 8520 read/write
- 5710 read/write
- optimize
*/
@ -49,7 +49,7 @@ enum
SDR,
ICR, IMR = ICR,
CRA,
CRB
CRB
};
@ -79,13 +79,13 @@ enum
#define CRA_START 0x01
#define CRA_STARTED BIT(m_cra, 0)
#define CRA_PBON BIT(m_cra, 1)
#define CRA_PBON BIT(m_cra, 1)
#define CRA_OUTMODE BIT(m_cra, 2)
#define CRA_RUNMODE BIT(m_cra, 3)
#define CRA_LOAD BIT(m_cra, 4)
#define CRA_INMODE BIT(m_cra, 5)
#define CRA_SPMODE BIT(m_cra, 6)
#define CRA_TODIN BIT(m_cra, 7)
#define CRA_INMODE BIT(m_cra, 5)
#define CRA_SPMODE BIT(m_cra, 6)
#define CRA_TODIN BIT(m_cra, 7)
// control register B
@ -99,12 +99,12 @@ enum
#define CRB_START 0x01
#define CRB_STARTED BIT(m_crb, 0)
#define CRB_PBON BIT(m_crb, 1)
#define CRB_PBON BIT(m_crb, 1)
#define CRB_OUTMODE BIT(m_crb, 2)
#define CRB_RUNMODE BIT(m_crb, 3)
#define CRB_LOAD BIT(m_crb, 4)
#define CRB_INMODE ((m_crb & 0x60) >> 5)
#define CRB_ALARM BIT(m_crb, 7)
#define CRB_LOAD BIT(m_crb, 4)
#define CRB_INMODE ((m_crb & 0x60) >> 5)
#define CRB_ALARM BIT(m_crb, 7)
@ -253,7 +253,7 @@ inline UINT8 mos6526_device::bcd_increment(UINT8 value)
if ((value & 0x0f) >= 0x0a)
value += 0x10 - 0x0a;
return value;
}
@ -270,7 +270,7 @@ inline void mos6526_device::clock_tod()
UINT8 hour = (UINT8) (m_tod >> 24);
m_tod_count++;
if (m_tod_count == (CRA_TODIN ? 5 : 6))
{
m_tod_count = 0;
@ -531,7 +531,7 @@ inline void mos6526_device::clock_pipeline()
{
// timer A pipeline
m_count_a3 = m_count_a2;
switch (CRA_INMODE)
{
case CRA_INMODE_PHI2:
@ -566,11 +566,11 @@ inline void mos6526_device::clock_pipeline()
case CRB_INMODE_CNT:
m_count_b2 = m_count_b1;
break;
case CRB_INMODE_TA:
m_count_b2 = m_ta_out;
break;
case CRB_INMODE_CNT_TA:
m_count_b2 = m_ta_out && m_cnt;
break;
@ -594,7 +594,7 @@ inline void mos6526_device::clock_pipeline()
//-------------------------------------------------
// synchronize -
// synchronize -
//-------------------------------------------------
inline void mos6526_device::synchronize()
@ -709,7 +709,7 @@ void mos6526_device::device_start()
save_item(NAME(m_tb_latch));
save_item(NAME(m_cra));
save_item(NAME(m_crb));
save_item(NAME(m_tod_count));
save_item(NAME(m_tod));
save_item(NAME(m_tod_latch));
@ -838,7 +838,7 @@ READ8_MEMBER( mos6526_device::read )
case PRB:
data = (m_in_pb_func(0) & ~m_ddrb) | (m_prb & m_ddrb);
if (CRA_PBON)
{
int pb6 = CRA_OUTMODE ? m_ta_pb6 : m_ta_out;
@ -854,49 +854,49 @@ READ8_MEMBER( mos6526_device::read )
data &= ~0x80;
data |= pb7 << 7;
}
m_pc = 0;
m_out_pc_func(m_pc);
break;
case DDRA:
data = m_ddra;
break;
case DDRB:
data = m_ddrb;
break;
case TA_LO:
data = m_ta & 0xff;
break;
case TA_HI:
data = m_ta >> 8;
break;
case TB_LO:
data = m_tb & 0xff;
break;
case TB_HI:
data = m_tb >> 8;
break;
case TOD_10THS:
data = read_tod(0);
m_tod_latched = false;
break;
case TOD_SEC:
data = read_tod(1);
break;
case TOD_MIN:
data = read_tod(2);
break;
case TOD_HR:
if (!m_tod_latched)
{
@ -906,11 +906,11 @@ READ8_MEMBER( mos6526_device::read )
data = read_tod(3);
break;
case SDR:
data = m_sdr;
break;
case ICR:
data = (m_ir1 << 7) | m_icr;
@ -922,11 +922,11 @@ READ8_MEMBER( mos6526_device::read )
m_irq = false;
m_out_irq_func(CLEAR_LINE);
break;
case CRA:
data = m_cra;
break;
case CRB:
data = m_crb;
break;
@ -952,21 +952,21 @@ WRITE8_MEMBER( mos6526_device::write )
case PRB:
m_prb = data;
update_pb();
m_pc = 0;
m_out_pc_func(m_pc);
break;
case DDRA:
m_ddra = data;
update_pa();
break;
case DDRB:
m_ddrb = data;
update_pb();
break;
case TA_LO:
m_ta_latch = (m_ta_latch & 0xff00) | data;
@ -975,7 +975,7 @@ WRITE8_MEMBER( mos6526_device::write )
m_ta = (m_ta & 0xff00) | data;
}
break;
case TA_HI:
m_ta_latch = (data << 8) | (m_ta_latch & 0xff);
@ -989,7 +989,7 @@ WRITE8_MEMBER( mos6526_device::write )
m_ta = (data << 8) | (m_ta & 0xff);
}
break;
case TB_LO:
m_tb_latch = (m_tb_latch & 0xff00) | data;
@ -998,7 +998,7 @@ WRITE8_MEMBER( mos6526_device::write )
m_tb = (m_tb & 0xff00) | data;
}
break;
case TB_HI:
m_tb_latch = (data << 8) | (m_tb_latch & 0xff);
@ -1012,21 +1012,21 @@ WRITE8_MEMBER( mos6526_device::write )
m_tb = (data << 8) | (m_tb & 0xff);
}
break;
case TOD_10THS:
write_tod(0, data);
m_tod_stopped = false;
break;
case TOD_SEC:
write_tod(1, data);
break;
case TOD_MIN:
write_tod(2, data);
break;
case TOD_HR:
m_tod_stopped = true;
@ -1038,12 +1038,12 @@ WRITE8_MEMBER( mos6526_device::write )
write_tod(3, data);
break;
case SDR:
m_sdr = data;
m_sdr_empty = false;
break;
case IMR:
if (IMR_SET)
{
@ -1059,11 +1059,11 @@ WRITE8_MEMBER( mos6526_device::write )
m_ir0 = 1;
}
break;
case CRA:
set_cra(data);
break;
case CRB:
set_crb(data);
break;
@ -1134,7 +1134,7 @@ WRITE_LINE_MEMBER( mos6526_device::cnt_w )
m_count_a0 = 1;
m_count_b0 = 1;
}
m_cnt = state;
}

8
src/emu/machine/rtc4543.c
View File

@ -2,9 +2,9 @@
rtc4543.c - Epson R4543 real-time clock chip emulation
by R. Belmont
TODO: writing (not done by System 12 or 23 so no test case)
**********************************************************************/
#include "rtc4543.h"
@ -93,8 +93,8 @@ void rtc4543_device::rtc_clock_updated(int year, int month, int day, int day_of_
{
static const int weekday[7] = { 7, 1, 2, 3, 4, 5, 6 };
m_regs[0] = make_bcd(second); // seconds (BCD, 0-59) in bits 0-6, bit 7 = battery low
m_regs[1] = make_bcd(minute); // minutes (BCD, 0-59)
m_regs[0] = make_bcd(second); // seconds (BCD, 0-59) in bits 0-6, bit 7 = battery low
m_regs[1] = make_bcd(minute); // minutes (BCD, 0-59)
m_regs[2] = make_bcd(hour); // hour (BCD, 0-23)
m_regs[3] = make_bcd(weekday[day_of_week]); // low nibble = day of the week
m_regs[3] |= (make_bcd(day) & 0x0f)<<4; // high nibble = low digit of day

2
src/emu/machine/s3c2400.c
View File

@ -62,7 +62,7 @@ DEVICE_START( s3c2400 )
space.install_legacy_readwrite_handler( *device, 0x15800000, 0x15800007, FUNC(s3c24xx_adc_r), FUNC(s3c24xx_adc_w));
space.install_legacy_readwrite_handler( *device, 0x15900000, 0x15900017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
space.install_legacy_readwrite_handler( *device, 0x15a00000, 0x15a0003f, FUNC(s3c24xx_mmc_r), FUNC(s3c24xx_mmc_w));
s3c24xx_video_start( device, device->machine());
}

2
src/emu/machine/s3c2410.c
View File

@ -65,7 +65,7 @@ DEVICE_START( s3c2410 )
space.install_legacy_readwrite_handler( *device, 0x59000000, 0x59000017, FUNC(s3c24xx_spi_0_r), FUNC(s3c24xx_spi_0_w));
space.install_legacy_readwrite_handler( *device, 0x59000020, 0x59000037, FUNC(s3c24xx_spi_1_r), FUNC(s3c24xx_spi_1_w));
space.install_legacy_readwrite_handler( *device, 0x5a000000, 0x5a000043, FUNC(s3c24xx_sdi_r), FUNC(s3c24xx_sdi_w));
s3c24xx_video_start( device, device->machine());
}

2
src/emu/machine/scsibus.c
View File

@ -406,7 +406,7 @@ void scsibus_device::scsi_in_line_changed(UINT8 line, UINT8 state)
if(state)
{
data_idx++;
// If the data buffer is full flush it to the SCSI disk
data_last = (bytes_left >= sectorbytes) ? sectorbytes : bytes_left;

16
src/emu/machine/seibu_cop.c
View File

@ -178,13 +178,13 @@ WRITE16_MEMBER(seibu_cop_device::pal_brightness_mode_w)
WRITE16_MEMBER(seibu_cop_device::dma_unk_param_w)
{
/*
This sets up a DMA mode of some sort
0x0e00: grainbow, cupsoc
0x0a00: legionna, godzilla, denjinmk
0x0600: heatbrl
0x1e00: zeroteam, xsedae
raiden2 and raidendx doesn't set this up, this could indicate that this is related to the non-private buffer DMAs
(both only uses 0x14 and 0x15 as DMAs afaik)
This sets up a DMA mode of some sort
0x0e00: grainbow, cupsoc
0x0a00: legionna, godzilla, denjinmk
0x0600: heatbrl
0x1e00: zeroteam, xsedae
raiden2 and raidendx doesn't set this up, this could indicate that this is related to the non-private buffer DMAs
(both only uses 0x14 and 0x15 as DMAs afaik)
*/
COMBINE_DATA(&m_dma_unk_param);
}
@ -271,7 +271,7 @@ void seibu_cop_device::palette_dma_transfer(void)
0x86 is used by Seibu Cup Soccer
0x87 is used by Denjin Makai
TODO:
TODO:
- Denjin Makai mode 4 is totally guessworked.
- SD Gundam doesn't fade colors correctly, it should have the text layer / sprites with normal gradient and the rest dimmed in most cases,
presumably bad RAM table or bad algorithm

2
src/emu/sound/sn76496.c
View File

@ -104,7 +104,7 @@
frequency register, while the others have 0x400 as before. Should fix a bug
or two on sega games, particularly Vigilante on Sega Master System. Verified
on SMS hardware.
27/06/2012: Michael Zapf
Converted to modern device, legacy devices were gradually removed afterwards.

28
src/emu/video/pc_vga.c
View File

@ -203,15 +203,15 @@ void vga_device::device_start()
// Avoid an infinite loop when displaying. 0 is not possible anyway.
vga.crtc.maximum_scan_line = 1;
// copy over interfaces
vga.read_dipswitch = read8_delegate(); //read_dipswitch;
// copy over interfaces
vga.read_dipswitch = read8_delegate(); //read_dipswitch;
vga.svga_intf.vram_size = 0x100000;
vga.svga_intf.seq_regcount = 0x05;
vga.svga_intf.crtc_regcount = 0x19;
vga.memory = auto_alloc_array_clear(machine(), UINT8, vga.svga_intf.vram_size);
vga.memory = auto_alloc_array_clear(machine(), UINT8, vga.svga_intf.vram_size);
}
void svga_device::device_start()
@ -231,15 +231,15 @@ void cirrus_vga_device::device_start()
// Avoid an infinite loop when displaying. 0 is not possible anyway.
vga.crtc.maximum_scan_line = 1;
// copy over interfaces
vga.read_dipswitch = read8_delegate(); //read_dipswitch;
// copy over interfaces
vga.read_dipswitch = read8_delegate(); //read_dipswitch;
vga.svga_intf.vram_size = 0x200000;
vga.svga_intf.seq_regcount = 0x08;
vga.svga_intf.crtc_regcount = 0x19;
vga.memory = auto_alloc_array_clear(machine(), UINT8, vga.svga_intf.vram_size);
vga.memory = auto_alloc_array_clear(machine(), UINT8, vga.svga_intf.vram_size);
}
void ati_vga_device::device_start()
@ -1599,25 +1599,25 @@ READ8_MEMBER(vga_device::port_03c0_r)
case 3:
if (!vga.read_dipswitch.isnull() && vga.read_dipswitch(space, 0, mem_mask) & 0x01)
data |= 0x10;
else
else
data |= 0x10;
break;
case 2:
if (!vga.read_dipswitch.isnull() && vga.read_dipswitch(space, 0, mem_mask) & 0x02)
data |= 0x10;
else
else
data |= 0x10;
break;
case 1:
if (!vga.read_dipswitch.isnull() && vga.read_dipswitch(space, 0, mem_mask) & 0x04)
data |= 0x10;
else
else
data |= 0x10;
break;
case 0:
if (!vga.read_dipswitch.isnull() && vga.read_dipswitch(space, 0, mem_mask) & 0x08)
data |= 0x10;
else
else
data |= 0x10;
break;
}
@ -2045,7 +2045,7 @@ MACHINE_CONFIG_FRAGMENT( pcvideo_trident_vga )
MCFG_SCREEN_UPDATE_DEVICE("vga", trident_vga_device, screen_update)
MCFG_PALETTE_LENGTH(0x100)
MCFG_DEVICE_ADD("vga", TRIDENT_VGA, 0)
MACHINE_CONFIG_END
@ -2055,7 +2055,7 @@ MACHINE_CONFIG_FRAGMENT( pcvideo_cirrus_vga )
MCFG_SCREEN_UPDATE_DEVICE("vga", cirrus_vga_device, screen_update)
MCFG_PALETTE_LENGTH(0x100)
MCFG_DEVICE_ADD("vga", CIRRUS_VGA, 0)
MACHINE_CONFIG_END

12
src/emu/video/pc_vga.h
View File

@ -27,7 +27,7 @@ public:
virtual UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
virtual READ8_MEMBER(port_03b0_r);
virtual WRITE8_MEMBER(port_03b0_w);
virtual READ8_MEMBER(port_03c0_r);
@ -48,7 +48,7 @@ protected:
void vga_vh_vga(bitmap_rgb32 &bitmap, const rectangle &cliprect);
void vga_vh_cga(bitmap_rgb32 &bitmap, const rectangle &cliprect);
void vga_vh_mono(bitmap_rgb32 &bitmap, const rectangle &cliprect);
virtual UINT8 pc_vga_choosevideomode();
virtual UINT8 pc_vga_choosevideomode();
void recompute_params_clock(int divisor, int xtal);
UINT8 crtc_reg_read(UINT8 index);
void recompute_params();
@ -64,7 +64,7 @@ private:
inline UINT8 rotate_right(UINT8 val);
inline UINT8 vga_logical_op(UINT8 data, UINT8 plane, UINT8 mask);
inline UINT8 vga_latch_write(int offs, UINT8 data);
protected:
struct
{
@ -183,7 +183,7 @@ protected:
/* oak vga */
struct { UINT8 reg; } oak;
} vga;
} vga;
};
@ -196,7 +196,7 @@ class svga_device : public vga_device
{
public:
// construction/destruction
svga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
svga_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock);
virtual UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
protected:
@ -588,7 +588,7 @@ public:
virtual WRITE8_MEMBER(port_03d0_w);
virtual READ8_MEMBER(mem_r);
virtual WRITE8_MEMBER(mem_w);
protected:
private:
};

4
src/emu/video/tms9928a.c
View File

@ -97,7 +97,7 @@ tms9928a_device::tms9928a_device( const machine_config &mconfig, device_type typ
{
m_50hz = is_50hz;
m_reva = is_reva;
// static_set_addrmap(*this, AS_DATA, ADDRESS_MAP_NAME(memmap));
// static_set_addrmap(*this, AS_DATA, ADDRESS_MAP_NAME(memmap));
}
@ -108,7 +108,7 @@ tms9928a_device::tms9928a_device( const machine_config &mconfig, const char *tag
{
m_50hz = false;
m_reva = true;
// static_set_addrmap(*this, AS_DATA, ADDRESS_MAP_NAME(memmap));
// static_set_addrmap(*this, AS_DATA, ADDRESS_MAP_NAME(memmap));
}

38
src/mame/drivers/8080bw.c
View File

@ -2343,7 +2343,7 @@ Claybuster is on the same hardware, PCB labels CS 235A and CS 238A as well
TIMER_DEVICE_CALLBACK_MEMBER(_8080bw_state::claybust_gun_callback)
{
// reset gun latch
m_claybust_gun_pos = 0;
}
@ -2358,23 +2358,23 @@ INPUT_CHANGED_MEMBER(_8080bw_state::claybust_gun_trigger)
if (newval)
{
/*
The game registers a valid shot after the gun trigger is pressed, and IN1 d0 is high.
It latches the gun position and then compares it with VRAM contents: 1 byte/8 pixels, 0 means miss.
IN1 d0 probably indicates if the latch is ready or not (glitches happen otherwise)
The game registers a valid shot after the gun trigger is pressed, and IN1 d0 is high.
It latches the gun position and then compares it with VRAM contents: 1 byte/8 pixels, 0 means miss.
IN1 d0 probably indicates if the latch is ready or not (glitches happen otherwise)
in $06
cpi $04
rc
mov h,a
in $02
mov l,a
lxi d,$1ffe <-- this is where the +2 comes from
dad d
out $00
mov a,m
ana a
rz
*/
in $06
cpi $04
rc
mov h,a
in $02
mov l,a
lxi d,$1ffe <-- this is where the +2 comes from
dad d
out $00
mov a,m
ana a
rz
*/
UINT8 gunx = ioport("GUNX")->read_safe(0x00);
UINT8 guny = ioport("GUNY")->read_safe(0x20);
m_claybust_gun_pos = ((gunx >> 3) | (guny << 5)) + 2;
@ -2426,7 +2426,7 @@ INPUT_PORTS_END
static INPUT_PORTS_START( gunchamp )
PORT_INCLUDE( claybust )
PORT_MODIFY("IN1")
// switch is 6-pos, but DNS06:5 and DNS06:6 are not connected
@ -2461,7 +2461,7 @@ MACHINE_CONFIG_DERIVED_CLASS( claybust, invaders, _8080bw_state )
MCFG_TIMER_DRIVER_ADD("claybust_gun", _8080bw_state, claybust_gun_callback)
MCFG_MACHINE_START_OVERRIDE(_8080bw_state, claybust)
MCFG_MACHINE_START_OVERRIDE(_8080bw_state, claybust)
/* sound hardware */
// TODO: discrete sound

2
src/mame/drivers/blackt96.c
View File

@ -362,7 +362,7 @@ static INPUT_PORTS_START( blackt96 )
PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_UNKNOWN )
PORT_BIT( 0xff00, IP_ACTIVE_HIGH, IPT_UNKNOWN )
#if 0
PORT_START("IN2")
PORT_DIPNAME( 0x0001, 0x0001, "2" )

2
src/mame/drivers/calchase.c
View File

@ -601,7 +601,7 @@ static ADDRESS_MAP_START( calchase_io, AS_IO, 32, calchase_state )
AM_RANGE(0x03a0, 0x03a7) AM_NOP //To debug
AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", trident_vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", trident_vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", trident_vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", trident_vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03e0, 0x03ef) AM_NOP //To debug
AM_RANGE(0x0378, 0x037f) AM_NOP //To debug
// AM_RANGE(0x0300, 0x03af) AM_NOP

2
src/mame/drivers/cd32.c
View File

@ -1475,7 +1475,7 @@ DRIVER_INIT_MEMBER(cd32_state,odeontw2)
/***************************************************************************************************/
// these are clones of the cd32 SYSTEM because they run on a stock retail unit, with additional HW
GAME( 1993, cd32bios, 0, cd32base, cd32, cd32_state, cd32, ROT0, "Commodore Business Machines", "CD32 Bios", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND | GAME_IS_BIOS_ROOT )
GAME( 1993, cd32bios, 0, cd32base, cd32, cd32_state, cd32, ROT0, "Commodore Business Machines", "CD32 Bios", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND | GAME_IS_BIOS_ROOT )
GAME( 1995, cndypuzl, cd32bios, cd32base, cndypuzl, cd32_state, cndypuzl, ROT0, "CD Express", "Candy Puzzle (v1.0)", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
GAME( 1995, haremchl, cd32bios, cd32base, haremchl, cd32_state, haremchl, ROT0, "CD Express", "Harem Challenge", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND )
GAME( 1995, lsrquiz, cd32bios, cd32base, lsrquiz, cd32_state, lsrquiz, ROT0, "CD Express", "Laser Quiz Italy", GAME_IMPERFECT_GRAPHICS|GAME_IMPERFECT_SOUND ) /* no player 2 inputs (ingame) */

2
src/mame/drivers/cdi.c
View File

@ -625,7 +625,7 @@ CONS( 1991, cdimono1, 0, 0, cdimono1, cdi, driver_device, 0,
// The Quizard games are RETAIL CD-i units, with additional JAMMA adapters & dongles for protection, hence being 'clones' of the system.
GAME( 1995, cdibios, 0, cdi_base, quizard, driver_device, 0, ROT0, "Philips", "CD-i Bios", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_IS_BIOS_ROOT )
GAME( 1995, cdibios, 0, cdi_base, quizard, driver_device, 0, ROT0, "Philips", "CD-i Bios", GAME_IMPERFECT_SOUND | GAME_IMPERFECT_GRAPHICS | GAME_IS_BIOS_ROOT )
// Working
GAME( 1995, quizrd12, cdibios, quizrd12, quizard, driver_device, 0, ROT0, "TAB Austria", "Quizard 1.2", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION )
GAME( 1995, quizrd17, cdibios, quizrd17, quizard, driver_device, 0, ROT0, "TAB Austria", "Quizard 1.7", GAME_IMPERFECT_SOUND | GAME_UNEMULATED_PROTECTION )

8
src/mame/drivers/cps1.c
View File

@ -3063,10 +3063,10 @@ static MACHINE_CONFIG_START( cps1_10MHz, cps_state )
/* video hardware */
MCFG_SCREEN_ADD("screen", RASTER)
// MCFG_SCREEN_REFRESH_RATE(59.61) /* verified on one of the input gates of the 74ls08@4J on GNG romboard 88620-b-2 */
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
// MCFG_SCREEN_SIZE(64*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(8*8, (64-8)*8-1, 2*8, 30*8-1 )
// MCFG_SCREEN_REFRESH_RATE(59.61) /* verified on one of the input gates of the 74ls08@4J on GNG romboard 88620-b-2 */
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
// MCFG_SCREEN_SIZE(64*8, 32*8)
// MCFG_SCREEN_VISIBLE_AREA(8*8, (64-8)*8-1, 2*8, 30*8-1 )
MCFG_SCREEN_RAW_PARAMS(XTAL_16MHz/2, 518, 64, 448, 259, 16, 240) /* guess: assume that CPS-1 uses the same exact timings as CPS-2 */
MCFG_SCREEN_UPDATE_DRIVER(cps_state, screen_update_cps1)
MCFG_SCREEN_VBLANK_DRIVER(cps_state, screen_eof_cps1)

2
src/mame/drivers/deshoros.c
View File

@ -59,7 +59,7 @@ protected:
virtual void machine_start();
virtual void machine_reset();
virtual void video_start();
public:
public:
UINT32 screen_update_destiny(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
};

2
src/mame/drivers/firebeat.c
View File

@ -217,7 +217,7 @@ public:
DECLARE_WRITE32_MEMBER(lamp_output3_ppp_w);
DECLARE_READ32_MEMBER(ppc_spu_share_r);
DECLARE_WRITE32_MEMBER(ppc_spu_share_w);
DECLARE_READ16_MEMBER(spu_unk_r);
DECLARE_READ16_MEMBER(spu_unk_r);
TIMER_CALLBACK_MEMBER(keyboard_timer_callback);
};

606
src/mame/drivers/gammagic.c
View File

@ -15,7 +15,7 @@ V8000 platform includes:
1 Motherboard MICRONICS M55Hi-Plus PCI/ISA, Chipset INTEL i430HX (TRITON II), 64 MB Ram (4 SIMM M x 16 MB SIMM)
On board Sound Blaster Vibra 16C chipset.
1 TOSHIBA CD-ROM or DVD-ROM Drive w/Bootable CD-ROM with Game.
1 OAK SVGA PCI Video Board.
1 OAK SVGA PCI Video Board.
1 Voodoo Graphics PCI Video Board, connected to the monitor.
1 21" SVGA Color Monitor, 16x9 Aspect, Vertical mount, with touchscreen.
1 Bally's IO-Board, Based on 68000 procesor as interface to all gaming devices
@ -88,7 +88,7 @@ public:
device_t *m_pic8259_2;
device_t *m_dma8237_1;
device_t *m_dma8237_2;
emu_timer *m_atapi_timer;
//SCSIInstance *m_inserted_cdrom;
@ -101,7 +101,7 @@ public:
/* memory */
UINT8 m_atapi_regs[ATAPI_REG_MAX];
UINT8 m_atapi_data[ATAPI_DATA_SIZE];
DECLARE_DRIVER_INIT(gammagic);
};
@ -221,324 +221,324 @@ static I8237_INTERFACE( dma8237_2_config )
/*
static READ32_HANDLER( atapi_r )
{
gammagic_state *state = space.machine().driver_data<gammagic_state>();
UINT8 *atapi_regs = state->m_atapi_regs;
//running_machine &machine = space.machine();
int reg, data;
gammagic_state *state = space.machine().driver_data<gammagic_state>();
UINT8 *atapi_regs = state->m_atapi_regs;
//running_machine &machine = space.machine();
int reg, data;
if (mem_mask == 0x0000ffff) // word-wide command read
{
if (mem_mask == 0x0000ffff) // word-wide command read
{
logerror("ATAPI: packet read = %04x\n", state->m_atapi_data[state->m_atapi_data_ptr]);
// assert IRQ and drop DRQ
if (state->m_atapi_data_ptr == 0 && state->m_atapi_data_len == 0)
{
// get the data from the device
if( state->m_atapi_xferlen > 0 )
{
SCSIReadData( state->m_inserted_cdrom, state->m_atapi_data, state->m_atapi_xferlen );
state->m_atapi_data_len = state->m_atapi_xferlen;
}
// assert IRQ and drop DRQ
if (state->m_atapi_data_ptr == 0 && state->m_atapi_data_len == 0)
{
// get the data from the device
if( state->m_atapi_xferlen > 0 )
{
SCSIReadData( state->m_inserted_cdrom, state->m_atapi_data, state->m_atapi_xferlen );
state->m_atapi_data_len = state->m_atapi_xferlen;
}
if (state->m_atapi_xfermod > MAX_TRANSFER_SIZE)
{
state->m_atapi_xferlen = MAX_TRANSFER_SIZE;
state->m_atapi_xfermod = state->m_atapi_xfermod - MAX_TRANSFER_SIZE;
}
else
{
state->m_atapi_xferlen = state->m_atapi_xfermod;
state->m_atapi_xfermod = 0;
}
if (state->m_atapi_xfermod > MAX_TRANSFER_SIZE)
{
state->m_atapi_xferlen = MAX_TRANSFER_SIZE;
state->m_atapi_xfermod = state->m_atapi_xfermod - MAX_TRANSFER_SIZE;
}
else
{
state->m_atapi_xferlen = state->m_atapi_xfermod;
state->m_atapi_xfermod = 0;
}
//verboselog\\( machine, 2, "atapi_r: atapi_xferlen=%d\n", state->m_atapi_xferlen );
if( state->m_atapi_xferlen != 0 )
{
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ | ATAPI_STAT_SERVDSC;
atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO;
}
else
{
logerror("ATAPI: dropping DRQ\n");
atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO;
}
//verboselog\\( machine, 2, "atapi_r: atapi_xferlen=%d\n", state->m_atapi_xferlen );
if( state->m_atapi_xferlen != 0 )
{
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ | ATAPI_STAT_SERVDSC;
atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO;
}
else
{
logerror("ATAPI: dropping DRQ\n");
atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO;
}
atapi_regs[ATAPI_REG_COUNTLOW] = state->m_atapi_xferlen & 0xff;
atapi_regs[ATAPI_REG_COUNTHIGH] = (state->m_atapi_xferlen>>8)&0xff;
atapi_regs[ATAPI_REG_COUNTLOW] = state->m_atapi_xferlen & 0xff;
atapi_regs[ATAPI_REG_COUNTHIGH] = (state->m_atapi_xferlen>>8)&0xff;
atapi_irq(space.machine(), ASSERT_LINE);
}
atapi_irq(space.machine(), ASSERT_LINE);
}
if( state->m_atapi_data_ptr < state->m_atapi_data_len )
{
data = state->m_atapi_data[state->m_atapi_data_ptr++];
data |= ( state->m_atapi_data[state->m_atapi_data_ptr++] << 8 );
if( state->m_atapi_data_ptr >= state->m_atapi_data_len )
{
state->m_atapi_data_ptr = 0;
state->m_atapi_data_len = 0;
if( state->m_atapi_data_ptr < state->m_atapi_data_len )
{
data = state->m_atapi_data[state->m_atapi_data_ptr++];
data |= ( state->m_atapi_data[state->m_atapi_data_ptr++] << 8 );
if( state->m_atapi_data_ptr >= state->m_atapi_data_len )
{
if( state->m_atapi_xferlen == 0 )
{
atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO;
atapi_irq(space.machine(), ASSERT_LINE);
}
}
}
else
{
data = 0;
}
}
else
{
atapi_irq(space.machine(), CLEAR_LINE);
int shift;
shift = 0;
reg = offset<<2;
switch(mem_mask)
{
case 0x000000ff:
break;
case 0x0000ff00:
reg+=1;
data >>= 8;
shift=8;
break;
case 0x00ff0000:
reg+=2;
data >>=16;
shift=16;
break;
case 0xff000000:
reg+=3;
data >>=24;
shift=24;
break;
}
data = atapi_regs[reg];
data <<= shift;
}
return data;
state->m_atapi_data_ptr = 0;
state->m_atapi_data_len = 0;
if( state->m_atapi_xferlen == 0 )
{
atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO;
atapi_irq(space.machine(), ASSERT_LINE);
}
}
}
else
{
data = 0;
}
}
else
{
atapi_irq(space.machine(), CLEAR_LINE);
int shift;
shift = 0;
reg = offset<<2;
switch(mem_mask)
{
case 0x000000ff:
break;
case 0x0000ff00:
reg+=1;
data >>= 8;
shift=8;
break;
case 0x00ff0000:
reg+=2;
data >>=16;
shift=16;
break;
case 0xff000000:
reg+=3;
data >>=24;
shift=24;
break;
}
data = atapi_regs[reg];
data <<= shift;
}
return data;
}
static WRITE32_HANDLER( atapi_w )
{
gammagic_state *state = space.machine().driver_data<gammagic_state>();
UINT8 *atapi_regs = state->m_atapi_regs;
UINT8 *atapi_data = state->m_atapi_data;
int reg;
if (mem_mask == 0x0000ffff) // word-wide command write
{
atapi_data[state->m_atapi_data_ptr++] = data & 0xff;
atapi_data[state->m_atapi_data_ptr++] = data >> 8;
gammagic_state *state = space.machine().driver_data<gammagic_state>();
UINT8 *atapi_regs = state->m_atapi_regs;
UINT8 *atapi_data = state->m_atapi_data;
int reg;
if (mem_mask == 0x0000ffff) // word-wide command write
{
atapi_data[state->m_atapi_data_ptr++] = data & 0xff;
atapi_data[state->m_atapi_data_ptr++] = data >> 8;
if (state->m_atapi_cdata_wait)
{
logerror("ATAPI: waiting, ptr %d wait %d\n", state->m_atapi_data_ptr, state->m_atapi_cdata_wait);
if (state->m_atapi_data_ptr == state->m_atapi_cdata_wait)
{
// send it to the device
SCSIWriteData( state->m_inserted_cdrom, atapi_data, state->m_atapi_cdata_wait );
if (state->m_atapi_cdata_wait)
{
logerror("ATAPI: waiting, ptr %d wait %d\n", state->m_atapi_data_ptr, state->m_atapi_cdata_wait);
if (state->m_atapi_data_ptr == state->m_atapi_cdata_wait)
{
// send it to the device
SCSIWriteData( state->m_inserted_cdrom, atapi_data, state->m_atapi_cdata_wait );
// assert IRQ
atapi_irq(space.machine(), ASSERT_LINE);
// assert IRQ
atapi_irq(space.machine(), ASSERT_LINE);
// not sure here, but clear DRQ at least?
atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
}
}
// not sure here, but clear DRQ at least?
atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
}
}
else if ( state->m_atapi_data_ptr == 12 )
{
int phase;
// reset data pointer for reading SCSI results
state->m_atapi_data_ptr = 0;
state->m_atapi_data_len = 0;
else if ( state->m_atapi_data_ptr == 12 )
{
int phase;
// reset data pointer for reading SCSI results
state->m_atapi_data_ptr = 0;
state->m_atapi_data_len = 0;
// send it to the SCSI device
SCSISetCommand( state->m_inserted_cdrom, state->m_atapi_data, 12 );
SCSIExecCommand( state->m_inserted_cdrom, &state->m_atapi_xferlen );
SCSIGetPhase( state->m_inserted_cdrom, &phase );
// send it to the SCSI device
SCSISetCommand( state->m_inserted_cdrom, state->m_atapi_data, 12 );
SCSIExecCommand( state->m_inserted_cdrom, &state->m_atapi_xferlen );
SCSIGetPhase( state->m_inserted_cdrom, &phase );
if (state->m_atapi_xferlen != -1)
{
logerror("ATAPI: SCSI command %02x returned %d bytes from the device\n", atapi_data[0]&0xff, state->m_atapi_xferlen);
if (state->m_atapi_xferlen != -1)
{
logerror("ATAPI: SCSI command %02x returned %d bytes from the device\n", atapi_data[0]&0xff, state->m_atapi_xferlen);
// store the returned command length in the ATAPI regs, splitting into
// multiple transfers if necessary
state->m_atapi_xfermod = 0;
if (state->m_atapi_xferlen > MAX_TRANSFER_SIZE)
{
state->m_atapi_xfermod = state->m_atapi_xferlen - MAX_TRANSFER_SIZE;
state->m_atapi_xferlen = MAX_TRANSFER_SIZE;
}
atapi_regs[ATAPI_REG_COUNTLOW] = state->m_atapi_xferlen & 0xff;
atapi_regs[ATAPI_REG_COUNTHIGH] = (state->m_atapi_xferlen>>8)&0xff;
// store the returned command length in the ATAPI regs, splitting into
// multiple transfers if necessary
state->m_atapi_xfermod = 0;
if (state->m_atapi_xferlen > MAX_TRANSFER_SIZE)
{
state->m_atapi_xfermod = state->m_atapi_xferlen - MAX_TRANSFER_SIZE;
state->m_atapi_xferlen = MAX_TRANSFER_SIZE;
}
if (state->m_atapi_xferlen == 0)
{
// if no data to return, set the registers properly
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRDY;
atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO|ATAPI_INTREASON_COMMAND;
}
else
{
// indicate data ready: set DRQ and DMA ready, and IO in INTREASON
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ | ATAPI_STAT_SERVDSC;
atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO;
}
atapi_regs[ATAPI_REG_COUNTLOW] = state->m_atapi_xferlen & 0xff;
atapi_regs[ATAPI_REG_COUNTHIGH] = (state->m_atapi_xferlen>>8)&0xff;
switch( phase )
{
case SCSI_PHASE_DATAOUT:
state->m_atapi_cdata_wait = state->m_atapi_xferlen;
break;
}
if (state->m_atapi_xferlen == 0)
{
// if no data to return, set the registers properly
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRDY;
atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO|ATAPI_INTREASON_COMMAND;
}
else
{
// indicate data ready: set DRQ and DMA ready, and IO in INTREASON
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ | ATAPI_STAT_SERVDSC;
atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_IO;
}
// perform special ATAPI processing of certain commands
switch (atapi_data[0]&0xff)
{
case 0x00: // BUS RESET / TEST UNIT READY
case 0xbb: // SET CDROM SPEED
atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
break;
switch( phase )
{
case SCSI_PHASE_DATAOUT:
state->m_atapi_cdata_wait = state->m_atapi_xferlen;
break;
}
case 0x45: // PLAY
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_BSY;
state->m_atapi_timer->adjust( downcast<cpu_device *>(&space->device())->cycles_to_attotime( ATAPI_CYCLES_PER_SECTOR ) );
break;
}
// perform special ATAPI processing of certain commands
switch (atapi_data[0]&0xff)
{
case 0x00: // BUS RESET / TEST UNIT READY
case 0xbb: // SET CDROM SPEED
atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
break;
// assert IRQ
atapi_irq(space.machine(), ASSERT_LINE);
}
else
{
logerror("ATAPI: SCSI device returned error!\n");
case 0x45: // PLAY
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_BSY;
state->m_atapi_timer->adjust( downcast<cpu_device *>(&space->device())->cycles_to_attotime( ATAPI_CYCLES_PER_SECTOR ) );
break;
}
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ | ATAPI_STAT_CHECK;
atapi_regs[ATAPI_REG_ERRFEAT] = 0x50; // sense key = ILLEGAL REQUEST
atapi_regs[ATAPI_REG_COUNTLOW] = 0;
atapi_regs[ATAPI_REG_COUNTHIGH] = 0;
}
}
}
else
{
reg = offset<<2;
switch(mem_mask)
{
case 0x000000ff:
break;
case 0x0000ff00:
reg+=1;
data >>= 8;
break;
case 0x00ff0000:
reg+=2;
data >>=16;
break;
case 0xff000000:
reg+=3;
data >>=24;
break;
}
// assert IRQ
atapi_irq(space.machine(), ASSERT_LINE);
}
else
{
logerror("ATAPI: SCSI device returned error!\n");
atapi_regs[reg] = data;
logerror("ATAPI: reg %d = %x (offset %x mask %x PC=%x)\n", reg, data, offset, mem_mask, cpu_get_pc(&space->device()));
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ | ATAPI_STAT_CHECK;
atapi_regs[ATAPI_REG_ERRFEAT] = 0x50; // sense key = ILLEGAL REQUEST
atapi_regs[ATAPI_REG_COUNTLOW] = 0;
atapi_regs[ATAPI_REG_COUNTHIGH] = 0;
}
}
}
else
{
reg = offset<<2;
switch(mem_mask)
{
case 0x000000ff:
break;
case 0x0000ff00:
reg+=1;
data >>= 8;
break;
case 0x00ff0000:
reg+=2;
data >>=16;
break;
case 0xff000000:
reg+=3;
data >>=24;
break;
}
if (reg == ATAPI_REG_CMDSTATUS)
{
logerror("ATAPI command %x issued! (PC=%x)\n", data, cpu_get_pc(&space->device()));
switch (data)
{
case 0xa0: // PACKET
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ;
atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_COMMAND;
atapi_regs[reg] = data;
logerror("ATAPI: reg %d = %x (offset %x mask %x PC=%x)\n", reg, data, offset, mem_mask, cpu_get_pc(&space->device()));
state->m_atapi_data_ptr = 0;
state->m_atapi_data_len = 0;
if (reg == ATAPI_REG_CMDSTATUS)
{
logerror("ATAPI command %x issued! (PC=%x)\n", data, cpu_get_pc(&space->device()));
switch (data)
{
case 0xa0: // PACKET
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ;
atapi_regs[ATAPI_REG_INTREASON] = ATAPI_INTREASON_COMMAND;
// we have no data
state->m_atapi_xferlen = 0;
state->m_atapi_xfermod = 0;
state->m_atapi_data_ptr = 0;
state->m_atapi_data_len = 0;
state->m_atapi_cdata_wait = 0;
break;
// we have no data
state->m_atapi_xferlen = 0;
state->m_atapi_xfermod = 0;
case 0xa1: // IDENTIFY PACKET DEVICE
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ;
state->m_atapi_cdata_wait = 0;
break;
state->m_atapi_data_ptr = 0;
state->m_atapi_data_len = 512;
case 0xa1: // IDENTIFY PACKET DEVICE
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_DRQ;
// we have no data
state->m_atapi_xferlen = 0;
state->m_atapi_xfermod = 0;
state->m_atapi_data_ptr = 0;
state->m_atapi_data_len = 512;
memset( atapi_data, 0, state->m_atapi_data_len );
// we have no data
state->m_atapi_xferlen = 0;
state->m_atapi_xfermod = 0;
atapi_data[ 0 ^ 1 ] = 0x85; // ATAPI device, cmd set 5 compliant, DRQ within 3 ms of PACKET command
atapi_data[ 1 ^ 1 ] = 0x80; // ATAPI device, removable media
memset( atapi_data, 0, state->m_atapi_data_len );
memset( &atapi_data[ 46 ], ' ', 8 );
atapi_data[ 46 ^ 1 ] = '1';
atapi_data[ 47 ^ 1 ] = '.';
atapi_data[ 48 ^ 1 ] = '0';
memset( &atapi_data[ 54 ], ' ', 40 );
atapi_data[ 54 ^ 1 ] = 'T';
atapi_data[ 55 ^ 1 ] = 'O';
atapi_data[ 56 ^ 1 ] = 'S';
atapi_data[ 57 ^ 1 ] = 'H';
atapi_data[ 58 ^ 1 ] = 'I';
atapi_data[ 59 ^ 1 ] = 'B';
atapi_data[ 60 ^ 1 ] = 'A';
atapi_data[ 61 ^ 1 ] = ' ';
atapi_data[ 62 ^ 1 ] = 'X';
atapi_data[ 63 ^ 1 ] = 'M';
atapi_data[ 64 ^ 1 ] = '-';
atapi_data[ 65 ^ 1 ] = '3';
atapi_data[ 66 ^ 1 ] = '3';
atapi_data[ 67 ^ 1 ] = '0';
atapi_data[ 68 ^ 1 ] = '1';
atapi_data[ 69 ^ 1 ] = ' ';
atapi_data[ 0 ^ 1 ] = 0x85; // ATAPI device, cmd set 5 compliant, DRQ within 3 ms of PACKET command
atapi_data[ 1 ^ 1 ] = 0x80; // ATAPI device, removable media
atapi_data[ 98 ^ 1 ] = 0x06; // Word 49=Capabilities, IORDY may be disabled (bit_10), LBA Supported mandatory (bit_9)
atapi_data[ 99 ^ 1 ] = 0x00;
memset( &atapi_data[ 46 ], ' ', 8 );
atapi_data[ 46 ^ 1 ] = '1';
atapi_data[ 47 ^ 1 ] = '.';
atapi_data[ 48 ^ 1 ] = '0';
atapi_regs[ATAPI_REG_COUNTLOW] = 0;
atapi_regs[ATAPI_REG_COUNTHIGH] = 2;
atapi_irq(space.machine(), ASSERT_LINE);
break;
case 0xec: //IDENTIFY DEVICE - Must abort here and set for packet data
atapi_regs[ATAPI_REG_ERRFEAT] = ATAPI_ERRFEAT_ABRT;
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_CHECK;
atapi_irq(space.machine(), ASSERT_LINE);
case 0xef: // SET FEATURES
atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
memset( &atapi_data[ 54 ], ' ', 40 );
atapi_data[ 54 ^ 1 ] = 'T';
atapi_data[ 55 ^ 1 ] = 'O';
atapi_data[ 56 ^ 1 ] = 'S';
atapi_data[ 57 ^ 1 ] = 'H';
atapi_data[ 58 ^ 1 ] = 'I';
atapi_data[ 59 ^ 1 ] = 'B';
atapi_data[ 60 ^ 1 ] = 'A';
atapi_data[ 61 ^ 1 ] = ' ';
atapi_data[ 62 ^ 1 ] = 'X';
atapi_data[ 63 ^ 1 ] = 'M';
atapi_data[ 64 ^ 1 ] = '-';
atapi_data[ 65 ^ 1 ] = '3';
atapi_data[ 66 ^ 1 ] = '3';
atapi_data[ 67 ^ 1 ] = '0';
atapi_data[ 68 ^ 1 ] = '1';
atapi_data[ 69 ^ 1 ] = ' ';
state->m_atapi_data_ptr = 0;
state->m_atapi_data_len = 0;
atapi_data[ 98 ^ 1 ] = 0x06; // Word 49=Capabilities, IORDY may be disabled (bit_10), LBA Supported mandatory (bit_9)
atapi_data[ 99 ^ 1 ] = 0x00;
atapi_irq(space.machine(), ASSERT_LINE);
break;
atapi_regs[ATAPI_REG_COUNTLOW] = 0;
atapi_regs[ATAPI_REG_COUNTHIGH] = 2;
default:
logerror("ATAPI: Unknown IDE command %x\n", data);
break;
}
}
}
atapi_irq(space.machine(), ASSERT_LINE);
break;
case 0xec: //IDENTIFY DEVICE - Must abort here and set for packet data
atapi_regs[ATAPI_REG_ERRFEAT] = ATAPI_ERRFEAT_ABRT;
atapi_regs[ATAPI_REG_CMDSTATUS] = ATAPI_STAT_CHECK;
atapi_irq(space.machine(), ASSERT_LINE);
case 0xef: // SET FEATURES
atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
state->m_atapi_data_ptr = 0;
state->m_atapi_data_len = 0;
atapi_irq(space.machine(), ASSERT_LINE);
break;
default:
logerror("ATAPI: Unknown IDE command %x\n", data);
break;
}
}
}
}
*/
// Memory is mostly handled by the chipset
@ -569,7 +569,7 @@ static ADDRESS_MAP_START( gammagic_io, AS_IO, 32, gammagic_state)
AM_RANGE(0x03f0, 0x0cf7) AM_NOP
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_device, read, write)
AM_RANGE(0x0400, 0xffff) AM_NOP
ADDRESS_MAP_END
@ -596,7 +596,7 @@ static INPUT_PORTS_START( gammagic )
AT_KEYB_HELPER( 0x0800, "F1", KEYCODE_S ) /* F1 3B BB */
AT_KEYB_HELPER( 0x1000, "F2", KEYCODE_D ) /* F2 3C BC */
AT_KEYB_HELPER( 0x4000, "F4", KEYCODE_F ) /* F4 3E BE */
PORT_START("pc_keyboard_4")
AT_KEYB_HELPER( 0x0004, "F8", KEYCODE_F8 ) // f8=42 /f10=44 /minus 4a /plus=4e
@ -607,7 +607,7 @@ static INPUT_PORTS_START( gammagic )
PORT_START("pc_keyboard_5")
AT_KEYB_HELPER( 0x0001, "KP 2(DN)", KEYCODE_2_PAD ) /* Keypad 2 (Down arrow) 50 D0 */
PORT_START("pc_keyboard_6")
AT_KEYB_HELPER( 0x0040, "(MF2)Cursor Up", KEYCODE_UP ) /* Up 67 e7 */
AT_KEYB_HELPER( 0x0080, "(MF2)Page Up", KEYCODE_PGUP ) /* Page Up 68 e8 */
@ -643,23 +643,23 @@ static MACHINE_START(gammagic)
static MACHINE_RESET( gammagic )
{
//gammagic_state *state = machine.driver_data<gammagic_state>();
//void *cd;
//SCSIGetDevice( state->m_inserted_cdrom, &cd );
//SCSIGetDevice( state->m_inserted_cdrom, &cd );
}
/*static void atapi_irq(running_machine &machine, int state)
{
gammagic_state *drvstate = machine.driver_data<gammagic_state>();
pic8259_ir6_w(drvstate->m_pic8259_2, state);
gammagic_state *drvstate = machine.driver_data<gammagic_state>();
pic8259_ir6_w(drvstate->m_pic8259_2, state);
}
static void atapi_exit(running_machine& machine)
{
gammagic_state *state = machine.driver_data<gammagic_state>();
SCSIDeleteInstance(state->m_inserted_cdrom);
gammagic_state *state = machine.driver_data<gammagic_state>();
SCSIDeleteInstance(state->m_inserted_cdrom);
}
*/
@ -667,7 +667,7 @@ static void atapi_exit(running_machine& machine)
static void atapi_init(running_machine &machine)
{
gammagic_state *state = machine.driver_data<gammagic_state>();
state->m_atapi_regs[ATAPI_REG_CMDSTATUS] = 0;
state->m_atapi_regs[ATAPI_REG_ERRFEAT] = 1;
state->m_atapi_regs[ATAPI_REG_COUNTLOW] = 0x14;
@ -675,9 +675,9 @@ static void atapi_init(running_machine &machine)
state->m_atapi_data_ptr = 0;
state->m_atapi_data_len = 0;
state->m_atapi_cdata_wait = 0;
//SCSIAllocInstance( machine, &SCSIClassCr589, &state->m_inserted_cdrom, ":cdrom" );
//machine.add_notifier(MACHINE_NOTIFY_EXIT, machine_notify_delegate(FUNC(atapi_exit), &machine));
}
@ -782,11 +782,11 @@ static MACHINE_CONFIG_START( gammagic, gammagic_state )
MCFG_PIC8259_ADD( "pic8259_1", gammagic_pic8259_1_config )
MCFG_PIC8259_ADD( "pic8259_2", gammagic_pic8259_2_config )
MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
// MCFG_I82371SB_ADD("i82371sb")
// MCFG_I82439TX_ADD("i82439tx", "maincpu", "user")
// MCFG_I82371SB_ADD("i82371sb")
// MCFG_I82439TX_ADD("i82439tx", "maincpu", "user")
MCFG_PCI_BUS_ADD("pcibus", 0)
// MCFG_PCI_BUS_DEVICE(0, "i82439tx", i82439tx_pci_read, i82439tx_pci_write)
// MCFG_PCI_BUS_DEVICE(1, "i82371sb", i82371sb_pci_read, i82371sb_pci_write)
// MCFG_PCI_BUS_DEVICE(0, "i82439tx", i82439tx_pci_read, i82439tx_pci_write)
// MCFG_PCI_BUS_DEVICE(1, "i82371sb", i82371sb_pci_read, i82371sb_pci_write)
/* video hardware */
MCFG_FRAGMENT_ADD( pcvideo_vga )
@ -797,30 +797,30 @@ DRIVER_INIT_MEMBER(gammagic_state,gammagic)
{
init_pc_common(machine(), PCCOMMON_KEYBOARD_AT, gammagic_set_keyb_int);
kbdc8042_init(machine(), &at8042);
atapi_init(machine());
}
atapi_init(machine());
}
ROM_START( gammagic )
ROM_REGION32_LE(0x40000, "user", 0)
//Original Memory Set
//Original Memory Set
//ROM_LOAD("m7s04.rom", 0, 0x40000, CRC(3689f5a9) SHA1(8daacdb0dc6783d2161680564ffe83ac2515f7ef))
//ROM_LOAD("otivga_tx2953526.rom", 0x0000, 0x8000, CRC(916491af) SHA1(d64e3a43a035d70ace7a2d0603fc078f22d237e1))
//Temp. Memory Set (Only for initial driver development stage)
ROM_LOAD16_BYTE( "trident_tgui9680_bios.bin", 0x0000, 0x4000, CRC(1eebde64) SHA1(67896a854d43a575037613b3506aea6dae5d6a19) )
ROM_CONTINUE( 0x0001, 0x4000 )
ROM_LOAD("5hx29.bin", 0x20000, 0x20000, CRC(07719a55) SHA1(b63993fd5186cdb4f28c117428a507cd069e1f68))
DISK_REGION( "cdrom" )
DISK_IMAGE_READONLY( "gammagic", 0,SHA1(caa8fc885d84dbc07fb0604c76cd23c873a65ce6) )
ROM_END
ROM_START( 99bottles )
ROM_REGION32_LE(0x40000, "user", 0)
//Original BIOS/VGA-BIOS Rom Set
//ROM_LOAD("m7s04.rom", 0, 0x40000, CRC(3689f5a9) SHA1(8daacdb0dc6783d2161680564ffe83ac2515f7ef))
//Original BIOS/VGA-BIOS Rom Set
//ROM_LOAD("m7s04.rom", 0, 0x40000, CRC(3689f5a9) SHA1(8daacdb0dc6783d2161680564ffe83ac2515f7ef))
//ROM_LOAD("otivga_tx2953526.rom", 0x0000, 0x8000, CRC(916491af) SHA1(d64e3a43a035d70ace7a2d0603fc078f22d237e1))
//Temporary (Chipset compatible Rom Set, only for driver development stage)
ROM_LOAD16_BYTE( "trident_tgui9680_bios.bin", 0x0000, 0x4000, CRC(1eebde64) SHA1(67896a854d43a575037613b3506aea6dae5d6a19) )
ROM_CONTINUE( 0x0001, 0x4000 )

2
src/mame/drivers/ggconnie.c
View File

@ -30,7 +30,7 @@ public:
: pce_common_state(mconfig, type, tag) { }
DECLARE_WRITE8_MEMBER(lamp_w);
DECLARE_WRITE8_MEMBER(output_w);
DECLARE_WRITE8_MEMBER(output_w);
};

4
src/mame/drivers/intrscti.c
View File

@ -90,12 +90,12 @@ ADDRESS_MAP_END
static ADDRESS_MAP_START( intrscti_sub_map, AS_PROGRAM, 8, intrscti_state )
AM_RANGE(0x0000, 0x07ff) AM_ROM
AM_RANGE(0x2000, 0x23ff) AM_RAM
// AM_RANGE(0x0000, 0xffff) AM_WRITENOP
// AM_RANGE(0x0000, 0xffff) AM_WRITENOP
ADDRESS_MAP_END
static ADDRESS_MAP_START( intrscti_sub_io_map, AS_IO, 8, intrscti_state )
ADDRESS_MAP_GLOBAL_MASK(0xff)
// AM_RANGE(0x00, 0xff) AM_NOP
// AM_RANGE(0x00, 0xff) AM_NOP
ADDRESS_MAP_END

8
src/mame/drivers/jack.c
View File

@ -74,7 +74,7 @@ Stephh's Notes:
- When On (0x80), lives are set to 255 (0xff) but they are NOT infinite
Other bits from DSW2 (but bit 5) don't seem to be read / tested at all ...
***************************************************************************/
@ -146,7 +146,7 @@ WRITE8_MEMBER(jack_state::joinem_control_w)
// d0: related to test mode?
// d1: unused?
// d2: ?
// d3-d4: palette bank
int palette_bank = data & (machine().total_colors() - 1) >> 3 & 0x18;
if (m_joinem_palette_bank != palette_bank)
@ -157,7 +157,7 @@ WRITE8_MEMBER(jack_state::joinem_control_w)
// d5: assume nmi enable
m_joinem_nmi_enable = data & 0x20;
// d6: unused?
// d7: flip screen
@ -890,7 +890,7 @@ MACHINE_RESET_MEMBER(jack_state,striv)
MACHINE_START_MEMBER(jack_state,joinem)
{
m_joinem_palette_bank = 0;
save_item(NAME(m_joinem_nmi_enable));
save_item(NAME(m_joinem_palette_bank));
}

12
src/mame/drivers/jpmsys5.c
View File

@ -12,10 +12,10 @@
* Monopoly Deluxe
Known Issues:
* Some features used by the AWP games such as reels and meters
are not emulated.
* Timing for reels, and other opto devices is controlled by the same clock
as the lamps, in a weird daisychain setup.
* Some features used by the AWP games such as reels and meters
are not emulated.
* Timing for reels, and other opto devices is controlled by the same clock
as the lamps, in a weird daisychain setup.
AWP game notes:
The byte at 0x81 of the EVEN 68k rom appears to be some kind of
@ -766,7 +766,7 @@ READ16_MEMBER(jpmsys5_state::coins_awp_r)
{
case 2:
{
return ioport("COINS")->read() << 8;
return ioport("COINS")->read() << 8;
}
break;
default:
@ -856,7 +856,7 @@ static INPUT_PORTS_START( popeye )
PORT_CONFSETTING( 0x02, "13")
PORT_CONFSETTING( 0x01, "14")
PORT_CONFSETTING( 0x00, "15")
PORT_START("DIRECT")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Back door") PORT_CODE(KEYCODE_R) PORT_TOGGLE
PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE ) PORT_NAME("Cash door") PORT_CODE(KEYCODE_T) PORT_TOGGLE

2
src/mame/drivers/kontest.c
View File

@ -53,7 +53,7 @@ protected:
virtual void video_start();
virtual void palette_init();
public:
public:
INTERRUPT_GEN_MEMBER(kontest_interrupt);
};

2
src/mame/drivers/magictg.c
View File

@ -212,7 +212,7 @@ protected:
virtual void machine_start();
virtual void machine_reset();
virtual void video_start();
public:
public:
UINT32 screen_update_magictg(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
};

2
src/mame/drivers/magtouch.c
View File

@ -181,7 +181,7 @@ static ADDRESS_MAP_START( magtouch_io, AS_IO, 32, magtouch_state )
AM_RANGE(0x02e0, 0x02e7) AM_READWRITE8(magtouch_io_r, magtouch_io_w, 0xffffffff)
AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03f8, 0x03ff) AM_DEVREADWRITE8("ns16450_0", ns16450_device, ins8250_r, ins8250_w, 0xffffffff)
ADDRESS_MAP_END

24
src/mame/drivers/mediagx.c
View File

@ -186,18 +186,18 @@ public:
virtual void machine_reset();
virtual void video_start();
UINT32 screen_update_mediagx(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
DECLARE_READ32_MEMBER(speedup0_r);
DECLARE_READ32_MEMBER(speedup1_r);
DECLARE_READ32_MEMBER(speedup2_r);
DECLARE_READ32_MEMBER(speedup3_r);
DECLARE_READ32_MEMBER(speedup4_r);
DECLARE_READ32_MEMBER(speedup5_r);
DECLARE_READ32_MEMBER(speedup6_r);
DECLARE_READ32_MEMBER(speedup7_r);
DECLARE_READ32_MEMBER(speedup8_r);
DECLARE_READ32_MEMBER(speedup9_r);
DECLARE_READ32_MEMBER(speedup10_r);
DECLARE_READ32_MEMBER(speedup11_r);
DECLARE_READ32_MEMBER(speedup0_r);
DECLARE_READ32_MEMBER(speedup1_r);
DECLARE_READ32_MEMBER(speedup2_r);
DECLARE_READ32_MEMBER(speedup3_r);
DECLARE_READ32_MEMBER(speedup4_r);
DECLARE_READ32_MEMBER(speedup5_r);
DECLARE_READ32_MEMBER(speedup6_r);
DECLARE_READ32_MEMBER(speedup7_r);
DECLARE_READ32_MEMBER(speedup8_r);
DECLARE_READ32_MEMBER(speedup9_r);
DECLARE_READ32_MEMBER(speedup10_r);
DECLARE_READ32_MEMBER(speedup11_r);
TIMER_DEVICE_CALLBACK_MEMBER(sound_timer_callback);
};

8
src/mame/drivers/ninjakd2.c
View File

@ -911,21 +911,21 @@ void ninjakd2_state::machine_reset()
int num_banks = (machine().root_device().memregion("maincpu")->bytes() - 0x10000) / 0x4000;
machine().root_device().membank("bank1")->configure_entries(0, num_banks, machine().root_device().memregion("maincpu")->base() + 0x10000, 0x4000);
machine().root_device().membank("bank1")->set_entry(0);
m_rom_bank_mask = num_banks - 1;
}
MACHINE_START_MEMBER(ninjakd2_state,omegaf)
{
omegaf_io_protection_start();
machine_start();
}
MACHINE_RESET_MEMBER(ninjakd2_state,omegaf)
{
omegaf_io_protection_reset();
machine_reset();
}
@ -1481,7 +1481,7 @@ void ninjakd2_state::robokid_motion_error_kludge(UINT16 offset)
ROM[1] = 0x03; // and 3
ROM[2] = 0x18;
ROM[3] = 0xf6; // jr $-8
m_maincpu->space(AS_PROGRAM).install_read_handler(offset, offset, read8_delegate(FUNC(ninjakd2_state::robokid_motion_error_verbose_r), this));
}

2
src/mame/drivers/nsm.c
View File

@ -90,7 +90,7 @@ WRITE8_MEMBER( nsm_state::cru_w )
m_cru_data[m_cru_count] = 0;
}
m_cru_data[m_cru_count] |= (data << offset);
UINT8 i,j;
int segments;
if (!m_cru_count && (offset == 7))

2
src/mame/drivers/pangofun.c
View File

@ -125,7 +125,7 @@ static ADDRESS_MAP_START( pcat_io, AS_IO, 32, pangofun_state )
AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff)
AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
ADDRESS_MAP_END
#define AT_KEYB_HELPER(bit, text, key1) \

2
src/mame/drivers/pcat_dyn.c
View File

@ -70,7 +70,7 @@ static ADDRESS_MAP_START( pcat_io, AS_IO, 32, pcat_dyn_state )
AM_RANGE(0x0070, 0x007f) AM_DEVREADWRITE8("rtc", mc146818_device, read, write, 0xffffffff)
AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
ADDRESS_MAP_END
#define AT_KEYB_HELPER(bit, text, key1) \

2
src/mame/drivers/pcat_nit.c
View File

@ -212,7 +212,7 @@ static ADDRESS_MAP_START( pcat_nit_io, AS_IO, 32, pcat_nit_state )
AM_RANGE(0x0280, 0x0283) AM_READNOP
AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03f8, 0x03ff) AM_DEVREADWRITE8("ns16450_0", ns16450_device, ins8250_r, ins8250_w, 0xffffffff)
ADDRESS_MAP_END

2
src/mame/drivers/pipedrm.c
View File

@ -191,7 +191,7 @@ static WRITE8_HANDLER( pipedrm_bankswitch_w )
state->membank("bank1")->set_entry(data & 0x7);
/* map to the fromance gfx register */
state->fromance_gfxreg_w(space, offset, ((data >> 6) & 0x01) | /* flipscreen */
state->fromance_gfxreg_w(space, offset, ((data >> 6) & 0x01) | /* flipscreen */
((~data >> 2) & 0x02)); /* videoram select */
}

4
src/mame/drivers/pntnpuzl.c
View File

@ -311,10 +311,10 @@ static ADDRESS_MAP_START( pntnpuzl_map, AS_PROGRAM, 16, pntnpuzl_state )
AM_RANGE(0x28001a, 0x28001b) AM_WRITENOP
/* standard VGA */
AM_RANGE(0x3a0000, 0x3bffff) AM_DEVREADWRITE8("vga", vga_device, mem_r, mem_w, 0xffff)
AM_RANGE(0x3a0000, 0x3bffff) AM_DEVREADWRITE8("vga", vga_device, mem_r, mem_w, 0xffff)
AM_RANGE(0x3c03b0, 0x3c03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffff)
AM_RANGE(0x3c03c0, 0x3c03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffff)
AM_RANGE(0x3c03d0, 0x3c03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffff)
AM_RANGE(0x3c03d0, 0x3c03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffff)
AM_RANGE(0x400000, 0x407fff) AM_RAM
ADDRESS_MAP_END

2
src/mame/drivers/queen.c
View File

@ -543,7 +543,7 @@ static ADDRESS_MAP_START( queen_io, AS_IO, 32, queen_state )
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w)
AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)

2
src/mame/drivers/raiden2.c
View File

@ -1924,7 +1924,7 @@ static MACHINE_CONFIG_START( zeroteam, raiden2_state )
MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_AFTER_VBLANK)
MCFG_SCREEN_ADD("screen", RASTER)
// MCFG_SCREEN_REFRESH_RATE(55.47) /* verified on pcb */
// MCFG_SCREEN_REFRESH_RATE(55.47) /* verified on pcb */
MCFG_SCREEN_RAW_PARAMS(XTAL_32MHz/4,546,0,40*8,264,0,32*8) /* hand-tuned to match ~55.47 */
MCFG_SCREEN_UPDATE_DRIVER(raiden2_state, screen_update_raiden2)
MCFG_GFXDECODE(raiden2)

4
src/mame/drivers/saturn.c
View File

@ -1986,7 +1986,7 @@ WRITE32_MEMBER(saturn_state::saturn_cs1_w)
MACHINE_RESET_MEMBER(saturn_state,saturn)
{
m_scsp_last_line = 0;
// don't let the slave cpu and the 68k go anywhere
machine().device("slave")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
@ -2067,7 +2067,7 @@ MACHINE_RESET_MEMBER(saturn_state,saturn)
MACHINE_RESET_MEMBER(saturn_state,stv)
{
m_scsp_last_line = 0;
// don't let the slave cpu and the 68k go anywhere
machine().device("slave")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, ASSERT_LINE);

2
src/mame/drivers/savquest.c
View File

@ -419,7 +419,7 @@ static ADDRESS_MAP_START(savquest_io, AS_IO, 32, savquest_state)
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w)
AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)

8
src/mame/drivers/shangha3.c
View File

@ -557,10 +557,10 @@ static MACHINE_CONFIG_START( blocken, shangha3_state )
MCFG_VIDEO_ATTRIBUTES(VIDEO_HAS_SHADOWS)
MCFG_SCREEN_ADD("screen", RASTER)
// MCFG_SCREEN_REFRESH_RATE(60)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
// MCFG_SCREEN_SIZE(24*16, 16*16)
// MCFG_SCREEN_VISIBLE_AREA(0*16, 24*16-1, 1*16, 15*16-1)
// MCFG_SCREEN_REFRESH_RATE(60)
// MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(2500) /* not accurate */)
// MCFG_SCREEN_SIZE(24*16, 16*16)
// MCFG_SCREEN_VISIBLE_AREA(0*16, 24*16-1, 1*16, 15*16-1)
MCFG_SCREEN_RAW_PARAMS(BLOCKEN_MASTER_CLOCK/6,512,0,24*16,263,1*16,15*16) /* refresh rate is unknown */
MCFG_SCREEN_UPDATE_DRIVER(shangha3_state, screen_update_shangha3)

32
src/mame/drivers/spectra.c
View File

@ -212,22 +212,22 @@ TIMER_DEVICE_CALLBACK_MEMBER( spectra_state::outtimer)
static const sn76477_interface sn76477_intf =
{
RES_M(1000), /* 4 noise_res */
RES_M(1000), /* 5 filter_res */
CAP_N(0), /* 6 filter_cap */
RES_K(470), /* 7 decay_res */
CAP_N(1), /* 8 attack_decay_cap */
RES_K(22), /* 10 attack_res */
RES_K(100), /* 11 amplitude_res */
RES_K(52), /* 12 feedback_res */
5.0, /* 16 vco_voltage */
CAP_U(0.01), /* 17 vco_cap */
RES_K(390), /* 18 vco_res */
0.0, /* 19 pitch_voltage */
RES_M(1), /* 20 slf_res */
CAP_U(0.1), /* 21 slf_cap */
CAP_U(0.47), /* 23 oneshot_cap */
RES_K(470), /* 24 oneshot_res */
RES_M(1000), /* 4 noise_res */
RES_M(1000), /* 5 filter_res */
CAP_N(0), /* 6 filter_cap */
RES_K(470), /* 7 decay_res */
CAP_N(1), /* 8 attack_decay_cap */
RES_K(22), /* 10 attack_res */
RES_K(100), /* 11 amplitude_res */
RES_K(52), /* 12 feedback_res */
5.0, /* 16 vco_voltage */
CAP_U(0.01), /* 17 vco_cap */
RES_K(390), /* 18 vco_res */
0.0, /* 19 pitch_voltage */
RES_M(1), /* 20 slf_res */
CAP_U(0.1), /* 21 slf_cap */
CAP_U(0.47), /* 23 oneshot_cap */
RES_K(470), /* 24 oneshot_res */
0, /* 22 vco (variable) */
0, /* 26 mixer A (grounded) */
0, /* 25 mixer B (variable) */

2
src/mame/drivers/su2000.c
View File

@ -102,7 +102,7 @@ static ADDRESS_MAP_START( pcat_io, AS_IO, 32, su2000_state )
AM_IMPORT_FROM(pcat32_io_common)
AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
ADDRESS_MAP_END

2
src/mame/drivers/taitowlf.c
View File

@ -489,7 +489,7 @@ static ADDRESS_MAP_START(taitowlf_io, AS_IO, 32, taitowlf_state )
#if ENABLE_VGA
AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
#endif
AM_RANGE(0x03f0, 0x03ff) AM_READWRITE(fdc_r, fdc_w)
AM_RANGE(0x0a78, 0x0a7b) AM_WRITE(pnp_data_w)

2
src/mame/drivers/techno.c
View File

@ -49,7 +49,7 @@ protected:
private:
bool m_digwait;
UINT8 m_keyrow;
public:
public:
INTERRUPT_GEN_MEMBER(techno_intgen);
};

28
src/mame/drivers/vicdual.c
View File

@ -108,7 +108,7 @@ INPUT_CHANGED_MEMBER(vicdual_state::coin_changed)
/* increment the coin counter */
coin_counter_w(machine(), 0, 1);
coin_counter_w(machine(), 0, 0);
coin_in();
}
}
@ -460,7 +460,7 @@ static INPUT_PORTS_START( frogs )
PORT_DIPNAME( 0x08, 0x08, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DOOR:1") // 1 switch located on the inside of the coin door
PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
PORT_DIPSETTING( 0x08, DEF_STR( On ) )
// There is no dipswitch: on a physical level, these settings are applied by grounding
// otherwise floating pins (ground wires are provided on pin 1/30)
PORT_DIPNAME( 0x10, 0x10, "Allow Free Game" ) PORT_DIPLOCATION("PIN:5") // 26
@ -921,7 +921,7 @@ static INPUT_PORTS_START( digger )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_START("IN2")
// PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,vicdual_get_timer_value, NULL) // it's like this according to the schematics, but gameplay speed is too fast;
// PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,vicdual_get_timer_value, NULL) // it's like this according to the schematics, but gameplay speed is too fast;
PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,vicdual_get_composite_blank_comp, NULL) // gameplay speed is correct now, there's likely an error in the schematics then...
PORT_BIT( 0x7e, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,vicdual_read_coin_status, NULL)
@ -1278,7 +1278,7 @@ static INPUT_PORTS_START( invho2 )
PORT_DIPNAME( 0x03, 0x01, "Head On 2 Lives" ) PORT_DIPLOCATION("SW1:1,2")
PORT_DIPSETTING( 0x00, "2" )
PORT_DIPSETTING( 0x01, "3" )
// PORT_DIPSETTING( 0x02, "3" ) // dupe
// PORT_DIPSETTING( 0x02, "3" ) // dupe
PORT_DIPSETTING( 0x03, "4" )
/* There's probably a bug in the Invinco game code:
@ -1290,8 +1290,8 @@ static INPUT_PORTS_START( invho2 )
PORT_DIPNAME( 0x03, 0x03, "Invinco Lives" ) PORT_DIPLOCATION("SW1:3,4")
PORT_DIPSETTING( 0x03, "3" )
PORT_DIPSETTING( 0x02, "4" )
// PORT_DIPSETTING( 0x01, "5" ) // results in 3, see above
// PORT_DIPSETTING( 0x00, "6" ) // results in 4, see above
// PORT_DIPSETTING( 0x01, "5" ) // results in 3, see above
// PORT_DIPSETTING( 0x00, "6" ) // results in 4, see above
INPUT_PORTS_END
@ -1646,7 +1646,7 @@ static INPUT_PORTS_START( brdrline )
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x01, "4" )
PORT_DIPSETTING( 0x02, "5" )
// PORT_DIPSETTING( 0x03, "5" ) // dupe
// PORT_DIPSETTING( 0x03, "5" ) // dupe
INPUT_PORTS_END
@ -1700,7 +1700,7 @@ static INPUT_PORTS_START( starrkr )
PORT_DIPSETTING( 0x00, "3" )
PORT_DIPSETTING( 0x01, "4" )
PORT_DIPSETTING( 0x02, "5" )
// PORT_DIPSETTING( 0x03, "5" ) // dupe
// PORT_DIPSETTING( 0x03, "5" ) // dupe
INPUT_PORTS_END
@ -2064,7 +2064,7 @@ static INPUT_PORTS_START( samurai )
PORT_START("IN1")
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,samurai_protection_r, (void *)1)
PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2") // unknown, but used
PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW1:2") // unknown, but used
PORT_DIPSETTING( 0x04, DEF_STR( Off ) )
PORT_DIPSETTING( 0x00, DEF_STR( On ) )
PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,vicdual_get_composite_blank_comp, NULL)
@ -2201,7 +2201,7 @@ INPUT_CHANGED_MEMBER(vicdual_state::nsub_coin_in)
m_nsub_play_counter++;
}
}
// increment coin counter
coin_counter_w(machine(), which, 1);
coin_counter_w(machine(), which, 0);
@ -2211,7 +2211,7 @@ INPUT_CHANGED_MEMBER(vicdual_state::nsub_coin_in)
case 2:
m_nsub_play_counter++;
break;
default:
break;
}
@ -2249,10 +2249,10 @@ static INPUT_PORTS_START( nsub )
PORT_DIPSETTING( 0x03, DEF_STR( 3C_1C ) )
PORT_DIPSETTING( 0x02, DEF_STR( 2C_1C ) )
PORT_DIPSETTING( 0x01, DEF_STR( 1C_1C ) )
// PORT_DIPSETTING( 0x00, DEF_STR( 0C_1C ) ) // invalid
// PORT_DIPSETTING( 0x00, DEF_STR( 0C_1C ) ) // invalid
PORT_DIPNAME( 0x78, 0x08, DEF_STR( Coin_B ) ) PORT_DIPLOCATION("SW:4,5,6,7")
PORT_DIPSETTING( 0x40, "Shared With Coin A" )
// PORT_DIPSETTING( 0x00, DEF_STR( 1C_0C ) ) // invalid
// PORT_DIPSETTING( 0x00, DEF_STR( 1C_0C ) ) // invalid
PORT_DIPSETTING( 0x08, DEF_STR( 1C_1C ) )
PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
PORT_DIPSETTING( 0x18, DEF_STR( 1C_3C ) )
@ -2280,7 +2280,7 @@ MACHINE_START_MEMBER(vicdual_state,nsub)
MACHINE_RESET_MEMBER(vicdual_state,nsub)
{
m_nsub_coin_counter = ioport("COINAGE")->read() & 7;
machine_reset();
}

252
src/mame/drivers/vlc.c
View File

@ -13,9 +13,9 @@ CGA monitor 15Khz 60hz
- 2x 62256 NVRAM + batt (connect in 16bits)
- 2x 6264 BACKUP + batt (connect in 8bits)
- 1x MODEM XE1214 from XECOM (300/1200 Baud)
on MAME 0.145u4
Yves
Todo :
@ -37,7 +37,7 @@ Read OE 8 bit on D15..D8
U50 4Bit D Flop Register is connect on D3..D0
this one seem to have 2 use.
1. keep track of the PAL16R8 state
1. keep track of the PAL16R8 state
2. DOOR SWITCH is connect on U50 Clear pin (D3..D0 LOW = Door Open)
Write Clock 4 bits in D-Flop Register
Read OE 4 bits on D3..D0
@ -89,7 +89,7 @@ BOOT:FE1AA8 0040 dc.b $40 * @
BOOT:FE1AA9 0000 dc.b 0
BOOT:FE19F0 INI_CRTC6845:
BOOT:FE19F0 INI_CRTC6845:
BOOT:FE19F0 48E7 8140 movem.l d0/d7/a1,-(sp)
BOOT:FE19F4 2258 movea.l (a0)+,a1 * type1 = 0xA50000, type2 = 0xA80000
BOOT:FE19F6 50D1 st (a1)
@ -102,7 +102,7 @@ BOOT:FE1A0A 6100 0108 bsr set_vid_D0_A0 * D0 = 0
BOOT:FE1A0A * A0 = 0xB00000
BOOT:FE1A0E 7E0D moveq #$D,d7
BOOT:FE1A10
BOOT:FE1A10 LOOP:
BOOT:FE1A10 LOOP:
BOOT:FE1A10 13C7 0090 0001 move.b d7,(CRTC_ADR)
BOOT:FE1A16 13D9 0090 8001 move.b (a1)+,(CRTC_DAT)
BOOT:FE1A1C 51CF FFF2 dbf d7,LOOP
@ -111,13 +111,13 @@ BOOT:FE1A24 4E75 rts
*** MC6845 Initialization ***
Htotal Hdisp HsyncPos HsyncW Vtotal VtotalAdj Vdisp VsyncPos InterMode MaxScanAdr CurStart CurEnd StartAdrH StartAdrL CurH CurL LightPenH LightPenL
Htotal Hdisp HsyncPos HsyncW Vtotal VtotalAdj Vdisp VsyncPos InterMode MaxScanAdr CurStart CurEnd StartAdrH StartAdrL CurH CurL LightPenH LightPenL
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------
register: 00 01 02 03 04 05 06 07 08 09 10 11 12 13 14 15 16 17
-------------------------------------------------------------------------------------------------------------------------------------------------------------------------
nevada TYPE1 : 42 31 35 03 32 02 31 31 00 07 00 00 00 00 00 00 00 00
nevada TYPE2 : 64 45 51 06 32 02 31 31 00 07 00 00 00 00 00 00 00 00
*/
@ -160,22 +160,22 @@ public:
device_t *m_duart18_68681;
device_t *m_duart39_68681;
device_t *m_duart40_68681;
required_device<cpu_device> m_maincpu;
optional_device<microtouch_device> m_microtouch;
required_shared_ptr<UINT16> m_nvram;
required_shared_ptr<UINT16> m_backup;
UINT16 m_datA40000;
//UINT8* m_videoram;
//UINT8* m_colorram;
UINT16* m_videoram;
tilemap_t *m_bg_tilemap;
DECLARE_DRIVER_INIT(nevada);
};
@ -185,29 +185,29 @@ this DUMP is done writing 0 to 255 and reading output (probably not the good way
PAL is connected on the UPPER byte D15..D8
Adress A40000..A40001
2 Type of PAL (one for game, the other is to set game to fabric default)
2 Type of PAL (one for game, the other is to set game to fabric default)
there is a 74LS173 on the LOWER byte that used bit D3..D0
there is a 74LS173 on the LOWER byte that used bit D3..D0
funny thing , the DOOR ACCESS Switch is connected on the CLEAR PIN of this 4bits register
so when D3..D0 are LOW , DOOR is OPEN
*/
static const UINT8 pal35[256] = {
0x11, 0x42, 0x5B, 0xCA, 0x19, 0x42, 0x5B, 0xCA, 0x38, 0x63, 0x3A, 0x63, 0x3A, 0x63, 0x3A, 0x63,
0xD3, 0x08, 0x5B, 0xCA, 0x19, 0xCA, 0x19, 0xCA, 0x18, 0xEB, 0x18, 0xEB, 0x18, 0xEB, 0x18, 0xEB,
0xD3, 0xCA, 0x5B, 0xCC, 0x5B, 0xCC, 0x5B, 0xCC, 0xBA, 0x63, 0x38, 0x65, 0x38, 0x65, 0x38, 0x65,
0xD1, 0xCA, 0x5B, 0xC8, 0x5B, 0xC8, 0x5B, 0xC8, 0x9A, 0xEB, 0x1A, 0xED, 0x1A, 0xED, 0x1A, 0xED,
0x0C, 0x65, 0xF0, 0x00, 0x64, 0xF5, 0x04, 0x65, 0xB8, 0x25, 0x20, 0x20, 0x24, 0x24, 0x24, 0x24,
0xF0, 0x00, 0xF8, 0x00, 0xFC, 0x00, 0xFC, 0x00, 0xB8, 0x3D, 0xFC, 0x19, 0xFC, 0x19, 0xFC, 0x19,
0x44, 0xF9, 0xC4, 0xF9, 0xC4, 0xFD, 0xC4, 0xFD, 0xFC, 0xFD, 0xFC, 0xFD, 0xFC, 0xFD, 0xFC, 0xFD,
0xC0, 0xD9, 0xC8, 0xD9, 0xC8, 0xD9, 0xC8, 0xD9, 0xD8, 0xD9, 0xD8, 0xD9, 0xD8, 0xD9, 0xD8, 0xD9,
0x0C, 0x44, 0xFB, 0x04, 0x67, 0xD4, 0x0C, 0x44, 0xBA, 0x24, 0x22, 0x02, 0x26, 0x06, 0x26, 0x06,
0xFB, 0x00, 0xFB, 0x00, 0xEF, 0x10, 0xCE, 0x18, 0xEF, 0x18, 0xEF, 0x18, 0xFF, 0x18, 0xFF, 0x18,
0x44, 0xF8, 0xC6, 0xD8, 0xCE, 0xDC, 0xCE, 0xDC, 0xEF, 0x9E, 0x67, 0xB8, 0x67, 0xBC, 0x67, 0xBC,
0xC6, 0xD8, 0xCA, 0xD8, 0xCA, 0xD8, 0xCA, 0xD8, 0xCB, 0x9A, 0xEF, 0x9A, 0xFF, 0xD8, 0xDB, 0xD8,
0x66, 0xF4, 0x00, 0x64, 0xBA, 0x25, 0x22, 0x22, 0x26, 0x26, 0x26, 0x26, 0xF2, 0x00, 0xFA, 0x00,
0xFA, 0x00, 0xFA, 0x00, 0xBA, 0x3D, 0xFA, 0x19, 0xFA, 0x19, 0xFA, 0x19, 0x44, 0xF9, 0xC2, 0xF0,
0xC2, 0xF4, 0xC2, 0xF4, 0xFA, 0xF4, 0xFA, 0xF4, 0xFA, 0xF4, 0xFA, 0xF4, 0xC2, 0xD0, 0xCA, 0xD0,
0xCA, 0xD0, 0xCA, 0xD0, 0xDA, 0xD0, 0xDA, 0xD0, 0xDA, 0xD0, 0xDA, 0xD0, 0x08, 0x63, 0xD3, 0x08
0x11, 0x42, 0x5B, 0xCA, 0x19, 0x42, 0x5B, 0xCA, 0x38, 0x63, 0x3A, 0x63, 0x3A, 0x63, 0x3A, 0x63,
0xD3, 0x08, 0x5B, 0xCA, 0x19, 0xCA, 0x19, 0xCA, 0x18, 0xEB, 0x18, 0xEB, 0x18, 0xEB, 0x18, 0xEB,
0xD3, 0xCA, 0x5B, 0xCC, 0x5B, 0xCC, 0x5B, 0xCC, 0xBA, 0x63, 0x38, 0x65, 0x38, 0x65, 0x38, 0x65,
0xD1, 0xCA, 0x5B, 0xC8, 0x5B, 0xC8, 0x5B, 0xC8, 0x9A, 0xEB, 0x1A, 0xED, 0x1A, 0xED, 0x1A, 0xED,
0x0C, 0x65, 0xF0, 0x00, 0x64, 0xF5, 0x04, 0x65, 0xB8, 0x25, 0x20, 0x20, 0x24, 0x24, 0x24, 0x24,
0xF0, 0x00, 0xF8, 0x00, 0xFC, 0x00, 0xFC, 0x00, 0xB8, 0x3D, 0xFC, 0x19, 0xFC, 0x19, 0xFC, 0x19,
0x44, 0xF9, 0xC4, 0xF9, 0xC4, 0xFD, 0xC4, 0xFD, 0xFC, 0xFD, 0xFC, 0xFD, 0xFC, 0xFD, 0xFC, 0xFD,
0xC0, 0xD9, 0xC8, 0xD9, 0xC8, 0xD9, 0xC8, 0xD9, 0xD8, 0xD9, 0xD8, 0xD9, 0xD8, 0xD9, 0xD8, 0xD9,
0x0C, 0x44, 0xFB, 0x04, 0x67, 0xD4, 0x0C, 0x44, 0xBA, 0x24, 0x22, 0x02, 0x26, 0x06, 0x26, 0x06,
0xFB, 0x00, 0xFB, 0x00, 0xEF, 0x10, 0xCE, 0x18, 0xEF, 0x18, 0xEF, 0x18, 0xFF, 0x18, 0xFF, 0x18,
0x44, 0xF8, 0xC6, 0xD8, 0xCE, 0xDC, 0xCE, 0xDC, 0xEF, 0x9E, 0x67, 0xB8, 0x67, 0xBC, 0x67, 0xBC,
0xC6, 0xD8, 0xCA, 0xD8, 0xCA, 0xD8, 0xCA, 0xD8, 0xCB, 0x9A, 0xEF, 0x9A, 0xFF, 0xD8, 0xDB, 0xD8,
0x66, 0xF4, 0x00, 0x64, 0xBA, 0x25, 0x22, 0x22, 0x26, 0x26, 0x26, 0x26, 0xF2, 0x00, 0xFA, 0x00,
0xFA, 0x00, 0xFA, 0x00, 0xBA, 0x3D, 0xFA, 0x19, 0xFA, 0x19, 0xFA, 0x19, 0x44, 0xF9, 0xC2, 0xF0,
0xC2, 0xF4, 0xC2, 0xF4, 0xFA, 0xF4, 0xFA, 0xF4, 0xFA, 0xF4, 0xFA, 0xF4, 0xC2, 0xD0, 0xCA, 0xD0,
0xCA, 0xD0, 0xCA, 0xD0, 0xDA, 0xD0, 0xDA, 0xD0, 0xDA, 0xD0, 0xDA, 0xD0, 0x08, 0x63, 0xD3, 0x08
};
@ -231,8 +231,8 @@ static const mc6845_interface mc6845_intf =
static const gfx_layout charlayout =
{
/* Todo , just for sample */
/* Todo , just for sample */
8,8,
RGN_FRAC(1,4),
4,
@ -246,17 +246,17 @@ static const gfx_layout charlayout =
/*
static WRITE16_HANDLER( nevada_videoram_w )
{
// Todo, Just for sample
// Todo, Just for sample
nevada_state *state = space->machine().driver_data<nevada_state>();
state->m_videoram[offset] = data;
state->m_bg_tilemap->mark_tile_dirty(offset);
nevada_state *state = space->machine().driver_data<nevada_state>();
state->m_videoram[offset] = data;
state->m_bg_tilemap->mark_tile_dirty(offset);
}
*/
/***************************************************************************/
static GFXDECODE_START( nevada )
/* Todo , just for sample */
/* Todo , just for sample */
GFXDECODE_ENTRY( "gfx1", 0x0000, charlayout, 0, 8 )
GFXDECODE_END
@ -264,15 +264,15 @@ GFXDECODE_END
/*
static TILE_GET_INFO( get_bg_tile_info )
{
// Todo, Just for sample
nevada_state *state = machine.driver_data<nevada_state>();
// Todo, Just for sample
nevada_state *state = machine.driver_data<nevada_state>();
int attr = state->m_colorram[tile_index];
int code = ((attr & 1) << 8) | state->m_videoram[tile_index];
int bank = (attr & 0x02) >> 1;
int color = (attr & 0x3c) >> 2;
int attr = state->m_colorram[tile_index];
int code = ((attr & 1) << 8) | state->m_videoram[tile_index];
int bank = (attr & 0x02) >> 1;
int color = (attr & 0x3c) >> 2;
SET_TILE_INFO(bank, code, color, 0);
SET_TILE_INFO(bank, code, color, 0);
}
*/
@ -280,22 +280,22 @@ static TILE_GET_INFO( get_bg_tile_info )
/***************************************************************************/
static VIDEO_START( nevada )
{
// todo
// todo
/*
nevada_state *state = machine.driver_data<nevada_state>();
state->m_bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
*/
nevada_state *state = machine.driver_data<nevada_state>();
state->m_bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
*/
}
/***************************************************************************/
static SCREEN_UPDATE_IND16( nevada )
{
// Todo
/*
nevada_state *state = screen.machine().driver_data<nevada_state>();
state->m_bg_tilemap->draw(bitmap, cliprect, 0, 0);
*/
return 0;
/*
nevada_state *state = screen.machine().driver_data<nevada_state>();
state->m_bg_tilemap->draw(bitmap, cliprect, 0, 0);
*/
return 0;
}
/***************************************************************************/
@ -319,35 +319,35 @@ static NVRAM_HANDLER( nevada )
if (file)
file->read(state->m_nvram,state->m_nvram.bytes());
else
{
{
UINT16* defaultram = (UINT16 *) state->memregion("defaults")->base();
memset(state->m_nvram,0x00,state->m_nvram.bytes());
if (defaultram) memcpy(state->m_nvram, state->memregion("defaults")->base(), state->memregion("defaults")->bytes());
}
}
}
}
/***************************************************************************
U18 MC68681 RS232 UART SIDEA = MODEM 1200 Baud
U18 MC68681 RS232 UART SIDEA = MODEM 1200 Baud
U18 MC68681 RS232 UART SIDEB = not used
Interrupt 4
***************************************************************************/
static void duart18_irq_handler(device_t *device, int state, UINT8 vector )
{
{
device->machine().device("maincpu")->execute().set_input_line_and_vector(4, state, vector);
};
/***************************************************************************/
static void duart18_tx(device_t *device, int channel, UINT8 data)
{
// nevada_state *state = device->machine().driver_data<nevada_state>();
/* Todo , just for sample */
// nevada_state *state = device->machine().driver_data<nevada_state>();
/* Todo , just for sample */
if ( channel == 0 )
{
// Modem 1200 Baud
}
// Modem 1200 Baud
}
};
/***************************************************************************/
@ -367,24 +367,24 @@ static UINT8 duart18_input( device_t *device )
***************************************************************************/
static void duart39_irq_handler( device_t *device, int state, UINT8 vector )
{
{
device->machine().device("maincpu")->execute().set_input_line_and_vector(3, state, vector);
};
/***************************************************************************/
static void duart39_tx(device_t *device, int channel, UINT8 data)
{
// nevada_state *state = device->machine().driver_data<nevada_state>();
/* Todo , just for sample */
// nevada_state *state = device->machine().driver_data<nevada_state>();
/* Todo , just for sample */
if ( channel == 0 )
{
// Printer
}
}
else
{
// Player Tracking Interface J2 (not used)
}
}
};
/***************************************************************************/
@ -406,14 +406,14 @@ static UINT8 duart39_input( device_t *device )
static void duart40_irq_handler( device_t *device, int state, UINT8 vector )
{
/* Todo , just for sample */
/* Todo , just for sample */
device->machine().device("maincpu")->execute().set_input_line_and_vector(5, state, vector);
};
/***************************************************************************/
static void duart40_tx( device_t *device, int channel, UINT8 data )
{
/* Todo , just for sample */
/* Todo , just for sample */
nevada_state *state = device->machine().driver_data<nevada_state>();
if ( channel == 0 )
{
@ -421,13 +421,13 @@ static void duart40_tx( device_t *device, int channel, UINT8 data )
}
else
{
// JCM Bill Acceptor
}
// JCM Bill Acceptor
}
};
/***************************************************************************/
WRITE8_MEMBER( nevada_state::microtouch_tx )
{
/* Todo , just for sample */
/* Todo , just for sample */
duart68681_rx_data(m_duart40_68681, 0, data);
}
@ -464,8 +464,8 @@ static const ay8910_interface ay8910_config =
{
AY8910_LEGACY_OUTPUT,
AY8910_DEFAULT_LOADS,
// DEVCB_INPUT_PORT("DSW1"), /* not used */
// DEVCB_INPUT_PORT("DSW2"), /* not used */
// DEVCB_INPUT_PORT("DSW1"), /* not used */
// DEVCB_INPUT_PORT("DSW2"), /* not used */
DEVCB_NULL, /* callback for display state changes */
DEVCB_NULL, /* callback for cursor state changes */
DEVCB_NULL,
@ -474,9 +474,9 @@ static const ay8910_interface ay8910_config =
/***************************************************************************/
static READ16_HANDLER(io_board_r)
{
// IO board Serial communication 0xA00000
return 1;
{
// IO board Serial communication 0xA00000
return 1;
}
/***************************************************************************/
static WRITE16_HANDLER(io_board_w)
@ -491,25 +491,25 @@ static WRITE16_HANDLER (io_board_x)
/***************************************************************************/
static READ16_HANDLER( nevada_sec_r )
{
nevada_state *state = space.machine().driver_data<nevada_state>();
// D3..D0 = DOOR OPEN or Track STATE of PAL35
UINT16 res;
/* UPPER byte is use for input in PAL35 */
{
nevada_state *state = space.machine().driver_data<nevada_state>();
// D3..D0 = DOOR OPEN or Track STATE of PAL35
UINT16 res;
/* UPPER byte is use for input in PAL35 */
// 74LS173 $bits Register used LOWER bits D3..D0 for PAL35 state and DOOR LOGIC SWITCH
res = pal35[state->m_datA40000 >> 8];
res = pal35[state->m_datA40000 >> 8];
res = res << 8;
res = res | (state->m_datA40000 & 0x00FF);
return res;
}
/***************************************************************************/
static WRITE16_HANDLER( nevada_sec_w )
{
nevada_state *state = space.machine().driver_data<nevada_state>();
{
nevada_state *state = space.machine().driver_data<nevada_state>();
// 74LS173 $bits Register used LOWER bits D3..D0 for DOOR LOGIC SWITCH
state->m_datA40000 = data | 0x00f0; // since D7..D4 are not used and are connected to PULLUP
// popmessage("WRITE %04x %04x ",datA40000,data);
state->m_datA40000 = data | 0x00f0; // since D7..D4 are not used and are connected to PULLUP
// popmessage("WRITE %04x %04x ",datA40000,data);
}
/***************************************************************************/
@ -521,7 +521,7 @@ DOOR Switch desc
1 x COIN DOOR SW
1 x TOP DOOR SW
1 x COMPUTER DOOR SW
Interrupt Vector
INT1 RTC MSM6242
INT2 nc
@ -539,7 +539,7 @@ U39 MC68681 RS232 UART SIDEB = Player Tracking Interface J2 (not used)
U18 MC68681 RS232 UART SIDEA = MODEM LOW SPEED 1200 BAUD from XECOM
U18 MC68681 PIN4 IP1 from U16 (75HC189 pin6) from PIN2 J90 UNKNOWN !
U18 MC68681 PIN4 IP1 from U16 (75HC189 pin6) from PIN2 J90 UNKNOWN !
U18 MC68681 PIN36 IP2 ACCESS DOOR SWITCH
U18 MC68681 PIN2 IP3 LOW Battery Detector for ACCESS DOOR SWITCH
U18 MC68681 PIN39 IP4 from U12 75174 UNKNOWN !
@ -561,18 +561,18 @@ U40 MC68681 Pin27 OP4 JCM Bill Acceptor (J4-6, J4-7 Control)
// missing adress for :
// external I/O board communication via PAL23
A23 A22 A21 A20 | A19 A18 A17 A16 | A15 A14 A13 A12 | A11 A10 A9 A8 | A7 A6 A5 A4 | A3 A2 A1 xx
A23 A22 A21 A20 | A19 A18 A17 A16 | A15 A14 A13 A12 | A11 A10 A9 A8 | A7 A6 A5 A4 | A3 A2 A1 xx
Memory Map (generic)
--------------------
00000000 0000FFFF NVRAM (only 0..FFFF vector and jump) 16bits
00010000 00011FFF BACKUP1 8bits
00020000 00021FFF BACKUP2 8bits
00020000 00021FFF BACKUP2 8bits
00B00000 00B01FFF VIDEO RAM 8bits
00FA0000 00FBFFFF Not used (Expension board SRAM)
00FC0000 00FDFFFF PROGRAM 16bits
00FE0000 00FFFFFF BOOTLOADER 16bits
00010001
00010001
00014001
00020001
00024001
@ -582,7 +582,7 @@ U40 MC68681 Pin27 OP4 JCM Bill Acceptor (J4-6, J4-7 Control)
00A08001 I/O Board Communication
00A10000 WDT STROBE DS1232 WatchDog Controller (this adress reset Strobe of Ds1232)
00A20001 AY8912 BDIR AUDIO Data bus on D7..D0
00A28001 AY8912 BC1 AUDIO
00A28001 AY8912 BC1 AUDIO
00A300x1 6242 CS RTC U41 A0..A3 (A4..A7 ON A0..A3) Data bus on D3..D0
00A4000x PAL CS READ U35 SECURITY PAL16R8 Data bus on D15..D8
00A4000x PAL CLK WRITE U35 SECURITY PAL16R8
@ -591,18 +591,18 @@ U40 MC68681 Pin27 OP4 JCM Bill Acceptor (J4-6, J4-7 Control)
00B100x0 68681 CS UART U40 RS1..RS4 REGISTER (A4..A7 ON RS1..RS4) Data bus on D7..D0
00B200x0 68681 CS UART U39 RS1..RS4 REGISTER (A4..A7 ON RS1..RS4) Data bus on D7..D0
00E000x0 68681 CS UART U18 RS1..RS4 REGISTER (A4..A7 ON RS1..RS4) Data bus on D15..D8
*/
*/
/***************************************************************************/
static ADDRESS_MAP_START( nevada_map, AS_PROGRAM, 16,nevada_state )
AM_RANGE(0x00000000, 0x0000ffff) AM_RAM AM_SHARE("nvram")
AM_RANGE(0x00010000, 0x00021fff) AM_RAM AM_SHARE("backup")
AM_RANGE(0x00900000, 0x00900001) AM_DEVWRITE8("crtc",mc6845_device, address_w,0x00ff )
AM_RANGE(0x00900000, 0x00900001) AM_DEVWRITE8("crtc",mc6845_device, address_w,0x00ff )
AM_RANGE(0x00908000, 0x00908001) AM_DEVWRITE8("crtc",mc6845_device,register_w,0x00ff )
AM_RANGE(0x00a00000, 0x00a00001) AM_READWRITE_LEGACY (io_board_r,io_board_w)
AM_RANGE(0x00a08000, 0x00a08001) AM_WRITE_LEGACY(io_board_x)
AM_RANGE(0x00a10000, 0x00a10001) AM_WRITE(watchdog_reset16_w )
AM_RANGE(0x00a20000, 0x00a20001) AM_DEVWRITE8_LEGACY("aysnd", ay8910_address_w,0x00ff )
AM_RANGE(0x00a28000, 0x00a28001) AM_DEVWRITE8_LEGACY("aysnd", ay8910_data_w ,0x00ff )
AM_RANGE(0x00a20000, 0x00a20001) AM_DEVWRITE8_LEGACY("aysnd", ay8910_address_w,0x00ff )
AM_RANGE(0x00a28000, 0x00a28001) AM_DEVWRITE8_LEGACY("aysnd", ay8910_data_w ,0x00ff )
AM_RANGE(0x00a30000, 0x00A300ff) AM_DEVREADWRITE8("rtc",msm6242_device, read, write, 0x00ff)
AM_RANGE(0x00a40000, 0x00A40001) AM_READWRITE_LEGACY( nevada_sec_r, nevada_sec_w)
//AM_RANGE(0x00b00000, 0x00b01fff) AM_RAM_WRITE(nevada_videoram_w) AM_BASE_MEMBER(nevada_state, m_videoram)
@ -621,7 +621,7 @@ static ADDRESS_MAP_START( nevada_iomap, AS_IO, 8, nevada_state )
ADDRESS_MAP_END
/*
U18 MC68681 PIN4 IP1 from U16 (75HC189 pin6) from PIN2 J90 UNKNOWN !
U18 MC68681 PIN4 IP1 from U16 (75HC189 pin6) from PIN2 J90 UNKNOWN !
U18 MC68681 PIN36 IP2 ACCESS DOOR SWITCH
U18 MC68681 PIN2 IP3 LOW Battery Detector for ACCESS DOOR SWITCH
U18 MC68681 PIN39 IP4 from U12 75174 UNKNOWN !
@ -656,7 +656,7 @@ static INPUT_PORTS_START( nevada )
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN2 )
PORT_START("DSW3")
PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_COIN3 )
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN4 )
PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_COIN4 )
PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON7 ) PORT_NAME("LOW BATT U51")
INPUT_PORTS_END
@ -694,7 +694,7 @@ static MACHINE_RESET( nevada )
{
nevada_state *state = machine.driver_data<nevada_state>();
state->m_duart18_68681 = machine.device( "duart18_68681" );
state->m_duart39_68681 = machine.device( "duart39_68681" );
state->m_duart40_68681 = machine.device( "duart40_68681" );
@ -710,17 +710,17 @@ static MACHINE_CONFIG_START( nevada, nevada_state )
MCFG_CPU_ADD("maincpu", M68000, MASTER_CPU)
MCFG_CPU_PROGRAM_MAP(nevada_map)
MCFG_CPU_IO_MAP(nevada_iomap) //0x10000 0x20000
MCFG_MACHINE_RESET(nevada)
MCFG_WATCHDOG_TIME_INIT(attotime::from_msec(150)) /* 150ms Ds1232 TD to Ground */
MCFG_NVRAM_HANDLER(nevada)
MCFG_NVRAM_HANDLER(nevada)
// video hardware
MCFG_SCREEN_ADD("screen", RASTER)
MCFG_SCREEN_REFRESH_RATE(60)
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))
MCFG_SCREEN_SIZE((42+1)*8, (32+1)*8) /* From MC6845 init, registers 00 & 04 (programmed with value-1). */
MCFG_SCREEN_VISIBLE_AREA(0*8, 31*8-1, 0*8, 31*8-1) /* From MC6845 init, registers 01 & 06. */
MCFG_SCREEN_UPDATE_STATIC(nevada)
@ -729,33 +729,33 @@ static MACHINE_CONFIG_START( nevada, nevada_state )
MCFG_PALETTE_LENGTH(256)
MCFG_PALETTE_INIT(nevada)
MCFG_VIDEO_START(nevada)
MCFG_MC6845_ADD("crtc", MC6845, MC6845_CLOCK, mc6845_intf)
// sound hardware
MCFG_SPEAKER_STANDARD_MONO("mono")
MCFG_SOUND_ADD("aysnd", AY8912, SOUND_CLOCK)
MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
MCFG_DUART68681_ADD( "duart18_68681", XTAL_3_6864MHz , nevada_duart18_68681_config ) // UARTA = Modem 1200Baud
MCFG_DUART68681_ADD( "duart39_68681", XTAL_3_6864MHz , nevada_duart39_68681_config ) // UARTA = Printer
MCFG_DUART68681_ADD( "duart40_68681", XTAL_3_6864MHz , nevada_duart40_68681_config ) // UARTA = Touch , UARTB = Bill Acceptor
MCFG_MICROTOUCH_ADD( "microtouch", nevada_microtouch_config )
/* devices */
MCFG_MSM6242_ADD("rtc", nevada_rtc_intf)
MACHINE_CONFIG_END
/***************************************************************************/
ROM_START( nevada )
ROM_REGION( 0x1000000, "maincpu", 0 ) /* 2 x 27C512 */
ROM_REGION( 0x1000000, "maincpu", 0 ) /* 2 x 27C512 */
ROM_LOAD16_BYTE( "u9even.bin" , 0xfc0000, 0x010000, CRC(ADB207BD) SHA1(3E3509B78FDF32785F92CB21272694673D25C563) ) // program fc0000..fdffff
ROM_LOAD16_BYTE( "u10odd.bin" , 0xfc0001, 0x010000, CRC(A79778D7) SHA1(6FF969F09D9781479360BCA3403B927099AD6481) )
ROM_LOAD16_BYTE( "u31even.bin", 0xfe0000, 0x010000, CRC(C9779F30) SHA1(5310B3D8B5E887313CE8059BD72D0730A295074F) ) // Boot fe0000..ffffff
ROM_LOAD16_BYTE( "u32odd.bin" , 0xfe0001, 0x010000, CRC(51035ED1) SHA1(66CBF582CDF34CF3DDE30CF8A99BBCED4AF1CE6F) )
ROM_LOAD16_BYTE( "u32odd.bin" , 0xfe0001, 0x010000, CRC(51035ED1) SHA1(66CBF582CDF34CF3DDE30CF8A99BBCED4AF1CE6F) )
ROM_REGION16_BE( 0x0010000, "defaults", 0 ) /* 2 x 62256 NVRAM */
ROM_LOAD16_BYTE( "u30nv_even.bin", 0x000000, 0x008000, CRC(11f5c663) SHA1(f447fd59010bc7fbbda321c5aaf13e23c2aebd40) ) // NVRAM even (RESET + Vector table in NVRAM)
ROM_LOAD16_BYTE( "u33nv_odd.bin" , 0x000001, 0x008000, CRC(20623da2) SHA1(2dd31a96f0a3454855cd975e8ee95e43316344e0) ) // NVRAM odd
@ -766,7 +766,7 @@ ROM_START( nevada )
/*
BACKUP RAM
PAL DUMP
*/
*/
ROM_END
/***************************************************************************/
@ -775,24 +775,24 @@ ROM_END
*************************/
DRIVER_INIT_MEMBER(nevada_state,nevada)
{
UINT16 *ROM = (UINT16 *)memregion("maincpu")->base();
UINT16 *ROM = (UINT16 *)memregion("maincpu")->base();
memset(m_backup,0x00,m_backup.bytes()); // temp
/* Patch for WDT test with int Level7 */
/* PATCH FE0086 4278 0414 Clrf $0414 */
/* this skip the test for the WDT */
// ROM[0xFE0086/2] = 0x4278;
// ROM[0xFE0088/2] = 0x0414;
// Skip PAL SECURITY
// ROM[0xFE0086/2] = 0x4278;
// ROM[0xFE0088/2] = 0x0414;
// Skip PAL SECURITY
ROM[0xFE0248/2] = 0x4E71; // nop
ROM[0xFE05D0/2] = 0x4E71; // nop
ROM[0xFE05D8/2] = 0x6014; // bra
ROM[0xFE0606/2] = 0x600A; // bra
// ROM[0xFE18B4/2] = 0x4E71; // nop
// ROM[0xFE18B4/2] = 0x4E71; // nop
}
/***************************************************************************/

2
src/mame/drivers/xtom3d.c
View File

@ -551,7 +551,7 @@ static ADDRESS_MAP_START(xtom3d_io, AS_IO, 32, xtom3d_state)
AM_RANGE(0x01f0, 0x01f7) AM_READWRITE(ide_r, ide_w)
AM_RANGE(0x03b0, 0x03bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
AM_RANGE(0x03c0, 0x03cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03d0, 0x03df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x03f0, 0x03f7) AM_READWRITE(fdc_r, fdc_w)
AM_RANGE(0x0cf8, 0x0cff) AM_DEVREADWRITE("pcibus", pci_bus_legacy_device, read, write)

10
src/mame/includes/archimds.h
View File

@ -68,7 +68,7 @@ public:
UINT8 m_ioc_regs[0x80/4];
UINT8 m_vidc_bpp_mode;
UINT8 m_vidc_interlace;
UINT32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr);
private:
@ -77,13 +77,13 @@ private:
static const device_timer_id TIMER_VIDEO = 1;
static const device_timer_id TIMER_AUDIO = 2;
static const device_timer_id TIMER_IOC = 3;
void vidc_vblank();
void vidc_video_tick();
void vidc_audio_tick();
void ioc_timer(int param);
void vidc_dynamic_res_change();
void vidc_dynamic_res_change();
void latch_timer_cnt(int tmr);
void a310_set_timer(int tmr);
DECLARE_READ32_MEMBER(ioc_ctrl_r);
@ -99,7 +99,7 @@ private:
UINT8 m_vidc_pixel_clk;
UINT8 m_vidc_stereo_reg[8];
emu_timer *m_timer[4], *m_snd_timer, *m_vid_timer;
emu_timer *m_vbl_timer;
emu_timer *m_vbl_timer;
};
/* IOC registers */

2
src/mame/includes/bfm_sc45.h
View File

@ -56,7 +56,7 @@ public:
int m_chk41addr;
bool m_dochk41;
UINT16 m_mainram[0x10000/2];

2
src/mame/includes/bzone.h
View File

@ -18,7 +18,7 @@ public:
m_discrete(*this, "discrete") { }
optional_device<discrete_device> m_discrete;
UINT8 m_analog_data;
UINT8 m_rb_input_select;
DECLARE_WRITE8_MEMBER(bzone_coin_counter_w);

2
src/mame/includes/crbaloon.h
View File

@ -24,7 +24,7 @@ public:
required_shared_ptr<UINT8> m_colorram;
required_shared_ptr<UINT8> m_spriteram;
required_shared_ptr<UINT8> m_pc3092_data;
required_device<discrete_device> m_discrete;
required_device<discrete_device> m_discrete;
UINT16 m_collision_address;
UINT8 m_collision_address_clear;
tilemap_t *m_bg_tilemap;

2
src/mame/includes/deco32.h
View File

@ -107,7 +107,7 @@ public:
DECLARE_VIDEO_START(nslasher);
UINT32 screen_update_captaven(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
UINT32 screen_update_fghthist(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
UINT32 screen_update_nslasher(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
UINT32 screen_update_nslasher(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void screen_eof_captaven(screen_device &screen, bool state);
INTERRUPT_GEN_MEMBER(deco32_vbl_interrupt);
TIMER_DEVICE_CALLBACK_MEMBER(interrupt_gen);

8
src/mame/includes/decocass.h
View File

@ -210,7 +210,7 @@ public:
DECLARE_WRITE8_MEMBER(decocass_center_v_shift_w);
void decocass_video_state_save_init();
DECLARE_WRITE8_MEMBER(ram_w);
DECLARE_WRITE8_MEMBER(charram_w);
DECLARE_WRITE8_MEMBER(fgvideoram_w);
@ -239,16 +239,16 @@ private:
DECLARE_READ8_MEMBER(decocass_type5_r);
DECLARE_WRITE8_MEMBER(decocass_type5_w);
DECLARE_READ8_MEMBER(decocass_nodong_r);
void draw_object(bitmap_ind16 &bitmap, const rectangle &cliprect);
void draw_center(bitmap_ind16 &bitmap, const rectangle &cliprect);
void mark_bg_tile_dirty(offs_t offset);
void draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, int color,
int sprite_y_adjust, int sprite_y_adjust_flip_screen,
UINT8 *sprite_ram, int interleave);
void draw_missiles(bitmap_ind16 &bitmap, const rectangle &cliprect,
int missile_y_adjust, int missile_y_adjust_flip_screen,
UINT8 *missile_ram, int interleave);
UINT8 *missile_ram, int interleave);
};

2
src/mame/includes/dkong.h
View File

@ -110,7 +110,7 @@ public:
const UINT8 * m_color_codes;
emu_timer * m_scanline_timer;
INT8 m_vidhw; /* Selected video hardware RS Conversion / TKG04 */
optional_device<discrete_device> m_discrete;
/* radar scope */

2
src/mame/includes/irobot.h
View File

@ -74,7 +74,7 @@ public:
DECLARE_READ8_MEMBER(irobot_status_r);
DECLARE_WRITE8_MEMBER(irobot_paletteram_w);
DECLARE_READ8_MEMBER(quad_pokeyn_r);
DECLARE_WRITE8_MEMBER(quad_pokeyn_w);
DECLARE_WRITE8_MEMBER(quad_pokeyn_w);
DECLARE_DRIVER_INIT(irobot);
virtual void machine_reset();
virtual void video_start();

2
src/mame/includes/kaneko16.h
View File

@ -116,7 +116,7 @@ public:
DECLARE_DRIVER_INIT(berlwall);
DECLARE_PALETTE_INIT(berlwall);
DECLARE_VIDEO_START(berlwall);
UINT32 screen_update_berlwall(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
UINT32 screen_update_berlwall(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
};
class kaneko16_shogwarr_state : public kaneko16_state

2
src/mame/includes/m79amb.h
View File

@ -14,7 +14,7 @@ public:
required_shared_ptr<UINT8> m_mask;
required_device<discrete_device> m_discrete;
/* misc */
UINT8 m_lut_gun1[0x100];
UINT8 m_lut_gun2[0x100];

6
src/mame/includes/megadriv.h
View File

@ -107,7 +107,7 @@ public:
: driver_device(mconfig, type, tag),
m_vdp(*this,"gen_vdp"),
m_megadrive_ram(*this,"megadrive_ram")
{
{
sega_cd_connected = 0;
}
required_device<sega_genesis_vdp_device> m_vdp;
@ -273,7 +273,7 @@ public:
DECLARE_VIDEO_START(segac2_new);
DECLARE_MACHINE_START(segac2);
DECLARE_MACHINE_RESET(segac2);
UINT32 screen_update_segac2_new(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
};
@ -313,7 +313,7 @@ public:
DECLARE_DRIVER_INIT(megaplay);
DECLARE_VIDEO_START(megplay);
DECLARE_MACHINE_RESET(megaplay);
UINT32 screen_update_megplay(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
void screen_eof_megaplay(screen_device &screen, bool state);
};

4
src/mame/includes/mw8080bw.h
View File

@ -47,7 +47,7 @@ public:
required_shared_ptr<UINT8> m_main_ram;
optional_shared_ptr<UINT8> m_colorram;
optional_device<discrete_device> m_discrete;
/* sound-related */
UINT8 m_port_1_last;
UINT8 m_port_2_last;
@ -78,7 +78,7 @@ public:
samples_device *m_samples2;
device_t *m_sn1;
device_t *m_sn2;
device_t *m_sn;
device_t *m_sn;
DECLARE_READ8_MEMBER(mw8080bw_shift_result_rev_r);
DECLARE_READ8_MEMBER(mw8080bw_reversable_shift_result_r);

2
src/mame/includes/ninjakd2.h
View File

@ -47,7 +47,7 @@ public:
void omegaf_io_protection_reset();
void robokid_motion_error_kludge(UINT16 offset);
void video_init_common(UINT32 vram_alloc_size);
DECLARE_WRITE8_MEMBER(ninjakd2_bankselect_w);
DECLARE_WRITE8_MEMBER(ninjakd2_soundreset_w);
DECLARE_WRITE8_MEMBER(ninjakd2_pcm_play_w);

2
src/mame/includes/orbit.h
View File

@ -27,7 +27,7 @@ public:
/* memory pointers */
required_shared_ptr<UINT8> m_playfield_ram;
required_shared_ptr<UINT8> m_sprite_ram;
required_device<discrete_device> m_discrete;
/* video-related */

4
src/mame/includes/stv.h
View File

@ -202,7 +202,7 @@ public:
UINT32 screen_update_stv_vdp2(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
TIMER_DEVICE_CALLBACK_MEMBER(saturn_scanline);
TIMER_DEVICE_CALLBACK_MEMBER(saturn_slave_scanline);
void scu_do_transfer(UINT8 event);
void scu_test_pending_irq();
DECLARE_READ32_MEMBER(saturn_scu_r);
@ -233,7 +233,7 @@ public:
void saturn_init_driver(int rgn);
int m_scsp_last_line;
};
#define MASTER_CLOCK_352 57272720

2
src/mame/includes/vicdual.h
View File

@ -33,7 +33,7 @@ public:
void coin_in();
void assert_coin_status();
DECLARE_WRITE8_MEMBER(vicdual_videoram_w);
DECLARE_WRITE8_MEMBER(vicdual_characterram_w);
DECLARE_READ8_MEMBER(depthch_io_r);

4
src/mame/machine/archimds.c
View File

@ -867,8 +867,8 @@ WRITE32_MEMBER(archimedes_state::archimedes_vidc_w)
case VIDC_HCR: m_vidc_regs[VIDC_HCR] = ((val >> 14)<<1)+1; break;
// case VIDC_HSWR: m_vidc_regs[VIDC_HSWR] = (val >> 14)+1; break;
case VIDC_HBSR: m_vidc_regs[VIDC_HBSR] = ((val >> 14)<<1)+1; break;
case VIDC_HDSR: m_vidc_regs[VIDC_HDSR] = (val >> 14); break;
case VIDC_HDER: m_vidc_regs[VIDC_HDER] = (val >> 14); break;
case VIDC_HDSR: m_vidc_regs[VIDC_HDSR] = (val >> 14); break;
case VIDC_HDER: m_vidc_regs[VIDC_HDER] = (val >> 14); break;
case VIDC_HBER: m_vidc_regs[VIDC_HBER] = ((val >> 14)<<1)+1; break;
// #define VIDC_HCSR 0x98
// #define VIDC_HIR 0x9c

2
src/mame/machine/genpin.h
View File

@ -30,4 +30,4 @@ static const samples_interface genpin_samples_intf =
MACHINE_CONFIG_EXTERN( genpin_audio );
#endif /* GENPIN_H_ */
#endif /* GENPIN_H_ */

56
src/mame/machine/megacd.c
View File

@ -159,7 +159,7 @@ static MACHINE_CONFIG_FRAGMENT( segacd_fragment )
MCFG_TIMER_DRIVER_ADD("stamp_timer", sega_segacd_device, segacd_gfx_conversion_timer_callback)
MCFG_TIMER_DRIVER_ADD("scd_dma_timer", sega_segacd_device, scd_dma_timer_callback)
MCFG_DEFAULT_LAYOUT( layout_megacd )
@ -1100,7 +1100,7 @@ void sega_segacd_device::CDD_Import(running_machine& machine)
WRITE16_MEMBER( sega_segacd_device::scd_a12000_halt_reset_w )
{
UINT16 old_halt = a12000_halt_reset_reg;
@ -1170,7 +1170,7 @@ READ16_MEMBER( sega_segacd_device::scd_a12000_halt_reset_r )
READ16_MEMBER( sega_segacd_device::scd_a12002_memory_mode_r )
{
int temp = scd_rammode;
int temp2 = 0;
@ -1208,7 +1208,7 @@ WRITE8_MEMBER( sega_segacd_device::scd_a12002_memory_mode_w_8_15 )
WRITE8_MEMBER( sega_segacd_device::scd_a12002_memory_mode_w_0_7 )
{
//printf("scd_a12002_memory_mode_w_0_7 %04x\n",data);
@ -1234,7 +1234,7 @@ WRITE8_MEMBER( sega_segacd_device::scd_a12002_memory_mode_w_0_7 )
WRITE16_MEMBER( sega_segacd_device::scd_a12002_memory_mode_w )
{
if (ACCESSING_BITS_8_15)
scd_a12002_memory_mode_w_8_15(space, 0, data>>8, mem_mask>>8);
@ -1248,7 +1248,7 @@ WRITE16_MEMBER( sega_segacd_device::scd_a12002_memory_mode_w )
READ16_MEMBER( sega_segacd_device::segacd_sub_memory_mode_r )
{
int temp = scd_rammode;
int temp2 = 0;
@ -1270,7 +1270,7 @@ WRITE8_MEMBER( sega_segacd_device::segacd_sub_memory_mode_w_8_15 )
WRITE8_MEMBER( sega_segacd_device::segacd_sub_memory_mode_w_0_7 )
{
segacd_memory_priority_mode = (data&0x0018)>>3;
@ -1330,7 +1330,7 @@ WRITE8_MEMBER( sega_segacd_device::segacd_sub_memory_mode_w_0_7 )
WRITE16_MEMBER( sega_segacd_device::segacd_sub_memory_mode_w )
{
//printf("segacd_sub_memory_mode_w %04x %04x\n", data, mem_mask);
if (ACCESSING_BITS_8_15)
segacd_sub_memory_mode_w_8_15(space, 0, data>>8, mem_mask>>8);
@ -1352,13 +1352,13 @@ WRITE16_MEMBER( sega_segacd_device::segacd_sub_memory_mode_w )
READ16_MEMBER( sega_segacd_device::segacd_comms_flags_r )
{
return segacd_comms_flags;
}
WRITE16_MEMBER( sega_segacd_device::segacd_comms_flags_subcpu_w )
{
if (ACCESSING_BITS_8_15) // Dragon's Lair
{
@ -1374,7 +1374,7 @@ WRITE16_MEMBER( sega_segacd_device::segacd_comms_flags_subcpu_w )
WRITE16_MEMBER( sega_segacd_device::segacd_comms_flags_maincpu_w )
{
if (ACCESSING_BITS_8_15)
{
@ -1410,19 +1410,19 @@ WRITE16_MEMBER( sega_segacd_device::scd_4m_prgbank_ram_w )
READ16_MEMBER( sega_segacd_device::segacd_comms_main_part1_r )
{
return segacd_comms_part1[offset];
}
WRITE16_MEMBER( sega_segacd_device::segacd_comms_main_part1_w )
{
COMBINE_DATA(&segacd_comms_part1[offset]);
}
READ16_MEMBER( sega_segacd_device::segacd_comms_main_part2_r )
{
return segacd_comms_part2[offset];
}
@ -1434,7 +1434,7 @@ WRITE16_MEMBER( sega_segacd_device::segacd_comms_main_part2_w )
READ16_MEMBER( sega_segacd_device::segacd_comms_sub_part1_r )
{
return segacd_comms_part1[offset];
}
@ -1445,13 +1445,13 @@ WRITE16_MEMBER( sega_segacd_device::segacd_comms_sub_part1_w )
READ16_MEMBER( sega_segacd_device::segacd_comms_sub_part2_r )
{
return segacd_comms_part2[offset];
}
WRITE16_MEMBER( sega_segacd_device::segacd_comms_sub_part2_w )
{
COMBINE_DATA(&segacd_comms_part2[offset]);
}
@ -1620,13 +1620,13 @@ READ16_MEMBER( sega_segacd_device::scd_hint_vector_r )
READ16_MEMBER( sega_segacd_device::scd_a12006_hint_register_r )
{
return segacd_hint_register;
}
WRITE16_MEMBER( sega_segacd_device::scd_a12006_hint_register_w )
{
COMBINE_DATA(&segacd_hint_register);
}
@ -2129,7 +2129,7 @@ WRITE16_MEMBER( sega_segacd_device::segacd_sub_dataram_part2_w )
READ16_MEMBER( sega_segacd_device::segacd_irq_mask_r )
{
return segacd_irq_mask;
}
@ -2138,7 +2138,7 @@ WRITE16_MEMBER( sega_segacd_device::segacd_irq_mask_w )
if (ACCESSING_BITS_0_7)
{
UINT16 control = CDD_CONTROL;
// printf("segacd_irq_mask_w %04x %04x (CDD control is %04x)\n",data, mem_mask, control);
if (data & 0x10)
@ -2166,7 +2166,7 @@ WRITE16_MEMBER( sega_segacd_device::segacd_irq_mask_w )
READ16_MEMBER( sega_segacd_device::segacd_cdd_ctrl_r )
{
return CDD_CONTROL;
}
@ -2176,7 +2176,7 @@ WRITE16_MEMBER( sega_segacd_device::segacd_cdd_ctrl_w )
if (ACCESSING_BITS_0_7)
{
UINT16 control = CDD_CONTROL;
//printf("segacd_cdd_ctrl_w %04x %04x (control %04x irq %04x\n", data, mem_mask, control, segacd_irq_mask);
@ -2580,13 +2580,13 @@ void sega_segacd_device::device_start()
segacd_irq3_timer = machine().device<timer_device>(":segacd:irq3_timer");
address_space& space = machine().device("maincpu")->memory().space(AS_PROGRAM);
segacd_font_bits = reinterpret_cast<UINT16 *>(machine().root_device().memshare(":segacd:segacd_font")->ptr());
segacd_backupram = reinterpret_cast<UINT16 *>(machine().root_device().memshare(":segacd:backupram")->ptr());
segacd_dataram = reinterpret_cast<UINT16 *>(machine().root_device().memshare(":segacd:dataram")->ptr());
// segacd_dataram2 = reinterpret_cast<UINT16 *>(machine().root_device().memshare(":segacd:dataram2")->ptr());
// segacd_dataram2 = reinterpret_cast<UINT16 *>(machine().root_device().memshare(":segacd:dataram2")->ptr());
segacd_4meg_prgram = reinterpret_cast<UINT16 *>(machine().root_device().memshare(":segacd:segacd_program")->ptr());
segacd_4meg_prgbank = 0;
@ -2618,7 +2618,7 @@ void sega_segacd_device::device_start()
space.install_read_handler (0x0000070, 0x0000073, read16_delegate(FUNC(sega_segacd_device::scd_hint_vector_r),this) );
@ -2698,7 +2698,7 @@ void sega_segacd_device::device_reset()
// initialize some stuff on reset
segacd_ram_writeprotect_bits = 0;
segacd_4meg_prgbank = 0;
segacd_memory_priority_mode = 0;

12
src/mame/machine/megacd.h
View File

@ -370,7 +370,7 @@ public:
UINT16 segacd_imagebuffer_start_address;
UINT16 segacd_imagebuffer_offset;
UINT16 segacd_comms_flags;// = 0x0000;
UINT16 segacd_comms_part1[0x8];
UINT16 segacd_comms_part2[0x8];
@ -422,7 +422,7 @@ public:
UINT32 CDD_EXT;
UINT16 CDD_CONTROL;
INT16 CDD_DONE;
TIMER_DEVICE_CALLBACK_MEMBER( segacd_irq3_timer_callback );
TIMER_DEVICE_CALLBACK_MEMBER( scd_dma_timer_callback );
TIMER_DEVICE_CALLBACK_MEMBER( segacd_access_timer_callback );
@ -480,7 +480,7 @@ public:
void SCD_GET_TILE_INFO_32x32_1x1( int& tile_region, int& tileno, int tile_index );
void SCD_GET_TILE_INFO_16x16_16x16( int& tile_region, int& tileno, int tile_index );
void SCD_GET_TILE_INFO_32x32_16x16( int& tile_region, int& tileno, int tile_index );
TILE_GET_INFO_MEMBER( get_stampmap_16x16_1x1_tile_info );
TILE_GET_INFO_MEMBER( get_stampmap_32x32_1x1_tile_info );
TILE_GET_INFO_MEMBER( get_stampmap_16x16_16x16_tile_info );
@ -556,9 +556,9 @@ public:
WRITE16_MEMBER( segacd_stampmap_base_address_w );
READ16_MEMBER( segacd_imagebuffer_start_address_r );
WRITE16_MEMBER( segacd_imagebuffer_start_address_w );
READ16_MEMBER( segacd_imagebuffer_offset_r );
READ16_MEMBER( segacd_imagebuffer_offset_r );
WRITE16_MEMBER( segacd_imagebuffer_offset_w );
READ16_MEMBER( segacd_imagebuffer_vcell_size_r );
READ16_MEMBER( segacd_imagebuffer_vcell_size_r );
WRITE16_MEMBER( segacd_imagebuffer_vcell_size_w );
READ16_MEMBER( segacd_imagebuffer_hdot_size_r );
WRITE16_MEMBER( segacd_imagebuffer_hdot_size_w );
@ -569,7 +569,7 @@ public:
READ16_MEMBER( segacd_cdfader_r );
WRITE16_MEMBER( segacd_cdfader_w );
READ16_MEMBER( segacd_backupram_r );
WRITE16_MEMBER( segacd_backupram_w );
WRITE16_MEMBER( segacd_backupram_w );
READ16_MEMBER( segacd_font_color_r );
WRITE16_MEMBER( segacd_font_color_w );
READ16_MEMBER( segacd_font_converted_r );

8
src/mame/machine/pcecommn.h
View File

@ -18,13 +18,13 @@ public:
: driver_device(mconfig, type, tag) { }
DECLARE_WRITE8_MEMBER(pce_joystick_w);
DECLARE_READ8_MEMBER(pce_joystick_r);
DECLARE_READ8_MEMBER(pce_joystick_r);
DECLARE_DRIVER_INIT(pce_common);
virtual UINT8 joy_read();
private:
UINT8 m_io_port_options; /*driver-specific options for the PCE*/
UINT8 m_io_port_options; /*driver-specific options for the PCE*/
int m_joystick_port_select; /* internal index of joystick ports */
int m_joystick_data_select; /* which nibble of joystick data we want */
};

28
src/mame/machine/seicop.c
View File

@ -2048,10 +2048,10 @@ static void cop_take_hit_box_params(UINT8 offs)
{
height = UINT8(cop_collision_info[offs].hitbox_y >> 8);
start_y = INT8(cop_collision_info[offs].hitbox_y);
start_y = INT8(cop_collision_info[offs].hitbox_y);
width = UINT8(cop_collision_info[offs].hitbox_x >> 8);
start_x = INT8(cop_collision_info[offs].hitbox_x);
}
start_x = INT8(cop_collision_info[offs].hitbox_x);
}
cop_collision_info[offs].min_x = (cop_collision_info[offs].x >> 16) + start_x;
cop_collision_info[offs].max_x = cop_collision_info[offs].min_x + width;
@ -2089,8 +2089,8 @@ static UINT8 cop_calculate_collsion_detection(running_machine &machine)
//if(res == 0)
//popmessage("0:%08x %08x %08x 1:%08x %08x %08x\n",cop_collision_info[0].x,cop_collision_info[0].y,cop_collision_info[0].hitbox,cop_collision_info[1].x,cop_collision_info[1].y,cop_collision_info[1].hitbox);
// popmessage("0:%08x %08x %08x %08x 1:%08x %08x %08x %08x\n",cop_collision_info[0].min_x,cop_collision_info[0].max_x,cop_collision_info[0].min_y, cop_collision_info[0].max_y,
// cop_collision_info[1].min_x,cop_collision_info[1].max_x,cop_collision_info[1].min_y, cop_collision_info[1].max_y);
// popmessage("0:%08x %08x %08x %08x 1:%08x %08x %08x %08x\n",cop_collision_info[0].min_x,cop_collision_info[0].max_x,cop_collision_info[0].min_y, cop_collision_info[0].max_y,
// cop_collision_info[1].min_x,cop_collision_info[1].max_x,cop_collision_info[1].min_y, cop_collision_info[1].max_y);
return res;
}
@ -2779,15 +2779,15 @@ static WRITE16_HANDLER( generic_cop_w )
cur_angle = INT8(space.read_byte(cop_register[0] + (0x34 ^ 3)));
//space.write_byte(cop_register[0] + (0^3),space.read_byte(cop_register[0] + (0^3)) & 0xfb); //correct?
/*
0x00 0x00 0x60 0x00
0x00 0x20 0x60 0x20
0x00 0x40 0x60 0x60
0x00 0x60 0x60 0x60
0x00 0x80 0x60 0xa0
0x00 0xa0 0x60 0xa0
0x00 0xc0 0x60 0xc0
0x00 0xe0 0x60 0xe0
*/
0x00 0x00 0x60 0x00
0x00 0x20 0x60 0x20
0x00 0x40 0x60 0x60
0x00 0x60 0x60 0x60
0x00 0x80 0x60 0xa0
0x00 0xa0 0x60 0xa0
0x00 0xc0 0x60 0xc0
0x00 0xe0 0x60 0xe0
*/
if(cur_angle > cop_angle_compare)
{

4
src/mame/video/awpvid.c
View File

@ -7,8 +7,8 @@
This is a primitive handler for generating reels with multiple symbols visible
hanging off steppers.c .
TODO: Add any lamping persistance simulations we need.
TODO: Add any lamping persistance simulations we need.
**************************************************************************************/

10
src/mame/video/dkong.c
View File

@ -129,7 +129,7 @@ static const res_net_info radarscp_net_info =
{
{ RES_NET_AMP_DARLINGTON, 470 * TRS_J1, 470*(1-TRS_J1), 3, { 1000, 470, 220 } },
{ RES_NET_AMP_DARLINGTON, 470 * TRS_J1, 470*(1-TRS_J1), 3, { 1000, 470, 220 } },
{ RES_NET_AMP_EMITTER, 680 * TRS_J1, 680*(1-TRS_J1), 2, { 470, 220, 0 } } /* radarscp */
{ RES_NET_AMP_EMITTER, 680 * TRS_J1, 680*(1-TRS_J1), 2, { 470, 220, 0 } } /* radarscp */
}
};
@ -139,7 +139,7 @@ static const res_net_info radarscp_net_bck_info =
{
{ RES_NET_AMP_DARLINGTON, 470, 4700, 0, { 0 } },
{ RES_NET_AMP_DARLINGTON, 470, 4700, 0, { 0 } },
{ RES_NET_AMP_EMITTER, 470, 4700, 0, { 0 } } /* radarscp */
{ RES_NET_AMP_EMITTER, 470, 4700, 0, { 0 } } /* radarscp */
}
};
@ -713,9 +713,9 @@ static void radarscp_step(running_machine &machine, int line_cnt)
int sig;
/* vsync is divided by 2 by a LS161
* The resulting 30 Hz signal clocks a LFSR (LS164) operating as a
* random number generator.
*/
* The resulting 30 Hz signal clocks a LFSR (LS164) operating as a
* random number generator.
*/
if ( line_cnt == 0)
{

4
src/mame/video/jack.c
View File

@ -133,12 +133,12 @@ WRITE8_MEMBER(jack_state::joinem_scroll_w)
case 0:
m_bg_tilemap->set_scrolly(offset >> 2, -data);
break;
// byte 1/2/3: no effect?
default:
break;
}
m_scrollram[offset] = data;
}

6
src/mame/video/ninjakd2.c
View File

@ -1,7 +1,7 @@
/******************************************************************************
UPL "sprite framebuffer" hardware
Functions to emulate the video hardware
******************************************************************************/
@ -118,7 +118,7 @@ void ninjakd2_state::video_init_common(UINT32 vram_alloc_size)
m_robokid_bg0_videoram = auto_alloc_array_clear(machine(), UINT8, vram_alloc_size);
m_robokid_bg1_videoram = auto_alloc_array_clear(machine(), UINT8, vram_alloc_size);
m_robokid_bg2_videoram = auto_alloc_array_clear(machine(), UINT8, vram_alloc_size);
save_pointer(NAME(m_robokid_bg0_videoram), vram_alloc_size);
save_pointer(NAME(m_robokid_bg1_videoram), vram_alloc_size);
save_pointer(NAME(m_robokid_bg2_videoram), vram_alloc_size);
@ -352,7 +352,7 @@ static void draw_sprites(running_machine& machine, bitmap_ind16 &bitmap)
counts as one sprite drawn.
This is proven by Mutant Night, which doesn't work correctly (leaves shots
on screen) if we don't take big sprites into account.
*/
*/
for (;;)
{

18
src/mess/drivers/a2600.c
View File

@ -47,8 +47,8 @@ public:
a2600_state(const machine_config &mconfig, device_type type, const char *tag)
: driver_device(mconfig, type, tag)
, m_riot_ram(*this, "riot_ram")
// , m_joy1(*this, CONTROL1_TAG)
// , m_joy2(*this, CONTROL2_TAG)
// , m_joy1(*this, CONTROL1_TAG)
// , m_joy2(*this, CONTROL2_TAG)
{ }
dpc_t m_dpc;
@ -128,8 +128,8 @@ public:
DECLARE_READ8_MEMBER(riot_input_port_8_r);
protected:
// required_device<vcs_control_port_device> m_joy1;
// required_device<vcs_control_port_device> m_joy2;
// required_device<vcs_control_port_device> m_joy1;
// required_device<vcs_control_port_device> m_joy2;
int next_bank();
void modeF8_switch(UINT16 offset, UINT8 data);
void modeFA_switch(UINT16 offset, UINT8 data);
@ -1276,7 +1276,7 @@ READ8_MEMBER(a2600_state::switch_A_r)
case 0x00: /* Joystick */
case 0x05: /* Joystick w/Boostergrip */
val |= machine().root_device().ioport("SWA_JOY")->read() & 0xF0;
// val |= ( m_joy1->joy_r() & 0x0F ) << 4;
// val |= ( m_joy1->joy_r() & 0x0F ) << 4;
break;
case 0x01: /* Paddle */
val |= machine().root_device().ioport("SWA_PAD")->read() & 0xF0;
@ -2315,8 +2315,8 @@ static MACHINE_CONFIG_START( a2600, a2600_state )
/* devices */
MCFG_RIOT6532_ADD("riot", MASTER_CLOCK_NTSC / 3, r6532_interface)
// MCFG_VCS_CONTROL_PORT_ADD(CONTROL1_TAG, vcs_control_port_devices, NULL, NULL)
// MCFG_VCS_CONTROL_PORT_ADD(CONTROL2_TAG, vcs_control_port_devices, NULL, NULL)
// MCFG_VCS_CONTROL_PORT_ADD(CONTROL1_TAG, vcs_control_port_devices, NULL, NULL)
// MCFG_VCS_CONTROL_PORT_ADD(CONTROL2_TAG, vcs_control_port_devices, NULL, NULL)
MCFG_FRAGMENT_ADD(a2600_cartslot)
MCFG_SOFTWARE_LIST_FILTER("cart_list", "NTSC")
@ -2351,8 +2351,8 @@ static MACHINE_CONFIG_START( a2600p, a2600_state )
/* devices */
MCFG_RIOT6532_ADD("riot", MASTER_CLOCK_PAL / 3, r6532_interface)
// MCFG_VCS_CONTROL_PORT_ADD(CONTROL1_TAG, vcs_control_port_devices, NULL, NULL)
// MCFG_VCS_CONTROL_PORT_ADD(CONTROL2_TAG, vcs_control_port_devices, NULL, NULL)
// MCFG_VCS_CONTROL_PORT_ADD(CONTROL1_TAG, vcs_control_port_devices, NULL, NULL)
// MCFG_VCS_CONTROL_PORT_ADD(CONTROL2_TAG, vcs_control_port_devices, NULL, NULL)
MCFG_FRAGMENT_ADD(a2600_cartslot)
MCFG_SOFTWARE_LIST_FILTER("cart_list", "PAL")

2
src/mess/drivers/ami1200.c
View File

@ -326,7 +326,7 @@ static MACHINE_CONFIG_START( a1200n, ami1200_state )
MCFG_FLOPPY_DRIVE_ADD("fd1", amiga_floppies, 0, 0, amiga_fdc::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fd2", amiga_floppies, 0, 0, amiga_fdc::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fd3", amiga_floppies, 0, 0, amiga_fdc::floppy_formats)
MCFG_AMIGA_KEYBOARD_ADD("kbd")
MACHINE_CONFIG_END

2
src/mess/drivers/amiga.c
View File

@ -424,7 +424,7 @@ static MACHINE_CONFIG_START( ntsc, amiga_state )
MCFG_FLOPPY_DRIVE_ADD("fd1", amiga_floppies, 0, 0, amiga_fdc::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fd2", amiga_floppies, 0, 0, amiga_fdc::floppy_formats)
MCFG_FLOPPY_DRIVE_ADD("fd3", amiga_floppies, 0, 0, amiga_fdc::floppy_formats)
MCFG_AMIGA_KEYBOARD_ADD("kbd")
MACHINE_CONFIG_END

2
src/mess/drivers/astrocde.c
View File

@ -17,7 +17,7 @@ class astrocde_mess_state : public astrocde_state
{
public:
astrocde_mess_state(const machine_config &mconfig, device_type type, const char *tag)
: astrocde_state(mconfig, type, tag)
: astrocde_state(mconfig, type, tag)
{ }
void get_ram_expansion_settings(int &ram_expansion_installed, int &write_protect_on, int &expansion_ram_start, int &expansion_ram_end, int &shadow_ram_end);

4
src/mess/drivers/bml3.c
View File

@ -111,7 +111,7 @@ protected:
virtual void machine_start();
virtual void video_start();
virtual void palette_init();
public:
public:
UINT32 screen_update_bml3(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
INTERRUPT_GEN_MEMBER(bml3_irq);
INTERRUPT_GEN_MEMBER(bml3_timer_firq);
@ -893,7 +893,7 @@ static MACHINE_CONFIG_START( bml3, bml3_state )
MCFG_CPU_ADD("maincpu",M6809, XTAL_1MHz)
MCFG_CPU_PROGRAM_MAP(bml3_mem)
MCFG_CPU_VBLANK_INT_DRIVER("screen", bml3_state, bml3_timer_firq)
// MCFG_CPU_PERIODIC_INT_DRIVER(bml3_state, bml3_firq, 45)
// MCFG_CPU_PERIODIC_INT_DRIVER(bml3_state, bml3_firq, 45)
// MCFG_MACHINE_RESET_OVERRIDE(bml3_state,bml3)

4
src/mess/drivers/c128.c
View File

@ -969,7 +969,7 @@ static const mc6845_interface vdc_intf =
READ8_MEMBER( c128_state::sid_potx_r )
{
UINT8 cia1_pa = m_cia1->pa_r();
int sela = BIT(cia1_pa, 6);
int selb = BIT(cia1_pa, 7);
@ -984,7 +984,7 @@ READ8_MEMBER( c128_state::sid_potx_r )
READ8_MEMBER( c128_state::sid_poty_r )
{
UINT8 cia1_pa = m_cia1->pa_r();
int sela = BIT(cia1_pa, 6);
int selb = BIT(cia1_pa, 7);

4
src/mess/drivers/c64.c
View File

@ -422,7 +422,7 @@ static MOS6567_INTERFACE( vic_intf )
READ8_MEMBER( c64_state::sid_potx_r )
{
UINT8 cia1_pa = m_cia1->pa_r();
int sela = BIT(cia1_pa, 6);
int selb = BIT(cia1_pa, 7);
@ -437,7 +437,7 @@ READ8_MEMBER( c64_state::sid_potx_r )
READ8_MEMBER( c64_state::sid_poty_r )
{
UINT8 cia1_pa = m_cia1->pa_r();
int sela = BIT(cia1_pa, 6);
int selb = BIT(cia1_pa, 7);

392
src/mess/drivers/cbm2.c
View File

@ -2,15 +2,15 @@
TODO:
- CIA timers fail in burn-in test
- NTSC variants unable to load from disk
- shift lock
- Hungarian keyboard
- cbm620hu charom banking?
- read VIC video/color RAM thru PLA (Sphi2 = 1, AE = 0)
- user port
- co-processor bus
- 8088 co-processor board
- CIA timers fail in burn-in test
- NTSC variants unable to load from disk
- shift lock
- Hungarian keyboard
- cbm620hu charom banking?
- read VIC video/color RAM thru PLA (Sphi2 = 1, AE = 0)
- user port
- co-processor bus
- 8088 co-processor board
*/
@ -45,7 +45,7 @@
// read_pla - low profile PLA read
//-------------------------------------------------
void cbm2_state::read_pla(offs_t offset, int ras, int cas, int refen, int eras, int ecas, int busy2,
void cbm2_state::read_pla(offs_t offset, int ras, int cas, int refen, int eras, int ecas, int busy2,
int *casseg1, int *casseg2, int *casseg3, int *casseg4, int *rasseg1, int *rasseg2, int *rasseg3, int *rasseg4)
{
UINT32 input = P0 << 15 | P1 << 14 | P2 << 13 | P3 << 12 | busy2 << 11 | eras << 10 | ecas << 9 | refen << 8 | cas << 7 | ras << 6;
@ -66,7 +66,7 @@ void cbm2_state::read_pla(offs_t offset, int ras, int cas, int refen, int eras,
// read_pla - high profile PLA read
//-------------------------------------------------
void cbm2hp_state::read_pla(offs_t offset, int ras, int cas, int refen, int eras, int ecas, int busy2,
void cbm2hp_state::read_pla(offs_t offset, int ras, int cas, int refen, int eras, int ecas, int busy2,
int *casseg1, int *casseg2, int *casseg3, int *casseg4, int *rasseg1, int *rasseg2, int *rasseg3, int *rasseg4)
{
UINT32 input = ras << 13 | cas << 12 | refen << 11 | eras << 10 | ecas << 9 | busy2 << 8 | P3 << 3 | P2 << 2 | P1 << 1 | P0;
@ -88,7 +88,7 @@ void cbm2hp_state::read_pla(offs_t offset, int ras, int cas, int refen, int eras
//-------------------------------------------------
void cbm2_state::bankswitch(offs_t offset, int busy2, int eras, int ecas, int refen, int cas, int ras, int *sysioen, int *dramen,
int *casseg1, int *casseg2, int *casseg3, int *casseg4, int *buframcs, int *extbufcs, int *vidramcs,
int *casseg1, int *casseg2, int *casseg3, int *casseg4, int *buframcs, int *extbufcs, int *vidramcs,
int *diskromcs, int *csbank1, int *csbank2, int *csbank3, int *basiccs, int *knbcs, int *kernalcs,
int *crtccs, int *cs1, int *sidcs, int *extprtcs, int *ciacs, int *aciacs, int *tript1cs, int *tript2cs)
{
@ -333,7 +333,7 @@ void p500_state::read_pla1(offs_t offset, int bras, int busy2, int sphi2, int cl
{
UINT32 input = P0 << 15 | P2 << 14 | bras << 13 | P1 << 12 | P3 << 11 | busy2 << 10 | m_statvid << 9 | sphi2 << 8 |
clrnibcsb << 7 | m_dramon << 6 | procvid << 5 | refen << 4 | m_vicdotsel << 3 | ba << 2 | aec << 1 | srw;
UINT32 data = m_pla1->read(input);
*datxen = BIT(data, 0);
@ -356,7 +356,7 @@ void p500_state::read_pla2(offs_t offset, offs_t va, int ba, int sphi2, int vice
{
UINT32 input = VA12 << 15 | ba << 14 | A13 << 13 | A15 << 12 | A14 << 11 | A11 << 10 | A10 << 9 | A12 << 8 |
sphi2 << 7 | vicen << 6 | m_statvid << 5 | m_vicdotsel << 4 | ae << 3 | segf << 2 | bcas << 1 | bank0;
UINT32 data = m_pla2->read(input);
*clrnibcsb = BIT(data, 0);
@ -385,7 +385,7 @@ void p500_state::bankswitch(offs_t offset, offs_t va, int srw, int sphi0, int sp
int clrnibcsb = 1, procvid = 1, segf = 1;
read_pla1(offset, bras, busy2, sphi2, clrnibcsb, procvid, refen, ba, *aec, srw,
read_pla1(offset, bras, busy2, sphi2, clrnibcsb, procvid, refen, ba, *aec, srw,
datxen, dramxen, clrniben, &segf, _64kcasen, casenb, viddaten, viddat_tr);
int bank0 = 1, vicen = 1;
@ -429,7 +429,7 @@ void p500_state::bankswitch(offs_t offset, offs_t va, int srw, int sphi0, int sp
*clrnibcs = clrnibcsb || bcas;
*vidmatcs = vidmatcsb || bcas;
read_pla1(offset, bras, busy2, sphi2, clrnibcsb, procvid, refen, ba, *aec, srw,
read_pla1(offset, bras, busy2, sphi2, clrnibcsb, procvid, refen, ba, *aec, srw,
datxen, dramxen, clrniben, &segf, _64kcasen, casenb, viddaten, viddat_tr);
}
@ -441,7 +441,7 @@ void p500_state::bankswitch(offs_t offset, offs_t va, int srw, int sphi0, int sp
UINT8 p500_state::read_memory(address_space &space, offs_t offset, offs_t va, int sphi0, int sphi1, int sphi2, int ba, int ae, int bras, int bcas, UINT8 *clrnib)
{
int srw = 1, busy2 = 1, refen = 0;
int datxen = 1, dramxen = 1, clrniben = 1, _64kcasen = 1, casenb = 1, viddaten = 1, viddat_tr = 1;
int clrnibcs = 1, extbufcs = 1, discromcs = 1, buframcs = 1, charomcs = 1, viccs = 1, vidmatcs = 1;
int csbank1 = 1, csbank2 = 1, csbank3 = 1, basiclocs = 1, basichics = 1, kernalcs = 1;
@ -476,7 +476,7 @@ UINT8 p500_state::read_memory(address_space &space, offs_t offset, offs_t va, in
data = m_charom[va & 0xfff];
}
}
if (clrniben)
{
if (!clrnibcs && !vsysaden)
@ -564,7 +564,7 @@ void p500_state::write_memory(address_space &space, offs_t offset, UINT8 data, i
{
int srw = 0, busy2 = 1, refen = 0;
offs_t va = 0xffff;
int datxen = 1, dramxen = 1, clrniben = 1, _64kcasen = 1, casenb = 1, viddaten = 1, viddat_tr = 1;
int clrnibcs = 1, extbufcs = 1, discromcs = 1, buframcs = 1, charomcs = 1, viccs = 1, vidmatcs = 1;
int csbank1 = 1, csbank2 = 1, csbank3 = 1, basiclocs = 1, basichics = 1, kernalcs = 1;
@ -675,25 +675,25 @@ WRITE8_MEMBER( p500_state::write )
READ8_MEMBER( p500_state::vic_videoram_r )
{
/*
int sphi0 = 0, sphi1 = 1, sphi2 = 0, ba = 1, ae = 0, bras = 0, bcas = 0;
offs_t va = offset;
int sphi0 = 0, sphi1 = 1, sphi2 = 0, ba = 1, ae = 0, bras = 0, bcas = 0;
offs_t va = offset;
return read_memory(space, 0, va, sphi0, sphi1, sphi2, ba, ae, bras, bcas);
*/
return read_memory(space, 0, va, sphi0, sphi1, sphi2, ba, ae, bras, bcas);
*/
/*
int ba = 1, ae = 0, bras = 1, bcas = 0;
UINT8 clrnib = 0xf;
int ba = 1, ae = 0, bras = 1, bcas = 0;
UINT8 clrnib = 0xf;
if (offset < 0x1000)
{
return read_memory(space, 0, offset, 0, 1, 0, ba, ae, bras, bcas, &clrnib);
}
else
{
return read_memory(space, 0, offset, 1, 0, 1, ba, ae, bras, bcas, &clrnib);
}
*/
if (offset < 0x1000)
{
return read_memory(space, 0, offset, 0, 1, 0, ba, ae, bras, bcas, &clrnib);
}
else
{
return read_memory(space, 0, offset, 1, 0, 1, ba, ae, bras, bcas, &clrnib);
}
*/
if (offset < 0x1000)
{
return m_charom[offset & 0xfff];
@ -961,7 +961,7 @@ static MC6845_UPDATE_ROW( lp_crtc_update_row )
{
int color = BIT(data, 7) ^ BIT(code, 7) ^ BIT(ma, 13);
if (cursor_x == column) color ^= 1;
bitmap.pix32(y, x++) = RGB_MONOCHROME_GREEN[color];
data <<= 1;
@ -1000,7 +1000,7 @@ static MC6845_UPDATE_ROW( hp_crtc_update_row )
{
int color = BIT(data, 7) ^ BIT(code, 7) ^ BIT(ma, 13);
if (cursor_x == column) color ^= 1;
bitmap.pix32(y, x++) = RGB_MONOCHROME_GREEN[color];
data <<= 1;
@ -1106,19 +1106,19 @@ WRITE_LINE_MEMBER( p500_state::tpi1_irq_w )
READ8_MEMBER( cbm2_state::tpi1_pa_r )
{
/*
bit description
0 0
1 0
2 REN
3 ATN
4 DAV
5 EOI
6 NDAC
7 NRFD
*/
bit description
0 0
1 0
2 REN
3 ATN
4 DAV
5 EOI
6 NDAC
7 NRFD
*/
UINT8 data = 0;
@ -1136,19 +1136,19 @@ READ8_MEMBER( cbm2_state::tpi1_pa_r )
WRITE8_MEMBER( cbm2_state::tpi1_pa_w )
{
/*
bit description
0 75161A DC
1 75161A TE
2 REN
3 ATN
4 DAV
5 EOI
6 NDAC
7 NRFD
*/
bit description
0 75161A DC
1 75161A TE
2 REN
3 ATN
4 DAV
5 EOI
6 NDAC
7 NRFD
*/
// IEEE-488
m_ieee2->dc_w(BIT(data, 0));
@ -1167,26 +1167,26 @@ WRITE8_MEMBER( cbm2_state::tpi1_pa_w )
READ8_MEMBER( cbm2_state::tpi1_pb_r )
{
/*
bit description
0 IFC
1 SRQ
2 user port PB2
3 user port PB3
4
5
6
7 CASS SW
*/
bit description
0 IFC
1 SRQ
2 user port PB2
3 user port PB3
4
5
6
7 CASS SW
*/
UINT8 data = 0;
// IEEE-488
data |= m_ieee2->ifc_r();
data |= m_ieee2->srq_r() << 1;
// user port
//data |= m_user->pb2_r() << 2;
//data |= m_user->pb3_r() << 3;
@ -1200,23 +1200,23 @@ READ8_MEMBER( cbm2_state::tpi1_pb_r )
WRITE8_MEMBER( cbm2_state::tpi1_pb_w )
{
/*
bit description
0 IFC
1 SRQ
2 user port PB2
3 user port PB3
4 DRAMON
5 CASS WRT
6 CASS MTR
7
*/
bit description
0 IFC
1 SRQ
2 user port PB2
3 user port PB3
4 DRAMON
5 CASS WRT
6 CASS MTR
7
*/
// IEEE-488
m_ieee2->ifc_w(BIT(data, 0));
m_ieee2->srq_w(BIT(data, 1));
m_ieee2->ifc_w(BIT(data, 0));
m_ieee2->srq_w(BIT(data, 1));
// user port
//m_user->pb2_w(BIT(data, 2));
@ -1313,19 +1313,19 @@ WRITE8_MEMBER( cbm2_state::tpi2_pb_w )
READ8_MEMBER( cbm2_state::tpi2_pc_r )
{
/*
bit description
0 COLUMN 0
1 COLUMN 1
2 COLUMN 2
3 COLUMN 3
4 COLUMN 4
5 COLUMN 5
6 0=PAL, 1=NTSC
7 0
*/
bit description
0 COLUMN 0
1 COLUMN 1
2 COLUMN 2
3 COLUMN 3
4 COLUMN 4
5 COLUMN 5
6 0=PAL, 1=NTSC
7 0
*/
return (m_ntsc << 6) | (read_keyboard() & 0x3f);
}
@ -1333,19 +1333,19 @@ READ8_MEMBER( cbm2_state::tpi2_pc_r )
READ8_MEMBER( cbm2hp_state::tpi2_pc_r )
{
/*
bit description
0 COLUMN 0
1 COLUMN 1
2 COLUMN 2
3 COLUMN 3
4 COLUMN 4
5 COLUMN 5
6 1
7 1
*/
bit description
0 COLUMN 0
1 COLUMN 1
2 COLUMN 2
3 COLUMN 3
4 COLUMN 4
5 COLUMN 5
6 1
7 1
*/
return read_keyboard();
}
@ -1353,19 +1353,19 @@ READ8_MEMBER( cbm2hp_state::tpi2_pc_r )
READ8_MEMBER( p500_state::tpi2_pc_r )
{
/*
bit description
0 COLUMN 0
1 COLUMN 1
2 COLUMN 2
3 COLUMN 3
4 COLUMN 4
5 COLUMN 5
6 0
7 0
*/
bit description
0 COLUMN 0
1 COLUMN 1
2 COLUMN 2
3 COLUMN 3
4 COLUMN 4
5 COLUMN 5
6 0
7 0
*/
return read_keyboard();
}
@ -1373,19 +1373,19 @@ READ8_MEMBER( p500_state::tpi2_pc_r )
WRITE8_MEMBER( p500_state::tpi2_pc_w )
{
/*
bit description
0
1
2
3
4
5
6 VICBNKSEL0
7 VICBNKSEL1
*/
bit description
0
1
2
3
4
5
6 VICBNKSEL0
7 VICBNKSEL1
*/
m_vicbnksel = data >> 6;
}
@ -1437,19 +1437,19 @@ static const tpi6525_interface p500_tpi2_intf =
READ8_MEMBER( cbm2_state::cia_pa_r )
{
/*
bit description
0 IEEE-488 D0, user port 1D0
1 IEEE-488 D1, user port 1D1
2 IEEE-488 D2, user port 1D2
3 IEEE-488 D3, user port 1D3
4 IEEE-488 D4, user port 1D4
5 IEEE-488 D5, user port 1D5
6 IEEE-488 D6, user port 1D6, LTPN
7 IEEE-488 D7, user port 1D7, GAME TRIGGER 24
*/
bit description
0 IEEE-488 D0, user port 1D0
1 IEEE-488 D1, user port 1D1
2 IEEE-488 D2, user port 1D2
3 IEEE-488 D3, user port 1D3
4 IEEE-488 D4, user port 1D4
5 IEEE-488 D5, user port 1D5
6 IEEE-488 D6, user port 1D6, LTPN
7 IEEE-488 D7, user port 1D7, GAME TRIGGER 24
*/
UINT8 data = 0;
@ -1469,19 +1469,19 @@ READ8_MEMBER( cbm2_state::cia_pa_r )
WRITE8_MEMBER( cbm2_state::cia_pa_w )
{
/*
bit description
0 IEEE-488 D0, user port 1D0
1 IEEE-488 D1, user port 1D1
2 IEEE-488 D2, user port 1D2
3 IEEE-488 D3, user port 1D3
4 IEEE-488 D4, user port 1D4
5 IEEE-488 D5, user port 1D5
6 IEEE-488 D6, user port 1D6
7 IEEE-488 D7, user port 1D7
*/
bit description
0 IEEE-488 D0, user port 1D0
1 IEEE-488 D1, user port 1D1
2 IEEE-488 D2, user port 1D2
3 IEEE-488 D3, user port 1D3
4 IEEE-488 D4, user port 1D4
5 IEEE-488 D5, user port 1D5
6 IEEE-488 D6, user port 1D6
7 IEEE-488 D7, user port 1D7
*/
// IEEE-488
m_ieee1->write(space, 0, data);
@ -1496,19 +1496,19 @@ WRITE8_MEMBER( cbm2_state::cia_pa_w )
READ8_MEMBER( cbm2_state::cia_pb_r )
{
/*
bit description
0 user port 2D0, GAME10
1 user port 2D1, GAME11
2 user port 2D2, GAME12
3 user port 2D3, GAME13
4 user port 2D4, GAME20
5 user port 2D5, GAME21
6 user port 2D6, GAME22
7 user port 2D7, GAME23
*/
bit description
0 user port 2D0, GAME10
1 user port 2D1, GAME11
2 user port 2D2, GAME12
3 user port 2D3, GAME13
4 user port 2D4, GAME20
5 user port 2D5, GAME21
6 user port 2D6, GAME22
7 user port 2D7, GAME23
*/
UINT8 data = 0;
@ -1525,19 +1525,19 @@ READ8_MEMBER( cbm2_state::cia_pb_r )
WRITE8_MEMBER( cbm2_state::cia_pb_w )
{
/*
bit description
0 user port 2D0
1 user port 2D1
2 user port 2D2
3 user port 2D3
4 user port 2D4
5 user port 2D5
6 user port 2D6
7 user port 2D7
*/
bit description
0 user port 2D0
1 user port 2D1
2 user port 2D2
3 user port 2D3
4 user port 2D4
5 user port 2D5
6 user port 2D6
7 user port 2D7
*/
//m_user->data2_w(data);
}

2
src/mess/drivers/d6800.c
View File

@ -78,7 +78,7 @@ private:
UINT8 m_portb;
virtual void machine_start();
virtual void machine_reset();
public:
public:
UINT32 screen_update_d6800(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
TIMER_DEVICE_CALLBACK_MEMBER(d6800_p);
};

2
src/mess/drivers/elwro800.c
View File

@ -49,7 +49,7 @@ public:
DECLARE_WRITE8_MEMBER(elwro800jr_fdc_control_w);
DECLARE_READ8_MEMBER(elwro800jr_io_r);
DECLARE_WRITE8_MEMBER(elwro800jr_io_w);
DECLARE_MACHINE_RESET(elwro800);
DECLARE_MACHINE_RESET(elwro800);
INTERRUPT_GEN_MEMBER(elwro800jr_interrupt);
DECLARE_READ8_MEMBER(i8255_port_c_r);
DECLARE_WRITE8_MEMBER(i8255_port_c_w);

4
src/mess/drivers/indiana.c
View File

@ -37,8 +37,8 @@ static ADDRESS_MAP_START(indiana_mem, AS_PROGRAM, 32, indiana_state)
AM_RANGE(0x7f6003b0, 0x7f6003bf) AM_DEVREADWRITE8("vga", vga_device, port_03b0_r, port_03b0_w, 0xffffffff)
AM_RANGE(0x7f6003c0, 0x7f6003cf) AM_DEVREADWRITE8("vga", vga_device, port_03c0_r, port_03c0_w, 0xffffffff)
AM_RANGE(0x7f6003d0, 0x7f6003df) AM_DEVREADWRITE8("vga", vga_device, port_03d0_r, port_03d0_w, 0xffffffff)
AM_RANGE(0x7f7a0000, 0x7f7bffff) AM_DEVREADWRITE8("vga", vga_device, mem_r, mem_w, 0xffffffff)
AM_RANGE(0x80000000, 0x803fffff) AM_MIRROR(0x7fc00000) AM_RAM // 4 MB RAM
AM_RANGE(0x7f7a0000, 0x7f7bffff) AM_DEVREADWRITE8("vga", vga_device, mem_r, mem_w, 0xffffffff)
AM_RANGE(0x80000000, 0x803fffff) AM_MIRROR(0x7fc00000) AM_RAM // 4 MB RAM
ADDRESS_MAP_END

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