Fixed OPLx key scale level order [Alexey, Phil Bennett]

This commit is contained in:
Phil Bennett 2013-07-22 17:49:24 +00:00
parent 0f6af58847
commit 315cdded93
3 changed files with 43 additions and 39 deletions

View File

@ -387,6 +387,10 @@ static const UINT32 ksl_tab[8*16]=
};
#undef DV
/* 0 / 3.0 / 1.5 / 6.0 dB/OCT */
static const UINT32 ksl_shift[4] = { 31, 1, 2, 0 };
/* sustain level table (3dB per step) */
/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
#define SC(db) (UINT32) ( db * (2.0/ENV_STEP) )
@ -1395,9 +1399,8 @@ INLINE void set_ksl_tl(FM_OPL *OPL,int slot,int v)
{
OPL_CH *CH = &OPL->P_CH[slot/2];
OPL_SLOT *SLOT = &CH->SLOT[slot&1];
int ksl = v>>6; /* 0 / 1.5 / 3.0 / 6.0 dB/OCT */
SLOT->ksl = ksl ? 3-ksl : 31;
SLOT->ksl = ksl_shift[v >> 6];
SLOT->TL = (v&0x3f)<<(ENV_BITS-1-7); /* 7 bits TL (bit 6 = always 0) */
SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);

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@ -323,6 +323,10 @@ static const UINT32 ksl_tab[8*16]=
};
#undef DV
/* 0 / 3.0 / 1.5 / 6.0 dB/OCT */
static const UINT32 ksl_shift[4] = { 31, 1, 2, 0 };
/* sustain level table (3dB per step) */
/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,45 (dB)*/
#define SC(db) (UINT32) ( db * (1.0/ENV_STEP) )
@ -1475,14 +1479,11 @@ INLINE void set_mul(YM2413 *chip,int slot,int v)
/* set ksl, tl */
INLINE void set_ksl_tl(YM2413 *chip,int chan,int v)
{
int ksl;
OPLL_CH *CH = &chip->P_CH[chan];
/* modulator */
OPLL_SLOT *SLOT = &CH->SLOT[SLOT1];
ksl = v>>6; /* 0 / 1.5 / 3.0 / 6.0 dB/OCT */
SLOT->ksl = ksl ? 3-ksl : 31;
SLOT->ksl = ksl_shift[v >> 6];
SLOT->TL = (v&0x3f)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
}
@ -1490,7 +1491,6 @@ INLINE void set_ksl_tl(YM2413 *chip,int chan,int v)
/* set ksl , waveforms, feedback */
INLINE void set_ksl_wave_fb(YM2413 *chip,int chan,int v)
{
int ksl;
OPLL_CH *CH = &chip->P_CH[chan];
/* modulator */
OPLL_SLOT *SLOT = &CH->SLOT[SLOT1];
@ -1499,9 +1499,8 @@ INLINE void set_ksl_wave_fb(YM2413 *chip,int chan,int v)
/*carrier*/
SLOT = &CH->SLOT[SLOT2];
ksl = v>>6; /* 0 / 1.5 / 3.0 / 6.0 dB/OCT */
SLOT->ksl = ksl ? 3-ksl : 31;
SLOT->ksl = ksl_shift[v >> 6];
SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
SLOT->wavetable = ((v&0x10)>>4)*SIN_LEN;

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@ -340,6 +340,10 @@ static const UINT32 ksl_tab[8*16]=
};
#undef DV
/* 0 / 3.0 / 1.5 / 6.0 dB/OCT */
static const UINT32 ksl_shift[4] = { 31, 1, 2, 0 };
/* sustain level table (3dB per step) */
/* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,93 (dB)*/
#define SC(db) (UINT32) ( db * (2.0/ENV_STEP) )
@ -1498,9 +1502,7 @@ INLINE void set_ksl_tl(OPL3 *chip,int slot,int v)
OPL3_CH *CH = &chip->P_CH[slot/2];
OPL3_SLOT *SLOT = &CH->SLOT[slot&1];
int ksl = v>>6; /* 0 / 1.5 / 3.0 / 6.0 dB/OCT */
SLOT->ksl = ksl ? 3-ksl : 31;
SLOT->ksl = ksl_shift[v >> 6];
SLOT->TL = (v&0x3f)<<(ENV_BITS-1-7); /* 7 bits TL (bit 6 = always 0) */
if (chip->OPL3_mode & 1)