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hp9845: synchronizer in 9895 drive optimized a bit
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@ -19,7 +19,6 @@
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* floppy_image_device sometimes reports the wrong state for ready &
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wpt signals
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* IBM mode hasn't been tested yet
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* Synchronizer/AM detector could be optimized
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*********************************************************************/
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@ -94,8 +93,6 @@ enum {
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#define TIMEOUT_MSEC 450 // Timeout duration (ms)
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#define HPMODE_BIT_FREQ 500000 // HP-mode bit frequency (Hz)
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#define IBMMODE_BIT_FREQ 250000 // IBM-mode bit frequency (Hz)
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#define HPMODE_SYNC_MAX 2400 // Maximum distance of transitions to synchronize in HP mode (nsec)
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#define IBMMODE_SYNC_MIN 3400 // Minimum distance of transitions to synchronize in IBM mode (nsec)
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#define MIN_SYNC_BITS 29 // Number of bits to synchronize
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@ -164,7 +161,6 @@ void hp9895_device::device_start()
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save_item(NAME(m_lckup));
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save_item(NAME(m_amdt));
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save_item(NAME(m_sync_cnt));
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save_item(NAME(m_prev_transition));
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save_item(NAME(m_hiden));
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save_item(NAME(m_mgnena));
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@ -301,46 +297,40 @@ void hp9895_device::device_timer(emu_timer &timer, device_timer_id id, int param
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attotime edge;
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attotime tm;
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get_next_transition(m_pll.ctime, edge);
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bool half_bit = m_pll.feed_read_data(tm , edge , attotime::never);
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if (half_bit) {
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if (!m_prev_transition.is_never()) {
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attotime delta{ edge - m_prev_transition };
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LOG_0(("Time=%.7f, Prev @ %.7f, Edge @ %.7f, Delta=%.7f\n" , machine().time().as_double() , m_prev_transition.as_double() , edge.as_double() , delta.as_double()));
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if ((m_hiden && delta > attotime::from_nsec(HPMODE_SYNC_MAX)) ||
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(!m_hiden && delta < attotime::from_nsec(IBMMODE_SYNC_MIN))) {
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LOG_0(("Reset sync_cnt\n"));
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m_sync_cnt = 0;
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} else if (++m_sync_cnt >= MIN_SYNC_BITS) {
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// Synchronized, now wait for AM
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LOG_0(("Synchronized @ %.6f\n" , machine().time().as_double()));
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m_lckup = false;
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if (BIT(m_cntl_reg , REG_CNTL_WRITON_BIT)) {
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// When loopback is active, leave AM detection to byte timer as
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// byte boundary is already synchronized
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timer.reset();
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return;
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} else {
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// half_bit is 0 in the clock part of bit cell when in HP mode,
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// whereas it's 1 in IBM mode
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// Synchronization bits in HP mode: 32x 1s -> C/D bits = 01010101...
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// Synchronization bits in IBM mode: 32x 0s -> C/D bits = 10101010...
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if (!m_hiden) {
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// Discard 1/2 bit cell if synchronization achieved in the clock part
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get_next_transition(m_pll.ctime, edge);
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m_pll.feed_read_data(tm , edge , attotime::never);
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}
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// Load CSR & DSR as they are after synchronization bits
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if (m_hiden) {
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m_clock_sr = 0;
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m_data_sr = ~0;
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} else {
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m_clock_sr = ~0;
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m_data_sr = 0;
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}
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}
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bool half_bit0 = m_pll.feed_read_data(tm , edge , attotime::never);
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get_next_transition(m_pll.ctime, edge);
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bool half_bit1 = m_pll.feed_read_data(tm , edge , attotime::never);
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if (half_bit0 == half_bit1) {
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// If half bits are equal, no synch
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LOG_0(("Reset sync_cnt\n"));
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m_sync_cnt = 0;
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} else if (++m_sync_cnt >= MIN_SYNC_BITS) {
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// Synchronized, now wait for AM
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LOG_0(("Synchronized @ %.6f\n" , machine().time().as_double()));
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m_lckup = false;
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if (BIT(m_cntl_reg , REG_CNTL_WRITON_BIT)) {
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// When loopback is active, leave AM detection to byte timer as
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// byte boundary is already synchronized
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timer.reset();
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return;
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} else {
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// Align with bit cell
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// Synchronization bits in HP mode: 32x 1s -> C/D bits = 01010101...
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// Synchronization bits in IBM mode: 32x 0s -> C/D bits = 10101010...
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if (m_hiden != half_bit1) {
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// Discard 1/2 bit cell if synchronization achieved in the clock part
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get_next_transition(m_pll.ctime, edge);
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m_pll.feed_read_data(tm , edge , attotime::never);
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}
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// Load CSR & DSR as they are after synchronization bits
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if (m_hiden) {
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m_clock_sr = 0;
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m_data_sr = ~0;
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} else {
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m_clock_sr = ~0;
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m_data_sr = 0;
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}
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}
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m_prev_transition = edge;
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}
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} else {
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// Looking for AM
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@ -567,7 +557,6 @@ WRITE8_MEMBER(hp9895_device::cntl_w)
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LOG_0(("Start reading..\n"));
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m_pll.read_reset(machine().time());
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m_sync_cnt = 0;
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m_prev_transition = attotime::never;
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m_half_bit_timer->adjust(get_half_bit_cell_period());
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} else if (old_readon && !new_readon) {
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// Reading disabled
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@ -107,7 +107,6 @@ private:
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bool m_lckup;
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bool m_amdt;
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uint8_t m_sync_cnt; // U28 & U73
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attotime m_prev_transition;
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bool m_hiden;
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bool m_mgnena;
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#if 0
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