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added enum masks, disable bus errors

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This commit is contained in:
Patrick Mackinlay 2017-06-20 10:44:41 +07:00
parent 5f6d2c5e53
commit 31712cc379
2 changed files with 43 additions and 2 deletions
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6
src/mame/machine/interpro_sga.cpp
View File

@ -93,13 +93,14 @@ WRITE32_MEMBER(interpro_sga_device::ddtc1_w)
// when complete, we indicate by setting DMAEND(2) - 2 is probably the channel
// we also turn off the INTBERR and INTMMBE flags
m_ipoll &= ~(0x20000 | 0x10000);
m_ipoll &= ~(IPOLL_INTBERR | IPOLL_INTMMBE);
m_ipoll |= 0x200;
#if 0
// if the address is invalid, fake a bus error
if ((m_dspad1 & 0xfffff000) == 0x40000000 || (m_ddpad1 & 0xfffff) == 0x40000000)
{
m_ipoll |= 0x10000;
m_ipoll |= IPOLL_INTBERR;
// error cycle - bit 0x10 indicates source address error (dspad1)
// now expecting 0x5463?
@ -112,4 +113,5 @@ WRITE32_MEMBER(interpro_sga_device::ddtc1_w)
// 0x5433 = BERR|SNAPOK | BG(ICAMMU)? | CT(33)
// 0x5463 = BERR|SNAPOK | BG(ICAMMU)? | TAG(1) | CT(23)
}
#endif
}

39
src/mame/machine/interpro_sga.h
View File

@ -20,21 +20,60 @@ public:
DECLARE_READ32_MEMBER(gcsr_r) { return m_gcsr; }
DECLARE_WRITE32_MEMBER(gcsr_w) { m_gcsr = data; }
enum ipoll_mask
{
IPOLL_ATTN = 0x000000ff,
IPOLL_DMAEND = 0x00000700,
IPOLL_NOGRANT = 0x00001000,
IPOLL_SRMMBE = 0x00002000,
IPOLL_SRBERR = 0x00004000,
IPOLL_RETRYABORT = 0x00008000,
IPOLL_INTBERR = 0x00010000,
IPOLL_INTMMBE = 0x00020000
};
DECLARE_READ32_MEMBER(ipoll_r) { return m_ipoll; }
DECLARE_WRITE32_MEMBER(ipoll_w) { m_ipoll = data; }
enum imask_mask
{
IMASK_DMAENDCH1 = 0x00000200,
IMASK_NOGRANT = 0x00001000,
IMASK_SRMMBE = 0x00002000,
IMASK_SRBERR = 0x00004000,
IMASK_RETRYABORT = 0x00008000,
IMASK_INTBERR = 0x00010000,
IMASK_INTMMBE = 0x00020000
};
DECLARE_READ32_MEMBER(imask_r) { return m_imask; }
DECLARE_WRITE32_MEMBER(imask_w) { m_imask = data; }
DECLARE_READ32_MEMBER(range_base_r) { return m_range_base; }
DECLARE_WRITE32_MEMBER(range_base_w) { m_range_base = data; }
DECLARE_READ32_MEMBER(range_end_r) { return m_range_end; }
DECLARE_WRITE32_MEMBER(range_end_w) { m_range_end = data; }
enum cttag_mask
{
CTTAG_TAG = 0x00000007,
CTTAG_CYCLE = 0x000001f8,
CTTAG_MAXBCLK = 0x0003fe00,
CTTAG_MAXRETRY = 0x3ffc0000
};
DECLARE_READ32_MEMBER(cttag_r) { return m_cttag; }
DECLARE_WRITE32_MEMBER(cttag_w) { m_cttag = data; }
DECLARE_READ32_MEMBER(address_r) { return m_address; }
DECLARE_WRITE32_MEMBER(address_w) { m_address = data; }
enum dmacsr_mask
{
DMACSR_CH1ENABLE = 0x00000080
};
DECLARE_READ32_MEMBER(dmacsr_r) { return m_dmacsr; }
DECLARE_WRITE32_MEMBER(dmacsr_w) { m_dmacsr = data; }
enum edmacsr_mask
{
EDMACSR_CH1RDONLY = 0x00000010
};
DECLARE_READ32_MEMBER(edmacsr_r) { return m_edmacsr; }
DECLARE_WRITE32_MEMBER(edmacsr_w) { m_edmacsr = data; }
DECLARE_READ32_MEMBER(reg6_range_r) { return m_reg6_range; }