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https://github.com/holub/mame
synced 2025-04-24 09:20:02 +03:00
sunplus_gcm394 (jak_car2 / jak_gtg / unsp20 etc.) current notes / refactoring etc. (nw) (#6134)
* refactor extended register use (nw) * continued refactor (nw) * some refactor (nw) * simplify some logic (nw) * (nw) * (nw) * (nw) * finish pushing extended opcodes through common codepaths (nw) * note improvements (nw) * bg pen notes (nw) * some renames etc. (nw) * some renames, notes on other register use etc. (nw)
This commit is contained in:
David Haywood
R. Belmont
parent
50b8096ee2
commit
319cb98eab
@ -60,24 +60,28 @@ unsp_device::unsp_device(const machine_config &mconfig, device_type type, const
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, m_enable_drc(false)
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{
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m_iso = 10;
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m_numregs = 8;
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}
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unsp_device::unsp_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: unsp_device(mconfig, UNSP, tag, owner, clock, address_map_constructor())
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{
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m_iso = 10;
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m_numregs = 8;
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}
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unsp_11_device::unsp_11_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: unsp_device(mconfig, UNSP_11, tag, owner, clock, address_map_constructor())
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{
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m_iso = 11;
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m_numregs = 8;
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}
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unsp_11_device::unsp_11_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal)
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: unsp_device(mconfig, type, tag, owner, clock, internal)
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{
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m_iso = 11;
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m_numregs = 8;
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}
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@ -85,24 +89,28 @@ unsp_12_device::unsp_12_device(const machine_config &mconfig, const char *tag, d
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: unsp_11_device(mconfig, UNSP_12, tag, owner, clock, address_map_constructor())
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{
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m_iso = 12;
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m_numregs = 8;
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}
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unsp_12_device::unsp_12_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal)
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: unsp_11_device(mconfig, type, tag, owner, clock, internal)
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{
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m_iso = 12;
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m_numregs = 8;
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}
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unsp_20_device::unsp_20_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
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: unsp_12_device(mconfig, UNSP_20, tag, owner, clock, address_map_constructor())
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{
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m_iso = 20;
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m_numregs = 16;
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}
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unsp_20_device::unsp_20_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal)
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: unsp_12_device(mconfig, type, tag, owner, clock, internal)
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{
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m_iso = 20;
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m_numregs = 16;
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}
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unsp_device::~unsp_device()
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@ -182,9 +190,12 @@ void unsp_device::unimplemented_opcode(uint16_t op, uint16_t ximm, uint16_t ximm
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void unsp_device::device_start()
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{
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m_core = (internal_unsp_state *)m_cache.alloc_near(sizeof(internal_unsp_state));
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memset(m_core, 0, sizeof(internal_unsp_state));
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m_core->m_r.resize(m_numregs);
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#if ENABLE_UNSP_DRC
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m_enable_drc = allow_drc() && (m_iso < 12);
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#else
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@ -275,21 +286,20 @@ void unsp_20_device::device_start()
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int baseindex = UNSP_SB + 1;
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#endif
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state_add(baseindex + UNSP20_R8, "R8", m_secondary_r[UNSP20_R8]).formatstr("%04X");
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state_add(baseindex + UNSP20_R9, "R9", m_secondary_r[UNSP20_R9]).formatstr("%04X");
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state_add(baseindex + UNSP20_R10, "R10", m_secondary_r[UNSP20_R10]).formatstr("%04X");
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state_add(baseindex + UNSP20_R11, "R11", m_secondary_r[UNSP20_R11]).formatstr("%04X");
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state_add(baseindex + UNSP20_R12, "R12", m_secondary_r[UNSP20_R12]).formatstr("%04X");
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state_add(baseindex + UNSP20_R13, "R13", m_secondary_r[UNSP20_R13]).formatstr("%04X");
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state_add(baseindex + UNSP20_R14, "R14", m_secondary_r[UNSP20_R14]).formatstr("%04X");
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state_add(baseindex + UNSP20_R15, "R15", m_secondary_r[UNSP20_R15]).formatstr("%04X");
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save_item(NAME(m_secondary_r));
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state_add(baseindex + UNSP20_R8, "R8", m_core->m_r[UNSP20_R8+8]).formatstr("%04X");
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state_add(baseindex + UNSP20_R9, "R9", m_core->m_r[UNSP20_R9+8]).formatstr("%04X");
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state_add(baseindex + UNSP20_R10, "R10", m_core->m_r[UNSP20_R10+8]).formatstr("%04X");
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state_add(baseindex + UNSP20_R11, "R11", m_core->m_r[UNSP20_R11+8]).formatstr("%04X");
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state_add(baseindex + UNSP20_R12, "R12", m_core->m_r[UNSP20_R12+8]).formatstr("%04X");
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state_add(baseindex + UNSP20_R13, "R13", m_core->m_r[UNSP20_R13+8]).formatstr("%04X");
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state_add(baseindex + UNSP20_R14, "R14", m_core->m_r[UNSP20_R14+8]).formatstr("%04X");
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state_add(baseindex + UNSP20_R15, "R15", m_core->m_r[UNSP20_R15+8]).formatstr("%04X");
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}
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void unsp_device::device_reset()
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{
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memset(m_core->m_r, 0, sizeof(uint32_t) * 8);
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for (int i = 0; i < m_numregs; i++)
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m_core->m_r[i] = 0;
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m_core->m_r[REG_PC] = read16(0xfff7);
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m_core->m_enable_irq = 0;
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@ -301,11 +311,6 @@ void unsp_device::device_reset()
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void unsp_20_device::device_reset()
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{
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unsp_12_device::device_reset();
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for (int i = 0; i < 8; i++)
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{
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m_secondary_r[i] = 0;
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}
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}
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void unsp_device::device_stop()
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@ -164,7 +164,7 @@ protected:
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struct internal_unsp_state
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{
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uint32_t m_r[8]; // why are these 32-bit? they're 16-bit regs? (changing to uint16_t causes crashes tho, so something is depending on this)
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std::vector<u32> m_r; // why are these 32-bit? they're 16-bit regs? (changing to uint16_t causes crashes tho, so something is depending on this)
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uint32_t m_enable_irq;
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uint32_t m_enable_fiq;
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uint32_t m_irq;
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@ -232,6 +232,7 @@ protected:
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void update_nz(uint32_t value);
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void update_nzsc(uint32_t value, uint16_t r0, uint16_t r1);
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bool do_basic_alu_ops(const uint16_t& op0, uint32_t& lres, uint16_t& r0, uint16_t& r1, uint32_t& r2, bool update_flags);
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private:
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// compilation boundaries -- how far back/forward does the analysis extend?
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@ -320,6 +321,8 @@ private:
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#if UNSP_LOG_REGS
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FILE *m_log_file;
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#endif
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protected:
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int m_numregs;
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};
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File diff suppressed because it is too large
Load Diff
@ -204,6 +204,7 @@ void unsp_device::execute_remaining(const uint16_t op)
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r0 = m_core->m_r[opb];
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r2 = read16(UNSP_LPC);
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add_lpc(1);
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// additional special case 'if (op1 == 0x04 && opn == 0x03)' write logic below
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break;
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default: // Shifted ops
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@ -266,12 +267,26 @@ void unsp_device::execute_remaining(const uint16_t op)
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break;
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}
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bool write = do_basic_alu_ops(op0, lres, r0, r1, r2, (opa != 7) ? true : false);
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if (write)
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{
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if (op1 == 0x04 && opn == 0x03) // store [imm16], r
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write16(r2, lres);
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else
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m_core->m_r[opa] = (uint16_t)lres;
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}
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}
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bool unsp_device::do_basic_alu_ops(const uint16_t &op0, uint32_t &lres, uint16_t &r0, uint16_t &r1, uint32_t &r2, bool update_flags)
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{
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switch (op0)
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{
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case 0x00: // Add
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{
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lres = r0 + r1;
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if (opa != 7)
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if (update_flags)
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update_nzsc(lres, r0, r1);
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break;
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}
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@ -279,69 +294,66 @@ void unsp_device::execute_remaining(const uint16_t op)
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{
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uint32_t c = (m_core->m_r[REG_SR] & UNSP_C) ? 1 : 0;
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lres = r0 + r1 + c;
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if (opa != 7)
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if (update_flags)
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update_nzsc(lres, r0, r1);
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break;
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}
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case 0x02: // Subtract
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lres = r0 + (uint16_t)(~r1) + uint32_t(1);
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if (opa != 7)
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if (update_flags)
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update_nzsc(lres, r0, ~r1);
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break;
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case 0x03: // Subtract w/ carry
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{
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uint32_t c = (m_core->m_r[REG_SR] & UNSP_C) ? 1 : 0;
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lres = r0 + (uint16_t)(~r1) + c;
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if (opa != 7)
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if (update_flags)
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update_nzsc(lres, r0, ~r1);
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break;
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}
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case 0x04: // Compare
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lres = r0 + (uint16_t)(~r1) + uint32_t(1);
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if (opa != 7)
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if (update_flags)
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update_nzsc(lres, r0, ~r1);
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return;
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return false;
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case 0x06: // Negate
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lres = -r1;
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if (opa != 7)
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if (update_flags)
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update_nz(lres);
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break;
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case 0x08: // XOR
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lres = r0 ^ r1;
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if (opa != 7)
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if (update_flags)
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update_nz(lres);
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break;
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case 0x09: // Load
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lres = r1;
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if (opa != 7)
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if (update_flags)
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update_nz(lres);
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break;
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case 0x0a: // OR
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lres = r0 | r1;
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if (opa != 7)
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if (update_flags)
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update_nz(lres);
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break;
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case 0x0b: // AND
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lres = r0 & r1;
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if (opa != 7)
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if (update_flags)
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update_nz(lres);
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break;
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case 0x0c: // Test
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lres = r0 & r1;
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if (opa != 7)
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if (update_flags)
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update_nz(lres);
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return;
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return false;
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case 0x0d: // Store
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write16(r2, r0);
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return;
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return false;
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default:
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unimplemented_opcode(op);
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return;
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fatalerror("UNSP: illegal ALU optype %02x at %04x\n", op0, UNSP_LPC);
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return false;
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}
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if (op1 == 0x04 && opn == 0x03) // store [imm16], r
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write16(r2, lres);
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else
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m_core->m_r[opa] = (uint16_t)lres;
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return true;
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}
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@ -729,25 +729,12 @@ READ16_MEMBER(sunplus_gcm394_base_device::internalrom_lower32_r)
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}
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}
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READ16_MEMBER(generalplus_gpac800_device::unkarea_7850_r)
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{
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return machine().rand();
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}
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//[:maincpu] ':maincpu' (001490):sunplus_gcm394_base_device::unk_r @ 0x785f
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READ16_MEMBER(generalplus_gpac800_device::nand_ecc_low_byte_error_flag_1_r)
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{
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return 0x0000;
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}
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// GPR27P512A = C2 76
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// HY27UF081G2A = AD F1 80 1D
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// H27U518S2C = AD 76
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READ16_MEMBER(generalplus_gpac800_device::unkarea_7854_r)
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READ16_MEMBER(generalplus_gpac800_device::nand_7854_r)
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{
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// TODO: use actual NAND / Smart Media devices once this is better understood.
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// The games have extensive checks on startup to determine the flash types, but then it appears that
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@ -762,11 +749,11 @@ READ16_MEMBER(generalplus_gpac800_device::unkarea_7854_r)
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// real TSM code starts at 4c000
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//logerror("%s:sunplus_gcm394_base_device::unkarea_7854_r\n", machine().describe_context());
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//logerror("%s:sunplus_gcm394_base_device::nand_7854_r\n", machine().describe_context());
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if (m_nandcommand == 0x90) // read ident
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{
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logerror("%s:sunplus_gcm394_base_device::unkarea_7854_r READ IDENT byte %d\n", machine().describe_context(), m_curblockaddr);
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logerror("%s:sunplus_gcm394_base_device::nand_7854_r READ IDENT byte %d\n", machine().describe_context(), m_curblockaddr);
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uint8_t data = 0x00;
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@ -802,9 +789,9 @@ READ16_MEMBER(generalplus_gpac800_device::unkarea_7854_r)
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}
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else if (m_nandcommand == 0x00)
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{
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//logerror("%s:sunplus_gcm394_base_device::unkarea_7854_r READ DATA byte %d\n", machine().describe_context(), m_curblockaddr);
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//logerror("%s:sunplus_gcm394_base_device::nand_7854_r READ DATA byte %d\n", machine().describe_context(), m_curblockaddr);
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uint32_t nandaddress = (m_flash_addr_high << 16) | m_flash_addr_low;
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uint32_t nandaddress = (m_nand_addr_high << 16) | m_nand_addr_low;
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uint8_t data = m_nand_read_cb((nandaddress * 2) + m_curblockaddr);
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m_curblockaddr++;
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@ -813,13 +800,13 @@ READ16_MEMBER(generalplus_gpac800_device::unkarea_7854_r)
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}
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else if (m_nandcommand == 0x70) // read status
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{
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logerror("%s:sunplus_gcm394_base_device::unkarea_7854_r READ STATUS byte %d\n", machine().describe_context(), m_curblockaddr);
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logerror("%s:sunplus_gcm394_base_device::nand_7854_r READ STATUS byte %d\n", machine().describe_context(), m_curblockaddr);
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return 0xffff;
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}
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else
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{
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logerror("%s:sunplus_gcm394_base_device::unkarea_7854_r READ UNKNOWN byte %d\n", machine().describe_context(), m_curblockaddr);
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logerror("%s:sunplus_gcm394_base_device::nand_7854_r READ UNKNOWN byte %d\n", machine().describe_context(), m_curblockaddr);
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return 0xffff;
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}
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@ -834,25 +821,159 @@ WRITE16_MEMBER(generalplus_gpac800_device::nand_command_w)
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m_nandcommand = data;
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}
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WRITE16_MEMBER(generalplus_gpac800_device::flash_addr_low_w)
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WRITE16_MEMBER(generalplus_gpac800_device::nand_addr_low_w)
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{
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//logerror("%s:sunplus_gcm394_base_device::flash_addr_low_w %04x\n", machine().describe_context(), data);
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m_flash_addr_low = data;
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//logerror("%s:sunplus_gcm394_base_device::nand_addr_low_w %04x\n", machine().describe_context(), data);
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m_nand_addr_low = data;
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m_curblockaddr = 0;
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}
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WRITE16_MEMBER(generalplus_gpac800_device::flash_addr_high_w)
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WRITE16_MEMBER(generalplus_gpac800_device::nand_addr_high_w)
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{
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//logerror("%s:sunplus_gcm394_base_device::flash_addr_high_w %04x\n", machine().describe_context(), data);
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m_flash_addr_high = data;
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//logerror("%s:sunplus_gcm394_base_device::nand_addr_high_w %04x\n", machine().describe_context(), data);
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m_nand_addr_high = data;
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uint32_t address = (m_flash_addr_high << 16) | m_flash_addr_low;
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uint32_t address = (m_nand_addr_high << 16) | m_nand_addr_low;
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logerror("%s: flash address is now %08x\n", machine().describe_context(), address);
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m_curblockaddr = 0;
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}
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WRITE16_MEMBER(generalplus_gpac800_device::nand_dma_ctrl_w)
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{
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logerror("%s:sunplus_gcm394_base_device::nand_dma_ctrl_w(?) %04x\n", machine().describe_context(), data);
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m_nand_dma_ctrl = data;
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}
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READ16_MEMBER(generalplus_gpac800_device::nand_7850_r)
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{
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// 0x8000 = ready
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return m_nand_7850 | 0x8000;
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}
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WRITE16_MEMBER(generalplus_gpac800_device::nand_7850_w)
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{
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logerror("%s:sunplus_gcm394_base_device::nand_7850_w %04x\n", machine().describe_context(), data);
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m_nand_7850 = data;
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}
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WRITE16_MEMBER(generalplus_gpac800_device::nand_7856_w)
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{
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logerror("%s:sunplus_gcm394_base_device::nand_7856_w %04x\n", machine().describe_context(), data);
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m_nand_7856 = data;
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}
|
||||
|
||||
WRITE16_MEMBER(generalplus_gpac800_device::nand_7857_w)
|
||||
{
|
||||
logerror("%s:sunplus_gcm394_base_device::nand_7857_w %04x\n", machine().describe_context(), data);
|
||||
m_nand_7857 = data;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(generalplus_gpac800_device::nand_785b_w)
|
||||
{
|
||||
logerror("%s:sunplus_gcm394_base_device::nand_785b_w %04x\n", machine().describe_context(), data);
|
||||
m_nand_785b = data;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(generalplus_gpac800_device::nand_785c_w)
|
||||
{
|
||||
logerror("%s:sunplus_gcm394_base_device::nand_785c_w %04x\n", machine().describe_context(), data);
|
||||
m_nand_785c = data;
|
||||
}
|
||||
|
||||
WRITE16_MEMBER(generalplus_gpac800_device::nand_785d_w)
|
||||
{
|
||||
logerror("%s:sunplus_gcm394_base_device::nand_785d_w %04x\n", machine().describe_context(), data);
|
||||
m_nand_785d = data;
|
||||
}
|
||||
|
||||
// [:maincpu] ':maincpu' (00146D) jak_tsm
|
||||
READ16_MEMBER(generalplus_gpac800_device::nand_785e_r)
|
||||
{
|
||||
return 0x0000;
|
||||
}
|
||||
|
||||
//[:maincpu] ':maincpu' (001490) jak_tsm
|
||||
READ16_MEMBER(generalplus_gpac800_device::nand_ecc_low_byte_error_flag_1_r)
|
||||
{
|
||||
return 0x0000;
|
||||
}
|
||||
|
||||
/*
|
||||
UNMAPPED reads writes
|
||||
|
||||
jak_tsm uses these (all iniitalized near start)
|
||||
unclear if these are specific to the GPAC800 type, or present in the older types
|
||||
|
||||
[:maincpu] ':maincpu' (00043F):sunplus_gcm394_base_device::unk_w @ 0x780a (data 0x0000)
|
||||
[:maincpu] ':maincpu' (000442):sunplus_gcm394_base_device::unk_w @ 0x7808 (data 0x0000)
|
||||
[:maincpu] ':maincpu' (000445):sunplus_gcm394_base_device::unk_w @ 0x782f (data 0x0002)
|
||||
[:maincpu] ':maincpu' (000449):sunplus_gcm394_base_device::unk_w @ 0x783d (data 0x05d9)
|
||||
[:maincpu] ':maincpu' (00044D):sunplus_gcm394_base_device::unk_w @ 0x783c (data 0x0a57)
|
||||
[:maincpu] ':maincpu' (000451):sunplus_gcm394_base_device::unk_w @ 0x783b (data 0x2400)
|
||||
[:maincpu] ':maincpu' (000454):sunplus_gcm394_base_device::unk_w @ 0x783e (data 0x0002)
|
||||
[:maincpu] ':maincpu' (000458):sunplus_gcm394_base_device::unk_w @ 0x783a (data 0x3011)
|
||||
[:maincpu] ':maincpu' (00045B):sunplus_gcm394_base_device::unk_w @ 0x7874 (data 0x0000)
|
||||
[:maincpu] ':maincpu' (00045D):sunplus_gcm394_base_device::unk_w @ 0x787c (data 0x0000)
|
||||
[:maincpu] ':maincpu' (00045F):sunplus_gcm394_base_device::unk_w @ 0x7888 (data 0x0000)
|
||||
[:maincpu] ':maincpu' (000461):sunplus_gcm394_base_device::unk_w @ 0x787e (data 0x0000)
|
||||
|
||||
jak_car2 uses these
|
||||
|
||||
[:maincpu] ':maincpu' (004056):sunplus_gcm394_base_device::unk_w @ 0x782f (data 0x0002)
|
||||
[:maincpu] ':maincpu' (004059):sunplus_gcm394_base_device::unk_w @ 0x783d (data 0x05d9)
|
||||
[:maincpu] ':maincpu' (00405C):sunplus_gcm394_base_device::unk_w @ 0x783c (data 0x0a57)
|
||||
[:maincpu] ':maincpu' (00405F):sunplus_gcm394_base_device::unk_w @ 0x783b (data 0x2400)
|
||||
[:maincpu] ':maincpu' (004062):sunplus_gcm394_base_device::unk_w @ 0x783e (data 0x0002)
|
||||
[:maincpu] ':maincpu' (004065):sunplus_gcm394_base_device::unk_w @ 0x783a (data 0x3011)
|
||||
[:maincpu] ':maincpu' (004069):sunplus_gcm394_base_device::unk_r @ 0x7880
|
||||
[:maincpu] ':maincpu' (00406F):sunplus_gcm394_base_device::unk_w @ 0x7874 (data 0x1249)
|
||||
[:maincpu] ':maincpu' (004071):sunplus_gcm394_base_device::unk_w @ 0x787c (data 0x1249)
|
||||
[:maincpu] ':maincpu' (004073):sunplus_gcm394_base_device::unk_w @ 0x7888 (data 0x1249)
|
||||
[:maincpu] ':maincpu' (004075):sunplus_gcm394_base_device::unk_w @ 0x787e (data 0x1249)
|
||||
[:maincpu] ':maincpu' (004088):sunplus_gcm394_base_device::unk_w @ 0x7841 (data 0x000f)
|
||||
[:maincpu] ':maincpu' (00408F):sunplus_gcm394_base_device::unk_w @ 0x780a (data 0x0000)
|
||||
[:maincpu] ':maincpu' (004092):sunplus_gcm394_base_device::unk_w @ 0x7808 (data 0x0002)
|
||||
|
||||
[:maincpu] ':maincpu' (03000A):sunplus_gcm394_base_device::unk_w @ 0x7874 (data 0x36db)
|
||||
[:maincpu] ':maincpu' (03000C):sunplus_gcm394_base_device::unk_w @ 0x787c (data 0x36db)
|
||||
[:maincpu] ':maincpu' (03000E):sunplus_gcm394_base_device::unk_w @ 0x7888 (data 0x36db)
|
||||
[:maincpu] ':maincpu' (030010):sunplus_gcm394_base_device::unk_w @ 0x787e (data 0x36db)
|
||||
[:maincpu] ':maincpu' (030013):sunplus_gcm394_base_device::unk_w @ 0x787f (data 0x0010)
|
||||
[:maincpu] ':maincpu' (03001D):sunplus_gcm394_base_device::unk_w @ 0x7804 (data 0x1c7f)
|
||||
[:maincpu] ':maincpu' (030023):sunplus_gcm394_base_device::unk_w @ 0x7805 (data 0xcdf0)
|
||||
[:maincpu] ':maincpu' (03E645):sunplus_gcm394_base_device::unk_w @ 0x7861 (data 0x1f66)
|
||||
[:maincpu] ':maincpu' (03E64C):sunplus_gcm394_base_device::unk_w @ 0x786b (data 0x0000)
|
||||
[:maincpu] ':maincpu' (03E64F):sunplus_gcm394_base_device::unk_w @ 0x7869 (data 0x0000)
|
||||
[:maincpu] ':maincpu' (03E652):sunplus_gcm394_base_device::unk_w @ 0x786a (data 0x0000)
|
||||
[:maincpu] ':maincpu' (03E65B):sunplus_gcm394_base_device::unk_w @ 0x7966 (data 0x0001)
|
||||
[:maincpu] ':maincpu' (03CBD0):sunplus_gcm394_base_device::unk_w @ 0x7871 (data 0x0000)
|
||||
|
||||
-- this one seems like a common alt type of DMA, used in both hw types as it polls 707c status before doing it
|
||||
[:maincpu] ':maincpu' (03B4C7):sunplus_gcm394_base_device::unk_w @ 0x707c (data 0x0001)
|
||||
-- also video / alt dma?
|
||||
[:maincpu] ':maincpu' (068C15):sunplus_gcm394_base_device::unk_r @ 0x707e
|
||||
|
||||
beambox sets things up with different values (ultimately stalls on some check, maybe seeprom?)
|
||||
|
||||
[:maincpu] ':maincpu' (00043F):sunplus_gcm394_base_device::unk_w @ 0x780a (data 0x0000)
|
||||
[:maincpu] ':maincpu' (000442):sunplus_gcm394_base_device::unk_w @ 0x7808 (data 0x0000)
|
||||
[:maincpu] ':maincpu' (000445):sunplus_gcm394_base_device::unk_w @ 0x782f (data 0x0002)
|
||||
[:maincpu] ':maincpu' (000449):sunplus_gcm394_base_device::unk_w @ 0x783d (data 0x05d9)
|
||||
[:maincpu] ':maincpu' (00044D):sunplus_gcm394_base_device::unk_w @ 0x783c (data 0x0f58)
|
||||
[:maincpu] ':maincpu' (000451):sunplus_gcm394_base_device::unk_w @ 0x783b (data 0x2400)
|
||||
[:maincpu] ':maincpu' (000454):sunplus_gcm394_base_device::unk_w @ 0x783e (data 0x0002)
|
||||
[:maincpu] ':maincpu' (000458):sunplus_gcm394_base_device::unk_w @ 0x783a (data 0x4011)
|
||||
[:maincpu] ':maincpu' (00045C):sunplus_gcm394_base_device::unk_w @ 0x7874 (data 0x2492) -- note pair of 4, but different values to above games
|
||||
[:maincpu] ':maincpu' (00045E):sunplus_gcm394_base_device::unk_w @ 0x787c (data 0x2492)
|
||||
[:maincpu] ':maincpu' (000460):sunplus_gcm394_base_device::unk_w @ 0x7888 (data 0x2492)
|
||||
[:maincpu] ':maincpu' (000462):sunplus_gcm394_base_device::unk_w @ 0x787e (data 0x2492)
|
||||
|
||||
vbaby code is very differet, attempts to load NAND block manually, not with DMA
|
||||
|
||||
*/
|
||||
|
||||
|
||||
// all tilemap registers etc. appear to be in the same place as the above system, including the 'extra' ones not on the earlier models
|
||||
// so it's likely this is built on top of that just with NAND support
|
||||
@ -861,13 +982,20 @@ void generalplus_gpac800_device::gpac800_internal_map(address_map& map)
|
||||
sunplus_gcm394_base_device::base_internal_map(map);
|
||||
|
||||
// 785x = NAND device
|
||||
map(0x007850, 0x007850).r(FUNC(generalplus_gpac800_device::unkarea_7850_r)); // NAND Control Reg
|
||||
map(0x007850, 0x007850).rw(FUNC(generalplus_gpac800_device::nand_7850_r), FUNC(generalplus_gpac800_device::nand_7850_w)); // NAND Control Reg
|
||||
map(0x007851, 0x007851).w(FUNC(generalplus_gpac800_device::nand_command_w)); // NAND Command Reg
|
||||
map(0x007852, 0x007852).w(FUNC(generalplus_gpac800_device::flash_addr_low_w)); // NAND Low Address Reg
|
||||
map(0x007853, 0x007853).w(FUNC(generalplus_gpac800_device::flash_addr_high_w)); // NAND High Address Reg
|
||||
map(0x007854, 0x007854).r(FUNC(generalplus_gpac800_device::unkarea_7854_r)); // NAND Data Reg
|
||||
// map(0x007855, 0x007855).w(FUNC(generalplus_gpac800_device::nand_dma_ctrl_w)); // NAND DMA / INT Control
|
||||
map(0x007852, 0x007852).w(FUNC(generalplus_gpac800_device::nand_addr_low_w)); // NAND Low Address Reg
|
||||
map(0x007853, 0x007853).w(FUNC(generalplus_gpac800_device::nand_addr_high_w)); // NAND High Address Reg
|
||||
map(0x007854, 0x007854).r(FUNC(generalplus_gpac800_device::nand_7854_r)); // NAND Data Reg
|
||||
map(0x007855, 0x007855).w(FUNC(generalplus_gpac800_device::nand_dma_ctrl_w)); // NAND DMA / INT Control
|
||||
map(0x007856, 0x007856).w(FUNC(generalplus_gpac800_device::nand_7856_w)); // usually 0x0021?
|
||||
map(0x007857, 0x007857).w(FUNC(generalplus_gpac800_device::nand_7857_w));
|
||||
|
||||
// most of these are likely ECC stuff for testing the ROM?
|
||||
map(0x00785b, 0x00785b).w(FUNC(generalplus_gpac800_device::nand_785b_w));
|
||||
map(0x00785c, 0x00785c).w(FUNC(generalplus_gpac800_device::nand_785c_w));
|
||||
map(0x00785d, 0x00785d).w(FUNC(generalplus_gpac800_device::nand_785d_w));
|
||||
map(0x00785e, 0x00785e).r(FUNC(generalplus_gpac800_device::nand_785e_r)); // also ECC status related?
|
||||
map(0x00785f, 0x00785f).r(FUNC(generalplus_gpac800_device::nand_ecc_low_byte_error_flag_1_r)); // ECC Low Byte Error Flag 1 (maybe)
|
||||
|
||||
// 128kwords internal ROM
|
||||
@ -881,6 +1009,7 @@ void generalplus_gpac800_device::gpac800_internal_map(address_map& map)
|
||||
map(0x200000, 0x3fffff).rw(FUNC(generalplus_gpac800_device::cs_bank_space_r), FUNC(generalplus_gpac800_device::cs_bank_space_w));
|
||||
}
|
||||
|
||||
|
||||
void sunplus_gcm394_base_device::device_start()
|
||||
{
|
||||
unsp_20_device::device_start();
|
||||
@ -987,8 +1116,15 @@ void generalplus_gpac800_device::device_reset()
|
||||
{
|
||||
sunplus_gcm394_base_device::device_reset();
|
||||
|
||||
m_flash_addr_low = 0x0000;
|
||||
m_flash_addr_high = 0x0000;
|
||||
m_nand_addr_low = 0x0000;
|
||||
m_nand_addr_high = 0x0000;
|
||||
m_nand_dma_ctrl = 0x0000;
|
||||
m_nand_7850 = 0x0000;
|
||||
m_nand_785d = 0x0000;
|
||||
m_nand_785c = 0x0000;
|
||||
m_nand_785b = 0x0000;
|
||||
m_nand_7856 = 0x0000;
|
||||
m_nand_7857 = 0x0000;
|
||||
}
|
||||
|
||||
IRQ_CALLBACK_MEMBER(sunplus_gcm394_base_device::irq_vector_cb)
|
||||
|
||||
@ -325,7 +325,6 @@ public:
|
||||
generalplus_gpac800_device(mconfig, tag, owner, clock)
|
||||
{
|
||||
m_screen.set_tag(std::forward<T>(screen_tag));
|
||||
m_testval = 0;
|
||||
m_csbase = 0x30000;
|
||||
}
|
||||
|
||||
@ -338,22 +337,33 @@ protected:
|
||||
virtual void device_reset() override;
|
||||
|
||||
private:
|
||||
DECLARE_READ16_MEMBER(unkarea_7850_r);
|
||||
DECLARE_READ16_MEMBER(unkarea_7854_r);
|
||||
|
||||
DECLARE_READ16_MEMBER(nand_7850_r);
|
||||
DECLARE_READ16_MEMBER(nand_7854_r);
|
||||
DECLARE_WRITE16_MEMBER(nand_dma_ctrl_w);
|
||||
DECLARE_WRITE16_MEMBER(nand_7850_w);
|
||||
DECLARE_WRITE16_MEMBER(nand_command_w);
|
||||
|
||||
DECLARE_WRITE16_MEMBER(flash_addr_low_w);
|
||||
DECLARE_WRITE16_MEMBER(flash_addr_high_w);
|
||||
|
||||
DECLARE_WRITE16_MEMBER(nand_addr_low_w);
|
||||
DECLARE_WRITE16_MEMBER(nand_addr_high_w);
|
||||
DECLARE_READ16_MEMBER(nand_ecc_low_byte_error_flag_1_r);
|
||||
|
||||
int m_testval;
|
||||
DECLARE_WRITE16_MEMBER(nand_7856_w);
|
||||
DECLARE_WRITE16_MEMBER(nand_7857_w);
|
||||
DECLARE_WRITE16_MEMBER(nand_785b_w);
|
||||
DECLARE_WRITE16_MEMBER(nand_785c_w);
|
||||
DECLARE_WRITE16_MEMBER(nand_785d_w);
|
||||
DECLARE_READ16_MEMBER(nand_785e_r);
|
||||
|
||||
uint16_t m_nandcommand;
|
||||
|
||||
uint16_t m_flash_addr_low;
|
||||
uint16_t m_flash_addr_high;
|
||||
uint16_t m_nand_addr_low;
|
||||
uint16_t m_nand_addr_high;
|
||||
|
||||
uint16_t m_nand_dma_ctrl;
|
||||
uint16_t m_nand_7850;
|
||||
uint16_t m_nand_785d;
|
||||
uint16_t m_nand_785c;
|
||||
uint16_t m_nand_785b;
|
||||
uint16_t m_nand_7856;
|
||||
uint16_t m_nand_7857;
|
||||
|
||||
int m_curblockaddr;
|
||||
};
|
||||
|
||||
@ -705,10 +705,23 @@ void gcm394_base_video_device::draw_sprites(const rectangle &cliprect, uint32_t
|
||||
|
||||
uint32_t gcm394_base_video_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect)
|
||||
{
|
||||
memset(&m_screenbuf[m_screen->width() * cliprect.min_y], 0, 4 * m_screen->width() * ((cliprect.max_y - cliprect.min_y) + 1));
|
||||
// For jak_car2 and jak_gtg the palette entry for 'magenta' in the test mode is intentionally set to a transparent black pen
|
||||
// (it is stored in the palette table in ROM that way, and copied directly) so the only way for the magenta entries on the screen
|
||||
// to be correctly displayed is if there is a magenta BG pen to fall through to (or for another palette write to change the palette
|
||||
// that is copied, but this does not appear to be the case). How the bg pen is set is unknown, it is not a regular palette entry.
|
||||
// The 'bitmap test mode' in jak_car2 requires this to be black instead,
|
||||
//const uint16_t bgcol = 0x7c1f; // magenta
|
||||
const uint16_t bgcol = 0x0000; // black
|
||||
|
||||
for (uint32_t scanline = (uint32_t)cliprect.min_y; scanline <= (uint32_t)cliprect.max_y; scanline++)
|
||||
{
|
||||
uint32_t* bufferline = &m_screenbuf[scanline * m_screen->width()];
|
||||
|
||||
for (int x = 0; x < m_screen->width(); x++)
|
||||
{
|
||||
bufferline[x] = m_rgb555_to_rgb888[bgcol];
|
||||
}
|
||||
|
||||
for (int i = 0; i < 4; i++)
|
||||
{
|
||||
if (1)
|
||||
|
||||
@ -400,10 +400,13 @@ WRITE16_MEMBER(gcm394_game_state::porta_w)
|
||||
logerror("%s: Port A:WRITE %04x\n", machine().describe_context(), data);
|
||||
}
|
||||
|
||||
// some sources indicate these later SoC types run at 96Mhz, others indicate 48Mhz.
|
||||
// unSP 2.0 CPUs have a lower average CPI too (2 instead of 6 on unSP 1.0 or 5 on unSP 1.1 / 1.2 / unSP 2.0) so using regular unSP timings might result in things being too slow
|
||||
// as with the older SunPlus chips this appears to be an fully internally generated frequency, external XTALs again are typically 6MHz or simply not present.
|
||||
|
||||
void gcm394_game_state::base(machine_config &config)
|
||||
{
|
||||
GCM394(config, m_maincpu, XTAL(27'000'000), m_screen);
|
||||
GCM394(config, m_maincpu, 96000000/2, m_screen);
|
||||
m_maincpu->porta_in().set(FUNC(gcm394_game_state::porta_r));
|
||||
m_maincpu->portb_in().set(FUNC(gcm394_game_state::portb_r));
|
||||
m_maincpu->porta_out().set(FUNC(gcm394_game_state::porta_w));
|
||||
@ -459,10 +462,9 @@ WRITE16_MEMBER(wrlshunt_game_state::hunt_porta_w)
|
||||
}
|
||||
|
||||
|
||||
|
||||
void generalplus_gpac800_game_state::generalplus_gpac800(machine_config &config)
|
||||
{
|
||||
GPAC800(config, m_maincpu, XTAL(27'000'000), m_screen);
|
||||
GPAC800(config, m_maincpu, 96000000/2, m_screen);
|
||||
m_maincpu->porta_in().set(FUNC(generalplus_gpac800_game_state::porta_r));
|
||||
m_maincpu->portb_in().set(FUNC(generalplus_gpac800_game_state::portb_r));
|
||||
m_maincpu->porta_out().set(FUNC(generalplus_gpac800_game_state::porta_w));
|
||||
@ -811,7 +813,7 @@ INPUT_PORTS_END
|
||||
|
||||
ROM_START(smartfp)
|
||||
//ROM_REGION16_BE( 0x40000, "maincpu:internal", ROMREGION_ERASE00 ) // not on this model? (or at least not this size, as CS base is different)
|
||||
//ROM_LOAD16_WORD_SWAP( "intenral.rom", 0x00000, 0x40000, NO_DUMP )
|
||||
//ROM_LOAD16_WORD_SWAP( "internal.rom", 0x00000, 0x40000, NO_DUMP )
|
||||
|
||||
ROM_REGION(0x800000, "maincpu", ROMREGION_ERASE00)
|
||||
ROM_LOAD16_WORD_SWAP("smartfitpark.bin", 0x000000, 0x800000, CRC(ada84507) SHA1(a3a80bf71fae62ebcbf939166a51d29c24504428))
|
||||
@ -819,7 +821,7 @@ ROM_END
|
||||
|
||||
ROM_START(wrlshunt)
|
||||
//ROM_REGION16_BE( 0x40000, "maincpu:internal", ROMREGION_ERASE00 ) // not on this model? (or at least not this size, as CS base is different)
|
||||
//ROM_LOAD16_WORD_SWAP( "intenral.rom", 0x00000, 0x40000, NO_DUMP )
|
||||
//ROM_LOAD16_WORD_SWAP( "internal.rom", 0x00000, 0x40000, NO_DUMP )
|
||||
|
||||
ROM_REGION(0x8000000, "maincpu", ROMREGION_ERASE00)
|
||||
ROM_LOAD16_WORD_SWAP("wireless.bin", 0x0000, 0x8000000, CRC(a6ecc20e) SHA1(3645f23ba2bb218e92d4560a8ae29dddbaabf796))
|
||||
@ -928,7 +930,7 @@ https://web.archive.org/web/20180106005235/http://www.lcis.com.tw/paper_store/pa
|
||||
|
||||
ROM_START( wlsair60 )
|
||||
ROM_REGION16_BE( 0x40000, "maincpu:internal", ROMREGION_ERASE00 )
|
||||
ROM_LOAD16_WORD_SWAP( "intenral.rom", 0x00000, 0x40000, NO_DUMP ) // used as bootstrap only
|
||||
ROM_LOAD16_WORD_SWAP( "internal.rom", 0x00000, 0x40000, NO_DUMP ) // used as bootstrap only
|
||||
|
||||
ROM_REGION16_BE( 0x8400000, "nandrom", ROMREGION_ERASE00 )
|
||||
ROM_LOAD16_WORD_SWAP( "wlsair60.nand", 0x0000, 0x8400000, CRC(eec23b97) SHA1(1bb88290cf54579a5bb51c08a02d793cd4d79f7a) )
|
||||
@ -936,7 +938,7 @@ ROM_END
|
||||
|
||||
ROM_START( jak_gtg )
|
||||
ROM_REGION16_BE( 0x40000, "maincpu:internal", ROMREGION_ERASE00 )
|
||||
ROM_LOAD16_WORD_SWAP( "intenral.rom", 0x00000, 0x40000, NO_DUMP ) // used as bootstrap only
|
||||
ROM_LOAD16_WORD_SWAP( "internal.rom", 0x00000, 0x40000, NO_DUMP ) // used as bootstrap only
|
||||
|
||||
ROM_REGION16_BE( 0x4200000, "nandrom", ROMREGION_ERASE00 )
|
||||
ROM_LOAD16_WORD_SWAP( "goldentee.bin", 0x0000, 0x4200000, CRC(87d5e815) SHA1(5dc46cd753b791449cc41d5eff4928c0dcaf35c0) )
|
||||
@ -944,7 +946,7 @@ ROM_END
|
||||
|
||||
ROM_START( jak_car2 )
|
||||
ROM_REGION16_BE( 0x40000, "maincpu:internal", ROMREGION_ERASE00 )
|
||||
ROM_LOAD16_WORD_SWAP( "intenral.rom", 0x00000, 0x40000, NO_DUMP ) // used as bootstrap only
|
||||
ROM_LOAD16_WORD_SWAP( "internal.rom", 0x00000, 0x40000, NO_DUMP ) // used as bootstrap only
|
||||
|
||||
ROM_REGION16_BE( 0x4200000, "nandrom", ROMREGION_ERASE00 )
|
||||
ROM_LOAD16_WORD_SWAP( "cars2.bin", 0x0000, 0x4200000, CRC(4d610e09) SHA1(bc59f5f7f676a8f2a78dfda7fb62c804bbf850b6) )
|
||||
@ -952,7 +954,7 @@ ROM_END
|
||||
|
||||
ROM_START( jak_tsm )
|
||||
ROM_REGION16_BE( 0x40000, "maincpu:internal", ROMREGION_ERASE00 )
|
||||
ROM_LOAD16_WORD_SWAP( "intenral.rom", 0x00000, 0x40000, NO_DUMP ) // used as bootstrap only
|
||||
ROM_LOAD16_WORD_SWAP( "internal.rom", 0x00000, 0x40000, NO_DUMP ) // used as bootstrap only
|
||||
|
||||
ROM_REGION16_BE( 0x4200000, "nandrom", ROMREGION_ERASE00 )
|
||||
ROM_LOAD16_WORD_SWAP( "toystorymania.bin", 0x0000, 0x4200000, CRC(183b20a5) SHA1(eb4fa5ee9dfac58f5244d00d4e833b1e461cc52c) )
|
||||
@ -960,7 +962,7 @@ ROM_END
|
||||
|
||||
ROM_START( vbaby )
|
||||
ROM_REGION16_BE( 0x40000, "maincpu:internal", ROMREGION_ERASE00 )
|
||||
ROM_LOAD16_WORD_SWAP( "intenral.rom", 0x00000, 0x40000, NO_DUMP ) // used as bootstrap only
|
||||
ROM_LOAD16_WORD_SWAP( "internal.rom", 0x00000, 0x40000, NO_DUMP ) // used as bootstrap only
|
||||
|
||||
ROM_REGION16_BE( 0x8400000, "nandrom", ROMREGION_ERASE00 )
|
||||
ROM_LOAD16_WORD_SWAP( "vbaby.bin", 0x0000, 0x8400000, CRC(d904441b) SHA1(3742bc4e1e403f061ce2813ecfafc6f30a44d287) )
|
||||
@ -968,7 +970,7 @@ ROM_END
|
||||
|
||||
ROM_START( beambox )
|
||||
ROM_REGION16_BE( 0x40000, "maincpu:internal", ROMREGION_ERASE00 )
|
||||
ROM_LOAD16_WORD_SWAP( "intenral.rom", 0x00000, 0x40000, NO_DUMP ) // used as bootstrap only
|
||||
ROM_LOAD16_WORD_SWAP( "internal.rom", 0x00000, 0x40000, NO_DUMP ) // used as bootstrap only
|
||||
|
||||
ROM_REGION16_BE( 0x4200000, "nandrom", ROMREGION_ERASE00 )
|
||||
ROM_LOAD16_WORD_SWAP( "beambox.bin", 0x0000, 0x4200000, CRC(a486f04e) SHA1(73c7d99d8922eba58d94e955e254b9c3baa4443e) )
|
||||
|
||||
Loading…
Reference in New Issue
Block a user