mirror of
https://github.com/holub/mame
synced 2025-06-03 19:36:26 +03:00
New machines promoted to WORKING
- Apple IIc Plus [R. Belmont, M. Guidero, Leon Bottou] Only the first 3.5" drive works right now and there are no 5.25" drives and no accelerator yet.
This commit is contained in:
arbee
parent
3dc8ca2662
commit
31aaae7491
@ -72,6 +72,8 @@ public:
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// accessor
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uint8_t get_lines();
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virtual void device_reset() override;
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protected:
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enum applefdc_t
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{
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@ -85,7 +87,6 @@ protected:
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// device-level overrides
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virtual void device_start() override;
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virtual void device_reset() override;
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virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
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// other protecteds
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@ -171,7 +171,7 @@ Address bus A0-A11 is Y0-Y11
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#define A2_UPPERBANK_TAG "inhbank"
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#define IIC_ACIA1_TAG "acia1"
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#define IIC_ACIA2_TAG "acia2"
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#define IICP_IWM_TAG "iwm"
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#define IICP_IWM_TAG "fdc"
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#define LASER128_UDC_TAG "l128udc"
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#define PRINTER_PORT_TAG "printer"
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#define MODEM_PORT_TAG "modem"
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@ -393,6 +393,9 @@ public:
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void r2000bank_map(address_map &map);
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void r4000bank_map(address_map &map);
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void spectred_keyb_map(address_map &map);
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bool m_35sel, m_hdsel, m_intdrive;
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private:
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int m_speaker_state;
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int m_cassette_state, m_cassette_out;
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@ -435,6 +438,9 @@ private:
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uint8_t m_migram[0x800];
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uint16_t m_migpage;
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bool m_zipunlocked;
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int m_zipstage;
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uint8_t *m_ram_ptr, *m_rom_ptr, *m_cec_ptr;
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int m_ram_size;
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@ -486,21 +492,36 @@ private:
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uint8_t apple2e_state::mig_r(uint16_t offset)
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{
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//printf("mig_r @ %x\n", offset + 0xc00);
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// MIG RAM window
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if (offset < 0x20)
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if ((offset >= 0x200) && (offset < 0x220))
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{
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return m_migram[m_migpage + offset];
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}
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// increment MIG RAM window
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if (offset == 0x20)
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// increment MIG RAM window and return previous value
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if ((offset >= 0x220) && (offset < 0x240))
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{
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uint8_t rv = m_migram[m_migpage + offset];
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m_migpage += 0x20;
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m_migpage &= 0x7ff; // make sure we wrap
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m_migpage &= 0x7ff;
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return rv;
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}
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if ((offset >= 0x240) && (offset < 0x260))
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{
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m_hdsel = false;
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sony_set_sel_line(m_iicpiwm, 0);
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}
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if ((offset >= 0x260) && (offset < 0x280))
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{
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m_hdsel = true;
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sony_set_sel_line(m_iicpiwm, 0x80);
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}
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// reset MIG RAM window
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if (offset == 0xa0)
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if (offset == 0x2a0)
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{
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m_migpage = 0;
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}
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@ -510,22 +531,58 @@ uint8_t apple2e_state::mig_r(uint16_t offset)
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void apple2e_state::mig_w(uint16_t offset, uint8_t data)
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{
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//printf("mig_w %x @ %x\n", data, offset + 0xc00);
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if (offset == 0x40)
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{
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m_iicpiwm->device_reset();
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return;
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}
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if ((offset >= 0x80) && (offset < 0xa0))
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{
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//printf("MIG: enable internal drive on d2\n");
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m_intdrive = true;
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return;
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}
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if ((offset >= 0xc0) && (offset < 0xe0))
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{
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//printf("MIG: disable internal drive\n");
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m_intdrive = false;
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return;
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}
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// MIG RAM window
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if (offset < 0x20)
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if ((offset >= 0x200) && (offset < 0x220))
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{
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m_migram[m_migpage + offset] = data;
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return;
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}
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// increment MIG RAM window
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if (offset == 0x20)
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// increment MIG RAM window, but write value at old location first
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if ((offset >= 0x220) && (offset < 0x240))
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{
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m_migram[m_migpage + offset] = data;
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m_migpage += 0x20;
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m_migpage &= 0x7ff; // make sure we wrap
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return;
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}
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if ((offset >= 0x240) && (offset < 0x260))
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{
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m_35sel = false;
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return;
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}
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if ((offset >= 0x260) && (offset < 0x280))
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{
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m_35sel = true;
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return;
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}
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// reset MIG RAM window
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if (offset == 0xa0)
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if (offset == 0x2a0)
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{
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m_migpage = 0;
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}
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@ -853,6 +910,11 @@ void apple2e_state::machine_start()
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save_item(NAME(m_mockingboard4c));
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save_item(NAME(m_intc8rom));
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save_item(NAME(m_cec_bank));
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save_item(NAME(m_35sel));
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save_item(NAME(m_hdsel));
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save_item(NAME(m_intdrive));
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save_item(NAME(m_zipunlocked));
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save_item(NAME(m_zipstage));
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}
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void apple2e_state::machine_reset()
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@ -875,6 +937,8 @@ void apple2e_state::machine_reset()
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m_mockingboard4c = false;
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m_intc8rom = false;
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m_cec_bank = 0;
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m_zipunlocked = false;
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m_zipstage = 0;
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// IIe prefers INTCXROM default to off, IIc has it always on
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if (m_rom_ptr[0x3bc0] == 0x00)
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@ -1391,6 +1455,14 @@ void apple2e_state::do_io(address_space &space, int offset, bool is_iic)
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m_romswitch = !m_romswitch;
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update_slotrom_banks();
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// MIG is reset when ROMSWITCH turns off
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if ((m_isiicplus) && !(m_romswitch))
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{
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m_migpage = 0;
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m_intdrive = false;
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m_35sel = false;
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}
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// if LC is not enabled
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if (!m_lcram)
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{
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@ -1986,6 +2058,34 @@ WRITE8_MEMBER(apple2e_state::c000_iic_w)
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m_strobe = 0;
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break;
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case 0x5a: // IIC+ accelerator unlock
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if (m_isiicplus)
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{
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if (data == 0x5a)
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{
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m_zipstage++;
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if (m_zipstage == 4)
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{
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m_zipunlocked = true;
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}
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}
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else if (data == 0xa5)
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{
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// put settings into effect and lock
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m_zipunlocked = false;
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m_zipstage = 0;
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}
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else
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{
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// disable acceleration and lock
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m_zipunlocked = false;
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m_zipstage = 0;
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}
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}
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break;
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case 0x5b:
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case 0x78:
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case 0x79:
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m_vbl = false;
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@ -2113,6 +2213,11 @@ READ8_MEMBER(apple2e_state::c080_r)
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}
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else
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{
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if ((m_isiicplus) && (slot == 6))
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{
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return m_iicpiwm->read(offset % 0x10);
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}
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if (m_slotdevice[slot] != nullptr)
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{
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return m_slotdevice[slot]->read_c0nx(offset % 0x10);
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@ -2143,6 +2248,12 @@ WRITE8_MEMBER(apple2e_state::c080_w)
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}
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else
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{
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if ((m_isiicplus) && (slot == 6))
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{
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m_iicpiwm->write(offset % 0x10, data);
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return;
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}
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if (m_slotdevice[slot] != nullptr)
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{
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m_slotdevice[slot]->write_c0nx(offset % 0x10, data);
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@ -2291,11 +2402,6 @@ READ8_MEMBER(apple2e_state::c400_cec_bank_r) { return m_rom_ptr[0x4400 + offset
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READ8_MEMBER(apple2e_state::c800_r)
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{
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if ((m_isiicplus) && (m_romswitch) && (offset >= 0x600) && (offset < 0x700))
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{
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return mig_r(offset-0x600);
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}
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if ((offset == 0x7ff) && !machine().side_effects_disabled())
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{
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m_cnxx_slot = CNXX_UNCLAIMED;
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@ -2313,11 +2419,6 @@ READ8_MEMBER(apple2e_state::c800_r)
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READ8_MEMBER(apple2e_state::c800_int_r)
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{
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if ((m_isiicplus) && (m_romswitch) && (offset >= 0x600) && (offset < 0x700))
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{
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return mig_r(offset-0x600);
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}
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if ((offset == 0x7ff) && !machine().side_effects_disabled())
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{
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m_cnxx_slot = CNXX_UNCLAIMED;
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@ -2335,9 +2436,9 @@ READ8_MEMBER(apple2e_state::c800_int_r)
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READ8_MEMBER(apple2e_state::c800_b2_int_r)
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{
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if ((m_isiicplus) && (m_romswitch) && (offset >= 0x600) && (offset < 0x700))
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if ((m_isiicplus) && (m_romswitch) && (((offset >= 0x400) && (offset < 0x500)) || ((offset >= 0x600) && (offset < 0x700))))
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{
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return mig_r(offset-0x600);
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return mig_r(offset-0x400);
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}
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if ((offset == 0x7ff) && !machine().side_effects_disabled())
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@ -2352,9 +2453,9 @@ READ8_MEMBER(apple2e_state::c800_b2_int_r)
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WRITE8_MEMBER(apple2e_state::c800_w)
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{
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if ((m_isiicplus) && (m_romswitch) && (offset >= 0x600) && (offset < 0x700))
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if ((m_isiicplus) && (m_romswitch) && (((offset >= 0x400) && (offset < 0x500)) || ((offset >= 0x600) && (offset < 0x700))))
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{
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mig_w(offset-0x600, data);
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mig_w(offset-0x400, data);
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return;
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}
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@ -2400,22 +2501,11 @@ WRITE8_MEMBER(apple2e_state::inh_w)
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READ8_MEMBER(apple2e_state::lc_romswitch_r)
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{
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if ((offset >= 0xc00) && (offset < 0xd00))
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{
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return mig_r(offset-0xc00);
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}
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return m_rom_ptr[0x5000 + offset];
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}
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WRITE8_MEMBER(apple2e_state::lc_romswitch_w)
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{
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if ((offset >= 0xc00) && (offset < 0xd00))
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{
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mig_w(offset-0xc00, data);
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return;
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}
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lc_w(space, offset, data);
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}
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@ -4126,10 +4216,26 @@ MACHINE_CONFIG_START(apple2e_state::apple2c)
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MCFG_RAM_EXTRA_OPTIONS("128K")
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MACHINE_CONFIG_END
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static void apple2cp_set_enable_lines(device_t *device,int enable_mask)
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{
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apple2e_state *state = device->machine().driver_data<apple2e_state>();
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// printf("set_enable_lines: 35sel %d int %d enable_mask %d\n", state->m_35sel, state->m_intdrive, enable_mask);
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if ((state->m_35sel) && (state->m_intdrive) && (enable_mask == 2))
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{
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sony_set_enable_lines(device, 1);
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}
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else
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{
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sony_set_enable_lines(device, 0);
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}
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}
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const applefdc_interface a2cp_interface =
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{
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sony_set_lines, /* set_lines */
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sony_set_enable_lines, /* set_enable_lines */
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apple2cp_set_enable_lines, /* set_enable_lines */
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sony_read_data, /* read_data */
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sony_write_data, /* write_data */
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@ -4145,10 +4251,17 @@ static const floppy_interface apple2cp_floppy35_floppy_interface =
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MACHINE_CONFIG_START(apple2e_state::apple2cp)
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apple2c(config);
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MCFG_DEVICE_REPLACE("maincpu", M65C02, 1021800) /* close to actual CPU frequency of 1.020484 MHz */
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MCFG_DEVICE_PROGRAM_MAP(apple2c_memexp_map)
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MCFG_DEVICE_REMOVE("sl4")
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MCFG_DEVICE_REMOVE("sl6")
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MCFG_IWM_ADD(IICP_IWM_TAG, a2cp_interface)
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MCFG_LEGACY_FLOPPY_SONY_2_DRIVES_ADD(apple2cp_floppy35_floppy_interface)
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MCFG_RAM_MODIFY(RAM_TAG)
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MCFG_RAM_DEFAULT_SIZE("128K")
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MCFG_RAM_EXTRA_OPTIONS("128K, 384K, 640K, 896K, 1152K")
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MACHINE_CONFIG_END
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MACHINE_CONFIG_START(apple2e_state::apple2c_iwm)
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@ -4553,4 +4666,4 @@ COMP( 1985, apple2c0, apple2c, 0, apple2c_iwm, apple2c, apple2e_state,
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COMP( 1986, apple2c3, apple2c, 0, apple2c_mem, apple2c, apple2e_state, empty_init, "Apple Computer", "Apple //c (Original Memory Expansion)", MACHINE_SUPPORTS_SAVE )
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COMP( 1986, apple2c4, apple2c, 0, apple2c_mem, apple2c, apple2e_state, empty_init, "Apple Computer", "Apple //c (rev 4)", MACHINE_SUPPORTS_SAVE )
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COMP( 1987, ceci, 0, apple2, ceci, ceci, apple2e_state, empty_init, "Shaanxi Province Computer Factory", "China Education Computer I", MACHINE_SUPPORTS_SAVE )
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COMP( 1988, apple2cp, apple2c, 0, apple2cp, apple2c, apple2e_state, empty_init, "Apple Computer", "Apple //c Plus", MACHINE_NOT_WORKING | MACHINE_SUPPORTS_SAVE )
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COMP( 1988, apple2cp, apple2c, 0, apple2cp, apple2c, apple2e_state, empty_init, "Apple Computer", "Apple //c Plus", MACHINE_SUPPORTS_SAVE )
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