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(MESS) nes.c: moved bankswitch functions into nes_carts_state. no whatsnew.

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among other things, this  allowed to remove around a thousand of machine() parameters 
passed to re-get the state class at each bankswitch operation. readability says thanks.
This commit is contained in:
Fabio Priuli 2012-09-23 09:18:37 +00:00
parent 7ad98c13be
commit 326c860ac7
6 changed files with 1357 additions and 1385 deletions
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8
src/mess/includes/nes.h
View File

@ -90,14 +90,6 @@ public:
device_t *m_cart; device_t *m_cart;
// emu_timer *m_irq_timer; // emu_timer *m_irq_timer;
/* misc region to be allocated at init */
// variables which don't change at run-time
UINT8 *m_rom;
UINT8 *m_prg;
UINT8 *m_vrom;
UINT8 *m_vram;
UINT8 *m_ciram; //PPU nametable RAM - external to PPU!
/***** FDS-floppy related *****/ /***** FDS-floppy related *****/
int m_disk_expansion; int m_disk_expansion;

51
src/mess/includes/nes_mmc.h
View File

@ -160,6 +160,7 @@ public:
nes_prg_callback m_mmc3_prg_cb; // these are used to simplify a lot emulation of some MMC3 pirate clones nes_prg_callback m_mmc3_prg_cb; // these are used to simplify a lot emulation of some MMC3 pirate clones
nes_chr_callback m_mmc3_chr_cb; nes_chr_callback m_mmc3_chr_cb;
// mapper variables (to be sorted out at some point, to split more complex mappers as separate devices)
int m_chr_open_bus; int m_chr_open_bus;
int m_prgram_bank5_start, m_battery_bank5_start, m_empty_bank5_start; int m_prgram_bank5_start, m_battery_bank5_start, m_empty_bank5_start;
@ -524,6 +525,14 @@ public:
DECLARE_READ8_MEMBER(dummy_m_r); DECLARE_READ8_MEMBER(dummy_m_r);
DECLARE_READ8_MEMBER(dummy_r); DECLARE_READ8_MEMBER(dummy_r);
/* misc region to be allocated at init */
// variables which don't change at run-time
UINT8 *m_rom;
UINT8 *m_prg;
UINT8 *m_vrom;
UINT8 *m_vram;
UINT8 *m_ciram; //PPU nametable RAM - external to PPU!
UINT8 *m_wram; UINT8 *m_wram;
UINT8 *m_battery_ram; UINT8 *m_battery_ram;
UINT8 *m_mapper_ram; UINT8 *m_mapper_ram;
@ -557,6 +566,48 @@ public:
ppu2c0x_device *m_ppu; ppu2c0x_device *m_ppu;
device_t *m_sound; device_t *m_sound;
emu_timer *m_irq_timer; emu_timer *m_irq_timer;
//private:
// banking helpers
// WRAM bankswitch
void wram_bank(int bank, int source);
// PRG bankswitch
void prg32(int bank);
void prg16_89ab(int bank);
void prg16_cdef(int bank);
void prg8_89(int bank);
void prg8_ab(int bank);
void prg8_cd(int bank);
void prg8_ef(int bank);
void prg8_67(int bank); // a bunch of pcbs can bank ROM in WRAM area!
void prg8_x(int start, int bank);
// CHR 8k bankswitch
void chr8(int bank, int source);
// CHR 4k bankswitch
void chr4_x(int start, int bank, int source);
void chr4_0(int bank, int source){ chr4_x(0, bank, source); };
void chr4_4(int bank, int source){ chr4_x(4, bank, source); };
// CHR 2k bankswitch
void chr2_x(int start, int bank, int source);
void chr2_0(int bank, int source) { chr2_x(0, bank, source); };
void chr2_2(int bank, int source) { chr2_x(2, bank, source); };
void chr2_4(int bank, int source) { chr2_x(4, bank, source); };
void chr2_6(int bank, int source) { chr2_x(6, bank, source); };
// CHR 1k bankswitch
void chr1_x(int start, int bank, int source);
void chr1_0(int bank, int source) { chr1_x(0, bank, source); };
void chr1_1(int bank, int source) { chr1_x(1, bank, source); };
void chr1_2(int bank, int source) { chr1_x(2, bank, source); };
void chr1_3(int bank, int source) { chr1_x(3, bank, source); };
void chr1_4(int bank, int source) { chr1_x(4, bank, source); };
void chr1_5(int bank, int source) { chr1_x(5, bank, source); };
void chr1_6(int bank, int source) { chr1_x(6, bank, source); };
void chr1_7(int bank, int source) { chr1_x(7, bank, source); };
// NT bankswitch
void set_nt_page(int page, int source, int bank, int writable);
void set_nt_mirroring(int mirroring);
}; };

8
src/mess/machine/nes.c
View File

@ -140,7 +140,7 @@ void nes_state::init_nes_core()
} }
if (m_four_screen_vram) if (m_four_screen_vram)
set_nt_mirroring(machine(), PPU_MIRROR_4SCREEN); set_nt_mirroring(PPU_MIRROR_4SCREEN);
else else
{ {
switch (m_hard_mirroring) switch (m_hard_mirroring)
@ -149,10 +149,10 @@ void nes_state::init_nes_core()
case PPU_MIRROR_VERT: case PPU_MIRROR_VERT:
case PPU_MIRROR_HIGH: case PPU_MIRROR_HIGH:
case PPU_MIRROR_LOW: case PPU_MIRROR_LOW:
set_nt_mirroring(machine(), m_hard_mirroring); set_nt_mirroring(m_hard_mirroring);
break; break;
default: default:
set_nt_mirroring(machine(), PPU_MIRROR_NONE); set_nt_mirroring(PPU_MIRROR_NONE);
break; break;
} }
} }
@ -1633,7 +1633,7 @@ WRITE8_MEMBER(nes_state::nes_fds_w)
m_fds_head_position = 0; m_fds_head_position = 0;
m_fds_read_mode = BIT(data, 2); m_fds_read_mode = BIT(data, 2);
set_nt_mirroring(machine(), BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); set_nt_mirroring(BIT(data, 3) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
if ((!(data & 0x40)) && (m_fds_write_reg & 0x40)) if ((!(data & 0x40)) && (m_fds_write_reg & 0x40))
m_fds_head_position -= 2; // ??? m_fds_head_position -= 2; // ???

30
src/mess/machine/nes_ines.c
View File

@ -53,10 +53,10 @@ WRITE8_MEMBER(nes_carts_state::mapper6_l_w)
{ {
case 0x1fe: case 0x1fe:
m_mmc_latch1 = data & 0x80; m_mmc_latch1 = data & 0x80;
set_nt_mirroring(machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); set_nt_mirroring(BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
break; break;
case 0x1ff: case 0x1ff:
set_nt_mirroring(machine(), BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); set_nt_mirroring(BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
break; break;
case 0x401: case 0x401:
@ -78,14 +78,14 @@ WRITE8_MEMBER(nes_carts_state::mapper6_w)
if (!m_mmc_latch1) // when in "FFE mode" we are forced to use CHRRAM/EXRAM bank? if (!m_mmc_latch1) // when in "FFE mode" we are forced to use CHRRAM/EXRAM bank?
{ {
prg16_89ab(machine(), data >> 2); prg16_89ab(data >> 2);
// chr8(machine(), data & 0x03, ???); // chr8(data & 0x03, ???);
// due to lack of info on the exact behavior, we simply act as if mmc_latch1=1 // due to lack of info on the exact behavior, we simply act as if mmc_latch1=1
if (m_mmc_chr_source == CHRROM) if (m_mmc_chr_source == CHRROM)
chr8(machine(), data & 0x03, CHRROM); chr8(data & 0x03, CHRROM);
} }
else if (m_mmc_chr_source == CHRROM) // otherwise, we can use CHRROM (when present) else if (m_mmc_chr_source == CHRROM) // otherwise, we can use CHRROM (when present)
chr8(machine(), data, CHRROM); chr8(data, CHRROM);
} }
/************************************************************* /*************************************************************
@ -103,8 +103,8 @@ WRITE8_MEMBER(nes_carts_state::mapper8_w)
{ {
LOG_MMC(("mapper8_w, offset: %04x, data: %02x\n", offset, data)); LOG_MMC(("mapper8_w, offset: %04x, data: %02x\n", offset, data));
chr8(machine(), data & 0x07, CHRROM); chr8(data & 0x07, CHRROM);
prg16_89ab(machine(), data >> 3); prg16_89ab(data >> 3);
} }
/************************************************************* /*************************************************************
@ -126,10 +126,10 @@ WRITE8_MEMBER(nes_carts_state::mapper17_l_w)
switch (offset) switch (offset)
{ {
case 0x1fe: case 0x1fe:
set_nt_mirroring(machine(), BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW); set_nt_mirroring(BIT(data, 4) ? PPU_MIRROR_HIGH : PPU_MIRROR_LOW);
break; break;
case 0x1ff: case 0x1ff:
set_nt_mirroring(machine(), BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT); set_nt_mirroring(BIT(data, 4) ? PPU_MIRROR_HORZ : PPU_MIRROR_VERT);
break; break;
case 0x401: case 0x401:
@ -144,16 +144,16 @@ WRITE8_MEMBER(nes_carts_state::mapper17_l_w)
break; break;
case 0x404: case 0x404:
prg8_89(machine(), data); prg8_89(data);
break; break;
case 0x405: case 0x405:
prg8_ab(machine(), data); prg8_ab(data);
break; break;
case 0x406: case 0x406:
prg8_cd(machine(), data); prg8_cd(data);
break; break;
case 0x407: case 0x407:
prg8_ef(machine(), data); prg8_ef(data);
break; break;
case 0x410: case 0x410:
@ -164,7 +164,7 @@ WRITE8_MEMBER(nes_carts_state::mapper17_l_w)
case 0x415: case 0x415:
case 0x416: case 0x416:
case 0x417: case 0x417:
chr1_x(machine(), offset & 7, data, CHRROM); chr1_x(offset & 7, data, CHRROM);
break; break;
} }
} }

352
src/mess/machine/nes_mmc.c
View File

@ -235,22 +235,20 @@ READ8_MEMBER(nes_state::nes_low_mapper_r)
*************************************************************/ *************************************************************/
static void wram_bank( running_machine &machine, int bank, int source ) void nes_carts_state::wram_bank(int bank, int source)
{ {
nes_state *state = machine.driver_data<nes_state>(); assert(m_battery || m_prg_ram);
assert(state->m_battery || state->m_prg_ram);
if (source == NES_BATTERY) if (source == NES_BATTERY)
{ {
bank &= (state->m_battery_size / 0x2000) - 1; bank &= (m_battery_size / 0x2000) - 1;
state->m_prg_bank[4] = state->m_battery_bank5_start + bank; m_prg_bank[4] = m_battery_bank5_start + bank;
} }
else else
{ {
bank &= (state->m_wram_size / 0x2000) - 1; bank &= (m_wram_size / 0x2000) - 1;
state->m_prg_bank[4] = state->m_prgram_bank5_start + bank; m_prg_bank[4] = m_prgram_bank5_start + bank;
} }
state->membank("bank5")->set_entry(state->m_prg_bank[4]); membank("bank5")->set_entry(m_prg_bank[4]);
} }
INLINE void prg_bank_refresh( running_machine &machine ) INLINE void prg_bank_refresh( running_machine &machine )
@ -264,118 +262,100 @@ INLINE void prg_bank_refresh( running_machine &machine )
/* PRG ROM in 8K, 16K or 32K blocks */ /* PRG ROM in 8K, 16K or 32K blocks */
static void prg32( running_machine &machine, int bank ) void nes_carts_state::prg32(int bank)
{ {
nes_state *state = machine.driver_data<nes_state>();
/* if there is only 16k PRG, return */ /* if there is only 16k PRG, return */
if (!(state->m_prg_chunks >> 1)) if (!(m_prg_chunks >> 1))
return; return;
/* assumes that bank references a 32k chunk */ /* assumes that bank references a 32k chunk */
bank &= ((state->m_prg_chunks >> 1) - 1); bank &= ((m_prg_chunks >> 1) - 1);
state->m_prg_bank[0] = bank * 4 + 0; m_prg_bank[0] = bank * 4 + 0;
state->m_prg_bank[1] = bank * 4 + 1; m_prg_bank[1] = bank * 4 + 1;
state->m_prg_bank[2] = bank * 4 + 2; m_prg_bank[2] = bank * 4 + 2;
state->m_prg_bank[3] = bank * 4 + 3; m_prg_bank[3] = bank * 4 + 3;
prg_bank_refresh(machine); prg_bank_refresh(machine());
} }
static void prg16_89ab( running_machine &machine, int bank ) void nes_carts_state::prg16_89ab(int bank)
{ {
nes_state *state = machine.driver_data<nes_state>();
/* assumes that bank references a 16k chunk */ /* assumes that bank references a 16k chunk */
bank &= (state->m_prg_chunks - 1); bank &= (m_prg_chunks - 1);
state->m_prg_bank[0] = bank * 2 + 0; m_prg_bank[0] = bank * 2 + 0;
state->m_prg_bank[1] = bank * 2 + 1; m_prg_bank[1] = bank * 2 + 1;
prg_bank_refresh(machine); prg_bank_refresh(machine());
} }
static void prg16_cdef( running_machine &machine, int bank ) void nes_carts_state::prg16_cdef(int bank)
{ {
nes_state *state = machine.driver_data<nes_state>();
/* assumes that bank references a 16k chunk */ /* assumes that bank references a 16k chunk */
bank &= (state->m_prg_chunks - 1); bank &= (m_prg_chunks - 1);
state->m_prg_bank[2] = bank * 2 + 0; m_prg_bank[2] = bank * 2 + 0;
state->m_prg_bank[3] = bank * 2 + 1; m_prg_bank[3] = bank * 2 + 1;
prg_bank_refresh(machine); prg_bank_refresh(machine());
} }
static void prg8_89( running_machine &machine, int bank ) void nes_carts_state::prg8_89(int bank)
{ {
nes_state *state = machine.driver_data<nes_state>();
/* assumes that bank references an 8k chunk */ /* assumes that bank references an 8k chunk */
bank &= ((state->m_prg_chunks << 1) - 1); bank &= ((m_prg_chunks << 1) - 1);
state->m_prg_bank[0] = bank; m_prg_bank[0] = bank;
prg_bank_refresh(machine); prg_bank_refresh(machine());
} }
static void prg8_ab( running_machine &machine, int bank ) void nes_carts_state::prg8_ab(int bank)
{ {
nes_state *state = machine.driver_data<nes_state>();
/* assumes that bank references an 8k chunk */ /* assumes that bank references an 8k chunk */
bank &= ((state->m_prg_chunks << 1) - 1); bank &= ((m_prg_chunks << 1) - 1);
state->m_prg_bank[1] = bank; m_prg_bank[1] = bank;
prg_bank_refresh(machine); prg_bank_refresh(machine());
} }
static void prg8_cd( running_machine &machine, int bank ) void nes_carts_state::prg8_cd(int bank)
{ {
nes_state *state = machine.driver_data<nes_state>();
/* assumes that bank references an 8k chunk */ /* assumes that bank references an 8k chunk */
bank &= ((state->m_prg_chunks << 1) - 1); bank &= ((m_prg_chunks << 1) - 1);
state->m_prg_bank[2] = bank; m_prg_bank[2] = bank;
prg_bank_refresh(machine); prg_bank_refresh(machine());
} }
static void prg8_ef( running_machine &machine, int bank ) void nes_carts_state::prg8_ef(int bank)
{ {
nes_state *state = machine.driver_data<nes_state>();
/* assumes that bank references an 8k chunk */ /* assumes that bank references an 8k chunk */
bank &= ((state->m_prg_chunks << 1) - 1); bank &= ((m_prg_chunks << 1) - 1);
state->m_prg_bank[3] = bank; m_prg_bank[3] = bank;
prg_bank_refresh(machine); prg_bank_refresh(machine());
} }
/* We define an additional helper to map PRG-ROM to 0x6000-0x7000 */ /* We define an additional helper to map PRG-ROM to 0x6000-0x7000 */
// TODO: are we implementing this correctly in the mappers which uses it? check! // TODO: are we implementing this correctly in the mappers which uses it? check!
static void prg8_67( running_machine &machine, int bank ) void nes_carts_state::prg8_67(int bank)
{ {
nes_state *state = machine.driver_data<nes_state>();
/* assumes that bank references an 8k chunk */ /* assumes that bank references an 8k chunk */
bank &= ((state->m_prg_chunks << 1) - 1); bank &= ((m_prg_chunks << 1) - 1);
state->m_prg_bank[4] = bank; m_prg_bank[4] = bank;
state->membank("bank5")->set_entry(state->m_prg_bank[4]); membank("bank5")->set_entry(m_prg_bank[4]);
} }
/* We also define an additional helper to map 8k PRG-ROM to one of the banks (passed as parameter) */ /* We also define an additional helper to map 8k PRG-ROM to one of the banks (passed as parameter) */
static void prg8_x( running_machine &machine, int start, int bank ) void nes_carts_state::prg8_x(int start, int bank)
{ {
nes_state *state = machine.driver_data<nes_state>();
assert(start < 4); assert(start < 4);
/* assumes that bank references an 8k chunk */ /* assumes that bank references an 8k chunk */
bank &= ((state->m_prg_chunks << 1) - 1); bank &= ((m_prg_chunks << 1) - 1);
state->m_prg_bank[start] = bank; m_prg_bank[start] = bank;
prg_bank_refresh(machine); prg_bank_refresh(machine());
} }
/* CHR ROM in 1K, 2K, 4K or 8K blocks */ /* CHR ROM in 1K, 2K, 4K or 8K blocks */
@ -392,256 +372,174 @@ INLINE void chr_sanity_check( running_machine &machine, int source )
fatalerror("CHRROM bankswitch with no VROM\n"); fatalerror("CHRROM bankswitch with no VROM\n");
} }
static void chr8( running_machine &machine, int bank, int source ) void nes_carts_state::chr8(int bank, int source)
{ {
nes_state *state = machine.driver_data<nes_state>(); chr_sanity_check(machine(), source);
int i;
chr_sanity_check(machine, source);
if (source == CHRRAM) if (source == CHRRAM)
{ {
bank &= (state->m_vram_chunks - 1); bank &= (m_vram_chunks - 1);
for (i = 0; i < 8; i++) for (int i = 0; i < 8; i++)
{ {
state->m_chr_map[i].source = source; m_chr_map[i].source = source;
state->m_chr_map[i].origin = (bank * 0x2000) + (i * 0x400); // for save state uses! m_chr_map[i].origin = (bank * 0x2000) + (i * 0x400); // for save state uses!
state->m_chr_map[i].access = &state->m_vram[state->m_chr_map[i].origin]; m_chr_map[i].access = &m_vram[m_chr_map[i].origin];
} }
} }
else else
{ {
bank &= (state->m_chr_chunks - 1); bank &= (m_chr_chunks - 1);
for (i = 0; i < 8; i++) for (int i = 0; i < 8; i++)
{ {
state->m_chr_map[i].source = source; m_chr_map[i].source = source;
state->m_chr_map[i].origin = (bank * 0x2000) + (i * 0x400); // for save state uses! m_chr_map[i].origin = (bank * 0x2000) + (i * 0x400); // for save state uses!
state->m_chr_map[i].access = &state->m_vrom[state->m_chr_map[i].origin]; m_chr_map[i].access = &m_vrom[m_chr_map[i].origin];
} }
} }
} }
static void chr4_x( running_machine &machine, int start, int bank, int source ) void nes_carts_state::chr4_x(int start, int bank, int source)
{ {
nes_state *state = machine.driver_data<nes_state>(); chr_sanity_check(machine(), source);
int i;
chr_sanity_check(machine, source);
if (source == CHRRAM) if (source == CHRRAM)
{ {
bank &= ((state->m_vram_chunks << 1) - 1); bank &= ((m_vram_chunks << 1) - 1);
for (i = 0; i < 4; i++) for (int i = 0; i < 4; i++)
{ {
state->m_chr_map[i + start].source = source; m_chr_map[i + start].source = source;
state->m_chr_map[i + start].origin = (bank * 0x1000) + (i * 0x400); // for save state uses! m_chr_map[i + start].origin = (bank * 0x1000) + (i * 0x400); // for save state uses!
state->m_chr_map[i + start].access = &state->m_vram[state->m_chr_map[i + start].origin]; m_chr_map[i + start].access = &m_vram[m_chr_map[i + start].origin];
} }
} }
else else
{ {
bank &= ((state->m_chr_chunks << 1) - 1); bank &= ((m_chr_chunks << 1) - 1);
for (i = 0; i < 4; i++) for (int i = 0; i < 4; i++)
{ {
state->m_chr_map[i + start].source = source; m_chr_map[i + start].source = source;
state->m_chr_map[i + start].origin = (bank * 0x1000) + (i * 0x400); // for save state uses! m_chr_map[i + start].origin = (bank * 0x1000) + (i * 0x400); // for save state uses!
state->m_chr_map[i + start].access = &state->m_vrom[state->m_chr_map[i + start].origin]; m_chr_map[i + start].access = &m_vrom[m_chr_map[i + start].origin];
} }
} }
} }
static void chr4_0( running_machine &machine, int bank, int source ) void nes_carts_state::chr2_x(int start, int bank, int source)
{ {
chr4_x(machine, 0, bank, source); chr_sanity_check(machine(), source);
}
static void chr4_4( running_machine &machine, int bank, int source )
{
chr4_x(machine, 4, bank, source);
}
static void chr2_x( running_machine &machine, int start, int bank, int source )
{
nes_state *state = machine.driver_data<nes_state>();
int i;
chr_sanity_check(machine, source);
if (source == CHRRAM) if (source == CHRRAM)
{ {
bank &= ((state->m_vram_chunks << 2) - 1); bank &= ((m_vram_chunks << 2) - 1);
for (i = 0; i < 2; i++) for (int i = 0; i < 2; i++)
{ {
state->m_chr_map[i + start].source = source; m_chr_map[i + start].source = source;
state->m_chr_map[i + start].origin = (bank * 0x800) + (i * 0x400); // for save state uses! m_chr_map[i + start].origin = (bank * 0x800) + (i * 0x400); // for save state uses!
state->m_chr_map[i + start].access = &state->m_vram[state->m_chr_map[i + start].origin]; m_chr_map[i + start].access = &m_vram[m_chr_map[i + start].origin];
} }
} }
else else
{ {
bank &= ((state->m_chr_chunks << 2) - 1); bank &= ((m_chr_chunks << 2) - 1);
for (i = 0; i < 2; i++) for (int i = 0; i < 2; i++)
{ {
state->m_chr_map[i + start].source = source; m_chr_map[i + start].source = source;
state->m_chr_map[i + start].origin = (bank * 0x800) + (i * 0x400); // for save state uses! m_chr_map[i + start].origin = (bank * 0x800) + (i * 0x400); // for save state uses!
state->m_chr_map[i + start].access = &state->m_vrom[state->m_chr_map[i + start].origin]; m_chr_map[i + start].access = &m_vrom[m_chr_map[i + start].origin];
} }
} }
} }
static void chr2_0( running_machine &machine, int bank, int source ) void nes_carts_state::chr1_x(int start, int bank, int source)
{ {
chr2_x(machine, 0, bank, source); chr_sanity_check(machine(), source);
}
static void chr2_2( running_machine &machine, int bank, int source )
{
chr2_x(machine, 2, bank, source);
}
static void chr2_4( running_machine &machine, int bank, int source )
{
chr2_x(machine, 4, bank, source);
}
static void chr2_6( running_machine &machine, int bank, int source )
{
chr2_x(machine, 6, bank, source);
}
static void chr1_x( running_machine &machine, int start, int bank, int source )
{
nes_state *state = machine.driver_data<nes_state>();
chr_sanity_check(machine, source);
if (source == CHRRAM) if (source == CHRRAM)
{ {
bank &= ((state->m_vram_chunks << 3) - 1); bank &= ((m_vram_chunks << 3) - 1);
state->m_chr_map[start].source = source; m_chr_map[start].source = source;
state->m_chr_map[start].origin = (bank * 0x400); // for save state uses! m_chr_map[start].origin = (bank * 0x400); // for save state uses!
state->m_chr_map[start].access = &state->m_vram[state->m_chr_map[start].origin]; m_chr_map[start].access = &m_vram[m_chr_map[start].origin];
} }
else else
{ {
bank &= ((state->m_chr_chunks << 3) - 1); bank &= ((m_chr_chunks << 3) - 1);
state->m_chr_map[start].source = source; m_chr_map[start].source = source;
state->m_chr_map[start].origin = (bank * 0x400); // for save state uses! m_chr_map[start].origin = (bank * 0x400); // for save state uses!
state->m_chr_map[start].access = &state->m_vrom[state->m_chr_map[start].origin]; m_chr_map[start].access = &m_vrom[m_chr_map[start].origin];
} }
} }
static void chr1_0 (running_machine &machine, int bank, int source)
{
chr1_x(machine, 0, bank, source);
}
static void chr1_1( running_machine &machine, int bank, int source )
{
chr1_x(machine, 1, bank, source);
}
static void chr1_2( running_machine &machine, int bank, int source )
{
chr1_x(machine, 2, bank, source);
}
static void chr1_3( running_machine &machine, int bank, int source )
{
chr1_x(machine, 3, bank, source);
}
static void chr1_4( running_machine &machine, int bank, int source )
{
chr1_x(machine, 4, bank, source);
}
static void chr1_5( running_machine &machine, int bank, int source )
{
chr1_x(machine, 5, bank, source);
}
static void chr1_6( running_machine &machine, int bank, int source )
{
chr1_x(machine, 6, bank, source);
}
static void chr1_7( running_machine &machine, int bank, int source )
{
chr1_x(machine, 7, bank, source);
}
/* NameTable paging and mirroring */ /* NameTable paging and mirroring */
static void set_nt_page( running_machine &machine, int page, int source, int bank, int writable ) void nes_carts_state::set_nt_page(int page, int source, int bank, int writable)
{ {
nes_state *state = machine.driver_data<nes_state>();
UINT8* base_ptr; UINT8* base_ptr;
switch (source) switch (source)
{ {
case CART_NTRAM: case CART_NTRAM:
base_ptr = state->m_extended_ntram; base_ptr = m_extended_ntram;
break; break;
case MMC5FILL: case MMC5FILL:
base_ptr = NULL; base_ptr = NULL;
break; break;
case ROM: case ROM:
base_ptr = state->m_vrom; base_ptr = m_vrom;
break; break;
case EXRAM: case EXRAM:
base_ptr = state->m_mapper_ram; base_ptr = m_mapper_ram;
break; break;
case CIRAM: case CIRAM:
default: default:
base_ptr = state->m_ciram; base_ptr = m_ciram;
break; break;
} }
page &= 3; /* mask down to the 4 logical pages */ page &= 3; /* mask down to the 4 logical pages */
state->m_nt_page[page].source = source; m_nt_page[page].source = source;
if (base_ptr != NULL) if (base_ptr != NULL)
{ {
state->m_nt_page[page].origin = bank * 0x400; m_nt_page[page].origin = bank * 0x400;
state->m_nt_page[page].access = base_ptr + state->m_nt_page[page].origin; m_nt_page[page].access = base_ptr + m_nt_page[page].origin;
} }
state->m_nt_page[page].writable = writable; m_nt_page[page].writable = writable;
} }
void set_nt_mirroring( running_machine &machine, int mirroring ) void nes_carts_state::set_nt_mirroring(int mirroring)
{ {
/* setup our videomem handlers based on mirroring */ /* setup our videomem handlers based on mirroring */
switch (mirroring) switch (mirroring)
{ {
case PPU_MIRROR_VERT: case PPU_MIRROR_VERT:
set_nt_page(machine, 0, CIRAM, 0, 1); set_nt_page(0, CIRAM, 0, 1);
set_nt_page(machine, 1, CIRAM, 1, 1); set_nt_page(1, CIRAM, 1, 1);
set_nt_page(machine, 2, CIRAM, 0, 1); set_nt_page(2, CIRAM, 0, 1);
set_nt_page(machine, 3, CIRAM, 1, 1); set_nt_page(3, CIRAM, 1, 1);
break; break;
case PPU_MIRROR_HORZ: case PPU_MIRROR_HORZ:
set_nt_page(machine, 0, CIRAM, 0, 1); set_nt_page(0, CIRAM, 0, 1);
set_nt_page(machine, 1, CIRAM, 0, 1); set_nt_page(1, CIRAM, 0, 1);
set_nt_page(machine, 2, CIRAM, 1, 1); set_nt_page(2, CIRAM, 1, 1);
set_nt_page(machine, 3, CIRAM, 1, 1); set_nt_page(3, CIRAM, 1, 1);
break; break;
case PPU_MIRROR_HIGH: case PPU_MIRROR_HIGH:
set_nt_page(machine, 0, CIRAM, 1, 1); set_nt_page(0, CIRAM, 1, 1);
set_nt_page(machine, 1, CIRAM, 1, 1); set_nt_page(1, CIRAM, 1, 1);
set_nt_page(machine, 2, CIRAM, 1, 1); set_nt_page(2, CIRAM, 1, 1);
set_nt_page(machine, 3, CIRAM, 1, 1); set_nt_page(3, CIRAM, 1, 1);
break; break;
case PPU_MIRROR_LOW: case PPU_MIRROR_LOW:
set_nt_page(machine, 0, CIRAM, 0, 1); set_nt_page(0, CIRAM, 0, 1);
set_nt_page(machine, 1, CIRAM, 0, 1); set_nt_page(1, CIRAM, 0, 1);
set_nt_page(machine, 2, CIRAM, 0, 1); set_nt_page(2, CIRAM, 0, 1);
set_nt_page(machine, 3, CIRAM, 0, 1); set_nt_page(3, CIRAM, 0, 1);
break; break;
case PPU_MIRROR_NONE: case PPU_MIRROR_NONE:
@ -653,10 +551,10 @@ void set_nt_mirroring( running_machine &machine, int mirroring )
logerror("Mapper set 4-screen mirroring without supplying external nametable memory!\n"); logerror("Mapper set 4-screen mirroring without supplying external nametable memory!\n");
set_nt_page(machine, 0, CIRAM, 0, 1); set_nt_page(0, CIRAM, 0, 1);
set_nt_page(machine, 1, CIRAM, 0, 1); set_nt_page(1, CIRAM, 0, 1);
set_nt_page(machine, 2, CIRAM, 1, 1); set_nt_page(2, CIRAM, 1, 1);
set_nt_page(machine, 3, CIRAM, 1, 1); set_nt_page(3, CIRAM, 1, 1);
break; break;
} }
} }

2225
src/mess/machine/nes_pcb.c
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