mirror of
https://github.com/holub/mame
synced 2025-07-06 02:18:09 +03:00
segaxbd.cpp: Rewrite CXD1095 as a device and also add it to megatech.cpp
This commit is contained in:
AJR
parent
0d78cbcf17
commit
32984a5a51
@ -742,6 +742,18 @@ if (MACHINES["CS8221"]~=null) then
|
||||
}
|
||||
end
|
||||
|
||||
---------------------------------------------------
|
||||
--
|
||||
--@src/devices/machine/cxd1095.h,MACHINES["CXD1095"] = true
|
||||
---------------------------------------------------
|
||||
|
||||
if (MACHINES["CXD1095"]~=null) then
|
||||
files {
|
||||
MAME_DIR .. "src/devices/machine/cxd1095.cpp",
|
||||
MAME_DIR .. "src/devices/machine/cxd1095.h",
|
||||
}
|
||||
end
|
||||
|
||||
---------------------------------------------------
|
||||
--
|
||||
--@src/devices/machine/dm9334.h,MACHINES["DM9334"] = true
|
||||
|
||||
@ -403,6 +403,7 @@ MACHINES["COM8116"] = true
|
||||
MACHINES["CR589"] = true
|
||||
--MACHINES["CS4031"] = true
|
||||
--MACHINES["CS8221"] = true
|
||||
MACHINES["CXD1095"] = true
|
||||
--MACHINES["DM9334"] = true
|
||||
--MACHINES["DP8390"] = true
|
||||
MACHINES["DS1204"] = true
|
||||
|
||||
@ -394,6 +394,7 @@ MACHINES["COM8116"] = true
|
||||
MACHINES["CR589"] = true
|
||||
MACHINES["CS4031"] = true
|
||||
MACHINES["CS8221"] = true
|
||||
--MACHINES["CXD1095"] = true
|
||||
MACHINES["DM9334"] = true
|
||||
MACHINES["DP8390"] = true
|
||||
--MACHINES["DS1204"] = true
|
||||
|
||||
138
src/devices/machine/cxd1095.cpp
Normal file
138
src/devices/machine/cxd1095.cpp
Normal file
@ -0,0 +1,138 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:AJR
|
||||
// thanks-to:Aaron Giles
|
||||
/**********************************************************************
|
||||
|
||||
Sony CXD1095 CMOS I/O Port Expander
|
||||
|
||||
Based on Sega X Board driver by Aaron Giles
|
||||
|
||||
This device provides four 8-bit ports (PA-PD) and one 4-bit port
|
||||
(PE or PX). All these ports can be configured for input or for
|
||||
output, entirely or in parts. The upper and lower halves of ports
|
||||
A-D can be separately configured by the first of the two
|
||||
write-only control registers. The second control register
|
||||
determines the direction of individual PE/PX bits.
|
||||
|
||||
**********************************************************************/
|
||||
|
||||
#include "emu.h"
|
||||
#include "machine/cxd1095.h"
|
||||
|
||||
//**************************************************************************
|
||||
// GLOBAL VARIABLES
|
||||
//**************************************************************************
|
||||
|
||||
const device_type CXD1095 = device_creator<cxd1095_device>;
|
||||
|
||||
//**************************************************************************
|
||||
// DEVICE DEFINITION
|
||||
//**************************************************************************
|
||||
|
||||
//-------------------------------------------------
|
||||
// cxd1095_device - constructor
|
||||
//-------------------------------------------------
|
||||
|
||||
cxd1095_device::cxd1095_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock)
|
||||
: device_t(mconfig, CXD1095, "CXD1095 I/O Expander", tag, owner, clock, "cxd1095", __FILE__),
|
||||
m_input_cb{{*this}, {*this}, {*this}, {*this}, {*this}},
|
||||
m_output_cb{{*this}, {*this}, {*this}, {*this}, {*this}}
|
||||
{
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// device_start - device-specific startup
|
||||
//-------------------------------------------------
|
||||
|
||||
void cxd1095_device::device_start()
|
||||
{
|
||||
// resolve callbacks
|
||||
for (auto &cb : m_input_cb)
|
||||
cb.resolve();
|
||||
for (auto &cb : m_output_cb)
|
||||
cb.resolve();
|
||||
|
||||
std::fill(std::begin(m_data_latch), std::end(m_data_latch), 0);
|
||||
std::fill(std::begin(m_data_dir), std::end(m_data_dir), 0xff);
|
||||
|
||||
// save state
|
||||
save_item(NAME(m_data_latch));
|
||||
save_item(NAME(m_data_dir));
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// read - read from an input port
|
||||
//-------------------------------------------------
|
||||
|
||||
READ8_MEMBER(cxd1095_device::read)
|
||||
{
|
||||
if (offset < 5)
|
||||
{
|
||||
u8 input_data = 0;
|
||||
u8 input_mask = m_data_dir[offset];
|
||||
if (offset == 4)
|
||||
input_mask &= 0x0f;
|
||||
|
||||
// read through callback if port not configured entirely for output
|
||||
if (input_mask != 0 && !m_input_cb[offset].isnull())
|
||||
input_data = m_input_cb[offset](0, input_mask) & input_mask;
|
||||
else if (m_data_dir[offset] == 0xff)
|
||||
logerror("Reading from undefined input port %c\n", 'A' + offset);
|
||||
|
||||
// combine live inputs with latched data
|
||||
return input_data | (m_data_latch[offset] & ~m_data_dir[offset]);
|
||||
}
|
||||
|
||||
logerror("Reading from nonexistent port %c\n", 'A' + offset);
|
||||
return 0;
|
||||
}
|
||||
|
||||
//-------------------------------------------------
|
||||
// write - write to an output port or one of two
|
||||
// control registers
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE8_MEMBER(cxd1095_device::write)
|
||||
{
|
||||
if (offset < 5)
|
||||
{
|
||||
// port E is only 4 bits wide
|
||||
if (offset == 4)
|
||||
data &= 0x0f;
|
||||
|
||||
// update our latched data
|
||||
m_data_latch[offset] = data;
|
||||
|
||||
// send output through callback
|
||||
u8 dataout = data & ~m_data_dir[offset];
|
||||
if (!m_output_cb[offset].isnull())
|
||||
m_output_cb[offset](0, dataout, ~m_data_dir[offset]);
|
||||
else
|
||||
logerror("Writing %02X to undefined output port %c\n", dataout, 'A' + offset);
|
||||
}
|
||||
else if (offset == 6)
|
||||
{
|
||||
// control register 1 determines direction of each half of ports A-D
|
||||
for (int port = 0; port < 4; port++)
|
||||
{
|
||||
m_data_dir[port] = (BIT(data, 0) ? 0x0f : 0) | (BIT(data, 1) ? 0xf0 : 0);
|
||||
|
||||
if (m_data_dir[port] != 0)
|
||||
logerror("Port %c & %02X configured for input\n", 'A' + port, m_data_dir[port]);
|
||||
if (m_data_dir[port] != 0xff)
|
||||
logerror("Port %c & %02X configured for output\n", 'A' + port, 0xff ^ m_data_dir[port]);
|
||||
|
||||
data >>= 2;
|
||||
}
|
||||
}
|
||||
else if (offset == 7)
|
||||
{
|
||||
// control register 2 determines direction of the four port E bits
|
||||
m_data_dir[4] = (data & 0x0f) | 0xf0;
|
||||
|
||||
if (m_data_dir[4] != 0xf0)
|
||||
logerror("Port E & %X configured for input\n", 0x0f & m_data_dir[4]);
|
||||
if (m_data_dir[4] != 0xff)
|
||||
logerror("Port E & %X configured for output\n", 0xff ^ m_data_dir[4]);
|
||||
}
|
||||
}
|
||||
120
src/devices/machine/cxd1095.h
Normal file
120
src/devices/machine/cxd1095.h
Normal file
@ -0,0 +1,120 @@
|
||||
// license:BSD-3-Clause
|
||||
// copyright-holders:AJR
|
||||
/**********************************************************************
|
||||
|
||||
Sony CXD1095 CMOS I/O Port Expander
|
||||
|
||||
CXD1095Q: 64-pin quad flat package
|
||||
|
||||
1-2 NC
|
||||
3-9 PB1-PB7
|
||||
10 GND
|
||||
11-18 PC0-PC7
|
||||
19 NC
|
||||
|
||||
20-24 PD0-PD4
|
||||
25 GND
|
||||
26 Vdd
|
||||
27-29 PD5-PD7
|
||||
30-32 D0-D2
|
||||
|
||||
33-34 NC
|
||||
35-39 D3-D7
|
||||
40 /CLR
|
||||
41 /RST
|
||||
42 GND
|
||||
43 /WR
|
||||
44 /RD
|
||||
45 /CS
|
||||
46-48 A0-A2
|
||||
49-50 PX0-PX1
|
||||
51 NC
|
||||
|
||||
52-53 PX2-PX3
|
||||
54-56 PA0-PA2
|
||||
57 GND
|
||||
58 Vdd
|
||||
59-63 PA3-PA7
|
||||
64 PB0
|
||||
|
||||
**********************************************************************/
|
||||
|
||||
#pragma once
|
||||
|
||||
#ifndef DEVICES_MACHINE_CXD1095_H
|
||||
#define DEVICES_MACHINE_CXD1095_H
|
||||
|
||||
//**************************************************************************
|
||||
// CONFIGURATION MACROS
|
||||
//**************************************************************************
|
||||
|
||||
#define MCFG_CXD1095_IN_PORTA_CB(_devcb) \
|
||||
devcb = &cxd1095_device::set_input_cb(*device, 0, DEVCB_##_devcb);
|
||||
#define MCFG_CXD1095_IN_PORTB_CB(_devcb) \
|
||||
devcb = &cxd1095_device::set_input_cb(*device, 1, DEVCB_##_devcb);
|
||||
#define MCFG_CXD1095_IN_PORTC_CB(_devcb) \
|
||||
devcb = &cxd1095_device::set_input_cb(*device, 2, DEVCB_##_devcb);
|
||||
#define MCFG_CXD1095_IN_PORTD_CB(_devcb) \
|
||||
devcb = &cxd1095_device::set_input_cb(*device, 3, DEVCB_##_devcb);
|
||||
#define MCFG_CXD1095_IN_PORTE_CB(_devcb) \
|
||||
devcb = &cxd1095_device::set_input_cb(*device, 4, DEVCB_##_devcb);
|
||||
|
||||
#define MCFG_CXD1095_OUT_PORTA_CB(_devcb) \
|
||||
devcb = &cxd1095_device::set_output_cb(*device, 0, DEVCB_##_devcb);
|
||||
#define MCFG_CXD1095_OUT_PORTB_CB(_devcb) \
|
||||
devcb = &cxd1095_device::set_output_cb(*device, 1, DEVCB_##_devcb);
|
||||
#define MCFG_CXD1095_OUT_PORTC_CB(_devcb) \
|
||||
devcb = &cxd1095_device::set_output_cb(*device, 2, DEVCB_##_devcb);
|
||||
#define MCFG_CXD1095_OUT_PORTD_CB(_devcb) \
|
||||
devcb = &cxd1095_device::set_output_cb(*device, 3, DEVCB_##_devcb);
|
||||
#define MCFG_CXD1095_OUT_PORTE_CB(_devcb) \
|
||||
devcb = &cxd1095_device::set_output_cb(*device, 4, DEVCB_##_devcb);
|
||||
|
||||
//**************************************************************************
|
||||
// TYPE DEFINITIONS
|
||||
//**************************************************************************
|
||||
|
||||
// ======================> cxd1095_device
|
||||
|
||||
class cxd1095_device : public device_t
|
||||
{
|
||||
public:
|
||||
// construction/destruction
|
||||
cxd1095_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock);
|
||||
|
||||
// static configuration
|
||||
template<class Object>
|
||||
static devcb_base &set_input_cb(device_t &device, int p, Object &&obj)
|
||||
{
|
||||
assert(p >= 0 && p < 5);
|
||||
return downcast<cxd1095_device &>(device).m_input_cb[p].set_callback(std::forward<Object>(obj));
|
||||
}
|
||||
template<class Object>
|
||||
static devcb_base &set_output_cb(device_t &device, int p, Object &&obj)
|
||||
{
|
||||
assert(p >= 0 && p < 5);
|
||||
return downcast<cxd1095_device &>(device).m_output_cb[p].set_callback(std::forward<Object>(obj));
|
||||
}
|
||||
|
||||
// memory handlers
|
||||
DECLARE_READ8_MEMBER(read);
|
||||
DECLARE_WRITE8_MEMBER(write);
|
||||
|
||||
protected:
|
||||
// device-level overrides
|
||||
virtual void device_start() override;
|
||||
|
||||
private:
|
||||
// input/output callbacks
|
||||
devcb_read8 m_input_cb[5];
|
||||
devcb_write8 m_output_cb[5];
|
||||
|
||||
// internal state
|
||||
u8 m_data_latch[5];
|
||||
u8 m_data_dir[5];
|
||||
};
|
||||
|
||||
// device type definition
|
||||
extern const device_type CXD1095;
|
||||
|
||||
#endif
|
||||
@ -72,6 +72,7 @@ Sonic Hedgehog 2 171-6215A 837-6963-62 610-0239-62 MPR
|
||||
*/
|
||||
#include "emu.h"
|
||||
#include "cpu/z80/z80.h"
|
||||
#include "machine/cxd1095.h"
|
||||
#include "sound/sn76496.h"
|
||||
#include "rendlay.h"
|
||||
|
||||
@ -105,8 +106,10 @@ public:
|
||||
|
||||
DECLARE_READ8_MEMBER(cart_select_r);
|
||||
DECLARE_WRITE8_MEMBER(cart_select_w);
|
||||
DECLARE_READ8_MEMBER(bios_ctrl_r);
|
||||
DECLARE_WRITE8_MEMBER(bios_ctrl_w);
|
||||
DECLARE_READ8_MEMBER(bios_portc_r);
|
||||
DECLARE_READ8_MEMBER(bios_porte_r);
|
||||
DECLARE_WRITE8_MEMBER(bios_portd_w);
|
||||
DECLARE_WRITE8_MEMBER(bios_porte_w);
|
||||
DECLARE_READ8_MEMBER(read_68k_banked_data);
|
||||
DECLARE_WRITE8_MEMBER(write_68k_banked_data);
|
||||
DECLARE_WRITE8_MEMBER(mt_z80_bank_w);
|
||||
@ -302,10 +305,6 @@ static INPUT_PORTS_START( megatech ) /* Genesis Input Ports */
|
||||
INPUT_PORTS_END
|
||||
|
||||
/* MEGATECH specific */
|
||||
READ8_MEMBER(mtech_state::cart_select_r )
|
||||
{
|
||||
return m_mt_cart_select_reg;
|
||||
}
|
||||
|
||||
READ8_MEMBER(mtech_state::sms_count_r)
|
||||
{
|
||||
@ -453,7 +452,7 @@ void mtech_state::switch_cart(int gameno)
|
||||
}
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(mtech_state::cart_select_w )
|
||||
WRITE8_MEMBER(mtech_state::cart_select_w)
|
||||
{
|
||||
/* seems to write the slot number..
|
||||
but it stores something in (banked?) ram
|
||||
@ -464,27 +463,25 @@ WRITE8_MEMBER(mtech_state::cart_select_w )
|
||||
}
|
||||
|
||||
|
||||
READ8_MEMBER(mtech_state::bios_ctrl_r )
|
||||
READ8_MEMBER(mtech_state::bios_portc_r)
|
||||
{
|
||||
if (offset == 0)
|
||||
return 0;
|
||||
if (offset == 2)
|
||||
return m_bios_ctrl[offset] & 0xfe;
|
||||
|
||||
return m_bios_ctrl[offset];
|
||||
return 0;
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(mtech_state::bios_ctrl_w )
|
||||
READ8_MEMBER(mtech_state::bios_porte_r)
|
||||
{
|
||||
if (offset == 1)
|
||||
{
|
||||
output().set_value("Alarm_sound", BIT(data, 7));
|
||||
m_bios_ctrl_inputs = data & 0x04; // Genesis/SMS input ports disable bit
|
||||
}
|
||||
else if (offset == 2)
|
||||
output().set_value("Flash_screen", BIT(data, 1));
|
||||
return 0;
|
||||
}
|
||||
|
||||
m_bios_ctrl[offset] = data;
|
||||
WRITE8_MEMBER(mtech_state::bios_portd_w)
|
||||
{
|
||||
output().set_value("Alarm_sound", BIT(data, 7));
|
||||
m_bios_ctrl_inputs = data & 0x04; // Genesis/SMS input ports disable bit
|
||||
}
|
||||
|
||||
WRITE8_MEMBER(mtech_state::bios_porte_w)
|
||||
{
|
||||
output().set_value("Flash_screen", BIT(data, 1));
|
||||
}
|
||||
|
||||
/* this sets 0x300000 which may indicate that the 68k can see the instruction rom
|
||||
@ -525,13 +522,8 @@ static ADDRESS_MAP_START( megatech_bios_map, AS_PROGRAM, 8, mtech_state )
|
||||
AM_RANGE(0x3000, 0x3fff) AM_READWRITE(banked_ram_r, banked_ram_w) // copies instruction data here at startup, must be banked
|
||||
AM_RANGE(0x4000, 0x5fff) AM_RAM // plain ram?
|
||||
AM_RANGE(0x6000, 0x6000) AM_WRITE(mt_z80_bank_w )
|
||||
AM_RANGE(0x6400, 0x6400) AM_READ_PORT("BIOS_DSW0")
|
||||
AM_RANGE(0x6401, 0x6401) AM_READ_PORT("BIOS_DSW1")
|
||||
AM_RANGE(0x6404, 0x6404) AM_READWRITE(cart_select_r, cart_select_w) // cart select & ram bank
|
||||
AM_RANGE(0x6800, 0x6800) AM_READ_PORT("BIOS_IN0")
|
||||
AM_RANGE(0x6801, 0x6801) AM_READ_PORT("BIOS_IN1")
|
||||
AM_RANGE(0x6802, 0x6807) AM_READWRITE(bios_ctrl_r, bios_ctrl_w)
|
||||
// AM_RANGE(0x6805, 0x6805) AM_READ_PORT("???")
|
||||
AM_RANGE(0x6400, 0x6407) AM_DEVREADWRITE("io1", cxd1095_device, read, write)
|
||||
AM_RANGE(0x6800, 0x6807) AM_DEVREADWRITE("io2", cxd1095_device, read, write)
|
||||
AM_RANGE(0x7000, 0x77ff) AM_ROM // from bios rom (0x7000-0x77ff populated in ROM)
|
||||
//AM_RANGE(0x7800, 0x7fff) AM_RAM // ?
|
||||
AM_RANGE(0x8000, 0x9fff) AM_READWRITE(read_68k_banked_data, write_68k_banked_data) // window into 68k address space, reads instr rom and writes to reset banks on z80 carts?
|
||||
@ -685,6 +677,19 @@ static MACHINE_CONFIG_START( megatech, mtech_state )
|
||||
MCFG_CPU_PROGRAM_MAP(megatech_bios_map)
|
||||
MCFG_CPU_IO_MAP(megatech_bios_portmap)
|
||||
|
||||
MCFG_DEVICE_ADD("io1", CXD1095, 0)
|
||||
MCFG_CXD1095_IN_PORTA_CB(IOPORT("BIOS_DSW0"))
|
||||
MCFG_CXD1095_IN_PORTB_CB(IOPORT("BIOS_DSW0"))
|
||||
MCFG_CXD1095_OUT_PORTE_CB(WRITE8(mtech_state, cart_select_w))
|
||||
|
||||
MCFG_DEVICE_ADD("io2", CXD1095, 0)
|
||||
MCFG_CXD1095_IN_PORTA_CB(IOPORT("BIOS_IN0"))
|
||||
MCFG_CXD1095_IN_PORTB_CB(IOPORT("BIOS_IN1"))
|
||||
MCFG_CXD1095_IN_PORTC_CB(READ8(mtech_state, bios_portc_r))
|
||||
MCFG_CXD1095_OUT_PORTD_CB(WRITE8(mtech_state, bios_portd_w))
|
||||
MCFG_CXD1095_IN_PORTE_CB(READ8(mtech_state, bios_porte_r))
|
||||
MCFG_CXD1095_OUT_PORTE_CB(WRITE8(mtech_state, bios_porte_w))
|
||||
|
||||
MCFG_MACHINE_RESET_OVERRIDE(mtech_state, megatech)
|
||||
|
||||
MCFG_DEFAULT_LAYOUT(layout_dualhovu)
|
||||
|
||||
@ -264,6 +264,7 @@ ROMs:
|
||||
#include "includes/segaxbd.h"
|
||||
#include "includes/segaipt.h"
|
||||
|
||||
#include "machine/cxd1095.h"
|
||||
#include "machine/nvram.h"
|
||||
#include "sound/ym2151.h"
|
||||
#include "sound/segapcm.h"
|
||||
@ -295,6 +296,7 @@ segaxbd_state::segaxbd_state(const machine_config &mconfig, device_type type, co
|
||||
m_scanline_timer(nullptr),
|
||||
m_timer_irq_state(0),
|
||||
m_vblank_irq_state(0),
|
||||
m_pc_0(0),
|
||||
m_loffire_sync(nullptr),
|
||||
m_lastsurv_mux(0),
|
||||
m_paletteram(*this, "paletteram"),
|
||||
@ -306,7 +308,6 @@ segaxbd_state::segaxbd_state(const machine_config &mconfig, device_type type, co
|
||||
m_mux_ports(*this, {"MUX0", "MUX1", "MUX2", "MUX3"})
|
||||
{
|
||||
memset(m_adc_reverse, 0, sizeof(m_adc_reverse));
|
||||
memset(m_iochip_regs, 0, sizeof(m_iochip_regs));
|
||||
palette_init();
|
||||
}
|
||||
|
||||
@ -324,15 +325,11 @@ void segaxbd_state::device_start()
|
||||
// allocate a scanline timer
|
||||
m_scanline_timer = timer_alloc(TID_SCANLINE);
|
||||
|
||||
// reset the custom handlers and other pointers
|
||||
m_iochip_custom_io_w[0][3] = iowrite_delegate(&segaxbd_state::generic_iochip0_lamps_w, this);
|
||||
|
||||
|
||||
// save state
|
||||
save_item(NAME(m_timer_irq_state));
|
||||
save_item(NAME(m_vblank_irq_state));
|
||||
save_item(NAME(m_iochip_regs[0]));
|
||||
save_item(NAME(m_iochip_regs[1]));
|
||||
save_item(NAME(m_pc_0));
|
||||
save_item(NAME(m_lastsurv_mux));
|
||||
}
|
||||
|
||||
@ -473,7 +470,7 @@ void segaxbd_state::sound_data_w(uint8_t data)
|
||||
READ16_MEMBER( segaxbd_state::adc_r )
|
||||
{
|
||||
// on the write, latch the selected input port and stash the value
|
||||
int which = (m_iochip_regs[0][2] >> 2) & 7;
|
||||
int which = (m_pc_0 >> 2) & 7;
|
||||
int value = m_adc_ports[which].read_safe(0x0010);
|
||||
|
||||
// reverse some port values
|
||||
@ -495,192 +492,47 @@ WRITE16_MEMBER( segaxbd_state::adc_w )
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// iochip_r - helper to handle I/O chip reads
|
||||
// pc_0_w - handle writes to port C on the first
|
||||
// I/O chip
|
||||
//-------------------------------------------------
|
||||
|
||||
inline uint16_t segaxbd_state::iochip_r(int which, int port, int inputval)
|
||||
WRITE8_MEMBER(segaxbd_state::pc_0_w)
|
||||
{
|
||||
uint16_t result = m_iochip_regs[which][port];
|
||||
|
||||
// if there's custom I/O, do that to get the input value
|
||||
if (!m_iochip_custom_io_r[which][port].isnull())
|
||||
inputval = m_iochip_custom_io_r[which][port](inputval);
|
||||
|
||||
// for ports 0-3, the direction is controlled 4 bits at a time by register 6
|
||||
if (port <= 3)
|
||||
{
|
||||
if ((m_iochip_regs[which][6] >> (2 * port + 0)) & 1)
|
||||
result = (result & ~0x0f) | (inputval & 0x0f);
|
||||
if ((m_iochip_regs[which][6] >> (2 * port + 1)) & 1)
|
||||
result = (result & ~0xf0) | (inputval & 0xf0);
|
||||
}
|
||||
|
||||
// for port 4, the direction is controlled 1 bit at a time by register 7
|
||||
else
|
||||
{
|
||||
if ((m_iochip_regs[which][7] >> 0) & 1)
|
||||
result = (result & ~0x01) | (inputval & 0x01);
|
||||
if ((m_iochip_regs[which][7] >> 1) & 1)
|
||||
result = (result & ~0x02) | (inputval & 0x02);
|
||||
if ((m_iochip_regs[which][7] >> 2) & 1)
|
||||
result = (result & ~0x04) | (inputval & 0x04);
|
||||
if ((m_iochip_regs[which][7] >> 3) & 1)
|
||||
result = (result & ~0x08) | (inputval & 0x08);
|
||||
result &= 0x0f;
|
||||
}
|
||||
return result;
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// iochip_0_r - handle reads from the first I/O
|
||||
// chip
|
||||
//-------------------------------------------------
|
||||
|
||||
READ16_MEMBER( segaxbd_state::iochip_0_r )
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
case 0:
|
||||
// Input port:
|
||||
// D7: (Not connected)
|
||||
// D6: /INTR of ADC0804
|
||||
// D5-D0: CN C pin 24-19 (switch state 0= open, 1= closed)
|
||||
return iochip_r(0, 0, ioport("IO0PORTA")->read());
|
||||
|
||||
case 1:
|
||||
// I/O port: CN C pins 17,15,13,11,9,7,5,3
|
||||
return iochip_r(0, 1, ioport("IO0PORTB")->read());
|
||||
|
||||
case 2:
|
||||
// Output port
|
||||
return iochip_r(0, 2, 0);
|
||||
|
||||
case 3:
|
||||
// Output port
|
||||
return iochip_r(0, 3, 0);
|
||||
|
||||
case 4:
|
||||
// Unused
|
||||
return iochip_r(0, 4, 0);
|
||||
}
|
||||
|
||||
// everything else returns 0
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// iochip_0_w - handle writes to the first I/O
|
||||
// chip
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE16_MEMBER( segaxbd_state::iochip_0_w )
|
||||
{
|
||||
// access is via the low 8 bits
|
||||
if (!ACCESSING_BITS_0_7)
|
||||
return;
|
||||
|
||||
data &= 0xff;
|
||||
|
||||
// swap in the new value and remember the previous value
|
||||
uint8_t oldval = m_iochip_regs[0][offset];
|
||||
m_iochip_regs[0][offset] = data;
|
||||
uint8_t oldval = m_pc_0;
|
||||
m_pc_0 = data;
|
||||
|
||||
// certain offsets have common effects
|
||||
switch (offset)
|
||||
{
|
||||
case 2:
|
||||
// Output port:
|
||||
// D7: (Not connected)
|
||||
// D6: (/WDC) - watchdog reset
|
||||
// D5: Screen display (1= blanked, 0= displayed)
|
||||
// D4-D2: (ADC2-0)
|
||||
// D1: (CONT) - affects sprite hardware
|
||||
// D0: Sound section reset (1= normal operation, 0= reset)
|
||||
if (((oldval ^ data) & 0x40) && !(data & 0x40))
|
||||
m_watchdog->watchdog_reset();
|
||||
// Output port:
|
||||
// D7: (Not connected)
|
||||
// D6: (/WDC) - watchdog reset
|
||||
// D5: Screen display (1= blanked, 0= displayed)
|
||||
// D4-D2: (ADC2-0)
|
||||
// D1: (CONT) - affects sprite hardware
|
||||
// D0: Sound section reset (1= normal operation, 0= reset)
|
||||
if (((oldval ^ data) & 0x40) && !(data & 0x40))
|
||||
m_watchdog->watchdog_reset();
|
||||
|
||||
m_segaic16vid->set_display_enable(data & 0x20);
|
||||
m_segaic16vid->set_display_enable(data & 0x20);
|
||||
|
||||
m_soundcpu->set_input_line(INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
|
||||
if (m_soundcpu2 != nullptr)
|
||||
m_soundcpu2->set_input_line(INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
|
||||
break;
|
||||
|
||||
case 3:
|
||||
// Output port:
|
||||
// D7: Amplifier mute control (1= sounding, 0= muted)
|
||||
// D6-D0: CN D pin A17-A23 (output level 1= high, 0= low) - usually set up as lamps and coincounter
|
||||
machine().sound().system_enable(data & 0x80);
|
||||
break;
|
||||
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
// if there's custom I/O, handle that as well
|
||||
if (!m_iochip_custom_io_w[0][offset].isnull())
|
||||
m_iochip_custom_io_w[0][offset](data);
|
||||
else if (offset <= 4)
|
||||
logerror("I/O chip 0, port %c write = %02X\n", 'A' + offset, data);
|
||||
m_soundcpu->set_input_line(INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
|
||||
if (m_soundcpu2 != nullptr)
|
||||
m_soundcpu2->set_input_line(INPUT_LINE_RESET, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// iochip_1_r - handle reads from the second I/O
|
||||
// chip
|
||||
// pd_0_w - handle writes to port D on the first
|
||||
// I/O chip
|
||||
//-------------------------------------------------
|
||||
|
||||
READ16_MEMBER( segaxbd_state::iochip_1_r )
|
||||
WRITE8_MEMBER(segaxbd_state::pd_0_w)
|
||||
{
|
||||
switch (offset)
|
||||
{
|
||||
case 0:
|
||||
// Input port: switches, CN D pin A1-8 (switch state 1= open, 0= closed)
|
||||
return iochip_r(1, 0, ioport("IO1PORTA")->read());
|
||||
// Output port:
|
||||
// D7: Amplifier mute control (1= sounding, 0= muted)
|
||||
// D6-D0: CN D pin A17-A23 (output level 1= high, 0= low) - usually set up as lamps and coincounter
|
||||
machine().sound().system_enable(data & 0x80);
|
||||
|
||||
case 1:
|
||||
// Input port: switches, CN D pin A9-16 (switch state 1= open, 0= closed)
|
||||
return iochip_r(1, 1, ioport("IO1PORTB")->read());
|
||||
|
||||
case 2:
|
||||
// Input port: DIP switches (1= off, 0= on)
|
||||
return iochip_r(1, 2, ioport("IO1PORTC")->read());
|
||||
|
||||
case 3:
|
||||
// Input port: DIP switches (1= off, 0= on)
|
||||
return iochip_r(1, 3, ioport("IO1PORTD")->read());
|
||||
|
||||
case 4:
|
||||
// Unused
|
||||
return iochip_r(1, 4, 0);
|
||||
}
|
||||
|
||||
// everything else returns 0
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// iochip_1_w - handle writes to the second I/O
|
||||
// chip
|
||||
//-------------------------------------------------
|
||||
|
||||
WRITE16_MEMBER( segaxbd_state::iochip_1_w )
|
||||
{
|
||||
// access is via the low 8 bits
|
||||
if (!ACCESSING_BITS_0_7)
|
||||
return;
|
||||
|
||||
data &= 0xff;
|
||||
m_iochip_regs[1][offset] = data;
|
||||
|
||||
// if there's custom I/O, handle that as well
|
||||
if (!m_iochip_custom_io_w[1][offset].isnull())
|
||||
m_iochip_custom_io_w[1][offset](data);
|
||||
else if (offset <= 4)
|
||||
logerror("I/O chip 1, port %c write = %02X\n", 'A' + offset, data);
|
||||
generic_iochip0_lamps_w(data);
|
||||
}
|
||||
|
||||
|
||||
@ -878,13 +730,13 @@ void segaxbd_state::generic_iochip0_lamps_w(uint8_t data)
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// aburner2_iochip0_motor_r - motor I/O reads
|
||||
// for Afterburner II
|
||||
// aburner2_motor_r - motor reads from port A
|
||||
// of I/O chip 0 for Afterburner II
|
||||
//-------------------------------------------------
|
||||
|
||||
uint8_t segaxbd_state::aburner2_iochip0_motor_r(uint8_t data)
|
||||
READ8_MEMBER(segaxbd_state::aburner2_motor_r)
|
||||
{
|
||||
data &= 0xc0;
|
||||
uint8_t data = ioport("IO0PORTA")->read() & 0xc0;
|
||||
|
||||
// TODO
|
||||
return data | 0x3f;
|
||||
@ -892,24 +744,24 @@ uint8_t segaxbd_state::aburner2_iochip0_motor_r(uint8_t data)
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// aburner2_iochip0_motor_w - motor I/O writes
|
||||
// for Afterburner II
|
||||
// aburner2_motor_w - motor writes to port B
|
||||
// of I/O chip 0 for Afterburner II
|
||||
//-------------------------------------------------
|
||||
|
||||
void segaxbd_state::aburner2_iochip0_motor_w(uint8_t data)
|
||||
WRITE8_MEMBER(segaxbd_state::aburner2_motor_w)
|
||||
{
|
||||
// TODO
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// smgp_iochip0_motor_r - motor I/O reads
|
||||
// for Super Monaco GP
|
||||
// smgp_motor_r - motor reads from port A of
|
||||
// I/O chip 0 for Super Monaco GP
|
||||
//-------------------------------------------------
|
||||
|
||||
uint8_t segaxbd_state::smgp_iochip0_motor_r(uint8_t data)
|
||||
READ8_MEMBER(segaxbd_state::smgp_motor_r)
|
||||
{
|
||||
data &= 0xc0;
|
||||
uint8_t data = ioport("IO0PORTA")->read() & 0xc0;
|
||||
|
||||
// TODO
|
||||
return data | 0x0;
|
||||
@ -917,34 +769,36 @@ uint8_t segaxbd_state::smgp_iochip0_motor_r(uint8_t data)
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// smgp_iochip0_motor_w - motor I/O reads
|
||||
// for Super Monaco GP
|
||||
// smgp_motor_w - motor writes to port B of
|
||||
// I/O chip 0 for Super Monaco GP
|
||||
//-------------------------------------------------
|
||||
|
||||
void segaxbd_state::smgp_iochip0_motor_w(uint8_t data)
|
||||
WRITE8_MEMBER(segaxbd_state::smgp_motor_w)
|
||||
{
|
||||
// TODO
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// lastsurv_iochip1_port_r - muxed I/O reads
|
||||
// for Last Survivor
|
||||
// lastsurv_port_r - muxed reads on port B of
|
||||
// I/O chip 1 for Last Survivor
|
||||
//-------------------------------------------------
|
||||
|
||||
uint8_t segaxbd_state::lastsurv_iochip1_port_r(uint8_t data)
|
||||
READ8_MEMBER(segaxbd_state::lastsurv_port_r)
|
||||
{
|
||||
return m_mux_ports[m_lastsurv_mux].read_safe(0xff);
|
||||
}
|
||||
|
||||
|
||||
//-------------------------------------------------
|
||||
// lastsurv_iochip0_muxer_w - muxed I/O writes
|
||||
// for Last Survivor
|
||||
// lastsurv_muxer_w - muxed writes on port D
|
||||
// of I/O chip 0 for Last Survivor
|
||||
//-------------------------------------------------
|
||||
|
||||
void segaxbd_state::lastsurv_iochip0_muxer_w(uint8_t data)
|
||||
WRITE8_MEMBER(segaxbd_state::lastsurv_muxer_w)
|
||||
{
|
||||
machine().sound().system_enable(data & 0x80);
|
||||
|
||||
m_lastsurv_mux = (data >> 5) & 3;
|
||||
generic_iochip0_lamps_w(data & 0x9f);
|
||||
}
|
||||
@ -1102,8 +956,8 @@ static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, segaxbd_state )
|
||||
AM_RANGE(0x110000, 0x11ffff) AM_DEVWRITE("sprites", sega_xboard_sprite_device, draw_write)
|
||||
AM_RANGE(0x120000, 0x123fff) AM_MIRROR(0x00c000) AM_RAM_WRITE(paletteram_w) AM_SHARE("paletteram")
|
||||
AM_RANGE(0x130000, 0x13ffff) AM_READWRITE(adc_r, adc_w)
|
||||
AM_RANGE(0x140000, 0x14000f) AM_MIRROR(0x00fff0) AM_READWRITE(iochip_0_r, iochip_0_w)
|
||||
AM_RANGE(0x150000, 0x15000f) AM_MIRROR(0x00fff0) AM_READWRITE(iochip_1_r, iochip_1_w)
|
||||
AM_RANGE(0x140000, 0x14000f) AM_MIRROR(0x00fff0) AM_DEVREADWRITE8("iochip_0", cxd1095_device, read, write, 0x00ff)
|
||||
AM_RANGE(0x150000, 0x15000f) AM_MIRROR(0x00fff0) AM_DEVREADWRITE8("iochip_1", cxd1095_device, read, write, 0x00ff)
|
||||
AM_RANGE(0x160000, 0x16ffff) AM_WRITE(iocontrol_w)
|
||||
AM_RANGE(0x200000, 0x27ffff) AM_ROM AM_REGION("subcpu", 0x00000)
|
||||
AM_RANGE(0x280000, 0x283fff) AM_MIRROR(0x01c000) AM_RAM AM_SHARE("subram0")
|
||||
@ -1247,13 +1101,15 @@ ADDRESS_MAP_END
|
||||
|
||||
static INPUT_PORTS_START( xboard_generic )
|
||||
PORT_START("mainpcb:IO0PORTA")
|
||||
PORT_BIT( 0x3f, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) // /INTR of ADC0804
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )
|
||||
PORT_BIT( 0x3f, IP_ACTIVE_LOW, IPT_UNKNOWN ) // D5-D0: CN C pin 24-19 (switch state 0= open, 1= closed)
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_SPECIAL ) // D6: /INTR of ADC0804
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) // D7: (Not connected)
|
||||
|
||||
// I/O port: CN C pins 17,15,13,11,9,7,5,3
|
||||
PORT_START("mainpcb:IO0PORTB")
|
||||
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
// Input port: switches, CN D pin A1-8 (switch state 1= open, 0= closed)
|
||||
PORT_START("mainpcb:IO1PORTA")
|
||||
PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // button? not used by any game we have
|
||||
PORT_SERVICE_NO_TOGGLE( 0x02, IP_ACTIVE_LOW )
|
||||
@ -1264,12 +1120,15 @@ static INPUT_PORTS_START( xboard_generic )
|
||||
PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 )
|
||||
PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_COIN2 )
|
||||
|
||||
// Input port: switches, CN D pin A9-16 (switch state 1= open, 0= closed)
|
||||
PORT_START("mainpcb:IO1PORTB")
|
||||
PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNKNOWN )
|
||||
|
||||
// Input port: DIP switches (1= off, 0= on)
|
||||
PORT_START("mainpcb:IO1PORTC")
|
||||
SEGA_COINAGE_LOC(SWA)
|
||||
|
||||
// Input port: DIP switches (1= off, 0= on)
|
||||
PORT_START("mainpcb:IO1PORTD")
|
||||
PORT_DIPUNUSED_DIPLOC( 0x01, IP_ACTIVE_LOW, "SWB:1" )
|
||||
PORT_DIPUNUSED_DIPLOC( 0x02, IP_ACTIVE_LOW, "SWB:2" )
|
||||
@ -1842,6 +1701,18 @@ static MACHINE_CONFIG_FRAGMENT( xboard )
|
||||
|
||||
MCFG_SEGA_315_5250_COMPARE_TIMER_ADD("cmptimer_subx")
|
||||
|
||||
MCFG_DEVICE_ADD("iochip_0", CXD1095, 0)
|
||||
MCFG_CXD1095_IN_PORTA_CB(IOPORT("IO0PORTA"))
|
||||
MCFG_CXD1095_IN_PORTB_CB(IOPORT("IO0PORTB"))
|
||||
MCFG_CXD1095_OUT_PORTC_CB(WRITE8(segaxbd_state, pc_0_w))
|
||||
MCFG_CXD1095_OUT_PORTD_CB(WRITE8(segaxbd_state, pd_0_w))
|
||||
|
||||
MCFG_DEVICE_ADD("iochip_1", CXD1095, 0)
|
||||
MCFG_CXD1095_IN_PORTA_CB(IOPORT("IO1PORTA"))
|
||||
MCFG_CXD1095_IN_PORTB_CB(IOPORT("IO1PORTB"))
|
||||
MCFG_CXD1095_IN_PORTC_CB(IOPORT("IO1PORTC"))
|
||||
MCFG_CXD1095_IN_PORTD_CB(IOPORT("IO1PORTD"))
|
||||
|
||||
// video hardware
|
||||
MCFG_GFXDECODE_ADD("gfxdecode", "palette", segaxbd)
|
||||
MCFG_PALETTE_ADD("palette", 8192*3)
|
||||
@ -1928,6 +1799,32 @@ MACHINE_CONFIG_END
|
||||
// GAME-SPECIFIC MACHINE DRIVERS
|
||||
//**************************************************************************
|
||||
|
||||
static MACHINE_CONFIG_FRAGMENT( aburner2 )
|
||||
MCFG_FRAGMENT_ADD( xboard )
|
||||
|
||||
// basic machine hardware
|
||||
MCFG_DEVICE_MODIFY("iochip_0")
|
||||
MCFG_CXD1095_IN_PORTA_CB(READ8(segaxbd_state, aburner2_motor_r))
|
||||
MCFG_CXD1095_OUT_PORTB_CB(WRITE8(segaxbd_state, aburner2_motor_w))
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
const device_type SEGA_XBD_ABURNER2_DEVICE = device_creator<segaxbd_aburner2_state>;
|
||||
|
||||
segaxbd_aburner2_state::segaxbd_aburner2_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
|
||||
: segaxbd_state(mconfig, SEGA_XBD_ABURNER2_DEVICE, "Sega X-Board After Burner PCB", tag, owner, clock, "segakbd_pcb_aburner2", __FILE__)
|
||||
{
|
||||
}
|
||||
|
||||
machine_config_constructor segaxbd_aburner2_state::device_mconfig_additions() const
|
||||
{
|
||||
return MACHINE_CONFIG_NAME( aburner2 );
|
||||
}
|
||||
|
||||
static MACHINE_CONFIG_START( sega_aburner2, segaxbd_new_state )
|
||||
MCFG_DEVICE_ADD("mainpcb", SEGA_XBD_ABURNER2_DEVICE, 0)
|
||||
MACHINE_CONFIG_END
|
||||
|
||||
|
||||
static MACHINE_CONFIG_FRAGMENT( lastsurv_fd1094 )
|
||||
|
||||
MCFG_FRAGMENT_ADD( xboard_fd1094 )
|
||||
@ -1935,6 +1832,12 @@ static MACHINE_CONFIG_FRAGMENT( lastsurv_fd1094 )
|
||||
// basic machine hardware
|
||||
// TODO: network board
|
||||
|
||||
MCFG_DEVICE_MODIFY("iochip_0")
|
||||
MCFG_CXD1095_OUT_PORTD_CB(WRITE8(segaxbd_state, lastsurv_muxer_w))
|
||||
|
||||
MCFG_DEVICE_MODIFY("iochip_1")
|
||||
MCFG_CXD1095_IN_PORTB_CB(READ8(segaxbd_state, lastsurv_port_r))
|
||||
|
||||
// sound hardware - ym2151 stereo is reversed
|
||||
MCFG_SOUND_MODIFY("ymsnd")
|
||||
MCFG_SOUND_ROUTES_RESET()
|
||||
@ -1965,6 +1868,12 @@ static MACHINE_CONFIG_FRAGMENT( lastsurv )
|
||||
// basic machine hardware
|
||||
// TODO: network board
|
||||
|
||||
MCFG_DEVICE_MODIFY("iochip_0")
|
||||
MCFG_CXD1095_OUT_PORTD_CB(WRITE8(segaxbd_state, lastsurv_muxer_w))
|
||||
|
||||
MCFG_DEVICE_MODIFY("iochip_1")
|
||||
MCFG_CXD1095_IN_PORTB_CB(READ8(segaxbd_state, lastsurv_port_r))
|
||||
|
||||
// sound hardware - ym2151 stereo is reversed
|
||||
MCFG_SOUND_MODIFY("ymsnd")
|
||||
MCFG_SOUND_ROUTES_RESET()
|
||||
@ -2006,6 +1915,10 @@ static MACHINE_CONFIG_FRAGMENT( smgp_fd1094 )
|
||||
MCFG_CPU_PROGRAM_MAP(smgp_airdrive_map)
|
||||
MCFG_CPU_IO_MAP(smgp_airdrive_portmap)
|
||||
|
||||
MCFG_DEVICE_MODIFY("iochip_0")
|
||||
MCFG_CXD1095_IN_PORTA_CB(READ8(segaxbd_state, smgp_motor_r))
|
||||
MCFG_CXD1095_OUT_PORTB_CB(WRITE8(segaxbd_state, smgp_motor_w))
|
||||
|
||||
// sound hardware
|
||||
MCFG_SPEAKER_STANDARD_STEREO("rearleft", "rearright")
|
||||
|
||||
@ -2049,6 +1962,10 @@ static MACHINE_CONFIG_FRAGMENT( smgp )
|
||||
MCFG_CPU_PROGRAM_MAP(smgp_airdrive_map)
|
||||
MCFG_CPU_IO_MAP(smgp_airdrive_portmap)
|
||||
|
||||
MCFG_DEVICE_MODIFY("iochip_0")
|
||||
MCFG_CXD1095_IN_PORTA_CB(READ8(segaxbd_state, smgp_motor_r))
|
||||
MCFG_CXD1095_OUT_PORTB_CB(WRITE8(segaxbd_state, smgp_motor_w))
|
||||
|
||||
// sound hardware
|
||||
MCFG_SPEAKER_STANDARD_STEREO("rearleft", "rearright")
|
||||
|
||||
@ -4744,8 +4661,6 @@ ROM_END
|
||||
void segaxbd_state::install_aburner2(void)
|
||||
{
|
||||
m_road_priority = 0;
|
||||
m_iochip_custom_io_r[0][0] = ioread_delegate(&segaxbd_state::aburner2_iochip0_motor_r, this);
|
||||
m_iochip_custom_io_w[0][1] = iowrite_delegate(&segaxbd_state::aburner2_iochip0_motor_w, this);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(segaxbd_new_state,aburner2)
|
||||
@ -4753,17 +4668,6 @@ DRIVER_INIT_MEMBER(segaxbd_new_state,aburner2)
|
||||
m_mainpcb->install_aburner2();
|
||||
}
|
||||
|
||||
void segaxbd_state::install_lastsurv(void)
|
||||
{
|
||||
m_iochip_custom_io_r[1][1] = ioread_delegate(&segaxbd_state::lastsurv_iochip1_port_r, this);
|
||||
m_iochip_custom_io_w[0][3] = iowrite_delegate(&segaxbd_state::lastsurv_iochip0_muxer_w, this);
|
||||
}
|
||||
|
||||
DRIVER_INIT_MEMBER(segaxbd_new_state,lastsurv)
|
||||
{
|
||||
m_mainpcb->install_lastsurv();
|
||||
}
|
||||
|
||||
void segaxbd_state::install_loffire(void)
|
||||
{
|
||||
m_adc_reverse[1] = m_adc_reverse[3] = true;
|
||||
@ -4781,9 +4685,6 @@ DRIVER_INIT_MEMBER(segaxbd_new_state,loffire)
|
||||
|
||||
void segaxbd_state::install_smgp(void)
|
||||
{
|
||||
m_iochip_custom_io_r[0][0] = ioread_delegate(&segaxbd_state::smgp_iochip0_motor_r, this);
|
||||
m_iochip_custom_io_w[0][1] = iowrite_delegate(&segaxbd_state::smgp_iochip0_motor_w, this);
|
||||
|
||||
// map /EXCS space
|
||||
m_maincpu->space(AS_PROGRAM).install_readwrite_handler(0x2f0000, 0x2f3fff, read16_delegate(FUNC(segaxbd_state::smgp_excs_r), this), write16_delegate(FUNC(segaxbd_state::smgp_excs_w), this));
|
||||
}
|
||||
@ -4833,15 +4734,15 @@ DRIVER_INIT_MEMBER(segaxbd_new_state_double,gprider_double)
|
||||
//**************************************************************************
|
||||
|
||||
// YEAR, NAME, PARENT, MACHINE, INPUT, INIT, MONITOR,COMPANY,FULLNAME,FLAGS
|
||||
GAME( 1987, aburner2, 0, sega_xboard, aburner2, segaxbd_new_state, aburner2, ROT0, "Sega", "After Burner II", 0 )
|
||||
GAME( 1987, aburner2g,aburner2, sega_xboard, aburner2, segaxbd_new_state, aburner2, ROT0, "Sega", "After Burner II (German)", 0 )
|
||||
GAME( 1987, aburner2, 0, sega_aburner2, aburner2, segaxbd_new_state, aburner2, ROT0, "Sega", "After Burner II", 0 )
|
||||
GAME( 1987, aburner2g,aburner2, sega_aburner2, aburner2, segaxbd_new_state, aburner2, ROT0, "Sega", "After Burner II (German)", 0 )
|
||||
|
||||
GAME( 1987, aburner, aburner2, sega_xboard, aburner, segaxbd_new_state, aburner2, ROT0, "Sega", "After Burner", 0 )
|
||||
GAME( 1987, aburner, aburner2, sega_aburner2, aburner, segaxbd_new_state, aburner2, ROT0, "Sega", "After Burner", 0 )
|
||||
|
||||
GAME( 1987, thndrbld, 0, sega_xboard_fd1094, thndrbld, driver_device, 0, ROT0, "Sega", "Thunder Blade (upright) (FD1094 317-0056)", 0 )
|
||||
GAME( 1987, thndrbld1,thndrbld, sega_xboard, thndrbd1, driver_device, 0, ROT0, "Sega", "Thunder Blade (deluxe/standing) (unprotected)", 0 )
|
||||
|
||||
GAME( 1989, lastsurv, 0, sega_lastsurv_fd1094,lastsurv, segaxbd_new_state, lastsurv, ROT0, "Sega", "Last Survivor (Japan) (FD1094 317-0083)", 0 )
|
||||
GAME( 1989, lastsurv, 0, sega_lastsurv_fd1094,lastsurv, driver_device, 0, ROT0, "Sega", "Last Survivor (Japan) (FD1094 317-0083)", 0 )
|
||||
|
||||
GAME( 1989, loffire, 0, sega_xboard_fd1094, loffire, segaxbd_new_state, loffire, ROT0, "Sega", "Line of Fire / Bakudan Yarou (World) (FD1094 317-0136)", 0 )
|
||||
GAME( 1989, loffireu, loffire, sega_xboard_fd1094, loffire, segaxbd_new_state, loffire, ROT0, "Sega", "Line of Fire / Bakudan Yarou (US) (FD1094 317-0135)", 0 )
|
||||
@ -4888,7 +4789,7 @@ GAME( 1989, smgpu1d, smgp, sega_smgp, smgp, segaxbd_new_state, smgp
|
||||
GAME( 1989, smgpu2d, smgp, sega_smgp, smgp, segaxbd_new_state, smgp, ROT0, "bootleg", "Super Monaco GP (US, Rev A) (bootleg of FD1094 317-0125a set)", 0 )
|
||||
GAME( 1989, smgpjd, smgp, sega_smgp, smgp, segaxbd_new_state, smgp, ROT0, "bootleg", "Super Monaco GP (Japan, Rev B) (bootleg of FD1094 317-0124a set)", 0 )
|
||||
|
||||
GAME( 1989, lastsurvd,lastsurv, sega_lastsurv,lastsurv, segaxbd_new_state, lastsurv, ROT0, "bootleg", "Last Survivor (Japan) (bootleg of FD1094 317-0083 set)", 0 )
|
||||
GAME( 1989, lastsurvd,lastsurv, sega_lastsurv,lastsurv, driver_device, 0, ROT0, "bootleg", "Last Survivor (Japan) (bootleg of FD1094 317-0083 set)", 0 )
|
||||
|
||||
GAME( 1990, abcopd, abcop, sega_xboard, abcop, driver_device, 0, ROT0, "bootleg", "A.B. Cop (World) (bootleg of FD1094 317-0169b set)", 0 )
|
||||
GAME( 1990, abcopjd, abcop, sega_xboard, abcop, driver_device, 0, ROT0, "bootleg", "A.B. Cop (Japan) (bootleg of FD1094 317-0169b set)", 0 )
|
||||
|
||||
@ -33,43 +33,42 @@ public:
|
||||
void sound_data_w(uint8_t data);
|
||||
|
||||
// main CPU read/write handlers
|
||||
DECLARE_READ16_MEMBER( adc_r );
|
||||
DECLARE_WRITE16_MEMBER( adc_w );
|
||||
uint16_t iochip_r(int which, int port, int inputval);
|
||||
DECLARE_READ16_MEMBER( iochip_0_r );
|
||||
DECLARE_WRITE16_MEMBER( iochip_0_w );
|
||||
DECLARE_READ16_MEMBER( iochip_1_r );
|
||||
DECLARE_WRITE16_MEMBER( iochip_1_w );
|
||||
DECLARE_WRITE16_MEMBER( iocontrol_w );
|
||||
DECLARE_READ16_MEMBER(adc_r);
|
||||
DECLARE_WRITE16_MEMBER(adc_w);
|
||||
DECLARE_WRITE8_MEMBER(pc_0_w);
|
||||
DECLARE_WRITE8_MEMBER(pd_0_w);
|
||||
DECLARE_WRITE16_MEMBER(iocontrol_w);
|
||||
|
||||
// game-specific main CPU read/write handlers
|
||||
DECLARE_WRITE16_MEMBER( loffire_sync0_w );
|
||||
DECLARE_READ16_MEMBER( rascot_excs_r );
|
||||
DECLARE_WRITE16_MEMBER( rascot_excs_w );
|
||||
DECLARE_READ16_MEMBER( smgp_excs_r );
|
||||
DECLARE_WRITE16_MEMBER( smgp_excs_w );
|
||||
DECLARE_WRITE16_MEMBER(loffire_sync0_w);
|
||||
DECLARE_READ16_MEMBER(rascot_excs_r);
|
||||
DECLARE_WRITE16_MEMBER(rascot_excs_w);
|
||||
DECLARE_READ16_MEMBER(smgp_excs_r);
|
||||
DECLARE_WRITE16_MEMBER(smgp_excs_w);
|
||||
|
||||
// custom I/O
|
||||
DECLARE_READ8_MEMBER(aburner2_motor_r);
|
||||
DECLARE_WRITE8_MEMBER(aburner2_motor_w);
|
||||
DECLARE_READ8_MEMBER(smgp_motor_r);
|
||||
DECLARE_WRITE8_MEMBER(smgp_motor_w);
|
||||
DECLARE_READ8_MEMBER(lastsurv_port_r);
|
||||
DECLARE_WRITE8_MEMBER(lastsurv_muxer_w);
|
||||
|
||||
// sound Z80 CPU read/write handlers
|
||||
DECLARE_READ8_MEMBER( sound_data_r );
|
||||
|
||||
DECLARE_READ8_MEMBER(sound_data_r);
|
||||
|
||||
// video updates
|
||||
uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
|
||||
|
||||
// palette helpers
|
||||
DECLARE_WRITE16_MEMBER( paletteram_w );
|
||||
DECLARE_WRITE16_MEMBER(paletteram_w);
|
||||
|
||||
void install_aburner2(void);
|
||||
void install_lastsurv(void);
|
||||
void install_loffire(void);
|
||||
void install_smgp(void);
|
||||
void install_gprider(void);
|
||||
|
||||
protected:
|
||||
// internal types
|
||||
typedef delegate<uint8_t (uint8_t)> ioread_delegate;
|
||||
typedef delegate<void (uint8_t)> iowrite_delegate;
|
||||
|
||||
// timer IDs
|
||||
enum
|
||||
{
|
||||
@ -86,15 +85,7 @@ protected:
|
||||
// internal helpers
|
||||
void update_main_irqs();
|
||||
DECLARE_WRITE_LINE_MEMBER(m68k_reset_callback);
|
||||
|
||||
// custom I/O
|
||||
void generic_iochip0_lamps_w(uint8_t data);
|
||||
uint8_t aburner2_iochip0_motor_r(uint8_t data);
|
||||
void aburner2_iochip0_motor_w(uint8_t data);
|
||||
uint8_t smgp_iochip0_motor_r(uint8_t data);
|
||||
void smgp_iochip0_motor_w(uint8_t data);
|
||||
uint8_t lastsurv_iochip1_port_r(uint8_t data);
|
||||
void lastsurv_iochip0_muxer_w(uint8_t data);
|
||||
|
||||
// devices
|
||||
public:
|
||||
@ -114,15 +105,13 @@ protected:
|
||||
|
||||
// configuration
|
||||
bool m_adc_reverse[8];
|
||||
ioread_delegate m_iochip_custom_io_r[2][8];
|
||||
iowrite_delegate m_iochip_custom_io_w[2][8];
|
||||
uint8_t m_road_priority;
|
||||
|
||||
// internal state
|
||||
emu_timer * m_scanline_timer;
|
||||
uint8_t m_timer_irq_state;
|
||||
uint8_t m_vblank_irq_state;
|
||||
uint8_t m_iochip_regs[2][8];
|
||||
uint8_t m_pc_0;
|
||||
|
||||
// game-specific state
|
||||
uint16_t * m_loffire_sync;
|
||||
@ -173,6 +162,17 @@ protected:
|
||||
// virtual void device_reset();
|
||||
};
|
||||
|
||||
class segaxbd_aburner2_state : public segaxbd_state
|
||||
{
|
||||
public:
|
||||
segaxbd_aburner2_state(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
|
||||
|
||||
protected:
|
||||
virtual machine_config_constructor device_mconfig_additions() const override;
|
||||
// virtual void device_start();
|
||||
// virtual void device_reset();
|
||||
};
|
||||
|
||||
class segaxbd_lastsurv_fd1094_state : public segaxbd_state
|
||||
{
|
||||
public:
|
||||
|
||||
Loading…
Reference in New Issue
Block a user